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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * This program is used to generate definitions needed by
4 * assembly language modules.
5 *
6 * We use the technique used in the OSF Mach kernel code:
7 * generate asm statements containing #defines,
8 * compile this file to assembler, and then extract the
9 * #defines from the assembly-language output.
10 */
11
12#define GENERATING_ASM_OFFSETS /* asm/smp.h */
13
14#include <linux/compat.h>
15#include <linux/signal.h>
16#include <linux/sched.h>
17#include <linux/kernel.h>
18#include <linux/errno.h>
19#include <linux/string.h>
20#include <linux/types.h>
21#include <linux/mman.h>
22#include <linux/mm.h>
23#include <linux/suspend.h>
24#include <linux/hrtimer.h>
25#ifdef CONFIG_PPC64
26#include <linux/time.h>
27#include <linux/hardirq.h>
28#endif
29#include <linux/kbuild.h>
30
31#include <asm/io.h>
32#include <asm/page.h>
33#include <asm/processor.h>
34#include <asm/cputable.h>
35#include <asm/thread_info.h>
36#include <asm/rtas.h>
37#include <asm/vdso_datapage.h>
38#include <asm/dbell.h>
39#ifdef CONFIG_PPC64
40#include <asm/paca.h>
41#include <asm/lppaca.h>
42#include <asm/cache.h>
43#include <asm/mmu.h>
44#include <asm/hvcall.h>
45#include <asm/xics.h>
46#endif
47#ifdef CONFIG_PPC_POWERNV
48#include <asm/opal.h>
49#endif
50#if defined(CONFIG_KVM) || defined(CONFIG_KVM_GUEST)
51#include <linux/kvm_host.h>
52#endif
53#if defined(CONFIG_KVM) && defined(CONFIG_PPC_BOOK3S)
54#include <asm/kvm_book3s.h>
55#include <asm/kvm_ppc.h>
56#endif
57
58#ifdef CONFIG_PPC32
59#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
60#include "head_booke.h"
61#endif
62#endif
63
64#if defined(CONFIG_PPC_FSL_BOOK3E)
65#include "../mm/mmu_decl.h"
66#endif
67
68#ifdef CONFIG_PPC_8xx
69#include <asm/fixmap.h>
70#endif
71
72#ifdef CONFIG_XMON
73#include "../xmon/xmon_bpts.h"
74#endif
75
76#define STACK_PT_REGS_OFFSET(sym, val) \
77 DEFINE(sym, STACK_FRAME_OVERHEAD + offsetof(struct pt_regs, val))
78
79int main(void)
80{
81 OFFSET(THREAD, task_struct, thread);
82 OFFSET(MM, task_struct, mm);
83#ifdef CONFIG_STACKPROTECTOR
84 OFFSET(TASK_CANARY, task_struct, stack_canary);
85#ifdef CONFIG_PPC64
86 OFFSET(PACA_CANARY, paca_struct, canary);
87#endif
88#endif
89 OFFSET(MMCONTEXTID, mm_struct, context.id);
90#ifdef CONFIG_PPC64
91 DEFINE(SIGSEGV, SIGSEGV);
92 DEFINE(NMI_MASK, NMI_MASK);
93#else
94 OFFSET(KSP_LIMIT, thread_struct, ksp_limit);
95#ifdef CONFIG_PPC_RTAS
96 OFFSET(RTAS_SP, thread_struct, rtas_sp);
97#endif
98#endif /* CONFIG_PPC64 */
99 OFFSET(TASK_STACK, task_struct, stack);
100#ifdef CONFIG_SMP
101 OFFSET(TASK_CPU, task_struct, cpu);
102#endif
103
104#ifdef CONFIG_LIVEPATCH
105 OFFSET(TI_livepatch_sp, thread_info, livepatch_sp);
106#endif
107
108 OFFSET(KSP, thread_struct, ksp);
109 OFFSET(PT_REGS, thread_struct, regs);
110#ifdef CONFIG_BOOKE
111 OFFSET(THREAD_NORMSAVES, thread_struct, normsave[0]);
112#endif
113 OFFSET(THREAD_FPEXC_MODE, thread_struct, fpexc_mode);
114 OFFSET(THREAD_FPSTATE, thread_struct, fp_state.fpr);
115 OFFSET(THREAD_FPSAVEAREA, thread_struct, fp_save_area);
116 OFFSET(FPSTATE_FPSCR, thread_fp_state, fpscr);
117 OFFSET(THREAD_LOAD_FP, thread_struct, load_fp);
118#ifdef CONFIG_ALTIVEC
119 OFFSET(THREAD_VRSTATE, thread_struct, vr_state.vr);
120 OFFSET(THREAD_VRSAVEAREA, thread_struct, vr_save_area);
121 OFFSET(THREAD_VRSAVE, thread_struct, vrsave);
122 OFFSET(THREAD_USED_VR, thread_struct, used_vr);
123 OFFSET(VRSTATE_VSCR, thread_vr_state, vscr);
124 OFFSET(THREAD_LOAD_VEC, thread_struct, load_vec);
125#endif /* CONFIG_ALTIVEC */
126#ifdef CONFIG_VSX
127 OFFSET(THREAD_USED_VSR, thread_struct, used_vsr);
128#endif /* CONFIG_VSX */
129#ifdef CONFIG_PPC64
130 OFFSET(KSP_VSID, thread_struct, ksp_vsid);
131#else /* CONFIG_PPC64 */
132 OFFSET(PGDIR, thread_struct, pgdir);
133#ifdef CONFIG_VMAP_STACK
134 OFFSET(SRR0, thread_struct, srr0);
135 OFFSET(SRR1, thread_struct, srr1);
136 OFFSET(DAR, thread_struct, dar);
137 OFFSET(DSISR, thread_struct, dsisr);
138#ifdef CONFIG_PPC_BOOK3S_32
139 OFFSET(THR0, thread_struct, r0);
140 OFFSET(THR3, thread_struct, r3);
141 OFFSET(THR4, thread_struct, r4);
142 OFFSET(THR5, thread_struct, r5);
143 OFFSET(THR6, thread_struct, r6);
144 OFFSET(THR8, thread_struct, r8);
145 OFFSET(THR9, thread_struct, r9);
146 OFFSET(THR11, thread_struct, r11);
147 OFFSET(THLR, thread_struct, lr);
148 OFFSET(THCTR, thread_struct, ctr);
149#endif
150#endif
151#ifdef CONFIG_SPE
152 OFFSET(THREAD_EVR0, thread_struct, evr[0]);
153 OFFSET(THREAD_ACC, thread_struct, acc);
154 OFFSET(THREAD_SPEFSCR, thread_struct, spefscr);
155 OFFSET(THREAD_USED_SPE, thread_struct, used_spe);
156#endif /* CONFIG_SPE */
157#endif /* CONFIG_PPC64 */
158#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
159 OFFSET(THREAD_DBCR0, thread_struct, debug.dbcr0);
160#endif
161#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
162 OFFSET(THREAD_KVM_SVCPU, thread_struct, kvm_shadow_vcpu);
163#endif
164#if defined(CONFIG_KVM) && defined(CONFIG_BOOKE)
165 OFFSET(THREAD_KVM_VCPU, thread_struct, kvm_vcpu);
166#endif
167#if defined(CONFIG_PPC_BOOK3S_32) && defined(CONFIG_PPC_KUAP)
168 OFFSET(KUAP, thread_struct, kuap);
169#endif
170
171#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
172 OFFSET(PACATMSCRATCH, paca_struct, tm_scratch);
173 OFFSET(THREAD_TM_TFHAR, thread_struct, tm_tfhar);
174 OFFSET(THREAD_TM_TEXASR, thread_struct, tm_texasr);
175 OFFSET(THREAD_TM_TFIAR, thread_struct, tm_tfiar);
176 OFFSET(THREAD_TM_TAR, thread_struct, tm_tar);
177 OFFSET(THREAD_TM_PPR, thread_struct, tm_ppr);
178 OFFSET(THREAD_TM_DSCR, thread_struct, tm_dscr);
179 OFFSET(PT_CKPT_REGS, thread_struct, ckpt_regs);
180 OFFSET(THREAD_CKVRSTATE, thread_struct, ckvr_state.vr);
181 OFFSET(THREAD_CKVRSAVE, thread_struct, ckvrsave);
182 OFFSET(THREAD_CKFPSTATE, thread_struct, ckfp_state.fpr);
183 /* Local pt_regs on stack for Transactional Memory funcs. */
184 DEFINE(TM_FRAME_SIZE, STACK_FRAME_OVERHEAD +
185 sizeof(struct pt_regs) + 16);
186#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
187
188 OFFSET(TI_FLAGS, thread_info, flags);
189 OFFSET(TI_LOCAL_FLAGS, thread_info, local_flags);
190 OFFSET(TI_PREEMPT, thread_info, preempt_count);
191
192#ifdef CONFIG_PPC64
193 OFFSET(DCACHEL1BLOCKSIZE, ppc64_caches, l1d.block_size);
194 OFFSET(DCACHEL1LOGBLOCKSIZE, ppc64_caches, l1d.log_block_size);
195 OFFSET(DCACHEL1BLOCKSPERPAGE, ppc64_caches, l1d.blocks_per_page);
196 OFFSET(ICACHEL1BLOCKSIZE, ppc64_caches, l1i.block_size);
197 OFFSET(ICACHEL1LOGBLOCKSIZE, ppc64_caches, l1i.log_block_size);
198 OFFSET(ICACHEL1BLOCKSPERPAGE, ppc64_caches, l1i.blocks_per_page);
199 /* paca */
200 DEFINE(PACA_SIZE, sizeof(struct paca_struct));
201 OFFSET(PACAPACAINDEX, paca_struct, paca_index);
202 OFFSET(PACAPROCSTART, paca_struct, cpu_start);
203 OFFSET(PACAKSAVE, paca_struct, kstack);
204 OFFSET(PACACURRENT, paca_struct, __current);
205 DEFINE(PACA_THREAD_INFO, offsetof(struct paca_struct, __current) +
206 offsetof(struct task_struct, thread_info));
207 OFFSET(PACASAVEDMSR, paca_struct, saved_msr);
208 OFFSET(PACAR1, paca_struct, saved_r1);
209 OFFSET(PACATOC, paca_struct, kernel_toc);
210 OFFSET(PACAKBASE, paca_struct, kernelbase);
211 OFFSET(PACAKMSR, paca_struct, kernel_msr);
212 OFFSET(PACAIRQSOFTMASK, paca_struct, irq_soft_mask);
213 OFFSET(PACAIRQHAPPENED, paca_struct, irq_happened);
214 OFFSET(PACA_FTRACE_ENABLED, paca_struct, ftrace_enabled);
215#ifdef CONFIG_PPC_BOOK3S
216 OFFSET(PACACONTEXTID, paca_struct, mm_ctx_id);
217#ifdef CONFIG_PPC_MM_SLICES
218 OFFSET(PACALOWSLICESPSIZE, paca_struct, mm_ctx_low_slices_psize);
219 OFFSET(PACAHIGHSLICEPSIZE, paca_struct, mm_ctx_high_slices_psize);
220 OFFSET(PACA_SLB_ADDR_LIMIT, paca_struct, mm_ctx_slb_addr_limit);
221 DEFINE(MMUPSIZEDEFSIZE, sizeof(struct mmu_psize_def));
222#endif /* CONFIG_PPC_MM_SLICES */
223#endif
224
225#ifdef CONFIG_PPC_BOOK3E
226 OFFSET(PACAPGD, paca_struct, pgd);
227 OFFSET(PACA_KERNELPGD, paca_struct, kernel_pgd);
228 OFFSET(PACA_EXGEN, paca_struct, exgen);
229 OFFSET(PACA_EXTLB, paca_struct, extlb);
230 OFFSET(PACA_EXMC, paca_struct, exmc);
231 OFFSET(PACA_EXCRIT, paca_struct, excrit);
232 OFFSET(PACA_EXDBG, paca_struct, exdbg);
233 OFFSET(PACA_MC_STACK, paca_struct, mc_kstack);
234 OFFSET(PACA_CRIT_STACK, paca_struct, crit_kstack);
235 OFFSET(PACA_DBG_STACK, paca_struct, dbg_kstack);
236 OFFSET(PACA_TCD_PTR, paca_struct, tcd_ptr);
237
238 OFFSET(TCD_ESEL_NEXT, tlb_core_data, esel_next);
239 OFFSET(TCD_ESEL_MAX, tlb_core_data, esel_max);
240 OFFSET(TCD_ESEL_FIRST, tlb_core_data, esel_first);
241#endif /* CONFIG_PPC_BOOK3E */
242
243#ifdef CONFIG_PPC_BOOK3S_64
244 OFFSET(PACASLBCACHE, paca_struct, slb_cache);
245 OFFSET(PACASLBCACHEPTR, paca_struct, slb_cache_ptr);
246 OFFSET(PACASTABRR, paca_struct, stab_rr);
247 OFFSET(PACAVMALLOCSLLP, paca_struct, vmalloc_sllp);
248#ifdef CONFIG_PPC_MM_SLICES
249 OFFSET(MMUPSIZESLLP, mmu_psize_def, sllp);
250#else
251 OFFSET(PACACONTEXTSLLP, paca_struct, mm_ctx_sllp);
252#endif /* CONFIG_PPC_MM_SLICES */
253 OFFSET(PACA_EXGEN, paca_struct, exgen);
254 OFFSET(PACA_EXMC, paca_struct, exmc);
255 OFFSET(PACA_EXSLB, paca_struct, exslb);
256 OFFSET(PACA_EXNMI, paca_struct, exnmi);
257#ifdef CONFIG_PPC_PSERIES
258 OFFSET(PACALPPACAPTR, paca_struct, lppaca_ptr);
259#endif
260 OFFSET(PACA_SLBSHADOWPTR, paca_struct, slb_shadow_ptr);
261 OFFSET(SLBSHADOW_STACKVSID, slb_shadow, save_area[SLB_NUM_BOLTED - 1].vsid);
262 OFFSET(SLBSHADOW_STACKESID, slb_shadow, save_area[SLB_NUM_BOLTED - 1].esid);
263 OFFSET(SLBSHADOW_SAVEAREA, slb_shadow, save_area);
264 OFFSET(LPPACA_PMCINUSE, lppaca, pmcregs_in_use);
265#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
266 OFFSET(PACA_PMCINUSE, paca_struct, pmcregs_in_use);
267#endif
268 OFFSET(LPPACA_DTLIDX, lppaca, dtl_idx);
269 OFFSET(LPPACA_YIELDCOUNT, lppaca, yield_count);
270 OFFSET(PACA_DTL_RIDX, paca_struct, dtl_ridx);
271#endif /* CONFIG_PPC_BOOK3S_64 */
272 OFFSET(PACAEMERGSP, paca_struct, emergency_sp);
273#ifdef CONFIG_PPC_BOOK3S_64
274 OFFSET(PACAMCEMERGSP, paca_struct, mc_emergency_sp);
275 OFFSET(PACA_NMI_EMERG_SP, paca_struct, nmi_emergency_sp);
276 OFFSET(PACA_IN_MCE, paca_struct, in_mce);
277 OFFSET(PACA_IN_NMI, paca_struct, in_nmi);
278 OFFSET(PACA_RFI_FLUSH_FALLBACK_AREA, paca_struct, rfi_flush_fallback_area);
279 OFFSET(PACA_EXRFI, paca_struct, exrfi);
280 OFFSET(PACA_L1D_FLUSH_SIZE, paca_struct, l1d_flush_size);
281
282#endif
283 OFFSET(PACAHWCPUID, paca_struct, hw_cpu_id);
284 OFFSET(PACAKEXECSTATE, paca_struct, kexec_state);
285 OFFSET(PACA_DSCR_DEFAULT, paca_struct, dscr_default);
286 OFFSET(ACCOUNT_STARTTIME, paca_struct, accounting.starttime);
287 OFFSET(ACCOUNT_STARTTIME_USER, paca_struct, accounting.starttime_user);
288 OFFSET(ACCOUNT_USER_TIME, paca_struct, accounting.utime);
289 OFFSET(ACCOUNT_SYSTEM_TIME, paca_struct, accounting.stime);
290#ifdef CONFIG_PPC_BOOK3E
291 OFFSET(PACA_TRAP_SAVE, paca_struct, trap_save);
292#endif
293 OFFSET(PACA_SPRG_VDSO, paca_struct, sprg_vdso);
294#else /* CONFIG_PPC64 */
295#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
296 OFFSET(ACCOUNT_STARTTIME, thread_info, accounting.starttime);
297 OFFSET(ACCOUNT_STARTTIME_USER, thread_info, accounting.starttime_user);
298 OFFSET(ACCOUNT_USER_TIME, thread_info, accounting.utime);
299 OFFSET(ACCOUNT_SYSTEM_TIME, thread_info, accounting.stime);
300#endif
301#endif /* CONFIG_PPC64 */
302
303 /* RTAS */
304 OFFSET(RTASBASE, rtas_t, base);
305 OFFSET(RTASENTRY, rtas_t, entry);
306
307 /* Interrupt register frame */
308 DEFINE(INT_FRAME_SIZE, STACK_INT_FRAME_SIZE);
309 DEFINE(SWITCH_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs));
310 STACK_PT_REGS_OFFSET(GPR0, gpr[0]);
311 STACK_PT_REGS_OFFSET(GPR1, gpr[1]);
312 STACK_PT_REGS_OFFSET(GPR2, gpr[2]);
313 STACK_PT_REGS_OFFSET(GPR3, gpr[3]);
314 STACK_PT_REGS_OFFSET(GPR4, gpr[4]);
315 STACK_PT_REGS_OFFSET(GPR5, gpr[5]);
316 STACK_PT_REGS_OFFSET(GPR6, gpr[6]);
317 STACK_PT_REGS_OFFSET(GPR7, gpr[7]);
318 STACK_PT_REGS_OFFSET(GPR8, gpr[8]);
319 STACK_PT_REGS_OFFSET(GPR9, gpr[9]);
320 STACK_PT_REGS_OFFSET(GPR10, gpr[10]);
321 STACK_PT_REGS_OFFSET(GPR11, gpr[11]);
322 STACK_PT_REGS_OFFSET(GPR12, gpr[12]);
323 STACK_PT_REGS_OFFSET(GPR13, gpr[13]);
324#ifndef CONFIG_PPC64
325 STACK_PT_REGS_OFFSET(GPR14, gpr[14]);
326#endif /* CONFIG_PPC64 */
327 /*
328 * Note: these symbols include _ because they overlap with special
329 * register names
330 */
331 STACK_PT_REGS_OFFSET(_NIP, nip);
332 STACK_PT_REGS_OFFSET(_MSR, msr);
333 STACK_PT_REGS_OFFSET(_CTR, ctr);
334 STACK_PT_REGS_OFFSET(_LINK, link);
335 STACK_PT_REGS_OFFSET(_CCR, ccr);
336 STACK_PT_REGS_OFFSET(_XER, xer);
337 STACK_PT_REGS_OFFSET(_DAR, dar);
338 STACK_PT_REGS_OFFSET(_DSISR, dsisr);
339 STACK_PT_REGS_OFFSET(ORIG_GPR3, orig_gpr3);
340 STACK_PT_REGS_OFFSET(RESULT, result);
341 STACK_PT_REGS_OFFSET(_TRAP, trap);
342#ifndef CONFIG_PPC64
343 /*
344 * The PowerPC 400-class & Book-E processors have neither the DAR
345 * nor the DSISR SPRs. Hence, we overload them to hold the similar
346 * DEAR and ESR SPRs for such processors. For critical interrupts
347 * we use them to hold SRR0 and SRR1.
348 */
349 STACK_PT_REGS_OFFSET(_DEAR, dar);
350 STACK_PT_REGS_OFFSET(_ESR, dsisr);
351#else /* CONFIG_PPC64 */
352 STACK_PT_REGS_OFFSET(SOFTE, softe);
353 STACK_PT_REGS_OFFSET(_PPR, ppr);
354#endif /* CONFIG_PPC64 */
355
356#ifdef CONFIG_PPC_KUAP
357 STACK_PT_REGS_OFFSET(STACK_REGS_KUAP, kuap);
358#endif
359
360#if defined(CONFIG_PPC32)
361#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
362 DEFINE(EXC_LVL_SIZE, STACK_EXC_LVL_FRAME_SIZE);
363 DEFINE(MAS0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
364 /* we overload MMUCR for 44x on MAS0 since they are mutually exclusive */
365 DEFINE(MMUCR, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
366 DEFINE(MAS1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas1));
367 DEFINE(MAS2, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas2));
368 DEFINE(MAS3, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas3));
369 DEFINE(MAS6, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas6));
370 DEFINE(MAS7, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas7));
371 DEFINE(_SRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr0));
372 DEFINE(_SRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr1));
373 DEFINE(_CSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr0));
374 DEFINE(_CSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr1));
375 DEFINE(_DSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr0));
376 DEFINE(_DSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr1));
377 DEFINE(SAVED_KSP_LIMIT, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, saved_ksp_limit));
378#endif
379#endif
380
381#ifndef CONFIG_PPC64
382 OFFSET(MM_PGD, mm_struct, pgd);
383#endif /* ! CONFIG_PPC64 */
384
385 /* About the CPU features table */
386 OFFSET(CPU_SPEC_FEATURES, cpu_spec, cpu_features);
387 OFFSET(CPU_SPEC_SETUP, cpu_spec, cpu_setup);
388 OFFSET(CPU_SPEC_RESTORE, cpu_spec, cpu_restore);
389
390 OFFSET(pbe_address, pbe, address);
391 OFFSET(pbe_orig_address, pbe, orig_address);
392 OFFSET(pbe_next, pbe, next);
393
394#ifndef CONFIG_PPC64
395 DEFINE(TASK_SIZE, TASK_SIZE);
396 DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
397#endif /* ! CONFIG_PPC64 */
398
399 /* datapage offsets for use by vdso */
400 OFFSET(CFG_TB_ORIG_STAMP, vdso_data, tb_orig_stamp);
401 OFFSET(CFG_TB_TICKS_PER_SEC, vdso_data, tb_ticks_per_sec);
402 OFFSET(CFG_TB_TO_XS, vdso_data, tb_to_xs);
403 OFFSET(CFG_TB_UPDATE_COUNT, vdso_data, tb_update_count);
404 OFFSET(CFG_TZ_MINUTEWEST, vdso_data, tz_minuteswest);
405 OFFSET(CFG_TZ_DSTTIME, vdso_data, tz_dsttime);
406 OFFSET(CFG_SYSCALL_MAP32, vdso_data, syscall_map_32);
407 OFFSET(WTOM_CLOCK_SEC, vdso_data, wtom_clock_sec);
408 OFFSET(WTOM_CLOCK_NSEC, vdso_data, wtom_clock_nsec);
409 OFFSET(STAMP_XTIME_SEC, vdso_data, stamp_xtime_sec);
410 OFFSET(STAMP_XTIME_NSEC, vdso_data, stamp_xtime_nsec);
411 OFFSET(STAMP_SEC_FRAC, vdso_data, stamp_sec_fraction);
412 OFFSET(CLOCK_HRTIMER_RES, vdso_data, hrtimer_res);
413#ifdef CONFIG_PPC64
414 OFFSET(CFG_ICACHE_BLOCKSZ, vdso_data, icache_block_size);
415 OFFSET(CFG_DCACHE_BLOCKSZ, vdso_data, dcache_block_size);
416 OFFSET(CFG_ICACHE_LOGBLOCKSZ, vdso_data, icache_log_block_size);
417 OFFSET(CFG_DCACHE_LOGBLOCKSZ, vdso_data, dcache_log_block_size);
418 OFFSET(CFG_SYSCALL_MAP64, vdso_data, syscall_map_64);
419 OFFSET(TVAL64_TV_SEC, __kernel_old_timeval, tv_sec);
420 OFFSET(TVAL64_TV_USEC, __kernel_old_timeval, tv_usec);
421#endif
422 OFFSET(TSPC64_TV_SEC, __kernel_timespec, tv_sec);
423 OFFSET(TSPC64_TV_NSEC, __kernel_timespec, tv_nsec);
424 OFFSET(TVAL32_TV_SEC, old_timeval32, tv_sec);
425 OFFSET(TVAL32_TV_USEC, old_timeval32, tv_usec);
426 OFFSET(TSPC32_TV_SEC, old_timespec32, tv_sec);
427 OFFSET(TSPC32_TV_NSEC, old_timespec32, tv_nsec);
428 /* timeval/timezone offsets for use by vdso */
429 OFFSET(TZONE_TZ_MINWEST, timezone, tz_minuteswest);
430 OFFSET(TZONE_TZ_DSTTIME, timezone, tz_dsttime);
431
432 /* Other bits used by the vdso */
433 DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
434 DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
435 DEFINE(CLOCK_REALTIME_COARSE, CLOCK_REALTIME_COARSE);
436 DEFINE(CLOCK_MONOTONIC_COARSE, CLOCK_MONOTONIC_COARSE);
437 DEFINE(CLOCK_MAX, CLOCK_TAI);
438 DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
439 DEFINE(EINVAL, EINVAL);
440 DEFINE(KTIME_LOW_RES, KTIME_LOW_RES);
441
442#ifdef CONFIG_BUG
443 DEFINE(BUG_ENTRY_SIZE, sizeof(struct bug_entry));
444#endif
445
446#ifdef CONFIG_PPC_BOOK3S_64
447 DEFINE(PGD_TABLE_SIZE, (sizeof(pgd_t) << max(RADIX_PGD_INDEX_SIZE, H_PGD_INDEX_SIZE)));
448#else
449 DEFINE(PGD_TABLE_SIZE, PGD_TABLE_SIZE);
450#endif
451 DEFINE(PTE_SIZE, sizeof(pte_t));
452
453#ifdef CONFIG_KVM
454 OFFSET(VCPU_HOST_STACK, kvm_vcpu, arch.host_stack);
455 OFFSET(VCPU_HOST_PID, kvm_vcpu, arch.host_pid);
456 OFFSET(VCPU_GUEST_PID, kvm_vcpu, arch.pid);
457 OFFSET(VCPU_GPRS, kvm_vcpu, arch.regs.gpr);
458 OFFSET(VCPU_VRSAVE, kvm_vcpu, arch.vrsave);
459 OFFSET(VCPU_FPRS, kvm_vcpu, arch.fp.fpr);
460#ifdef CONFIG_ALTIVEC
461 OFFSET(VCPU_VRS, kvm_vcpu, arch.vr.vr);
462#endif
463 OFFSET(VCPU_XER, kvm_vcpu, arch.regs.xer);
464 OFFSET(VCPU_CTR, kvm_vcpu, arch.regs.ctr);
465 OFFSET(VCPU_LR, kvm_vcpu, arch.regs.link);
466#ifdef CONFIG_PPC_BOOK3S
467 OFFSET(VCPU_TAR, kvm_vcpu, arch.tar);
468#endif
469 OFFSET(VCPU_CR, kvm_vcpu, arch.regs.ccr);
470 OFFSET(VCPU_PC, kvm_vcpu, arch.regs.nip);
471#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
472 OFFSET(VCPU_MSR, kvm_vcpu, arch.shregs.msr);
473 OFFSET(VCPU_SRR0, kvm_vcpu, arch.shregs.srr0);
474 OFFSET(VCPU_SRR1, kvm_vcpu, arch.shregs.srr1);
475 OFFSET(VCPU_SPRG0, kvm_vcpu, arch.shregs.sprg0);
476 OFFSET(VCPU_SPRG1, kvm_vcpu, arch.shregs.sprg1);
477 OFFSET(VCPU_SPRG2, kvm_vcpu, arch.shregs.sprg2);
478 OFFSET(VCPU_SPRG3, kvm_vcpu, arch.shregs.sprg3);
479#endif
480#ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING
481 OFFSET(VCPU_TB_RMENTRY, kvm_vcpu, arch.rm_entry);
482 OFFSET(VCPU_TB_RMINTR, kvm_vcpu, arch.rm_intr);
483 OFFSET(VCPU_TB_RMEXIT, kvm_vcpu, arch.rm_exit);
484 OFFSET(VCPU_TB_GUEST, kvm_vcpu, arch.guest_time);
485 OFFSET(VCPU_TB_CEDE, kvm_vcpu, arch.cede_time);
486 OFFSET(VCPU_CUR_ACTIVITY, kvm_vcpu, arch.cur_activity);
487 OFFSET(VCPU_ACTIVITY_START, kvm_vcpu, arch.cur_tb_start);
488 OFFSET(TAS_SEQCOUNT, kvmhv_tb_accumulator, seqcount);
489 OFFSET(TAS_TOTAL, kvmhv_tb_accumulator, tb_total);
490 OFFSET(TAS_MIN, kvmhv_tb_accumulator, tb_min);
491 OFFSET(TAS_MAX, kvmhv_tb_accumulator, tb_max);
492#endif
493 OFFSET(VCPU_SHARED_SPRG3, kvm_vcpu_arch_shared, sprg3);
494 OFFSET(VCPU_SHARED_SPRG4, kvm_vcpu_arch_shared, sprg4);
495 OFFSET(VCPU_SHARED_SPRG5, kvm_vcpu_arch_shared, sprg5);
496 OFFSET(VCPU_SHARED_SPRG6, kvm_vcpu_arch_shared, sprg6);
497 OFFSET(VCPU_SHARED_SPRG7, kvm_vcpu_arch_shared, sprg7);
498 OFFSET(VCPU_SHADOW_PID, kvm_vcpu, arch.shadow_pid);
499 OFFSET(VCPU_SHADOW_PID1, kvm_vcpu, arch.shadow_pid1);
500 OFFSET(VCPU_SHARED, kvm_vcpu, arch.shared);
501 OFFSET(VCPU_SHARED_MSR, kvm_vcpu_arch_shared, msr);
502 OFFSET(VCPU_SHADOW_MSR, kvm_vcpu, arch.shadow_msr);
503#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
504 OFFSET(VCPU_SHAREDBE, kvm_vcpu, arch.shared_big_endian);
505#endif
506
507 OFFSET(VCPU_SHARED_MAS0, kvm_vcpu_arch_shared, mas0);
508 OFFSET(VCPU_SHARED_MAS1, kvm_vcpu_arch_shared, mas1);
509 OFFSET(VCPU_SHARED_MAS2, kvm_vcpu_arch_shared, mas2);
510 OFFSET(VCPU_SHARED_MAS7_3, kvm_vcpu_arch_shared, mas7_3);
511 OFFSET(VCPU_SHARED_MAS4, kvm_vcpu_arch_shared, mas4);
512 OFFSET(VCPU_SHARED_MAS6, kvm_vcpu_arch_shared, mas6);
513
514 OFFSET(VCPU_KVM, kvm_vcpu, kvm);
515 OFFSET(KVM_LPID, kvm, arch.lpid);
516
517 /* book3s */
518#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
519 OFFSET(KVM_TLB_SETS, kvm, arch.tlb_sets);
520 OFFSET(KVM_SDR1, kvm, arch.sdr1);
521 OFFSET(KVM_HOST_LPID, kvm, arch.host_lpid);
522 OFFSET(KVM_HOST_LPCR, kvm, arch.host_lpcr);
523 OFFSET(KVM_HOST_SDR1, kvm, arch.host_sdr1);
524 OFFSET(KVM_NEED_FLUSH, kvm, arch.need_tlb_flush.bits);
525 OFFSET(KVM_ENABLED_HCALLS, kvm, arch.enabled_hcalls);
526 OFFSET(KVM_VRMA_SLB_V, kvm, arch.vrma_slb_v);
527 OFFSET(KVM_RADIX, kvm, arch.radix);
528 OFFSET(KVM_FWNMI, kvm, arch.fwnmi_enabled);
529 OFFSET(KVM_SECURE_GUEST, kvm, arch.secure_guest);
530 OFFSET(VCPU_DSISR, kvm_vcpu, arch.shregs.dsisr);
531 OFFSET(VCPU_DAR, kvm_vcpu, arch.shregs.dar);
532 OFFSET(VCPU_VPA, kvm_vcpu, arch.vpa.pinned_addr);
533 OFFSET(VCPU_VPA_DIRTY, kvm_vcpu, arch.vpa.dirty);
534 OFFSET(VCPU_HEIR, kvm_vcpu, arch.emul_inst);
535 OFFSET(VCPU_NESTED, kvm_vcpu, arch.nested);
536 OFFSET(VCPU_CPU, kvm_vcpu, cpu);
537 OFFSET(VCPU_THREAD_CPU, kvm_vcpu, arch.thread_cpu);
538#endif
539#ifdef CONFIG_PPC_BOOK3S
540 OFFSET(VCPU_PURR, kvm_vcpu, arch.purr);
541 OFFSET(VCPU_SPURR, kvm_vcpu, arch.spurr);
542 OFFSET(VCPU_IC, kvm_vcpu, arch.ic);
543 OFFSET(VCPU_DSCR, kvm_vcpu, arch.dscr);
544 OFFSET(VCPU_AMR, kvm_vcpu, arch.amr);
545 OFFSET(VCPU_UAMOR, kvm_vcpu, arch.uamor);
546 OFFSET(VCPU_IAMR, kvm_vcpu, arch.iamr);
547 OFFSET(VCPU_CTRL, kvm_vcpu, arch.ctrl);
548 OFFSET(VCPU_DABR, kvm_vcpu, arch.dabr);
549 OFFSET(VCPU_DABRX, kvm_vcpu, arch.dabrx);
550 OFFSET(VCPU_DAWR, kvm_vcpu, arch.dawr);
551 OFFSET(VCPU_DAWRX, kvm_vcpu, arch.dawrx);
552 OFFSET(VCPU_CIABR, kvm_vcpu, arch.ciabr);
553 OFFSET(VCPU_HFLAGS, kvm_vcpu, arch.hflags);
554 OFFSET(VCPU_DEC, kvm_vcpu, arch.dec);
555 OFFSET(VCPU_DEC_EXPIRES, kvm_vcpu, arch.dec_expires);
556 OFFSET(VCPU_PENDING_EXC, kvm_vcpu, arch.pending_exceptions);
557 OFFSET(VCPU_CEDED, kvm_vcpu, arch.ceded);
558 OFFSET(VCPU_PRODDED, kvm_vcpu, arch.prodded);
559 OFFSET(VCPU_IRQ_PENDING, kvm_vcpu, arch.irq_pending);
560 OFFSET(VCPU_DBELL_REQ, kvm_vcpu, arch.doorbell_request);
561 OFFSET(VCPU_MMCR, kvm_vcpu, arch.mmcr);
562 OFFSET(VCPU_MMCRA, kvm_vcpu, arch.mmcra);
563 OFFSET(VCPU_MMCRS, kvm_vcpu, arch.mmcrs);
564 OFFSET(VCPU_PMC, kvm_vcpu, arch.pmc);
565 OFFSET(VCPU_SPMC, kvm_vcpu, arch.spmc);
566 OFFSET(VCPU_SIAR, kvm_vcpu, arch.siar);
567 OFFSET(VCPU_SDAR, kvm_vcpu, arch.sdar);
568 OFFSET(VCPU_SIER, kvm_vcpu, arch.sier);
569 OFFSET(VCPU_SLB, kvm_vcpu, arch.slb);
570 OFFSET(VCPU_SLB_MAX, kvm_vcpu, arch.slb_max);
571 OFFSET(VCPU_SLB_NR, kvm_vcpu, arch.slb_nr);
572 OFFSET(VCPU_FAULT_DSISR, kvm_vcpu, arch.fault_dsisr);
573 OFFSET(VCPU_FAULT_DAR, kvm_vcpu, arch.fault_dar);
574 OFFSET(VCPU_FAULT_GPA, kvm_vcpu, arch.fault_gpa);
575 OFFSET(VCPU_INTR_MSR, kvm_vcpu, arch.intr_msr);
576 OFFSET(VCPU_LAST_INST, kvm_vcpu, arch.last_inst);
577 OFFSET(VCPU_TRAP, kvm_vcpu, arch.trap);
578 OFFSET(VCPU_CFAR, kvm_vcpu, arch.cfar);
579 OFFSET(VCPU_PPR, kvm_vcpu, arch.ppr);
580 OFFSET(VCPU_FSCR, kvm_vcpu, arch.fscr);
581 OFFSET(VCPU_PSPB, kvm_vcpu, arch.pspb);
582 OFFSET(VCPU_EBBHR, kvm_vcpu, arch.ebbhr);
583 OFFSET(VCPU_EBBRR, kvm_vcpu, arch.ebbrr);
584 OFFSET(VCPU_BESCR, kvm_vcpu, arch.bescr);
585 OFFSET(VCPU_CSIGR, kvm_vcpu, arch.csigr);
586 OFFSET(VCPU_TACR, kvm_vcpu, arch.tacr);
587 OFFSET(VCPU_TCSCR, kvm_vcpu, arch.tcscr);
588 OFFSET(VCPU_ACOP, kvm_vcpu, arch.acop);
589 OFFSET(VCPU_WORT, kvm_vcpu, arch.wort);
590 OFFSET(VCPU_TID, kvm_vcpu, arch.tid);
591 OFFSET(VCPU_PSSCR, kvm_vcpu, arch.psscr);
592 OFFSET(VCPU_HFSCR, kvm_vcpu, arch.hfscr);
593 OFFSET(VCORE_ENTRY_EXIT, kvmppc_vcore, entry_exit_map);
594 OFFSET(VCORE_IN_GUEST, kvmppc_vcore, in_guest);
595 OFFSET(VCORE_NAPPING_THREADS, kvmppc_vcore, napping_threads);
596 OFFSET(VCORE_KVM, kvmppc_vcore, kvm);
597 OFFSET(VCORE_TB_OFFSET, kvmppc_vcore, tb_offset);
598 OFFSET(VCORE_TB_OFFSET_APPL, kvmppc_vcore, tb_offset_applied);
599 OFFSET(VCORE_LPCR, kvmppc_vcore, lpcr);
600 OFFSET(VCORE_PCR, kvmppc_vcore, pcr);
601 OFFSET(VCORE_DPDES, kvmppc_vcore, dpdes);
602 OFFSET(VCORE_VTB, kvmppc_vcore, vtb);
603 OFFSET(VCPU_SLB_E, kvmppc_slb, orige);
604 OFFSET(VCPU_SLB_V, kvmppc_slb, origv);
605 DEFINE(VCPU_SLB_SIZE, sizeof(struct kvmppc_slb));
606#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
607 OFFSET(VCPU_TFHAR, kvm_vcpu, arch.tfhar);
608 OFFSET(VCPU_TFIAR, kvm_vcpu, arch.tfiar);
609 OFFSET(VCPU_TEXASR, kvm_vcpu, arch.texasr);
610 OFFSET(VCPU_ORIG_TEXASR, kvm_vcpu, arch.orig_texasr);
611 OFFSET(VCPU_GPR_TM, kvm_vcpu, arch.gpr_tm);
612 OFFSET(VCPU_FPRS_TM, kvm_vcpu, arch.fp_tm.fpr);
613 OFFSET(VCPU_VRS_TM, kvm_vcpu, arch.vr_tm.vr);
614 OFFSET(VCPU_VRSAVE_TM, kvm_vcpu, arch.vrsave_tm);
615 OFFSET(VCPU_CR_TM, kvm_vcpu, arch.cr_tm);
616 OFFSET(VCPU_XER_TM, kvm_vcpu, arch.xer_tm);
617 OFFSET(VCPU_LR_TM, kvm_vcpu, arch.lr_tm);
618 OFFSET(VCPU_CTR_TM, kvm_vcpu, arch.ctr_tm);
619 OFFSET(VCPU_AMR_TM, kvm_vcpu, arch.amr_tm);
620 OFFSET(VCPU_PPR_TM, kvm_vcpu, arch.ppr_tm);
621 OFFSET(VCPU_DSCR_TM, kvm_vcpu, arch.dscr_tm);
622 OFFSET(VCPU_TAR_TM, kvm_vcpu, arch.tar_tm);
623#endif
624
625#ifdef CONFIG_PPC_BOOK3S_64
626#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
627 OFFSET(PACA_SVCPU, paca_struct, shadow_vcpu);
628# define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, shadow_vcpu.f))
629#else
630# define SVCPU_FIELD(x, f)
631#endif
632# define HSTATE_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, kvm_hstate.f))
633#else /* 32-bit */
634# define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, f))
635# define HSTATE_FIELD(x, f) DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, hstate.f))
636#endif
637
638 SVCPU_FIELD(SVCPU_CR, cr);
639 SVCPU_FIELD(SVCPU_XER, xer);
640 SVCPU_FIELD(SVCPU_CTR, ctr);
641 SVCPU_FIELD(SVCPU_LR, lr);
642 SVCPU_FIELD(SVCPU_PC, pc);
643 SVCPU_FIELD(SVCPU_R0, gpr[0]);
644 SVCPU_FIELD(SVCPU_R1, gpr[1]);
645 SVCPU_FIELD(SVCPU_R2, gpr[2]);
646 SVCPU_FIELD(SVCPU_R3, gpr[3]);
647 SVCPU_FIELD(SVCPU_R4, gpr[4]);
648 SVCPU_FIELD(SVCPU_R5, gpr[5]);
649 SVCPU_FIELD(SVCPU_R6, gpr[6]);
650 SVCPU_FIELD(SVCPU_R7, gpr[7]);
651 SVCPU_FIELD(SVCPU_R8, gpr[8]);
652 SVCPU_FIELD(SVCPU_R9, gpr[9]);
653 SVCPU_FIELD(SVCPU_R10, gpr[10]);
654 SVCPU_FIELD(SVCPU_R11, gpr[11]);
655 SVCPU_FIELD(SVCPU_R12, gpr[12]);
656 SVCPU_FIELD(SVCPU_R13, gpr[13]);
657 SVCPU_FIELD(SVCPU_FAULT_DSISR, fault_dsisr);
658 SVCPU_FIELD(SVCPU_FAULT_DAR, fault_dar);
659 SVCPU_FIELD(SVCPU_LAST_INST, last_inst);
660 SVCPU_FIELD(SVCPU_SHADOW_SRR1, shadow_srr1);
661#ifdef CONFIG_PPC_BOOK3S_32
662 SVCPU_FIELD(SVCPU_SR, sr);
663#endif
664#ifdef CONFIG_PPC64
665 SVCPU_FIELD(SVCPU_SLB, slb);
666 SVCPU_FIELD(SVCPU_SLB_MAX, slb_max);
667 SVCPU_FIELD(SVCPU_SHADOW_FSCR, shadow_fscr);
668#endif
669
670 HSTATE_FIELD(HSTATE_HOST_R1, host_r1);
671 HSTATE_FIELD(HSTATE_HOST_R2, host_r2);
672 HSTATE_FIELD(HSTATE_HOST_MSR, host_msr);
673 HSTATE_FIELD(HSTATE_VMHANDLER, vmhandler);
674 HSTATE_FIELD(HSTATE_SCRATCH0, scratch0);
675 HSTATE_FIELD(HSTATE_SCRATCH1, scratch1);
676 HSTATE_FIELD(HSTATE_SCRATCH2, scratch2);
677 HSTATE_FIELD(HSTATE_IN_GUEST, in_guest);
678 HSTATE_FIELD(HSTATE_RESTORE_HID5, restore_hid5);
679 HSTATE_FIELD(HSTATE_NAPPING, napping);
680
681#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
682 HSTATE_FIELD(HSTATE_HWTHREAD_REQ, hwthread_req);
683 HSTATE_FIELD(HSTATE_HWTHREAD_STATE, hwthread_state);
684 HSTATE_FIELD(HSTATE_KVM_VCPU, kvm_vcpu);
685 HSTATE_FIELD(HSTATE_KVM_VCORE, kvm_vcore);
686 HSTATE_FIELD(HSTATE_XICS_PHYS, xics_phys);
687 HSTATE_FIELD(HSTATE_XIVE_TIMA_PHYS, xive_tima_phys);
688 HSTATE_FIELD(HSTATE_XIVE_TIMA_VIRT, xive_tima_virt);
689 HSTATE_FIELD(HSTATE_SAVED_XIRR, saved_xirr);
690 HSTATE_FIELD(HSTATE_HOST_IPI, host_ipi);
691 HSTATE_FIELD(HSTATE_PTID, ptid);
692 HSTATE_FIELD(HSTATE_TID, tid);
693 HSTATE_FIELD(HSTATE_FAKE_SUSPEND, fake_suspend);
694 HSTATE_FIELD(HSTATE_MMCR0, host_mmcr[0]);
695 HSTATE_FIELD(HSTATE_MMCR1, host_mmcr[1]);
696 HSTATE_FIELD(HSTATE_MMCRA, host_mmcr[2]);
697 HSTATE_FIELD(HSTATE_SIAR, host_mmcr[3]);
698 HSTATE_FIELD(HSTATE_SDAR, host_mmcr[4]);
699 HSTATE_FIELD(HSTATE_MMCR2, host_mmcr[5]);
700 HSTATE_FIELD(HSTATE_SIER, host_mmcr[6]);
701 HSTATE_FIELD(HSTATE_MMCR3, host_mmcr[7]);
702 HSTATE_FIELD(HSTATE_SIER2, host_mmcr[8]);
703 HSTATE_FIELD(HSTATE_SIER3, host_mmcr[9]);
704 HSTATE_FIELD(HSTATE_PMC1, host_pmc[0]);
705 HSTATE_FIELD(HSTATE_PMC2, host_pmc[1]);
706 HSTATE_FIELD(HSTATE_PMC3, host_pmc[2]);
707 HSTATE_FIELD(HSTATE_PMC4, host_pmc[3]);
708 HSTATE_FIELD(HSTATE_PMC5, host_pmc[4]);
709 HSTATE_FIELD(HSTATE_PMC6, host_pmc[5]);
710 HSTATE_FIELD(HSTATE_PURR, host_purr);
711 HSTATE_FIELD(HSTATE_SPURR, host_spurr);
712 HSTATE_FIELD(HSTATE_DSCR, host_dscr);
713 HSTATE_FIELD(HSTATE_DABR, dabr);
714 HSTATE_FIELD(HSTATE_DECEXP, dec_expires);
715 HSTATE_FIELD(HSTATE_SPLIT_MODE, kvm_split_mode);
716 DEFINE(IPI_PRIORITY, IPI_PRIORITY);
717 OFFSET(KVM_SPLIT_RPR, kvm_split_mode, rpr);
718 OFFSET(KVM_SPLIT_PMMAR, kvm_split_mode, pmmar);
719 OFFSET(KVM_SPLIT_LDBAR, kvm_split_mode, ldbar);
720 OFFSET(KVM_SPLIT_DO_NAP, kvm_split_mode, do_nap);
721 OFFSET(KVM_SPLIT_NAPPED, kvm_split_mode, napped);
722 OFFSET(KVM_SPLIT_DO_SET, kvm_split_mode, do_set);
723 OFFSET(KVM_SPLIT_DO_RESTORE, kvm_split_mode, do_restore);
724#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
725
726#ifdef CONFIG_PPC_BOOK3S_64
727 HSTATE_FIELD(HSTATE_CFAR, cfar);
728 HSTATE_FIELD(HSTATE_PPR, ppr);
729 HSTATE_FIELD(HSTATE_HOST_FSCR, host_fscr);
730#endif /* CONFIG_PPC_BOOK3S_64 */
731
732#else /* CONFIG_PPC_BOOK3S */
733 OFFSET(VCPU_CR, kvm_vcpu, arch.regs.ccr);
734 OFFSET(VCPU_XER, kvm_vcpu, arch.regs.xer);
735 OFFSET(VCPU_LR, kvm_vcpu, arch.regs.link);
736 OFFSET(VCPU_CTR, kvm_vcpu, arch.regs.ctr);
737 OFFSET(VCPU_PC, kvm_vcpu, arch.regs.nip);
738 OFFSET(VCPU_SPRG9, kvm_vcpu, arch.sprg9);
739 OFFSET(VCPU_LAST_INST, kvm_vcpu, arch.last_inst);
740 OFFSET(VCPU_FAULT_DEAR, kvm_vcpu, arch.fault_dear);
741 OFFSET(VCPU_FAULT_ESR, kvm_vcpu, arch.fault_esr);
742 OFFSET(VCPU_CRIT_SAVE, kvm_vcpu, arch.crit_save);
743#endif /* CONFIG_PPC_BOOK3S */
744#endif /* CONFIG_KVM */
745
746#ifdef CONFIG_KVM_GUEST
747 OFFSET(KVM_MAGIC_SCRATCH1, kvm_vcpu_arch_shared, scratch1);
748 OFFSET(KVM_MAGIC_SCRATCH2, kvm_vcpu_arch_shared, scratch2);
749 OFFSET(KVM_MAGIC_SCRATCH3, kvm_vcpu_arch_shared, scratch3);
750 OFFSET(KVM_MAGIC_INT, kvm_vcpu_arch_shared, int_pending);
751 OFFSET(KVM_MAGIC_MSR, kvm_vcpu_arch_shared, msr);
752 OFFSET(KVM_MAGIC_CRITICAL, kvm_vcpu_arch_shared, critical);
753 OFFSET(KVM_MAGIC_SR, kvm_vcpu_arch_shared, sr);
754#endif
755
756#ifdef CONFIG_44x
757 DEFINE(PGD_T_LOG2, PGD_T_LOG2);
758 DEFINE(PTE_T_LOG2, PTE_T_LOG2);
759#endif
760#ifdef CONFIG_PPC_FSL_BOOK3E
761 DEFINE(TLBCAM_SIZE, sizeof(struct tlbcam));
762 OFFSET(TLBCAM_MAS0, tlbcam, MAS0);
763 OFFSET(TLBCAM_MAS1, tlbcam, MAS1);
764 OFFSET(TLBCAM_MAS2, tlbcam, MAS2);
765 OFFSET(TLBCAM_MAS3, tlbcam, MAS3);
766 OFFSET(TLBCAM_MAS7, tlbcam, MAS7);
767#endif
768
769#if defined(CONFIG_KVM) && defined(CONFIG_SPE)
770 OFFSET(VCPU_EVR, kvm_vcpu, arch.evr[0]);
771 OFFSET(VCPU_ACC, kvm_vcpu, arch.acc);
772 OFFSET(VCPU_SPEFSCR, kvm_vcpu, arch.spefscr);
773 OFFSET(VCPU_HOST_SPEFSCR, kvm_vcpu, arch.host_spefscr);
774#endif
775
776#ifdef CONFIG_KVM_BOOKE_HV
777 OFFSET(VCPU_HOST_MAS4, kvm_vcpu, arch.host_mas4);
778 OFFSET(VCPU_HOST_MAS6, kvm_vcpu, arch.host_mas6);
779#endif
780
781#ifdef CONFIG_KVM_XICS
782 DEFINE(VCPU_XIVE_SAVED_STATE, offsetof(struct kvm_vcpu,
783 arch.xive_saved_state));
784 DEFINE(VCPU_XIVE_CAM_WORD, offsetof(struct kvm_vcpu,
785 arch.xive_cam_word));
786 DEFINE(VCPU_XIVE_PUSHED, offsetof(struct kvm_vcpu, arch.xive_pushed));
787 DEFINE(VCPU_XIVE_ESC_ON, offsetof(struct kvm_vcpu, arch.xive_esc_on));
788 DEFINE(VCPU_XIVE_ESC_RADDR, offsetof(struct kvm_vcpu, arch.xive_esc_raddr));
789 DEFINE(VCPU_XIVE_ESC_VADDR, offsetof(struct kvm_vcpu, arch.xive_esc_vaddr));
790#endif
791
792#ifdef CONFIG_KVM_EXIT_TIMING
793 OFFSET(VCPU_TIMING_EXIT_TBU, kvm_vcpu, arch.timing_exit.tv32.tbu);
794 OFFSET(VCPU_TIMING_EXIT_TBL, kvm_vcpu, arch.timing_exit.tv32.tbl);
795 OFFSET(VCPU_TIMING_LAST_ENTER_TBU, kvm_vcpu, arch.timing_last_enter.tv32.tbu);
796 OFFSET(VCPU_TIMING_LAST_ENTER_TBL, kvm_vcpu, arch.timing_last_enter.tv32.tbl);
797#endif
798
799 DEFINE(PPC_DBELL_SERVER, PPC_DBELL_SERVER);
800 DEFINE(PPC_DBELL_MSGTYPE, PPC_DBELL_MSGTYPE);
801
802#ifdef CONFIG_PPC_8xx
803 DEFINE(VIRT_IMMR_BASE, (u64)__fix_to_virt(FIX_IMMR_BASE));
804#endif
805
806#ifdef CONFIG_XMON
807 DEFINE(BPT_SIZE, BPT_SIZE);
808#endif
809
810 return 0;
811}
1/*
2 * This program is used to generate definitions needed by
3 * assembly language modules.
4 *
5 * We use the technique used in the OSF Mach kernel code:
6 * generate asm statements containing #defines,
7 * compile this file to assembler, and then extract the
8 * #defines from the assembly-language output.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15
16#include <linux/signal.h>
17#include <linux/sched.h>
18#include <linux/kernel.h>
19#include <linux/errno.h>
20#include <linux/string.h>
21#include <linux/types.h>
22#include <linux/mman.h>
23#include <linux/mm.h>
24#include <linux/suspend.h>
25#include <linux/hrtimer.h>
26#ifdef CONFIG_PPC64
27#include <linux/time.h>
28#include <linux/hardirq.h>
29#endif
30#include <linux/kbuild.h>
31
32#include <asm/io.h>
33#include <asm/page.h>
34#include <asm/pgtable.h>
35#include <asm/processor.h>
36#include <asm/cputable.h>
37#include <asm/thread_info.h>
38#include <asm/rtas.h>
39#include <asm/vdso_datapage.h>
40#ifdef CONFIG_PPC64
41#include <asm/paca.h>
42#include <asm/lppaca.h>
43#include <asm/cache.h>
44#include <asm/compat.h>
45#include <asm/mmu.h>
46#include <asm/hvcall.h>
47#include <asm/xics.h>
48#endif
49#ifdef CONFIG_PPC_POWERNV
50#include <asm/opal.h>
51#endif
52#if defined(CONFIG_KVM) || defined(CONFIG_KVM_GUEST)
53#include <linux/kvm_host.h>
54#endif
55#if defined(CONFIG_KVM) && defined(CONFIG_PPC_BOOK3S)
56#include <asm/kvm_book3s.h>
57#endif
58
59#ifdef CONFIG_PPC32
60#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
61#include "head_booke.h"
62#endif
63#endif
64
65#if defined(CONFIG_PPC_FSL_BOOK3E)
66#include "../mm/mmu_decl.h"
67#endif
68
69int main(void)
70{
71 DEFINE(THREAD, offsetof(struct task_struct, thread));
72 DEFINE(MM, offsetof(struct task_struct, mm));
73 DEFINE(MMCONTEXTID, offsetof(struct mm_struct, context.id));
74#ifdef CONFIG_PPC64
75 DEFINE(AUDITCONTEXT, offsetof(struct task_struct, audit_context));
76 DEFINE(SIGSEGV, SIGSEGV);
77 DEFINE(NMI_MASK, NMI_MASK);
78 DEFINE(THREAD_DSCR, offsetof(struct thread_struct, dscr));
79 DEFINE(THREAD_DSCR_INHERIT, offsetof(struct thread_struct, dscr_inherit));
80#else
81 DEFINE(THREAD_INFO, offsetof(struct task_struct, stack));
82#endif /* CONFIG_PPC64 */
83
84 DEFINE(KSP, offsetof(struct thread_struct, ksp));
85 DEFINE(KSP_LIMIT, offsetof(struct thread_struct, ksp_limit));
86 DEFINE(PT_REGS, offsetof(struct thread_struct, regs));
87#ifdef CONFIG_BOOKE
88 DEFINE(THREAD_NORMSAVES, offsetof(struct thread_struct, normsave[0]));
89#endif
90 DEFINE(THREAD_FPEXC_MODE, offsetof(struct thread_struct, fpexc_mode));
91 DEFINE(THREAD_FPR0, offsetof(struct thread_struct, fpr[0]));
92 DEFINE(THREAD_FPSCR, offsetof(struct thread_struct, fpscr));
93#ifdef CONFIG_ALTIVEC
94 DEFINE(THREAD_VR0, offsetof(struct thread_struct, vr[0]));
95 DEFINE(THREAD_VRSAVE, offsetof(struct thread_struct, vrsave));
96 DEFINE(THREAD_VSCR, offsetof(struct thread_struct, vscr));
97 DEFINE(THREAD_USED_VR, offsetof(struct thread_struct, used_vr));
98#endif /* CONFIG_ALTIVEC */
99#ifdef CONFIG_VSX
100 DEFINE(THREAD_VSR0, offsetof(struct thread_struct, fpr));
101 DEFINE(THREAD_USED_VSR, offsetof(struct thread_struct, used_vsr));
102#endif /* CONFIG_VSX */
103#ifdef CONFIG_PPC64
104 DEFINE(KSP_VSID, offsetof(struct thread_struct, ksp_vsid));
105#else /* CONFIG_PPC64 */
106 DEFINE(PGDIR, offsetof(struct thread_struct, pgdir));
107#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
108 DEFINE(THREAD_DBCR0, offsetof(struct thread_struct, dbcr0));
109#endif
110#ifdef CONFIG_SPE
111 DEFINE(THREAD_EVR0, offsetof(struct thread_struct, evr[0]));
112 DEFINE(THREAD_ACC, offsetof(struct thread_struct, acc));
113 DEFINE(THREAD_SPEFSCR, offsetof(struct thread_struct, spefscr));
114 DEFINE(THREAD_USED_SPE, offsetof(struct thread_struct, used_spe));
115#endif /* CONFIG_SPE */
116#endif /* CONFIG_PPC64 */
117#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
118 DEFINE(THREAD_KVM_SVCPU, offsetof(struct thread_struct, kvm_shadow_vcpu));
119#endif
120#ifdef CONFIG_KVM_BOOKE_HV
121 DEFINE(THREAD_KVM_VCPU, offsetof(struct thread_struct, kvm_vcpu));
122#endif
123
124 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
125 DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags));
126 DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
127 DEFINE(TI_TASK, offsetof(struct thread_info, task));
128 DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
129
130#ifdef CONFIG_PPC64
131 DEFINE(DCACHEL1LINESIZE, offsetof(struct ppc64_caches, dline_size));
132 DEFINE(DCACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_dline_size));
133 DEFINE(DCACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, dlines_per_page));
134 DEFINE(ICACHEL1LINESIZE, offsetof(struct ppc64_caches, iline_size));
135 DEFINE(ICACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_iline_size));
136 DEFINE(ICACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, ilines_per_page));
137 /* paca */
138 DEFINE(PACA_SIZE, sizeof(struct paca_struct));
139 DEFINE(PACA_LOCK_TOKEN, offsetof(struct paca_struct, lock_token));
140 DEFINE(PACAPACAINDEX, offsetof(struct paca_struct, paca_index));
141 DEFINE(PACAPROCSTART, offsetof(struct paca_struct, cpu_start));
142 DEFINE(PACAKSAVE, offsetof(struct paca_struct, kstack));
143 DEFINE(PACACURRENT, offsetof(struct paca_struct, __current));
144 DEFINE(PACASAVEDMSR, offsetof(struct paca_struct, saved_msr));
145 DEFINE(PACASTABRR, offsetof(struct paca_struct, stab_rr));
146 DEFINE(PACAR1, offsetof(struct paca_struct, saved_r1));
147 DEFINE(PACATOC, offsetof(struct paca_struct, kernel_toc));
148 DEFINE(PACAKBASE, offsetof(struct paca_struct, kernelbase));
149 DEFINE(PACAKMSR, offsetof(struct paca_struct, kernel_msr));
150 DEFINE(PACASOFTIRQEN, offsetof(struct paca_struct, soft_enabled));
151 DEFINE(PACAIRQHAPPENED, offsetof(struct paca_struct, irq_happened));
152 DEFINE(PACACONTEXTID, offsetof(struct paca_struct, context.id));
153#ifdef CONFIG_PPC_MM_SLICES
154 DEFINE(PACALOWSLICESPSIZE, offsetof(struct paca_struct,
155 context.low_slices_psize));
156 DEFINE(PACAHIGHSLICEPSIZE, offsetof(struct paca_struct,
157 context.high_slices_psize));
158 DEFINE(MMUPSIZEDEFSIZE, sizeof(struct mmu_psize_def));
159#endif /* CONFIG_PPC_MM_SLICES */
160
161#ifdef CONFIG_PPC_BOOK3E
162 DEFINE(PACAPGD, offsetof(struct paca_struct, pgd));
163 DEFINE(PACA_KERNELPGD, offsetof(struct paca_struct, kernel_pgd));
164 DEFINE(PACA_EXGEN, offsetof(struct paca_struct, exgen));
165 DEFINE(PACA_EXTLB, offsetof(struct paca_struct, extlb));
166 DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc));
167 DEFINE(PACA_EXCRIT, offsetof(struct paca_struct, excrit));
168 DEFINE(PACA_EXDBG, offsetof(struct paca_struct, exdbg));
169 DEFINE(PACA_MC_STACK, offsetof(struct paca_struct, mc_kstack));
170 DEFINE(PACA_CRIT_STACK, offsetof(struct paca_struct, crit_kstack));
171 DEFINE(PACA_DBG_STACK, offsetof(struct paca_struct, dbg_kstack));
172#endif /* CONFIG_PPC_BOOK3E */
173
174#ifdef CONFIG_PPC_STD_MMU_64
175 DEFINE(PACASTABREAL, offsetof(struct paca_struct, stab_real));
176 DEFINE(PACASTABVIRT, offsetof(struct paca_struct, stab_addr));
177 DEFINE(PACASLBCACHE, offsetof(struct paca_struct, slb_cache));
178 DEFINE(PACASLBCACHEPTR, offsetof(struct paca_struct, slb_cache_ptr));
179 DEFINE(PACAVMALLOCSLLP, offsetof(struct paca_struct, vmalloc_sllp));
180#ifdef CONFIG_PPC_MM_SLICES
181 DEFINE(MMUPSIZESLLP, offsetof(struct mmu_psize_def, sllp));
182#else
183 DEFINE(PACACONTEXTSLLP, offsetof(struct paca_struct, context.sllp));
184#endif /* CONFIG_PPC_MM_SLICES */
185 DEFINE(PACA_EXGEN, offsetof(struct paca_struct, exgen));
186 DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc));
187 DEFINE(PACA_EXSLB, offsetof(struct paca_struct, exslb));
188 DEFINE(PACALPPACAPTR, offsetof(struct paca_struct, lppaca_ptr));
189 DEFINE(PACA_SLBSHADOWPTR, offsetof(struct paca_struct, slb_shadow_ptr));
190 DEFINE(SLBSHADOW_STACKVSID,
191 offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].vsid));
192 DEFINE(SLBSHADOW_STACKESID,
193 offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].esid));
194 DEFINE(SLBSHADOW_SAVEAREA, offsetof(struct slb_shadow, save_area));
195 DEFINE(LPPACA_PMCINUSE, offsetof(struct lppaca, pmcregs_in_use));
196 DEFINE(LPPACA_DTLIDX, offsetof(struct lppaca, dtl_idx));
197 DEFINE(LPPACA_YIELDCOUNT, offsetof(struct lppaca, yield_count));
198 DEFINE(PACA_DTL_RIDX, offsetof(struct paca_struct, dtl_ridx));
199#endif /* CONFIG_PPC_STD_MMU_64 */
200 DEFINE(PACAEMERGSP, offsetof(struct paca_struct, emergency_sp));
201 DEFINE(PACAHWCPUID, offsetof(struct paca_struct, hw_cpu_id));
202 DEFINE(PACAKEXECSTATE, offsetof(struct paca_struct, kexec_state));
203 DEFINE(PACA_STARTTIME, offsetof(struct paca_struct, starttime));
204 DEFINE(PACA_STARTTIME_USER, offsetof(struct paca_struct, starttime_user));
205 DEFINE(PACA_USER_TIME, offsetof(struct paca_struct, user_time));
206 DEFINE(PACA_SYSTEM_TIME, offsetof(struct paca_struct, system_time));
207 DEFINE(PACA_TRAP_SAVE, offsetof(struct paca_struct, trap_save));
208 DEFINE(PACA_NAPSTATELOST, offsetof(struct paca_struct, nap_state_lost));
209#endif /* CONFIG_PPC64 */
210
211 /* RTAS */
212 DEFINE(RTASBASE, offsetof(struct rtas_t, base));
213 DEFINE(RTASENTRY, offsetof(struct rtas_t, entry));
214
215 /* Interrupt register frame */
216 DEFINE(INT_FRAME_SIZE, STACK_INT_FRAME_SIZE);
217 DEFINE(SWITCH_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs));
218#ifdef CONFIG_PPC64
219 /* Create extra stack space for SRR0 and SRR1 when calling prom/rtas. */
220 DEFINE(PROM_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
221 DEFINE(RTAS_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
222
223 /* hcall statistics */
224 DEFINE(HCALL_STAT_SIZE, sizeof(struct hcall_stats));
225 DEFINE(HCALL_STAT_CALLS, offsetof(struct hcall_stats, num_calls));
226 DEFINE(HCALL_STAT_TB, offsetof(struct hcall_stats, tb_total));
227 DEFINE(HCALL_STAT_PURR, offsetof(struct hcall_stats, purr_total));
228#endif /* CONFIG_PPC64 */
229 DEFINE(GPR0, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[0]));
230 DEFINE(GPR1, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[1]));
231 DEFINE(GPR2, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[2]));
232 DEFINE(GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[3]));
233 DEFINE(GPR4, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[4]));
234 DEFINE(GPR5, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[5]));
235 DEFINE(GPR6, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[6]));
236 DEFINE(GPR7, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[7]));
237 DEFINE(GPR8, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[8]));
238 DEFINE(GPR9, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[9]));
239 DEFINE(GPR10, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[10]));
240 DEFINE(GPR11, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[11]));
241 DEFINE(GPR12, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[12]));
242 DEFINE(GPR13, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[13]));
243#ifndef CONFIG_PPC64
244 DEFINE(GPR14, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[14]));
245 DEFINE(GPR15, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[15]));
246 DEFINE(GPR16, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[16]));
247 DEFINE(GPR17, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[17]));
248 DEFINE(GPR18, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[18]));
249 DEFINE(GPR19, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[19]));
250 DEFINE(GPR20, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[20]));
251 DEFINE(GPR21, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[21]));
252 DEFINE(GPR22, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[22]));
253 DEFINE(GPR23, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[23]));
254 DEFINE(GPR24, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[24]));
255 DEFINE(GPR25, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[25]));
256 DEFINE(GPR26, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[26]));
257 DEFINE(GPR27, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[27]));
258 DEFINE(GPR28, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[28]));
259 DEFINE(GPR29, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[29]));
260 DEFINE(GPR30, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[30]));
261 DEFINE(GPR31, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[31]));
262#endif /* CONFIG_PPC64 */
263 /*
264 * Note: these symbols include _ because they overlap with special
265 * register names
266 */
267 DEFINE(_NIP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, nip));
268 DEFINE(_MSR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, msr));
269 DEFINE(_CTR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ctr));
270 DEFINE(_LINK, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, link));
271 DEFINE(_CCR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ccr));
272 DEFINE(_XER, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, xer));
273 DEFINE(_DAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
274 DEFINE(_DSISR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
275 DEFINE(ORIG_GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, orig_gpr3));
276 DEFINE(RESULT, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, result));
277 DEFINE(_TRAP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, trap));
278#ifndef CONFIG_PPC64
279 DEFINE(_MQ, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, mq));
280 /*
281 * The PowerPC 400-class & Book-E processors have neither the DAR
282 * nor the DSISR SPRs. Hence, we overload them to hold the similar
283 * DEAR and ESR SPRs for such processors. For critical interrupts
284 * we use them to hold SRR0 and SRR1.
285 */
286 DEFINE(_DEAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
287 DEFINE(_ESR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
288#else /* CONFIG_PPC64 */
289 DEFINE(SOFTE, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, softe));
290
291 /* These _only_ to be used with {PROM,RTAS}_FRAME_SIZE!!! */
292 DEFINE(_SRR0, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs));
293 DEFINE(_SRR1, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs)+8);
294#endif /* CONFIG_PPC64 */
295
296#if defined(CONFIG_PPC32)
297#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
298 DEFINE(EXC_LVL_SIZE, STACK_EXC_LVL_FRAME_SIZE);
299 DEFINE(MAS0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
300 /* we overload MMUCR for 44x on MAS0 since they are mutually exclusive */
301 DEFINE(MMUCR, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
302 DEFINE(MAS1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas1));
303 DEFINE(MAS2, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas2));
304 DEFINE(MAS3, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas3));
305 DEFINE(MAS6, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas6));
306 DEFINE(MAS7, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas7));
307 DEFINE(_SRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr0));
308 DEFINE(_SRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr1));
309 DEFINE(_CSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr0));
310 DEFINE(_CSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr1));
311 DEFINE(_DSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr0));
312 DEFINE(_DSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr1));
313 DEFINE(SAVED_KSP_LIMIT, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, saved_ksp_limit));
314#endif
315#endif
316 DEFINE(CLONE_VM, CLONE_VM);
317 DEFINE(CLONE_UNTRACED, CLONE_UNTRACED);
318
319#ifndef CONFIG_PPC64
320 DEFINE(MM_PGD, offsetof(struct mm_struct, pgd));
321#endif /* ! CONFIG_PPC64 */
322
323 /* About the CPU features table */
324 DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features));
325 DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup));
326 DEFINE(CPU_SPEC_RESTORE, offsetof(struct cpu_spec, cpu_restore));
327
328 DEFINE(pbe_address, offsetof(struct pbe, address));
329 DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address));
330 DEFINE(pbe_next, offsetof(struct pbe, next));
331
332#ifndef CONFIG_PPC64
333 DEFINE(TASK_SIZE, TASK_SIZE);
334 DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
335#endif /* ! CONFIG_PPC64 */
336
337 /* datapage offsets for use by vdso */
338 DEFINE(CFG_TB_ORIG_STAMP, offsetof(struct vdso_data, tb_orig_stamp));
339 DEFINE(CFG_TB_TICKS_PER_SEC, offsetof(struct vdso_data, tb_ticks_per_sec));
340 DEFINE(CFG_TB_TO_XS, offsetof(struct vdso_data, tb_to_xs));
341 DEFINE(CFG_STAMP_XSEC, offsetof(struct vdso_data, stamp_xsec));
342 DEFINE(CFG_TB_UPDATE_COUNT, offsetof(struct vdso_data, tb_update_count));
343 DEFINE(CFG_TZ_MINUTEWEST, offsetof(struct vdso_data, tz_minuteswest));
344 DEFINE(CFG_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime));
345 DEFINE(CFG_SYSCALL_MAP32, offsetof(struct vdso_data, syscall_map_32));
346 DEFINE(WTOM_CLOCK_SEC, offsetof(struct vdso_data, wtom_clock_sec));
347 DEFINE(WTOM_CLOCK_NSEC, offsetof(struct vdso_data, wtom_clock_nsec));
348 DEFINE(STAMP_XTIME, offsetof(struct vdso_data, stamp_xtime));
349 DEFINE(STAMP_SEC_FRAC, offsetof(struct vdso_data, stamp_sec_fraction));
350 DEFINE(CFG_ICACHE_BLOCKSZ, offsetof(struct vdso_data, icache_block_size));
351 DEFINE(CFG_DCACHE_BLOCKSZ, offsetof(struct vdso_data, dcache_block_size));
352 DEFINE(CFG_ICACHE_LOGBLOCKSZ, offsetof(struct vdso_data, icache_log_block_size));
353 DEFINE(CFG_DCACHE_LOGBLOCKSZ, offsetof(struct vdso_data, dcache_log_block_size));
354#ifdef CONFIG_PPC64
355 DEFINE(CFG_SYSCALL_MAP64, offsetof(struct vdso_data, syscall_map_64));
356 DEFINE(TVAL64_TV_SEC, offsetof(struct timeval, tv_sec));
357 DEFINE(TVAL64_TV_USEC, offsetof(struct timeval, tv_usec));
358 DEFINE(TVAL32_TV_SEC, offsetof(struct compat_timeval, tv_sec));
359 DEFINE(TVAL32_TV_USEC, offsetof(struct compat_timeval, tv_usec));
360 DEFINE(TSPC64_TV_SEC, offsetof(struct timespec, tv_sec));
361 DEFINE(TSPC64_TV_NSEC, offsetof(struct timespec, tv_nsec));
362 DEFINE(TSPC32_TV_SEC, offsetof(struct compat_timespec, tv_sec));
363 DEFINE(TSPC32_TV_NSEC, offsetof(struct compat_timespec, tv_nsec));
364#else
365 DEFINE(TVAL32_TV_SEC, offsetof(struct timeval, tv_sec));
366 DEFINE(TVAL32_TV_USEC, offsetof(struct timeval, tv_usec));
367 DEFINE(TSPC32_TV_SEC, offsetof(struct timespec, tv_sec));
368 DEFINE(TSPC32_TV_NSEC, offsetof(struct timespec, tv_nsec));
369#endif
370 /* timeval/timezone offsets for use by vdso */
371 DEFINE(TZONE_TZ_MINWEST, offsetof(struct timezone, tz_minuteswest));
372 DEFINE(TZONE_TZ_DSTTIME, offsetof(struct timezone, tz_dsttime));
373
374 /* Other bits used by the vdso */
375 DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
376 DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
377 DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
378 DEFINE(CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
379
380#ifdef CONFIG_BUG
381 DEFINE(BUG_ENTRY_SIZE, sizeof(struct bug_entry));
382#endif
383
384 DEFINE(PGD_TABLE_SIZE, PGD_TABLE_SIZE);
385 DEFINE(PTE_SIZE, sizeof(pte_t));
386
387#ifdef CONFIG_KVM
388 DEFINE(VCPU_HOST_STACK, offsetof(struct kvm_vcpu, arch.host_stack));
389 DEFINE(VCPU_HOST_PID, offsetof(struct kvm_vcpu, arch.host_pid));
390 DEFINE(VCPU_GUEST_PID, offsetof(struct kvm_vcpu, arch.pid));
391 DEFINE(VCPU_GPRS, offsetof(struct kvm_vcpu, arch.gpr));
392 DEFINE(VCPU_VRSAVE, offsetof(struct kvm_vcpu, arch.vrsave));
393 DEFINE(VCPU_FPRS, offsetof(struct kvm_vcpu, arch.fpr));
394 DEFINE(VCPU_FPSCR, offsetof(struct kvm_vcpu, arch.fpscr));
395#ifdef CONFIG_ALTIVEC
396 DEFINE(VCPU_VRS, offsetof(struct kvm_vcpu, arch.vr));
397 DEFINE(VCPU_VSCR, offsetof(struct kvm_vcpu, arch.vscr));
398#endif
399#ifdef CONFIG_VSX
400 DEFINE(VCPU_VSRS, offsetof(struct kvm_vcpu, arch.vsr));
401#endif
402 DEFINE(VCPU_XER, offsetof(struct kvm_vcpu, arch.xer));
403 DEFINE(VCPU_CTR, offsetof(struct kvm_vcpu, arch.ctr));
404 DEFINE(VCPU_LR, offsetof(struct kvm_vcpu, arch.lr));
405 DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr));
406 DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.pc));
407#ifdef CONFIG_KVM_BOOK3S_64_HV
408 DEFINE(VCPU_MSR, offsetof(struct kvm_vcpu, arch.shregs.msr));
409 DEFINE(VCPU_SRR0, offsetof(struct kvm_vcpu, arch.shregs.srr0));
410 DEFINE(VCPU_SRR1, offsetof(struct kvm_vcpu, arch.shregs.srr1));
411 DEFINE(VCPU_SPRG0, offsetof(struct kvm_vcpu, arch.shregs.sprg0));
412 DEFINE(VCPU_SPRG1, offsetof(struct kvm_vcpu, arch.shregs.sprg1));
413 DEFINE(VCPU_SPRG2, offsetof(struct kvm_vcpu, arch.shregs.sprg2));
414 DEFINE(VCPU_SPRG3, offsetof(struct kvm_vcpu, arch.shregs.sprg3));
415#endif
416 DEFINE(VCPU_SHARED_SPRG4, offsetof(struct kvm_vcpu_arch_shared, sprg4));
417 DEFINE(VCPU_SHARED_SPRG5, offsetof(struct kvm_vcpu_arch_shared, sprg5));
418 DEFINE(VCPU_SHARED_SPRG6, offsetof(struct kvm_vcpu_arch_shared, sprg6));
419 DEFINE(VCPU_SHARED_SPRG7, offsetof(struct kvm_vcpu_arch_shared, sprg7));
420 DEFINE(VCPU_SHADOW_PID, offsetof(struct kvm_vcpu, arch.shadow_pid));
421 DEFINE(VCPU_SHADOW_PID1, offsetof(struct kvm_vcpu, arch.shadow_pid1));
422 DEFINE(VCPU_SHARED, offsetof(struct kvm_vcpu, arch.shared));
423 DEFINE(VCPU_SHARED_MSR, offsetof(struct kvm_vcpu_arch_shared, msr));
424 DEFINE(VCPU_SHADOW_MSR, offsetof(struct kvm_vcpu, arch.shadow_msr));
425
426 DEFINE(VCPU_SHARED_MAS0, offsetof(struct kvm_vcpu_arch_shared, mas0));
427 DEFINE(VCPU_SHARED_MAS1, offsetof(struct kvm_vcpu_arch_shared, mas1));
428 DEFINE(VCPU_SHARED_MAS2, offsetof(struct kvm_vcpu_arch_shared, mas2));
429 DEFINE(VCPU_SHARED_MAS7_3, offsetof(struct kvm_vcpu_arch_shared, mas7_3));
430 DEFINE(VCPU_SHARED_MAS4, offsetof(struct kvm_vcpu_arch_shared, mas4));
431 DEFINE(VCPU_SHARED_MAS6, offsetof(struct kvm_vcpu_arch_shared, mas6));
432
433 DEFINE(VCPU_KVM, offsetof(struct kvm_vcpu, kvm));
434 DEFINE(KVM_LPID, offsetof(struct kvm, arch.lpid));
435
436 /* book3s */
437#ifdef CONFIG_KVM_BOOK3S_64_HV
438 DEFINE(KVM_SDR1, offsetof(struct kvm, arch.sdr1));
439 DEFINE(KVM_HOST_LPID, offsetof(struct kvm, arch.host_lpid));
440 DEFINE(KVM_HOST_LPCR, offsetof(struct kvm, arch.host_lpcr));
441 DEFINE(KVM_HOST_SDR1, offsetof(struct kvm, arch.host_sdr1));
442 DEFINE(KVM_TLBIE_LOCK, offsetof(struct kvm, arch.tlbie_lock));
443 DEFINE(KVM_ONLINE_CPUS, offsetof(struct kvm, online_vcpus.counter));
444 DEFINE(KVM_LAST_VCPU, offsetof(struct kvm, arch.last_vcpu));
445 DEFINE(KVM_LPCR, offsetof(struct kvm, arch.lpcr));
446 DEFINE(KVM_RMOR, offsetof(struct kvm, arch.rmor));
447 DEFINE(KVM_VRMA_SLB_V, offsetof(struct kvm, arch.vrma_slb_v));
448 DEFINE(VCPU_DSISR, offsetof(struct kvm_vcpu, arch.shregs.dsisr));
449 DEFINE(VCPU_DAR, offsetof(struct kvm_vcpu, arch.shregs.dar));
450 DEFINE(VCPU_VPA, offsetof(struct kvm_vcpu, arch.vpa.pinned_addr));
451#endif
452#ifdef CONFIG_PPC_BOOK3S
453 DEFINE(VCPU_VCPUID, offsetof(struct kvm_vcpu, vcpu_id));
454 DEFINE(VCPU_PURR, offsetof(struct kvm_vcpu, arch.purr));
455 DEFINE(VCPU_SPURR, offsetof(struct kvm_vcpu, arch.spurr));
456 DEFINE(VCPU_DSCR, offsetof(struct kvm_vcpu, arch.dscr));
457 DEFINE(VCPU_AMR, offsetof(struct kvm_vcpu, arch.amr));
458 DEFINE(VCPU_UAMOR, offsetof(struct kvm_vcpu, arch.uamor));
459 DEFINE(VCPU_CTRL, offsetof(struct kvm_vcpu, arch.ctrl));
460 DEFINE(VCPU_DABR, offsetof(struct kvm_vcpu, arch.dabr));
461 DEFINE(VCPU_HFLAGS, offsetof(struct kvm_vcpu, arch.hflags));
462 DEFINE(VCPU_DEC, offsetof(struct kvm_vcpu, arch.dec));
463 DEFINE(VCPU_DEC_EXPIRES, offsetof(struct kvm_vcpu, arch.dec_expires));
464 DEFINE(VCPU_PENDING_EXC, offsetof(struct kvm_vcpu, arch.pending_exceptions));
465 DEFINE(VCPU_CEDED, offsetof(struct kvm_vcpu, arch.ceded));
466 DEFINE(VCPU_PRODDED, offsetof(struct kvm_vcpu, arch.prodded));
467 DEFINE(VCPU_MMCR, offsetof(struct kvm_vcpu, arch.mmcr));
468 DEFINE(VCPU_PMC, offsetof(struct kvm_vcpu, arch.pmc));
469 DEFINE(VCPU_SLB, offsetof(struct kvm_vcpu, arch.slb));
470 DEFINE(VCPU_SLB_MAX, offsetof(struct kvm_vcpu, arch.slb_max));
471 DEFINE(VCPU_SLB_NR, offsetof(struct kvm_vcpu, arch.slb_nr));
472 DEFINE(VCPU_LAST_CPU, offsetof(struct kvm_vcpu, arch.last_cpu));
473 DEFINE(VCPU_FAULT_DSISR, offsetof(struct kvm_vcpu, arch.fault_dsisr));
474 DEFINE(VCPU_FAULT_DAR, offsetof(struct kvm_vcpu, arch.fault_dar));
475 DEFINE(VCPU_LAST_INST, offsetof(struct kvm_vcpu, arch.last_inst));
476 DEFINE(VCPU_TRAP, offsetof(struct kvm_vcpu, arch.trap));
477 DEFINE(VCPU_PTID, offsetof(struct kvm_vcpu, arch.ptid));
478 DEFINE(VCORE_ENTRY_EXIT, offsetof(struct kvmppc_vcore, entry_exit_count));
479 DEFINE(VCORE_NAP_COUNT, offsetof(struct kvmppc_vcore, nap_count));
480 DEFINE(VCORE_IN_GUEST, offsetof(struct kvmppc_vcore, in_guest));
481 DEFINE(VCORE_NAPPING_THREADS, offsetof(struct kvmppc_vcore, napping_threads));
482 DEFINE(VCPU_SVCPU, offsetof(struct kvmppc_vcpu_book3s, shadow_vcpu) -
483 offsetof(struct kvmppc_vcpu_book3s, vcpu));
484 DEFINE(VCPU_SLB_E, offsetof(struct kvmppc_slb, orige));
485 DEFINE(VCPU_SLB_V, offsetof(struct kvmppc_slb, origv));
486 DEFINE(VCPU_SLB_SIZE, sizeof(struct kvmppc_slb));
487
488#ifdef CONFIG_PPC_BOOK3S_64
489#ifdef CONFIG_KVM_BOOK3S_PR
490# define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, shadow_vcpu.f))
491#else
492# define SVCPU_FIELD(x, f)
493#endif
494# define HSTATE_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, kvm_hstate.f))
495#else /* 32-bit */
496# define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, f))
497# define HSTATE_FIELD(x, f) DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, hstate.f))
498#endif
499
500 SVCPU_FIELD(SVCPU_CR, cr);
501 SVCPU_FIELD(SVCPU_XER, xer);
502 SVCPU_FIELD(SVCPU_CTR, ctr);
503 SVCPU_FIELD(SVCPU_LR, lr);
504 SVCPU_FIELD(SVCPU_PC, pc);
505 SVCPU_FIELD(SVCPU_R0, gpr[0]);
506 SVCPU_FIELD(SVCPU_R1, gpr[1]);
507 SVCPU_FIELD(SVCPU_R2, gpr[2]);
508 SVCPU_FIELD(SVCPU_R3, gpr[3]);
509 SVCPU_FIELD(SVCPU_R4, gpr[4]);
510 SVCPU_FIELD(SVCPU_R5, gpr[5]);
511 SVCPU_FIELD(SVCPU_R6, gpr[6]);
512 SVCPU_FIELD(SVCPU_R7, gpr[7]);
513 SVCPU_FIELD(SVCPU_R8, gpr[8]);
514 SVCPU_FIELD(SVCPU_R9, gpr[9]);
515 SVCPU_FIELD(SVCPU_R10, gpr[10]);
516 SVCPU_FIELD(SVCPU_R11, gpr[11]);
517 SVCPU_FIELD(SVCPU_R12, gpr[12]);
518 SVCPU_FIELD(SVCPU_R13, gpr[13]);
519 SVCPU_FIELD(SVCPU_FAULT_DSISR, fault_dsisr);
520 SVCPU_FIELD(SVCPU_FAULT_DAR, fault_dar);
521 SVCPU_FIELD(SVCPU_LAST_INST, last_inst);
522 SVCPU_FIELD(SVCPU_SHADOW_SRR1, shadow_srr1);
523#ifdef CONFIG_PPC_BOOK3S_32
524 SVCPU_FIELD(SVCPU_SR, sr);
525#endif
526#ifdef CONFIG_PPC64
527 SVCPU_FIELD(SVCPU_SLB, slb);
528 SVCPU_FIELD(SVCPU_SLB_MAX, slb_max);
529#endif
530
531 HSTATE_FIELD(HSTATE_HOST_R1, host_r1);
532 HSTATE_FIELD(HSTATE_HOST_R2, host_r2);
533 HSTATE_FIELD(HSTATE_HOST_MSR, host_msr);
534 HSTATE_FIELD(HSTATE_VMHANDLER, vmhandler);
535 HSTATE_FIELD(HSTATE_SCRATCH0, scratch0);
536 HSTATE_FIELD(HSTATE_SCRATCH1, scratch1);
537 HSTATE_FIELD(HSTATE_IN_GUEST, in_guest);
538 HSTATE_FIELD(HSTATE_RESTORE_HID5, restore_hid5);
539 HSTATE_FIELD(HSTATE_NAPPING, napping);
540
541#ifdef CONFIG_KVM_BOOK3S_64_HV
542 HSTATE_FIELD(HSTATE_HWTHREAD_REQ, hwthread_req);
543 HSTATE_FIELD(HSTATE_HWTHREAD_STATE, hwthread_state);
544 HSTATE_FIELD(HSTATE_KVM_VCPU, kvm_vcpu);
545 HSTATE_FIELD(HSTATE_KVM_VCORE, kvm_vcore);
546 HSTATE_FIELD(HSTATE_XICS_PHYS, xics_phys);
547 HSTATE_FIELD(HSTATE_MMCR, host_mmcr);
548 HSTATE_FIELD(HSTATE_PMC, host_pmc);
549 HSTATE_FIELD(HSTATE_PURR, host_purr);
550 HSTATE_FIELD(HSTATE_SPURR, host_spurr);
551 HSTATE_FIELD(HSTATE_DSCR, host_dscr);
552 HSTATE_FIELD(HSTATE_DABR, dabr);
553 HSTATE_FIELD(HSTATE_DECEXP, dec_expires);
554 DEFINE(IPI_PRIORITY, IPI_PRIORITY);
555#endif /* CONFIG_KVM_BOOK3S_64_HV */
556
557#else /* CONFIG_PPC_BOOK3S */
558 DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr));
559 DEFINE(VCPU_XER, offsetof(struct kvm_vcpu, arch.xer));
560 DEFINE(VCPU_LR, offsetof(struct kvm_vcpu, arch.lr));
561 DEFINE(VCPU_CTR, offsetof(struct kvm_vcpu, arch.ctr));
562 DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.pc));
563 DEFINE(VCPU_LAST_INST, offsetof(struct kvm_vcpu, arch.last_inst));
564 DEFINE(VCPU_FAULT_DEAR, offsetof(struct kvm_vcpu, arch.fault_dear));
565 DEFINE(VCPU_FAULT_ESR, offsetof(struct kvm_vcpu, arch.fault_esr));
566#endif /* CONFIG_PPC_BOOK3S */
567#endif /* CONFIG_KVM */
568
569#ifdef CONFIG_KVM_GUEST
570 DEFINE(KVM_MAGIC_SCRATCH1, offsetof(struct kvm_vcpu_arch_shared,
571 scratch1));
572 DEFINE(KVM_MAGIC_SCRATCH2, offsetof(struct kvm_vcpu_arch_shared,
573 scratch2));
574 DEFINE(KVM_MAGIC_SCRATCH3, offsetof(struct kvm_vcpu_arch_shared,
575 scratch3));
576 DEFINE(KVM_MAGIC_INT, offsetof(struct kvm_vcpu_arch_shared,
577 int_pending));
578 DEFINE(KVM_MAGIC_MSR, offsetof(struct kvm_vcpu_arch_shared, msr));
579 DEFINE(KVM_MAGIC_CRITICAL, offsetof(struct kvm_vcpu_arch_shared,
580 critical));
581 DEFINE(KVM_MAGIC_SR, offsetof(struct kvm_vcpu_arch_shared, sr));
582#endif
583
584#ifdef CONFIG_44x
585 DEFINE(PGD_T_LOG2, PGD_T_LOG2);
586 DEFINE(PTE_T_LOG2, PTE_T_LOG2);
587#endif
588#ifdef CONFIG_PPC_FSL_BOOK3E
589 DEFINE(TLBCAM_SIZE, sizeof(struct tlbcam));
590 DEFINE(TLBCAM_MAS0, offsetof(struct tlbcam, MAS0));
591 DEFINE(TLBCAM_MAS1, offsetof(struct tlbcam, MAS1));
592 DEFINE(TLBCAM_MAS2, offsetof(struct tlbcam, MAS2));
593 DEFINE(TLBCAM_MAS3, offsetof(struct tlbcam, MAS3));
594 DEFINE(TLBCAM_MAS7, offsetof(struct tlbcam, MAS7));
595#endif
596
597#if defined(CONFIG_KVM) && defined(CONFIG_SPE)
598 DEFINE(VCPU_EVR, offsetof(struct kvm_vcpu, arch.evr[0]));
599 DEFINE(VCPU_ACC, offsetof(struct kvm_vcpu, arch.acc));
600 DEFINE(VCPU_SPEFSCR, offsetof(struct kvm_vcpu, arch.spefscr));
601 DEFINE(VCPU_HOST_SPEFSCR, offsetof(struct kvm_vcpu, arch.host_spefscr));
602#endif
603
604#ifdef CONFIG_KVM_BOOKE_HV
605 DEFINE(VCPU_HOST_MAS4, offsetof(struct kvm_vcpu, arch.host_mas4));
606 DEFINE(VCPU_HOST_MAS6, offsetof(struct kvm_vcpu, arch.host_mas6));
607 DEFINE(VCPU_EPLC, offsetof(struct kvm_vcpu, arch.eplc));
608#endif
609
610#ifdef CONFIG_KVM_EXIT_TIMING
611 DEFINE(VCPU_TIMING_EXIT_TBU, offsetof(struct kvm_vcpu,
612 arch.timing_exit.tv32.tbu));
613 DEFINE(VCPU_TIMING_EXIT_TBL, offsetof(struct kvm_vcpu,
614 arch.timing_exit.tv32.tbl));
615 DEFINE(VCPU_TIMING_LAST_ENTER_TBU, offsetof(struct kvm_vcpu,
616 arch.timing_last_enter.tv32.tbu));
617 DEFINE(VCPU_TIMING_LAST_ENTER_TBL, offsetof(struct kvm_vcpu,
618 arch.timing_last_enter.tv32.tbl));
619#endif
620
621#ifdef CONFIG_PPC_POWERNV
622 DEFINE(OPAL_MC_GPR3, offsetof(struct opal_machine_check_event, gpr3));
623 DEFINE(OPAL_MC_SRR0, offsetof(struct opal_machine_check_event, srr0));
624 DEFINE(OPAL_MC_SRR1, offsetof(struct opal_machine_check_event, srr1));
625 DEFINE(PACA_OPAL_MC_EVT, offsetof(struct paca_struct, opal_mc_evt));
626#endif
627
628 return 0;
629}