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1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_IA64_PCI_H
3#define _ASM_IA64_PCI_H
4
5#include <linux/mm.h>
6#include <linux/slab.h>
7#include <linux/spinlock.h>
8#include <linux/string.h>
9#include <linux/types.h>
10#include <linux/scatterlist.h>
11
12#include <asm/io.h>
13#include <asm/hw_irq.h>
14
15struct pci_vector_struct {
16 __u16 segment; /* PCI Segment number */
17 __u16 bus; /* PCI Bus number */
18 __u32 pci_id; /* ACPI split 16 bits device, 16 bits function (see section 6.1.1) */
19 __u8 pin; /* PCI PIN (0 = A, 1 = B, 2 = C, 3 = D) */
20 __u32 irq; /* IRQ assigned */
21};
22
23/*
24 * Can be used to override the logic in pci_scan_bus for skipping already-configured bus
25 * numbers - to be used for buggy BIOSes or architectures with incomplete PCI setup by the
26 * loader.
27 */
28#define pcibios_assign_all_busses() 0
29
30#define PCIBIOS_MIN_IO 0x1000
31#define PCIBIOS_MIN_MEM 0x10000000
32
33#define HAVE_PCI_MMAP
34#define ARCH_GENERIC_PCI_MMAP_RESOURCE
35#define arch_can_pci_mmap_wc() 1
36
37#define HAVE_PCI_LEGACY
38extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
39 struct vm_area_struct *vma,
40 enum pci_mmap_state mmap_state);
41
42char *pci_get_legacy_mem(struct pci_bus *bus);
43int pci_legacy_read(struct pci_bus *bus, u16 port, u32 *val, u8 size);
44int pci_legacy_write(struct pci_bus *bus, u16 port, u32 val, u8 size);
45
46struct pci_controller {
47 struct acpi_device *companion;
48 void *iommu;
49 int segment;
50 int node; /* nearest node with memory or NUMA_NO_NODE for global allocation */
51
52 void *platform_data;
53};
54
55
56#define PCI_CONTROLLER(busdev) ((struct pci_controller *) busdev->sysdata)
57#define pci_domain_nr(busdev) (PCI_CONTROLLER(busdev)->segment)
58
59extern struct pci_ops pci_root_ops;
60
61static inline int pci_proc_domain(struct pci_bus *bus)
62{
63 return (pci_domain_nr(bus) != 0);
64}
65
66#define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ
67static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
68{
69 return channel ? isa_irq_to_vector(15) : isa_irq_to_vector(14);
70}
71
72#endif /* _ASM_IA64_PCI_H */
1#ifndef _ASM_IA64_PCI_H
2#define _ASM_IA64_PCI_H
3
4#include <linux/mm.h>
5#include <linux/slab.h>
6#include <linux/spinlock.h>
7#include <linux/string.h>
8#include <linux/types.h>
9
10#include <asm/io.h>
11#include <asm/scatterlist.h>
12#include <asm/hw_irq.h>
13
14struct pci_vector_struct {
15 __u16 segment; /* PCI Segment number */
16 __u16 bus; /* PCI Bus number */
17 __u32 pci_id; /* ACPI split 16 bits device, 16 bits function (see section 6.1.1) */
18 __u8 pin; /* PCI PIN (0 = A, 1 = B, 2 = C, 3 = D) */
19 __u32 irq; /* IRQ assigned */
20};
21
22/*
23 * Can be used to override the logic in pci_scan_bus for skipping already-configured bus
24 * numbers - to be used for buggy BIOSes or architectures with incomplete PCI setup by the
25 * loader.
26 */
27#define pcibios_assign_all_busses() 0
28
29#define PCIBIOS_MIN_IO 0x1000
30#define PCIBIOS_MIN_MEM 0x10000000
31
32void pcibios_config_init(void);
33
34struct pci_dev;
35
36/*
37 * PCI_DMA_BUS_IS_PHYS should be set to 1 if there is _necessarily_ a direct
38 * correspondence between device bus addresses and CPU physical addresses.
39 * Platforms with a hardware I/O MMU _must_ turn this off to suppress the
40 * bounce buffer handling code in the block and network device layers.
41 * Platforms with separate bus address spaces _must_ turn this off and provide
42 * a device DMA mapping implementation that takes care of the necessary
43 * address translation.
44 *
45 * For now, the ia64 platforms which may have separate/multiple bus address
46 * spaces all have I/O MMUs which support the merging of physically
47 * discontiguous buffers, so we can use that as the sole factor to determine
48 * the setting of PCI_DMA_BUS_IS_PHYS.
49 */
50extern unsigned long ia64_max_iommu_merge_mask;
51#define PCI_DMA_BUS_IS_PHYS (ia64_max_iommu_merge_mask == ~0UL)
52
53static inline void
54pcibios_penalize_isa_irq (int irq, int active)
55{
56 /* We don't do dynamic PCI IRQ allocation */
57}
58
59#include <asm-generic/pci-dma-compat.h>
60
61#ifdef CONFIG_PCI
62static inline void pci_dma_burst_advice(struct pci_dev *pdev,
63 enum pci_dma_burst_strategy *strat,
64 unsigned long *strategy_parameter)
65{
66 unsigned long cacheline_size;
67 u8 byte;
68
69 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
70 if (byte == 0)
71 cacheline_size = 1024;
72 else
73 cacheline_size = (int) byte * 4;
74
75 *strat = PCI_DMA_BURST_MULTIPLE;
76 *strategy_parameter = cacheline_size;
77}
78#endif
79
80#define HAVE_PCI_MMAP
81extern int pci_mmap_page_range (struct pci_dev *dev, struct vm_area_struct *vma,
82 enum pci_mmap_state mmap_state, int write_combine);
83#define HAVE_PCI_LEGACY
84extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
85 struct vm_area_struct *vma,
86 enum pci_mmap_state mmap_state);
87
88#define pci_get_legacy_mem platform_pci_get_legacy_mem
89#define pci_legacy_read platform_pci_legacy_read
90#define pci_legacy_write platform_pci_legacy_write
91
92struct pci_window {
93 struct resource resource;
94 u64 offset;
95};
96
97struct pci_controller {
98 void *acpi_handle;
99 void *iommu;
100 int segment;
101 int node; /* nearest node with memory or -1 for global allocation */
102
103 unsigned int windows;
104 struct pci_window *window;
105
106 void *platform_data;
107};
108
109#define PCI_CONTROLLER(busdev) ((struct pci_controller *) busdev->sysdata)
110#define pci_domain_nr(busdev) (PCI_CONTROLLER(busdev)->segment)
111
112extern struct pci_ops pci_root_ops;
113
114static inline int pci_proc_domain(struct pci_bus *bus)
115{
116 return (pci_domain_nr(bus) != 0);
117}
118
119static inline struct resource *
120pcibios_select_root(struct pci_dev *pdev, struct resource *res)
121{
122 struct resource *root = NULL;
123
124 if (res->flags & IORESOURCE_IO)
125 root = &ioport_resource;
126 if (res->flags & IORESOURCE_MEM)
127 root = &iomem_resource;
128
129 return root;
130}
131
132#define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ
133static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
134{
135 return channel ? isa_irq_to_vector(15) : isa_irq_to_vector(14);
136}
137
138#ifdef CONFIG_INTEL_IOMMU
139extern void pci_iommu_alloc(void);
140#endif
141#endif /* _ASM_IA64_PCI_H */