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1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * net/dsa/mv88e6060.c - Driver for Marvell 88e6060 switch chips
4 * Copyright (c) 2008-2009 Marvell Semiconductor
5 */
6
7#include <linux/delay.h>
8#include <linux/etherdevice.h>
9#include <linux/jiffies.h>
10#include <linux/list.h>
11#include <linux/module.h>
12#include <linux/netdevice.h>
13#include <linux/phy.h>
14#include <net/dsa.h>
15#include "mv88e6060.h"
16
17static int reg_read(struct mv88e6060_priv *priv, int addr, int reg)
18{
19 return mdiobus_read_nested(priv->bus, priv->sw_addr + addr, reg);
20}
21
22static int reg_write(struct mv88e6060_priv *priv, int addr, int reg, u16 val)
23{
24 return mdiobus_write_nested(priv->bus, priv->sw_addr + addr, reg, val);
25}
26
27static const char *mv88e6060_get_name(struct mii_bus *bus, int sw_addr)
28{
29 int ret;
30
31 ret = mdiobus_read(bus, sw_addr + REG_PORT(0), PORT_SWITCH_ID);
32 if (ret >= 0) {
33 if (ret == PORT_SWITCH_ID_6060)
34 return "Marvell 88E6060 (A0)";
35 if (ret == PORT_SWITCH_ID_6060_R1 ||
36 ret == PORT_SWITCH_ID_6060_R2)
37 return "Marvell 88E6060 (B0)";
38 if ((ret & PORT_SWITCH_ID_6060_MASK) == PORT_SWITCH_ID_6060)
39 return "Marvell 88E6060";
40 }
41
42 return NULL;
43}
44
45static enum dsa_tag_protocol mv88e6060_get_tag_protocol(struct dsa_switch *ds,
46 int port,
47 enum dsa_tag_protocol m)
48{
49 return DSA_TAG_PROTO_TRAILER;
50}
51
52static int mv88e6060_switch_reset(struct mv88e6060_priv *priv)
53{
54 int i;
55 int ret;
56 unsigned long timeout;
57
58 /* Set all ports to the disabled state. */
59 for (i = 0; i < MV88E6060_PORTS; i++) {
60 ret = reg_read(priv, REG_PORT(i), PORT_CONTROL);
61 if (ret < 0)
62 return ret;
63 ret = reg_write(priv, REG_PORT(i), PORT_CONTROL,
64 ret & ~PORT_CONTROL_STATE_MASK);
65 if (ret)
66 return ret;
67 }
68
69 /* Wait for transmit queues to drain. */
70 usleep_range(2000, 4000);
71
72 /* Reset the switch. */
73 ret = reg_write(priv, REG_GLOBAL, GLOBAL_ATU_CONTROL,
74 GLOBAL_ATU_CONTROL_SWRESET |
75 GLOBAL_ATU_CONTROL_LEARNDIS);
76 if (ret)
77 return ret;
78
79 /* Wait up to one second for reset to complete. */
80 timeout = jiffies + 1 * HZ;
81 while (time_before(jiffies, timeout)) {
82 ret = reg_read(priv, REG_GLOBAL, GLOBAL_STATUS);
83 if (ret < 0)
84 return ret;
85
86 if (ret & GLOBAL_STATUS_INIT_READY)
87 break;
88
89 usleep_range(1000, 2000);
90 }
91 if (time_after(jiffies, timeout))
92 return -ETIMEDOUT;
93
94 return 0;
95}
96
97static int mv88e6060_setup_global(struct mv88e6060_priv *priv)
98{
99 int ret;
100
101 /* Disable discarding of frames with excessive collisions,
102 * set the maximum frame size to 1536 bytes, and mask all
103 * interrupt sources.
104 */
105 ret = reg_write(priv, REG_GLOBAL, GLOBAL_CONTROL,
106 GLOBAL_CONTROL_MAX_FRAME_1536);
107 if (ret)
108 return ret;
109
110 /* Disable automatic address learning.
111 */
112 return reg_write(priv, REG_GLOBAL, GLOBAL_ATU_CONTROL,
113 GLOBAL_ATU_CONTROL_LEARNDIS);
114}
115
116static int mv88e6060_setup_port(struct mv88e6060_priv *priv, int p)
117{
118 int addr = REG_PORT(p);
119 int ret;
120
121 /* Do not force flow control, disable Ingress and Egress
122 * Header tagging, disable VLAN tunneling, and set the port
123 * state to Forwarding. Additionally, if this is the CPU
124 * port, enable Ingress and Egress Trailer tagging mode.
125 */
126 ret = reg_write(priv, addr, PORT_CONTROL,
127 dsa_is_cpu_port(priv->ds, p) ?
128 PORT_CONTROL_TRAILER |
129 PORT_CONTROL_INGRESS_MODE |
130 PORT_CONTROL_STATE_FORWARDING :
131 PORT_CONTROL_STATE_FORWARDING);
132 if (ret)
133 return ret;
134
135 /* Port based VLAN map: give each port its own address
136 * database, allow the CPU port to talk to each of the 'real'
137 * ports, and allow each of the 'real' ports to only talk to
138 * the CPU port.
139 */
140 ret = reg_write(priv, addr, PORT_VLAN_MAP,
141 ((p & 0xf) << PORT_VLAN_MAP_DBNUM_SHIFT) |
142 (dsa_is_cpu_port(priv->ds, p) ?
143 dsa_user_ports(priv->ds) :
144 BIT(dsa_to_port(priv->ds, p)->cpu_dp->index)));
145 if (ret)
146 return ret;
147
148 /* Port Association Vector: when learning source addresses
149 * of packets, add the address to the address database using
150 * a port bitmap that has only the bit for this port set and
151 * the other bits clear.
152 */
153 return reg_write(priv, addr, PORT_ASSOC_VECTOR, BIT(p));
154}
155
156static int mv88e6060_setup_addr(struct mv88e6060_priv *priv)
157{
158 u8 addr[ETH_ALEN];
159 int ret;
160 u16 val;
161
162 eth_random_addr(addr);
163
164 val = addr[0] << 8 | addr[1];
165
166 /* The multicast bit is always transmitted as a zero, so the switch uses
167 * bit 8 for "DiffAddr", where 0 means all ports transmit the same SA.
168 */
169 val &= 0xfeff;
170
171 ret = reg_write(priv, REG_GLOBAL, GLOBAL_MAC_01, val);
172 if (ret)
173 return ret;
174
175 ret = reg_write(priv, REG_GLOBAL, GLOBAL_MAC_23,
176 (addr[2] << 8) | addr[3]);
177 if (ret)
178 return ret;
179
180 return reg_write(priv, REG_GLOBAL, GLOBAL_MAC_45,
181 (addr[4] << 8) | addr[5]);
182}
183
184static int mv88e6060_setup(struct dsa_switch *ds)
185{
186 struct mv88e6060_priv *priv = ds->priv;
187 int ret;
188 int i;
189
190 priv->ds = ds;
191
192 ret = mv88e6060_switch_reset(priv);
193 if (ret < 0)
194 return ret;
195
196 /* @@@ initialise atu */
197
198 ret = mv88e6060_setup_global(priv);
199 if (ret < 0)
200 return ret;
201
202 ret = mv88e6060_setup_addr(priv);
203 if (ret < 0)
204 return ret;
205
206 for (i = 0; i < MV88E6060_PORTS; i++) {
207 ret = mv88e6060_setup_port(priv, i);
208 if (ret < 0)
209 return ret;
210 }
211
212 return 0;
213}
214
215static int mv88e6060_port_to_phy_addr(int port)
216{
217 if (port >= 0 && port < MV88E6060_PORTS)
218 return port;
219 return -1;
220}
221
222static int mv88e6060_phy_read(struct dsa_switch *ds, int port, int regnum)
223{
224 struct mv88e6060_priv *priv = ds->priv;
225 int addr;
226
227 addr = mv88e6060_port_to_phy_addr(port);
228 if (addr == -1)
229 return 0xffff;
230
231 return reg_read(priv, addr, regnum);
232}
233
234static int
235mv88e6060_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val)
236{
237 struct mv88e6060_priv *priv = ds->priv;
238 int addr;
239
240 addr = mv88e6060_port_to_phy_addr(port);
241 if (addr == -1)
242 return 0xffff;
243
244 return reg_write(priv, addr, regnum, val);
245}
246
247static const struct dsa_switch_ops mv88e6060_switch_ops = {
248 .get_tag_protocol = mv88e6060_get_tag_protocol,
249 .setup = mv88e6060_setup,
250 .phy_read = mv88e6060_phy_read,
251 .phy_write = mv88e6060_phy_write,
252};
253
254static int mv88e6060_probe(struct mdio_device *mdiodev)
255{
256 struct device *dev = &mdiodev->dev;
257 struct mv88e6060_priv *priv;
258 struct dsa_switch *ds;
259 const char *name;
260
261 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
262 if (!priv)
263 return -ENOMEM;
264
265 priv->bus = mdiodev->bus;
266 priv->sw_addr = mdiodev->addr;
267
268 name = mv88e6060_get_name(priv->bus, priv->sw_addr);
269 if (!name)
270 return -ENODEV;
271
272 dev_info(dev, "switch %s detected\n", name);
273
274 ds = devm_kzalloc(dev, sizeof(*ds), GFP_KERNEL);
275 if (!ds)
276 return -ENOMEM;
277
278 ds->dev = dev;
279 ds->num_ports = MV88E6060_PORTS;
280 ds->priv = priv;
281 ds->dev = dev;
282 ds->ops = &mv88e6060_switch_ops;
283
284 dev_set_drvdata(dev, ds);
285
286 return dsa_register_switch(ds);
287}
288
289static void mv88e6060_remove(struct mdio_device *mdiodev)
290{
291 struct dsa_switch *ds = dev_get_drvdata(&mdiodev->dev);
292
293 dsa_unregister_switch(ds);
294}
295
296static const struct of_device_id mv88e6060_of_match[] = {
297 {
298 .compatible = "marvell,mv88e6060",
299 },
300 { /* sentinel */ },
301};
302
303static struct mdio_driver mv88e6060_driver = {
304 .probe = mv88e6060_probe,
305 .remove = mv88e6060_remove,
306 .mdiodrv.driver = {
307 .name = "mv88e6060",
308 .of_match_table = mv88e6060_of_match,
309 },
310};
311
312mdio_module_driver(mv88e6060_driver);
313
314MODULE_AUTHOR("Lennert Buytenhek <buytenh@wantstofly.org>");
315MODULE_DESCRIPTION("Driver for Marvell 88E6060 ethernet switch chip");
316MODULE_LICENSE("GPL");
317MODULE_ALIAS("platform:mv88e6060");
1/*
2 * net/dsa/mv88e6060.c - Driver for Marvell 88e6060 switch chips
3 * Copyright (c) 2008-2009 Marvell Semiconductor
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 */
10
11#include <linux/list.h>
12#include <linux/module.h>
13#include <linux/netdevice.h>
14#include <linux/phy.h>
15#include <net/dsa.h>
16
17#define REG_PORT(p) (8 + (p))
18#define REG_GLOBAL 0x0f
19
20static int reg_read(struct dsa_switch *ds, int addr, int reg)
21{
22 return mdiobus_read(ds->master_mii_bus, ds->pd->sw_addr + addr, reg);
23}
24
25#define REG_READ(addr, reg) \
26 ({ \
27 int __ret; \
28 \
29 __ret = reg_read(ds, addr, reg); \
30 if (__ret < 0) \
31 return __ret; \
32 __ret; \
33 })
34
35
36static int reg_write(struct dsa_switch *ds, int addr, int reg, u16 val)
37{
38 return mdiobus_write(ds->master_mii_bus, ds->pd->sw_addr + addr,
39 reg, val);
40}
41
42#define REG_WRITE(addr, reg, val) \
43 ({ \
44 int __ret; \
45 \
46 __ret = reg_write(ds, addr, reg, val); \
47 if (__ret < 0) \
48 return __ret; \
49 })
50
51static char *mv88e6060_probe(struct mii_bus *bus, int sw_addr)
52{
53 int ret;
54
55 ret = mdiobus_read(bus, sw_addr + REG_PORT(0), 0x03);
56 if (ret >= 0) {
57 ret &= 0xfff0;
58 if (ret == 0x0600)
59 return "Marvell 88E6060";
60 }
61
62 return NULL;
63}
64
65static int mv88e6060_switch_reset(struct dsa_switch *ds)
66{
67 int i;
68 int ret;
69
70 /*
71 * Set all ports to the disabled state.
72 */
73 for (i = 0; i < 6; i++) {
74 ret = REG_READ(REG_PORT(i), 0x04);
75 REG_WRITE(REG_PORT(i), 0x04, ret & 0xfffc);
76 }
77
78 /*
79 * Wait for transmit queues to drain.
80 */
81 msleep(2);
82
83 /*
84 * Reset the switch.
85 */
86 REG_WRITE(REG_GLOBAL, 0x0a, 0xa130);
87
88 /*
89 * Wait up to one second for reset to complete.
90 */
91 for (i = 0; i < 1000; i++) {
92 ret = REG_READ(REG_GLOBAL, 0x00);
93 if ((ret & 0x8000) == 0x0000)
94 break;
95
96 msleep(1);
97 }
98 if (i == 1000)
99 return -ETIMEDOUT;
100
101 return 0;
102}
103
104static int mv88e6060_setup_global(struct dsa_switch *ds)
105{
106 /*
107 * Disable discarding of frames with excessive collisions,
108 * set the maximum frame size to 1536 bytes, and mask all
109 * interrupt sources.
110 */
111 REG_WRITE(REG_GLOBAL, 0x04, 0x0800);
112
113 /*
114 * Enable automatic address learning, set the address
115 * database size to 1024 entries, and set the default aging
116 * time to 5 minutes.
117 */
118 REG_WRITE(REG_GLOBAL, 0x0a, 0x2130);
119
120 return 0;
121}
122
123static int mv88e6060_setup_port(struct dsa_switch *ds, int p)
124{
125 int addr = REG_PORT(p);
126
127 /*
128 * Do not force flow control, disable Ingress and Egress
129 * Header tagging, disable VLAN tunneling, and set the port
130 * state to Forwarding. Additionally, if this is the CPU
131 * port, enable Ingress and Egress Trailer tagging mode.
132 */
133 REG_WRITE(addr, 0x04, dsa_is_cpu_port(ds, p) ? 0x4103 : 0x0003);
134
135 /*
136 * Port based VLAN map: give each port its own address
137 * database, allow the CPU port to talk to each of the 'real'
138 * ports, and allow each of the 'real' ports to only talk to
139 * the CPU port.
140 */
141 REG_WRITE(addr, 0x06,
142 ((p & 0xf) << 12) |
143 (dsa_is_cpu_port(ds, p) ?
144 ds->phys_port_mask :
145 (1 << ds->dst->cpu_port)));
146
147 /*
148 * Port Association Vector: when learning source addresses
149 * of packets, add the address to the address database using
150 * a port bitmap that has only the bit for this port set and
151 * the other bits clear.
152 */
153 REG_WRITE(addr, 0x0b, 1 << p);
154
155 return 0;
156}
157
158static int mv88e6060_setup(struct dsa_switch *ds)
159{
160 int i;
161 int ret;
162
163 ret = mv88e6060_switch_reset(ds);
164 if (ret < 0)
165 return ret;
166
167 /* @@@ initialise atu */
168
169 ret = mv88e6060_setup_global(ds);
170 if (ret < 0)
171 return ret;
172
173 for (i = 0; i < 6; i++) {
174 ret = mv88e6060_setup_port(ds, i);
175 if (ret < 0)
176 return ret;
177 }
178
179 return 0;
180}
181
182static int mv88e6060_set_addr(struct dsa_switch *ds, u8 *addr)
183{
184 REG_WRITE(REG_GLOBAL, 0x01, (addr[0] << 8) | addr[1]);
185 REG_WRITE(REG_GLOBAL, 0x02, (addr[2] << 8) | addr[3]);
186 REG_WRITE(REG_GLOBAL, 0x03, (addr[4] << 8) | addr[5]);
187
188 return 0;
189}
190
191static int mv88e6060_port_to_phy_addr(int port)
192{
193 if (port >= 0 && port <= 5)
194 return port;
195 return -1;
196}
197
198static int mv88e6060_phy_read(struct dsa_switch *ds, int port, int regnum)
199{
200 int addr;
201
202 addr = mv88e6060_port_to_phy_addr(port);
203 if (addr == -1)
204 return 0xffff;
205
206 return reg_read(ds, addr, regnum);
207}
208
209static int
210mv88e6060_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val)
211{
212 int addr;
213
214 addr = mv88e6060_port_to_phy_addr(port);
215 if (addr == -1)
216 return 0xffff;
217
218 return reg_write(ds, addr, regnum, val);
219}
220
221static void mv88e6060_poll_link(struct dsa_switch *ds)
222{
223 int i;
224
225 for (i = 0; i < DSA_MAX_PORTS; i++) {
226 struct net_device *dev;
227 int uninitialized_var(port_status);
228 int link;
229 int speed;
230 int duplex;
231 int fc;
232
233 dev = ds->ports[i];
234 if (dev == NULL)
235 continue;
236
237 link = 0;
238 if (dev->flags & IFF_UP) {
239 port_status = reg_read(ds, REG_PORT(i), 0x00);
240 if (port_status < 0)
241 continue;
242
243 link = !!(port_status & 0x1000);
244 }
245
246 if (!link) {
247 if (netif_carrier_ok(dev)) {
248 printk(KERN_INFO "%s: link down\n", dev->name);
249 netif_carrier_off(dev);
250 }
251 continue;
252 }
253
254 speed = (port_status & 0x0100) ? 100 : 10;
255 duplex = (port_status & 0x0200) ? 1 : 0;
256 fc = ((port_status & 0xc000) == 0xc000) ? 1 : 0;
257
258 if (!netif_carrier_ok(dev)) {
259 printk(KERN_INFO "%s: link up, %d Mb/s, %s duplex, "
260 "flow control %sabled\n", dev->name,
261 speed, duplex ? "full" : "half",
262 fc ? "en" : "dis");
263 netif_carrier_on(dev);
264 }
265 }
266}
267
268static struct dsa_switch_driver mv88e6060_switch_driver = {
269 .tag_protocol = htons(ETH_P_TRAILER),
270 .probe = mv88e6060_probe,
271 .setup = mv88e6060_setup,
272 .set_addr = mv88e6060_set_addr,
273 .phy_read = mv88e6060_phy_read,
274 .phy_write = mv88e6060_phy_write,
275 .poll_link = mv88e6060_poll_link,
276};
277
278static int __init mv88e6060_init(void)
279{
280 register_switch_driver(&mv88e6060_switch_driver);
281 return 0;
282}
283module_init(mv88e6060_init);
284
285static void __exit mv88e6060_cleanup(void)
286{
287 unregister_switch_driver(&mv88e6060_switch_driver);
288}
289module_exit(mv88e6060_cleanup);
290
291MODULE_AUTHOR("Lennert Buytenhek <buytenh@wantstofly.org>");
292MODULE_DESCRIPTION("Driver for Marvell 88E6060 ethernet switch chip");
293MODULE_LICENSE("GPL");
294MODULE_ALIAS("platform:mv88e6060");