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v5.9
  1/* SPDX-License-Identifier: GPL-2.0-only */
  2/**
  3 * Copyright (C) 2008, Creative Technology Ltd. All Rights Reserved.
  4 *
 
 
 
 
  5 * @File	cthardware.h
  6 *
  7 * @Brief
  8 * This file contains the definition of hardware access methord.
  9 *
 10 * @Author	Liu Chun
 11 * @Date 	May 13 2008
 
 12 */
 13
 14#ifndef CTHARDWARE_H
 15#define CTHARDWARE_H
 16
 17#include <linux/types.h>
 18#include <linux/pci.h>
 19#include <sound/core.h>
 20
 21enum CHIPTYP {
 22	ATC20K1,
 23	ATC20K2,
 24	ATCNONE
 25};
 26
 27enum CTCARDS {
 28	/* 20k1 models */
 29	CTSB055X,
 30	CT20K1_MODEL_FIRST = CTSB055X,
 31	CTSB073X,
 32	CTUAA,
 33	CT20K1_UNKNOWN,
 34	/* 20k2 models */
 35	CTSB0760,
 36	CT20K2_MODEL_FIRST = CTSB0760,
 37	CTHENDRIX,
 38	CTSB0880,
 39	CTSB1270,
 40	CT20K2_UNKNOWN,
 41	NUM_CTCARDS		/* This should always be the last */
 42};
 43
 44/* Type of input source for ADC */
 45enum ADCSRC{
 46	ADC_MICIN,
 47	ADC_LINEIN,
 48	ADC_VIDEO,
 49	ADC_AUX,
 50	ADC_NONE	/* Switch to digital input */
 51};
 52
 53struct card_conf {
 54	/* device virtual mem page table page physical addr
 55	 * (supporting one page table page now) */
 56	unsigned long vm_pgt_phys;
 57	unsigned int rsr;	/* reference sample rate in Hzs*/
 58	unsigned int msr;	/* master sample rate in rsrs */
 59};
 60
 61struct capabilities {
 62	unsigned int digit_io_switch:1;
 63	unsigned int dedicated_mic:1;
 64	unsigned int output_switch:1;
 65	unsigned int mic_source_switch:1;
 66};
 67
 68struct hw {
 69	int (*card_init)(struct hw *hw, struct card_conf *info);
 70	int (*card_stop)(struct hw *hw);
 71	int (*pll_init)(struct hw *hw, unsigned int rsr);
 72#ifdef CONFIG_PM_SLEEP
 73	int (*suspend)(struct hw *hw);
 74	int (*resume)(struct hw *hw, struct card_conf *info);
 75#endif
 76	int (*is_adc_source_selected)(struct hw *hw, enum ADCSRC source);
 77	int (*select_adc_source)(struct hw *hw, enum ADCSRC source);
 78	struct capabilities (*capabilities)(struct hw *hw);
 79	int (*output_switch_get)(struct hw *hw);
 80	int (*output_switch_put)(struct hw *hw, int position);
 81	int (*mic_source_switch_get)(struct hw *hw);
 82	int (*mic_source_switch_put)(struct hw *hw, int position);
 83
 84	/* SRC operations */
 85	int (*src_rsc_get_ctrl_blk)(void **rblk);
 86	int (*src_rsc_put_ctrl_blk)(void *blk);
 87	int (*src_set_state)(void *blk, unsigned int state);
 88	int (*src_set_bm)(void *blk, unsigned int bm);
 89	int (*src_set_rsr)(void *blk, unsigned int rsr);
 90	int (*src_set_sf)(void *blk, unsigned int sf);
 91	int (*src_set_wr)(void *blk, unsigned int wr);
 92	int (*src_set_pm)(void *blk, unsigned int pm);
 93	int (*src_set_rom)(void *blk, unsigned int rom);
 94	int (*src_set_vo)(void *blk, unsigned int vo);
 95	int (*src_set_st)(void *blk, unsigned int st);
 96	int (*src_set_ie)(void *blk, unsigned int ie);
 97	int (*src_set_ilsz)(void *blk, unsigned int ilsz);
 98	int (*src_set_bp)(void *blk, unsigned int bp);
 99	int (*src_set_cisz)(void *blk, unsigned int cisz);
100	int (*src_set_ca)(void *blk, unsigned int ca);
101	int (*src_set_sa)(void *blk, unsigned int sa);
102	int (*src_set_la)(void *blk, unsigned int la);
103	int (*src_set_pitch)(void *blk, unsigned int pitch);
104	int (*src_set_clear_zbufs)(void *blk, unsigned int clear);
105	int (*src_set_dirty)(void *blk, unsigned int flags);
106	int (*src_set_dirty_all)(void *blk);
107	int (*src_commit_write)(struct hw *hw, unsigned int idx, void *blk);
108	int (*src_get_ca)(struct hw *hw, unsigned int idx, void *blk);
109	unsigned int (*src_get_dirty)(void *blk);
110	unsigned int (*src_dirty_conj_mask)(void);
111	int (*src_mgr_get_ctrl_blk)(void **rblk);
112	int (*src_mgr_put_ctrl_blk)(void *blk);
113	/* syncly enable src @idx */
114	int (*src_mgr_enbs_src)(void *blk, unsigned int idx);
115	/* enable src @idx */
116	int (*src_mgr_enb_src)(void *blk, unsigned int idx);
117	/* disable src @idx */
118	int (*src_mgr_dsb_src)(void *blk, unsigned int idx);
119	int (*src_mgr_commit_write)(struct hw *hw, void *blk);
120
121	/* SRC Input Mapper operations */
122	int (*srcimp_mgr_get_ctrl_blk)(void **rblk);
123	int (*srcimp_mgr_put_ctrl_blk)(void *blk);
124	int (*srcimp_mgr_set_imaparc)(void *blk, unsigned int slot);
125	int (*srcimp_mgr_set_imapuser)(void *blk, unsigned int user);
126	int (*srcimp_mgr_set_imapnxt)(void *blk, unsigned int next);
127	int (*srcimp_mgr_set_imapaddr)(void *blk, unsigned int addr);
128	int (*srcimp_mgr_commit_write)(struct hw *hw, void *blk);
129
130	/* AMIXER operations */
131	int (*amixer_rsc_get_ctrl_blk)(void **rblk);
132	int (*amixer_rsc_put_ctrl_blk)(void *blk);
133	int (*amixer_mgr_get_ctrl_blk)(void **rblk);
134	int (*amixer_mgr_put_ctrl_blk)(void *blk);
135	int (*amixer_set_mode)(void *blk, unsigned int mode);
136	int (*amixer_set_iv)(void *blk, unsigned int iv);
137	int (*amixer_set_x)(void *blk, unsigned int x);
138	int (*amixer_set_y)(void *blk, unsigned int y);
139	int (*amixer_set_sadr)(void *blk, unsigned int sadr);
140	int (*amixer_set_se)(void *blk, unsigned int se);
141	int (*amixer_set_dirty)(void *blk, unsigned int flags);
142	int (*amixer_set_dirty_all)(void *blk);
143	int (*amixer_commit_write)(struct hw *hw, unsigned int idx, void *blk);
144	int (*amixer_get_y)(void *blk);
145	unsigned int (*amixer_get_dirty)(void *blk);
146
147	/* DAIO operations */
148	int (*dai_get_ctrl_blk)(void **rblk);
149	int (*dai_put_ctrl_blk)(void *blk);
150	int (*dai_srt_set_srco)(void *blk, unsigned int src);
151	int (*dai_srt_set_srcm)(void *blk, unsigned int src);
152	int (*dai_srt_set_rsr)(void *blk, unsigned int rsr);
153	int (*dai_srt_set_drat)(void *blk, unsigned int drat);
154	int (*dai_srt_set_ec)(void *blk, unsigned int ec);
155	int (*dai_srt_set_et)(void *blk, unsigned int et);
156	int (*dai_commit_write)(struct hw *hw, unsigned int idx, void *blk);
157	int (*dao_get_ctrl_blk)(void **rblk);
158	int (*dao_put_ctrl_blk)(void *blk);
159	int (*dao_set_spos)(void *blk, unsigned int spos);
160	int (*dao_commit_write)(struct hw *hw, unsigned int idx, void *blk);
161	int (*dao_get_spos)(void *blk, unsigned int *spos);
162
163	int (*daio_mgr_get_ctrl_blk)(struct hw *hw, void **rblk);
164	int (*daio_mgr_put_ctrl_blk)(void *blk);
165	int (*daio_mgr_enb_dai)(void *blk, unsigned int idx);
166	int (*daio_mgr_dsb_dai)(void *blk, unsigned int idx);
167	int (*daio_mgr_enb_dao)(void *blk, unsigned int idx);
168	int (*daio_mgr_dsb_dao)(void *blk, unsigned int idx);
169	int (*daio_mgr_dao_init)(void *blk, unsigned int idx,
170						unsigned int conf);
171	int (*daio_mgr_set_imaparc)(void *blk, unsigned int slot);
172	int (*daio_mgr_set_imapnxt)(void *blk, unsigned int next);
173	int (*daio_mgr_set_imapaddr)(void *blk, unsigned int addr);
174	int (*daio_mgr_commit_write)(struct hw *hw, void *blk);
175
176	int (*set_timer_irq)(struct hw *hw, int enable);
177	int (*set_timer_tick)(struct hw *hw, unsigned int tick);
178	unsigned int (*get_wc)(struct hw *hw);
179
180	void (*irq_callback)(void *data, unsigned int bit);
181	void *irq_callback_data;
182
183	struct pci_dev *pci;	/* the pci kernel structure of this card */
184	struct snd_card *card;	/* pointer to this card */
185	int irq;
186	unsigned long io_base;
187	void __iomem *mem_base;
188
189	enum CHIPTYP chip_type;
190	enum CTCARDS model;
191};
192
193int create_hw_obj(struct pci_dev *pci, enum CHIPTYP chip_type,
194		  enum CTCARDS model, struct hw **rhw);
195int destroy_hw_obj(struct hw *hw);
196
197unsigned int get_field(unsigned int data, unsigned int field);
198void set_field(unsigned int *data, unsigned int field, unsigned int value);
199
200/* IRQ bits */
201#define	PLL_INT		(1 << 10) /* PLL input-clock out-of-range */
202#define FI_INT		(1 << 9)  /* forced interrupt */
203#define IT_INT		(1 << 8)  /* timer interrupt */
204#define PCI_INT		(1 << 7)  /* PCI bus error pending */
205#define URT_INT		(1 << 6)  /* UART Tx/Rx */
206#define GPI_INT		(1 << 5)  /* GPI pin */
207#define MIX_INT		(1 << 4)  /* mixer parameter segment FIFO channels */
208#define DAI_INT		(1 << 3)  /* DAI (SR-tracker or SPDIF-receiver) */
209#define TP_INT		(1 << 2)  /* transport priority queue */
210#define DSP_INT		(1 << 1)  /* DSP */
211#define SRC_INT		(1 << 0)  /* SRC channels */
212
213#endif /* CTHARDWARE_H */
v3.15
 
  1/**
  2 * Copyright (C) 2008, Creative Technology Ltd. All Rights Reserved.
  3 *
  4 * This source file is released under GPL v2 license (no other versions).
  5 * See the COPYING file included in the main directory of this source
  6 * distribution for the license terms and conditions.
  7 *
  8 * @File	cthardware.h
  9 *
 10 * @Brief
 11 * This file contains the definition of hardware access methord.
 12 *
 13 * @Author	Liu Chun
 14 * @Date 	May 13 2008
 15 *
 16 */
 17
 18#ifndef CTHARDWARE_H
 19#define CTHARDWARE_H
 20
 21#include <linux/types.h>
 22#include <linux/pci.h>
 
 23
 24enum CHIPTYP {
 25	ATC20K1,
 26	ATC20K2,
 27	ATCNONE
 28};
 29
 30enum CTCARDS {
 31	/* 20k1 models */
 32	CTSB055X,
 33	CT20K1_MODEL_FIRST = CTSB055X,
 34	CTSB073X,
 35	CTUAA,
 36	CT20K1_UNKNOWN,
 37	/* 20k2 models */
 38	CTSB0760,
 39	CT20K2_MODEL_FIRST = CTSB0760,
 40	CTHENDRIX,
 41	CTSB0880,
 42	CTSB1270,
 43	CT20K2_UNKNOWN,
 44	NUM_CTCARDS		/* This should always be the last */
 45};
 46
 47/* Type of input source for ADC */
 48enum ADCSRC{
 49	ADC_MICIN,
 50	ADC_LINEIN,
 51	ADC_VIDEO,
 52	ADC_AUX,
 53	ADC_NONE	/* Switch to digital input */
 54};
 55
 56struct card_conf {
 57	/* device virtual mem page table page physical addr
 58	 * (supporting one page table page now) */
 59	unsigned long vm_pgt_phys;
 60	unsigned int rsr;	/* reference sample rate in Hzs*/
 61	unsigned int msr;	/* master sample rate in rsrs */
 62};
 63
 64struct capabilities {
 65	unsigned int digit_io_switch:1;
 66	unsigned int dedicated_mic:1;
 67	unsigned int output_switch:1;
 68	unsigned int mic_source_switch:1;
 69};
 70
 71struct hw {
 72	int (*card_init)(struct hw *hw, struct card_conf *info);
 73	int (*card_stop)(struct hw *hw);
 74	int (*pll_init)(struct hw *hw, unsigned int rsr);
 75#ifdef CONFIG_PM_SLEEP
 76	int (*suspend)(struct hw *hw);
 77	int (*resume)(struct hw *hw, struct card_conf *info);
 78#endif
 79	int (*is_adc_source_selected)(struct hw *hw, enum ADCSRC source);
 80	int (*select_adc_source)(struct hw *hw, enum ADCSRC source);
 81	struct capabilities (*capabilities)(struct hw *hw);
 82	int (*output_switch_get)(struct hw *hw);
 83	int (*output_switch_put)(struct hw *hw, int position);
 84	int (*mic_source_switch_get)(struct hw *hw);
 85	int (*mic_source_switch_put)(struct hw *hw, int position);
 86
 87	/* SRC operations */
 88	int (*src_rsc_get_ctrl_blk)(void **rblk);
 89	int (*src_rsc_put_ctrl_blk)(void *blk);
 90	int (*src_set_state)(void *blk, unsigned int state);
 91	int (*src_set_bm)(void *blk, unsigned int bm);
 92	int (*src_set_rsr)(void *blk, unsigned int rsr);
 93	int (*src_set_sf)(void *blk, unsigned int sf);
 94	int (*src_set_wr)(void *blk, unsigned int wr);
 95	int (*src_set_pm)(void *blk, unsigned int pm);
 96	int (*src_set_rom)(void *blk, unsigned int rom);
 97	int (*src_set_vo)(void *blk, unsigned int vo);
 98	int (*src_set_st)(void *blk, unsigned int st);
 99	int (*src_set_ie)(void *blk, unsigned int ie);
100	int (*src_set_ilsz)(void *blk, unsigned int ilsz);
101	int (*src_set_bp)(void *blk, unsigned int bp);
102	int (*src_set_cisz)(void *blk, unsigned int cisz);
103	int (*src_set_ca)(void *blk, unsigned int ca);
104	int (*src_set_sa)(void *blk, unsigned int sa);
105	int (*src_set_la)(void *blk, unsigned int la);
106	int (*src_set_pitch)(void *blk, unsigned int pitch);
107	int (*src_set_clear_zbufs)(void *blk, unsigned int clear);
108	int (*src_set_dirty)(void *blk, unsigned int flags);
109	int (*src_set_dirty_all)(void *blk);
110	int (*src_commit_write)(struct hw *hw, unsigned int idx, void *blk);
111	int (*src_get_ca)(struct hw *hw, unsigned int idx, void *blk);
112	unsigned int (*src_get_dirty)(void *blk);
113	unsigned int (*src_dirty_conj_mask)(void);
114	int (*src_mgr_get_ctrl_blk)(void **rblk);
115	int (*src_mgr_put_ctrl_blk)(void *blk);
116	/* syncly enable src @idx */
117	int (*src_mgr_enbs_src)(void *blk, unsigned int idx);
118	/* enable src @idx */
119	int (*src_mgr_enb_src)(void *blk, unsigned int idx);
120	/* disable src @idx */
121	int (*src_mgr_dsb_src)(void *blk, unsigned int idx);
122	int (*src_mgr_commit_write)(struct hw *hw, void *blk);
123
124	/* SRC Input Mapper operations */
125	int (*srcimp_mgr_get_ctrl_blk)(void **rblk);
126	int (*srcimp_mgr_put_ctrl_blk)(void *blk);
127	int (*srcimp_mgr_set_imaparc)(void *blk, unsigned int slot);
128	int (*srcimp_mgr_set_imapuser)(void *blk, unsigned int user);
129	int (*srcimp_mgr_set_imapnxt)(void *blk, unsigned int next);
130	int (*srcimp_mgr_set_imapaddr)(void *blk, unsigned int addr);
131	int (*srcimp_mgr_commit_write)(struct hw *hw, void *blk);
132
133	/* AMIXER operations */
134	int (*amixer_rsc_get_ctrl_blk)(void **rblk);
135	int (*amixer_rsc_put_ctrl_blk)(void *blk);
136	int (*amixer_mgr_get_ctrl_blk)(void **rblk);
137	int (*amixer_mgr_put_ctrl_blk)(void *blk);
138	int (*amixer_set_mode)(void *blk, unsigned int mode);
139	int (*amixer_set_iv)(void *blk, unsigned int iv);
140	int (*amixer_set_x)(void *blk, unsigned int x);
141	int (*amixer_set_y)(void *blk, unsigned int y);
142	int (*amixer_set_sadr)(void *blk, unsigned int sadr);
143	int (*amixer_set_se)(void *blk, unsigned int se);
144	int (*amixer_set_dirty)(void *blk, unsigned int flags);
145	int (*amixer_set_dirty_all)(void *blk);
146	int (*amixer_commit_write)(struct hw *hw, unsigned int idx, void *blk);
147	int (*amixer_get_y)(void *blk);
148	unsigned int (*amixer_get_dirty)(void *blk);
149
150	/* DAIO operations */
151	int (*dai_get_ctrl_blk)(void **rblk);
152	int (*dai_put_ctrl_blk)(void *blk);
153	int (*dai_srt_set_srco)(void *blk, unsigned int src);
154	int (*dai_srt_set_srcm)(void *blk, unsigned int src);
155	int (*dai_srt_set_rsr)(void *blk, unsigned int rsr);
156	int (*dai_srt_set_drat)(void *blk, unsigned int drat);
157	int (*dai_srt_set_ec)(void *blk, unsigned int ec);
158	int (*dai_srt_set_et)(void *blk, unsigned int et);
159	int (*dai_commit_write)(struct hw *hw, unsigned int idx, void *blk);
160	int (*dao_get_ctrl_blk)(void **rblk);
161	int (*dao_put_ctrl_blk)(void *blk);
162	int (*dao_set_spos)(void *blk, unsigned int spos);
163	int (*dao_commit_write)(struct hw *hw, unsigned int idx, void *blk);
164	int (*dao_get_spos)(void *blk, unsigned int *spos);
165
166	int (*daio_mgr_get_ctrl_blk)(struct hw *hw, void **rblk);
167	int (*daio_mgr_put_ctrl_blk)(void *blk);
168	int (*daio_mgr_enb_dai)(void *blk, unsigned int idx);
169	int (*daio_mgr_dsb_dai)(void *blk, unsigned int idx);
170	int (*daio_mgr_enb_dao)(void *blk, unsigned int idx);
171	int (*daio_mgr_dsb_dao)(void *blk, unsigned int idx);
172	int (*daio_mgr_dao_init)(void *blk, unsigned int idx,
173						unsigned int conf);
174	int (*daio_mgr_set_imaparc)(void *blk, unsigned int slot);
175	int (*daio_mgr_set_imapnxt)(void *blk, unsigned int next);
176	int (*daio_mgr_set_imapaddr)(void *blk, unsigned int addr);
177	int (*daio_mgr_commit_write)(struct hw *hw, void *blk);
178
179	int (*set_timer_irq)(struct hw *hw, int enable);
180	int (*set_timer_tick)(struct hw *hw, unsigned int tick);
181	unsigned int (*get_wc)(struct hw *hw);
182
183	void (*irq_callback)(void *data, unsigned int bit);
184	void *irq_callback_data;
185
186	struct pci_dev *pci;	/* the pci kernel structure of this card */
 
187	int irq;
188	unsigned long io_base;
189	unsigned long mem_base;
190
191	enum CHIPTYP chip_type;
192	enum CTCARDS model;
193};
194
195int create_hw_obj(struct pci_dev *pci, enum CHIPTYP chip_type,
196		  enum CTCARDS model, struct hw **rhw);
197int destroy_hw_obj(struct hw *hw);
198
199unsigned int get_field(unsigned int data, unsigned int field);
200void set_field(unsigned int *data, unsigned int field, unsigned int value);
201
202/* IRQ bits */
203#define	PLL_INT		(1 << 10) /* PLL input-clock out-of-range */
204#define FI_INT		(1 << 9)  /* forced interrupt */
205#define IT_INT		(1 << 8)  /* timer interrupt */
206#define PCI_INT		(1 << 7)  /* PCI bus error pending */
207#define URT_INT		(1 << 6)  /* UART Tx/Rx */
208#define GPI_INT		(1 << 5)  /* GPI pin */
209#define MIX_INT		(1 << 4)  /* mixer parameter segment FIFO channels */
210#define DAI_INT		(1 << 3)  /* DAI (SR-tracker or SPDIF-receiver) */
211#define TP_INT		(1 << 2)  /* transport priority queue */
212#define DSP_INT		(1 << 1)  /* DSP */
213#define SRC_INT		(1 << 0)  /* SRC channels */
214
215#endif /* CTHARDWARE_H */