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1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Real Time Clock driver for Wolfson Microelectronics WM831x
4 *
5 * Copyright (C) 2009 Wolfson Microelectronics PLC.
6 *
7 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 *
9 */
10
11#include <linux/module.h>
12#include <linux/kernel.h>
13#include <linux/time.h>
14#include <linux/rtc.h>
15#include <linux/slab.h>
16#include <linux/bcd.h>
17#include <linux/interrupt.h>
18#include <linux/ioctl.h>
19#include <linux/completion.h>
20#include <linux/mfd/wm831x/core.h>
21#include <linux/delay.h>
22#include <linux/platform_device.h>
23#include <linux/random.h>
24
25/*
26 * R16416 (0x4020) - RTC Write Counter
27 */
28#define WM831X_RTC_WR_CNT_MASK 0xFFFF /* RTC_WR_CNT - [15:0] */
29#define WM831X_RTC_WR_CNT_SHIFT 0 /* RTC_WR_CNT - [15:0] */
30#define WM831X_RTC_WR_CNT_WIDTH 16 /* RTC_WR_CNT - [15:0] */
31
32/*
33 * R16417 (0x4021) - RTC Time 1
34 */
35#define WM831X_RTC_TIME_MASK 0xFFFF /* RTC_TIME - [15:0] */
36#define WM831X_RTC_TIME_SHIFT 0 /* RTC_TIME - [15:0] */
37#define WM831X_RTC_TIME_WIDTH 16 /* RTC_TIME - [15:0] */
38
39/*
40 * R16418 (0x4022) - RTC Time 2
41 */
42#define WM831X_RTC_TIME_MASK 0xFFFF /* RTC_TIME - [15:0] */
43#define WM831X_RTC_TIME_SHIFT 0 /* RTC_TIME - [15:0] */
44#define WM831X_RTC_TIME_WIDTH 16 /* RTC_TIME - [15:0] */
45
46/*
47 * R16419 (0x4023) - RTC Alarm 1
48 */
49#define WM831X_RTC_ALM_MASK 0xFFFF /* RTC_ALM - [15:0] */
50#define WM831X_RTC_ALM_SHIFT 0 /* RTC_ALM - [15:0] */
51#define WM831X_RTC_ALM_WIDTH 16 /* RTC_ALM - [15:0] */
52
53/*
54 * R16420 (0x4024) - RTC Alarm 2
55 */
56#define WM831X_RTC_ALM_MASK 0xFFFF /* RTC_ALM - [15:0] */
57#define WM831X_RTC_ALM_SHIFT 0 /* RTC_ALM - [15:0] */
58#define WM831X_RTC_ALM_WIDTH 16 /* RTC_ALM - [15:0] */
59
60/*
61 * R16421 (0x4025) - RTC Control
62 */
63#define WM831X_RTC_VALID 0x8000 /* RTC_VALID */
64#define WM831X_RTC_VALID_MASK 0x8000 /* RTC_VALID */
65#define WM831X_RTC_VALID_SHIFT 15 /* RTC_VALID */
66#define WM831X_RTC_VALID_WIDTH 1 /* RTC_VALID */
67#define WM831X_RTC_SYNC_BUSY 0x4000 /* RTC_SYNC_BUSY */
68#define WM831X_RTC_SYNC_BUSY_MASK 0x4000 /* RTC_SYNC_BUSY */
69#define WM831X_RTC_SYNC_BUSY_SHIFT 14 /* RTC_SYNC_BUSY */
70#define WM831X_RTC_SYNC_BUSY_WIDTH 1 /* RTC_SYNC_BUSY */
71#define WM831X_RTC_ALM_ENA 0x0400 /* RTC_ALM_ENA */
72#define WM831X_RTC_ALM_ENA_MASK 0x0400 /* RTC_ALM_ENA */
73#define WM831X_RTC_ALM_ENA_SHIFT 10 /* RTC_ALM_ENA */
74#define WM831X_RTC_ALM_ENA_WIDTH 1 /* RTC_ALM_ENA */
75#define WM831X_RTC_PINT_FREQ_MASK 0x0070 /* RTC_PINT_FREQ - [6:4] */
76#define WM831X_RTC_PINT_FREQ_SHIFT 4 /* RTC_PINT_FREQ - [6:4] */
77#define WM831X_RTC_PINT_FREQ_WIDTH 3 /* RTC_PINT_FREQ - [6:4] */
78
79/*
80 * R16422 (0x4026) - RTC Trim
81 */
82#define WM831X_RTC_TRIM_MASK 0x03FF /* RTC_TRIM - [9:0] */
83#define WM831X_RTC_TRIM_SHIFT 0 /* RTC_TRIM - [9:0] */
84#define WM831X_RTC_TRIM_WIDTH 10 /* RTC_TRIM - [9:0] */
85
86#define WM831X_SET_TIME_RETRIES 5
87#define WM831X_GET_TIME_RETRIES 5
88
89struct wm831x_rtc {
90 struct wm831x *wm831x;
91 struct rtc_device *rtc;
92 unsigned int alarm_enabled:1;
93};
94
95static void wm831x_rtc_add_randomness(struct wm831x *wm831x)
96{
97 int ret;
98 u16 reg;
99
100 /*
101 * The write counter contains a pseudo-random number which is
102 * regenerated every time we set the RTC so it should be a
103 * useful per-system source of entropy.
104 */
105 ret = wm831x_reg_read(wm831x, WM831X_RTC_WRITE_COUNTER);
106 if (ret >= 0) {
107 reg = ret;
108 add_device_randomness(®, sizeof(reg));
109 } else {
110 dev_warn(wm831x->dev, "Failed to read RTC write counter: %d\n",
111 ret);
112 }
113}
114
115/*
116 * Read current time and date in RTC
117 */
118static int wm831x_rtc_readtime(struct device *dev, struct rtc_time *tm)
119{
120 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
121 struct wm831x *wm831x = wm831x_rtc->wm831x;
122 u16 time1[2], time2[2];
123 int ret;
124 int count = 0;
125
126 /* Has the RTC been programmed? */
127 ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL);
128 if (ret < 0) {
129 dev_err(dev, "Failed to read RTC control: %d\n", ret);
130 return ret;
131 }
132 if (!(ret & WM831X_RTC_VALID)) {
133 dev_dbg(dev, "RTC not yet configured\n");
134 return -EINVAL;
135 }
136
137 /* Read twice to make sure we don't read a corrupt, partially
138 * incremented, value.
139 */
140 do {
141 ret = wm831x_bulk_read(wm831x, WM831X_RTC_TIME_1,
142 2, time1);
143 if (ret != 0)
144 continue;
145
146 ret = wm831x_bulk_read(wm831x, WM831X_RTC_TIME_1,
147 2, time2);
148 if (ret != 0)
149 continue;
150
151 if (memcmp(time1, time2, sizeof(time1)) == 0) {
152 u32 time = (time1[0] << 16) | time1[1];
153
154 rtc_time64_to_tm(time, tm);
155 return 0;
156 }
157
158 } while (++count < WM831X_GET_TIME_RETRIES);
159
160 dev_err(dev, "Timed out reading current time\n");
161
162 return -EIO;
163}
164
165/*
166 * Set current time and date in RTC
167 */
168static int wm831x_rtc_settime(struct device *dev, struct rtc_time *tm)
169{
170 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
171 struct wm831x *wm831x = wm831x_rtc->wm831x;
172 struct rtc_time new_tm;
173 unsigned long time, new_time;
174 int ret;
175 int count = 0;
176
177 time = rtc_tm_to_time64(tm);
178
179 ret = wm831x_reg_write(wm831x, WM831X_RTC_TIME_1,
180 (time >> 16) & 0xffff);
181 if (ret < 0) {
182 dev_err(dev, "Failed to write TIME_1: %d\n", ret);
183 return ret;
184 }
185
186 ret = wm831x_reg_write(wm831x, WM831X_RTC_TIME_2, time & 0xffff);
187 if (ret < 0) {
188 dev_err(dev, "Failed to write TIME_2: %d\n", ret);
189 return ret;
190 }
191
192 /* Wait for the update to complete - should happen first time
193 * round but be conservative.
194 */
195 do {
196 msleep(1);
197
198 ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL);
199 if (ret < 0)
200 ret = WM831X_RTC_SYNC_BUSY;
201 } while (!(ret & WM831X_RTC_SYNC_BUSY) &&
202 ++count < WM831X_SET_TIME_RETRIES);
203
204 if (ret & WM831X_RTC_SYNC_BUSY) {
205 dev_err(dev, "Timed out writing RTC update\n");
206 return -EIO;
207 }
208
209 /* Check that the update was accepted; security features may
210 * have caused the update to be ignored.
211 */
212 ret = wm831x_rtc_readtime(dev, &new_tm);
213 if (ret < 0)
214 return ret;
215
216 new_time = rtc_tm_to_time64(&new_tm);
217
218 /* Allow a second of change in case of tick */
219 if (new_time - time > 1) {
220 dev_err(dev, "RTC update not permitted by hardware\n");
221 return -EPERM;
222 }
223
224 return 0;
225}
226
227/*
228 * Read alarm time and date in RTC
229 */
230static int wm831x_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
231{
232 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
233 int ret;
234 u16 data[2];
235 u32 time;
236
237 ret = wm831x_bulk_read(wm831x_rtc->wm831x, WM831X_RTC_ALARM_1,
238 2, data);
239 if (ret != 0) {
240 dev_err(dev, "Failed to read alarm time: %d\n", ret);
241 return ret;
242 }
243
244 time = (data[0] << 16) | data[1];
245
246 rtc_time64_to_tm(time, &alrm->time);
247
248 ret = wm831x_reg_read(wm831x_rtc->wm831x, WM831X_RTC_CONTROL);
249 if (ret < 0) {
250 dev_err(dev, "Failed to read RTC control: %d\n", ret);
251 return ret;
252 }
253
254 if (ret & WM831X_RTC_ALM_ENA)
255 alrm->enabled = 1;
256 else
257 alrm->enabled = 0;
258
259 return 0;
260}
261
262static int wm831x_rtc_stop_alarm(struct wm831x_rtc *wm831x_rtc)
263{
264 wm831x_rtc->alarm_enabled = 0;
265
266 return wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
267 WM831X_RTC_ALM_ENA, 0);
268}
269
270static int wm831x_rtc_start_alarm(struct wm831x_rtc *wm831x_rtc)
271{
272 wm831x_rtc->alarm_enabled = 1;
273
274 return wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
275 WM831X_RTC_ALM_ENA, WM831X_RTC_ALM_ENA);
276}
277
278static int wm831x_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
279{
280 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
281 struct wm831x *wm831x = wm831x_rtc->wm831x;
282 int ret;
283 unsigned long time;
284
285 time = rtc_tm_to_time64(&alrm->time);
286
287 ret = wm831x_rtc_stop_alarm(wm831x_rtc);
288 if (ret < 0) {
289 dev_err(dev, "Failed to stop alarm: %d\n", ret);
290 return ret;
291 }
292
293 ret = wm831x_reg_write(wm831x, WM831X_RTC_ALARM_1,
294 (time >> 16) & 0xffff);
295 if (ret < 0) {
296 dev_err(dev, "Failed to write ALARM_1: %d\n", ret);
297 return ret;
298 }
299
300 ret = wm831x_reg_write(wm831x, WM831X_RTC_ALARM_2, time & 0xffff);
301 if (ret < 0) {
302 dev_err(dev, "Failed to write ALARM_2: %d\n", ret);
303 return ret;
304 }
305
306 if (alrm->enabled) {
307 ret = wm831x_rtc_start_alarm(wm831x_rtc);
308 if (ret < 0) {
309 dev_err(dev, "Failed to start alarm: %d\n", ret);
310 return ret;
311 }
312 }
313
314 return 0;
315}
316
317static int wm831x_rtc_alarm_irq_enable(struct device *dev,
318 unsigned int enabled)
319{
320 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
321
322 if (enabled)
323 return wm831x_rtc_start_alarm(wm831x_rtc);
324 else
325 return wm831x_rtc_stop_alarm(wm831x_rtc);
326}
327
328static irqreturn_t wm831x_alm_irq(int irq, void *data)
329{
330 struct wm831x_rtc *wm831x_rtc = data;
331
332 rtc_update_irq(wm831x_rtc->rtc, 1, RTC_IRQF | RTC_AF);
333
334 return IRQ_HANDLED;
335}
336
337static const struct rtc_class_ops wm831x_rtc_ops = {
338 .read_time = wm831x_rtc_readtime,
339 .set_time = wm831x_rtc_settime,
340 .read_alarm = wm831x_rtc_readalarm,
341 .set_alarm = wm831x_rtc_setalarm,
342 .alarm_irq_enable = wm831x_rtc_alarm_irq_enable,
343};
344
345#ifdef CONFIG_PM
346/* Turn off the alarm if it should not be a wake source. */
347static int wm831x_rtc_suspend(struct device *dev)
348{
349 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
350 int ret, enable;
351
352 if (wm831x_rtc->alarm_enabled && device_may_wakeup(dev))
353 enable = WM831X_RTC_ALM_ENA;
354 else
355 enable = 0;
356
357 ret = wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
358 WM831X_RTC_ALM_ENA, enable);
359 if (ret != 0)
360 dev_err(dev, "Failed to update RTC alarm: %d\n", ret);
361
362 return 0;
363}
364
365/* Enable the alarm if it should be enabled (in case it was disabled to
366 * prevent use as a wake source).
367 */
368static int wm831x_rtc_resume(struct device *dev)
369{
370 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
371 int ret;
372
373 if (wm831x_rtc->alarm_enabled) {
374 ret = wm831x_rtc_start_alarm(wm831x_rtc);
375 if (ret != 0)
376 dev_err(dev, "Failed to restart RTC alarm: %d\n", ret);
377 }
378
379 return 0;
380}
381
382/* Unconditionally disable the alarm */
383static int wm831x_rtc_freeze(struct device *dev)
384{
385 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
386 int ret;
387
388 ret = wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
389 WM831X_RTC_ALM_ENA, 0);
390 if (ret != 0)
391 dev_err(dev, "Failed to stop RTC alarm: %d\n", ret);
392
393 return 0;
394}
395#else
396#define wm831x_rtc_suspend NULL
397#define wm831x_rtc_resume NULL
398#define wm831x_rtc_freeze NULL
399#endif
400
401static int wm831x_rtc_probe(struct platform_device *pdev)
402{
403 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
404 struct wm831x_rtc *wm831x_rtc;
405 int alm_irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "ALM"));
406 int ret = 0;
407
408 wm831x_rtc = devm_kzalloc(&pdev->dev, sizeof(*wm831x_rtc), GFP_KERNEL);
409 if (wm831x_rtc == NULL)
410 return -ENOMEM;
411
412 platform_set_drvdata(pdev, wm831x_rtc);
413 wm831x_rtc->wm831x = wm831x;
414
415 ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL);
416 if (ret < 0) {
417 dev_err(&pdev->dev, "Failed to read RTC control: %d\n", ret);
418 return ret;
419 }
420 if (ret & WM831X_RTC_ALM_ENA)
421 wm831x_rtc->alarm_enabled = 1;
422
423 device_init_wakeup(&pdev->dev, 1);
424
425 wm831x_rtc->rtc = devm_rtc_allocate_device(&pdev->dev);
426 if (IS_ERR(wm831x_rtc->rtc))
427 return PTR_ERR(wm831x_rtc->rtc);
428
429 wm831x_rtc->rtc->ops = &wm831x_rtc_ops;
430 wm831x_rtc->rtc->range_max = U32_MAX;
431
432 ret = rtc_register_device(wm831x_rtc->rtc);
433 if (ret)
434 return ret;
435
436 ret = devm_request_threaded_irq(&pdev->dev, alm_irq, NULL,
437 wm831x_alm_irq,
438 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
439 "RTC alarm",
440 wm831x_rtc);
441 if (ret != 0) {
442 dev_err(&pdev->dev, "Failed to request alarm IRQ %d: %d\n",
443 alm_irq, ret);
444 }
445
446 wm831x_rtc_add_randomness(wm831x);
447
448 return 0;
449}
450
451static const struct dev_pm_ops wm831x_rtc_pm_ops = {
452 .suspend = wm831x_rtc_suspend,
453 .resume = wm831x_rtc_resume,
454
455 .freeze = wm831x_rtc_freeze,
456 .thaw = wm831x_rtc_resume,
457 .restore = wm831x_rtc_resume,
458
459 .poweroff = wm831x_rtc_suspend,
460};
461
462static struct platform_driver wm831x_rtc_driver = {
463 .probe = wm831x_rtc_probe,
464 .driver = {
465 .name = "wm831x-rtc",
466 .pm = &wm831x_rtc_pm_ops,
467 },
468};
469
470module_platform_driver(wm831x_rtc_driver);
471
472MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
473MODULE_DESCRIPTION("RTC driver for the WM831x series PMICs");
474MODULE_LICENSE("GPL");
475MODULE_ALIAS("platform:wm831x-rtc");
1/*
2 * Real Time Clock driver for Wolfson Microelectronics WM831x
3 *
4 * Copyright (C) 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#include <linux/module.h>
16#include <linux/kernel.h>
17#include <linux/time.h>
18#include <linux/rtc.h>
19#include <linux/slab.h>
20#include <linux/bcd.h>
21#include <linux/interrupt.h>
22#include <linux/ioctl.h>
23#include <linux/completion.h>
24#include <linux/mfd/wm831x/core.h>
25#include <linux/delay.h>
26#include <linux/platform_device.h>
27#include <linux/random.h>
28
29/*
30 * R16416 (0x4020) - RTC Write Counter
31 */
32#define WM831X_RTC_WR_CNT_MASK 0xFFFF /* RTC_WR_CNT - [15:0] */
33#define WM831X_RTC_WR_CNT_SHIFT 0 /* RTC_WR_CNT - [15:0] */
34#define WM831X_RTC_WR_CNT_WIDTH 16 /* RTC_WR_CNT - [15:0] */
35
36/*
37 * R16417 (0x4021) - RTC Time 1
38 */
39#define WM831X_RTC_TIME_MASK 0xFFFF /* RTC_TIME - [15:0] */
40#define WM831X_RTC_TIME_SHIFT 0 /* RTC_TIME - [15:0] */
41#define WM831X_RTC_TIME_WIDTH 16 /* RTC_TIME - [15:0] */
42
43/*
44 * R16418 (0x4022) - RTC Time 2
45 */
46#define WM831X_RTC_TIME_MASK 0xFFFF /* RTC_TIME - [15:0] */
47#define WM831X_RTC_TIME_SHIFT 0 /* RTC_TIME - [15:0] */
48#define WM831X_RTC_TIME_WIDTH 16 /* RTC_TIME - [15:0] */
49
50/*
51 * R16419 (0x4023) - RTC Alarm 1
52 */
53#define WM831X_RTC_ALM_MASK 0xFFFF /* RTC_ALM - [15:0] */
54#define WM831X_RTC_ALM_SHIFT 0 /* RTC_ALM - [15:0] */
55#define WM831X_RTC_ALM_WIDTH 16 /* RTC_ALM - [15:0] */
56
57/*
58 * R16420 (0x4024) - RTC Alarm 2
59 */
60#define WM831X_RTC_ALM_MASK 0xFFFF /* RTC_ALM - [15:0] */
61#define WM831X_RTC_ALM_SHIFT 0 /* RTC_ALM - [15:0] */
62#define WM831X_RTC_ALM_WIDTH 16 /* RTC_ALM - [15:0] */
63
64/*
65 * R16421 (0x4025) - RTC Control
66 */
67#define WM831X_RTC_VALID 0x8000 /* RTC_VALID */
68#define WM831X_RTC_VALID_MASK 0x8000 /* RTC_VALID */
69#define WM831X_RTC_VALID_SHIFT 15 /* RTC_VALID */
70#define WM831X_RTC_VALID_WIDTH 1 /* RTC_VALID */
71#define WM831X_RTC_SYNC_BUSY 0x4000 /* RTC_SYNC_BUSY */
72#define WM831X_RTC_SYNC_BUSY_MASK 0x4000 /* RTC_SYNC_BUSY */
73#define WM831X_RTC_SYNC_BUSY_SHIFT 14 /* RTC_SYNC_BUSY */
74#define WM831X_RTC_SYNC_BUSY_WIDTH 1 /* RTC_SYNC_BUSY */
75#define WM831X_RTC_ALM_ENA 0x0400 /* RTC_ALM_ENA */
76#define WM831X_RTC_ALM_ENA_MASK 0x0400 /* RTC_ALM_ENA */
77#define WM831X_RTC_ALM_ENA_SHIFT 10 /* RTC_ALM_ENA */
78#define WM831X_RTC_ALM_ENA_WIDTH 1 /* RTC_ALM_ENA */
79#define WM831X_RTC_PINT_FREQ_MASK 0x0070 /* RTC_PINT_FREQ - [6:4] */
80#define WM831X_RTC_PINT_FREQ_SHIFT 4 /* RTC_PINT_FREQ - [6:4] */
81#define WM831X_RTC_PINT_FREQ_WIDTH 3 /* RTC_PINT_FREQ - [6:4] */
82
83/*
84 * R16422 (0x4026) - RTC Trim
85 */
86#define WM831X_RTC_TRIM_MASK 0x03FF /* RTC_TRIM - [9:0] */
87#define WM831X_RTC_TRIM_SHIFT 0 /* RTC_TRIM - [9:0] */
88#define WM831X_RTC_TRIM_WIDTH 10 /* RTC_TRIM - [9:0] */
89
90#define WM831X_SET_TIME_RETRIES 5
91#define WM831X_GET_TIME_RETRIES 5
92
93struct wm831x_rtc {
94 struct wm831x *wm831x;
95 struct rtc_device *rtc;
96 unsigned int alarm_enabled:1;
97};
98
99static void wm831x_rtc_add_randomness(struct wm831x *wm831x)
100{
101 int ret;
102 u16 reg;
103
104 /*
105 * The write counter contains a pseudo-random number which is
106 * regenerated every time we set the RTC so it should be a
107 * useful per-system source of entropy.
108 */
109 ret = wm831x_reg_read(wm831x, WM831X_RTC_WRITE_COUNTER);
110 if (ret >= 0) {
111 reg = ret;
112 add_device_randomness(®, sizeof(reg));
113 } else {
114 dev_warn(wm831x->dev, "Failed to read RTC write counter: %d\n",
115 ret);
116 }
117}
118
119/*
120 * Read current time and date in RTC
121 */
122static int wm831x_rtc_readtime(struct device *dev, struct rtc_time *tm)
123{
124 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
125 struct wm831x *wm831x = wm831x_rtc->wm831x;
126 u16 time1[2], time2[2];
127 int ret;
128 int count = 0;
129
130 /* Has the RTC been programmed? */
131 ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL);
132 if (ret < 0) {
133 dev_err(dev, "Failed to read RTC control: %d\n", ret);
134 return ret;
135 }
136 if (!(ret & WM831X_RTC_VALID)) {
137 dev_dbg(dev, "RTC not yet configured\n");
138 return -EINVAL;
139 }
140
141 /* Read twice to make sure we don't read a corrupt, partially
142 * incremented, value.
143 */
144 do {
145 ret = wm831x_bulk_read(wm831x, WM831X_RTC_TIME_1,
146 2, time1);
147 if (ret != 0)
148 continue;
149
150 ret = wm831x_bulk_read(wm831x, WM831X_RTC_TIME_1,
151 2, time2);
152 if (ret != 0)
153 continue;
154
155 if (memcmp(time1, time2, sizeof(time1)) == 0) {
156 u32 time = (time1[0] << 16) | time1[1];
157
158 rtc_time_to_tm(time, tm);
159 return rtc_valid_tm(tm);
160 }
161
162 } while (++count < WM831X_GET_TIME_RETRIES);
163
164 dev_err(dev, "Timed out reading current time\n");
165
166 return -EIO;
167}
168
169/*
170 * Set current time and date in RTC
171 */
172static int wm831x_rtc_set_mmss(struct device *dev, unsigned long time)
173{
174 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
175 struct wm831x *wm831x = wm831x_rtc->wm831x;
176 struct rtc_time new_tm;
177 unsigned long new_time;
178 int ret;
179 int count = 0;
180
181 ret = wm831x_reg_write(wm831x, WM831X_RTC_TIME_1,
182 (time >> 16) & 0xffff);
183 if (ret < 0) {
184 dev_err(dev, "Failed to write TIME_1: %d\n", ret);
185 return ret;
186 }
187
188 ret = wm831x_reg_write(wm831x, WM831X_RTC_TIME_2, time & 0xffff);
189 if (ret < 0) {
190 dev_err(dev, "Failed to write TIME_2: %d\n", ret);
191 return ret;
192 }
193
194 /* Wait for the update to complete - should happen first time
195 * round but be conservative.
196 */
197 do {
198 msleep(1);
199
200 ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL);
201 if (ret < 0)
202 ret = WM831X_RTC_SYNC_BUSY;
203 } while (!(ret & WM831X_RTC_SYNC_BUSY) &&
204 ++count < WM831X_SET_TIME_RETRIES);
205
206 if (ret & WM831X_RTC_SYNC_BUSY) {
207 dev_err(dev, "Timed out writing RTC update\n");
208 return -EIO;
209 }
210
211 /* Check that the update was accepted; security features may
212 * have caused the update to be ignored.
213 */
214 ret = wm831x_rtc_readtime(dev, &new_tm);
215 if (ret < 0)
216 return ret;
217
218 ret = rtc_tm_to_time(&new_tm, &new_time);
219 if (ret < 0) {
220 dev_err(dev, "Failed to convert time: %d\n", ret);
221 return ret;
222 }
223
224 /* Allow a second of change in case of tick */
225 if (new_time - time > 1) {
226 dev_err(dev, "RTC update not permitted by hardware\n");
227 return -EPERM;
228 }
229
230 return 0;
231}
232
233/*
234 * Read alarm time and date in RTC
235 */
236static int wm831x_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
237{
238 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
239 int ret;
240 u16 data[2];
241 u32 time;
242
243 ret = wm831x_bulk_read(wm831x_rtc->wm831x, WM831X_RTC_ALARM_1,
244 2, data);
245 if (ret != 0) {
246 dev_err(dev, "Failed to read alarm time: %d\n", ret);
247 return ret;
248 }
249
250 time = (data[0] << 16) | data[1];
251
252 rtc_time_to_tm(time, &alrm->time);
253
254 ret = wm831x_reg_read(wm831x_rtc->wm831x, WM831X_RTC_CONTROL);
255 if (ret < 0) {
256 dev_err(dev, "Failed to read RTC control: %d\n", ret);
257 return ret;
258 }
259
260 if (ret & WM831X_RTC_ALM_ENA)
261 alrm->enabled = 1;
262 else
263 alrm->enabled = 0;
264
265 return 0;
266}
267
268static int wm831x_rtc_stop_alarm(struct wm831x_rtc *wm831x_rtc)
269{
270 wm831x_rtc->alarm_enabled = 0;
271
272 return wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
273 WM831X_RTC_ALM_ENA, 0);
274}
275
276static int wm831x_rtc_start_alarm(struct wm831x_rtc *wm831x_rtc)
277{
278 wm831x_rtc->alarm_enabled = 1;
279
280 return wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
281 WM831X_RTC_ALM_ENA, WM831X_RTC_ALM_ENA);
282}
283
284static int wm831x_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
285{
286 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
287 struct wm831x *wm831x = wm831x_rtc->wm831x;
288 int ret;
289 unsigned long time;
290
291 ret = rtc_tm_to_time(&alrm->time, &time);
292 if (ret < 0) {
293 dev_err(dev, "Failed to convert time: %d\n", ret);
294 return ret;
295 }
296
297 ret = wm831x_rtc_stop_alarm(wm831x_rtc);
298 if (ret < 0) {
299 dev_err(dev, "Failed to stop alarm: %d\n", ret);
300 return ret;
301 }
302
303 ret = wm831x_reg_write(wm831x, WM831X_RTC_ALARM_1,
304 (time >> 16) & 0xffff);
305 if (ret < 0) {
306 dev_err(dev, "Failed to write ALARM_1: %d\n", ret);
307 return ret;
308 }
309
310 ret = wm831x_reg_write(wm831x, WM831X_RTC_ALARM_2, time & 0xffff);
311 if (ret < 0) {
312 dev_err(dev, "Failed to write ALARM_2: %d\n", ret);
313 return ret;
314 }
315
316 if (alrm->enabled) {
317 ret = wm831x_rtc_start_alarm(wm831x_rtc);
318 if (ret < 0) {
319 dev_err(dev, "Failed to start alarm: %d\n", ret);
320 return ret;
321 }
322 }
323
324 return 0;
325}
326
327static int wm831x_rtc_alarm_irq_enable(struct device *dev,
328 unsigned int enabled)
329{
330 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
331
332 if (enabled)
333 return wm831x_rtc_start_alarm(wm831x_rtc);
334 else
335 return wm831x_rtc_stop_alarm(wm831x_rtc);
336}
337
338static irqreturn_t wm831x_alm_irq(int irq, void *data)
339{
340 struct wm831x_rtc *wm831x_rtc = data;
341
342 rtc_update_irq(wm831x_rtc->rtc, 1, RTC_IRQF | RTC_AF);
343
344 return IRQ_HANDLED;
345}
346
347static const struct rtc_class_ops wm831x_rtc_ops = {
348 .read_time = wm831x_rtc_readtime,
349 .set_mmss = wm831x_rtc_set_mmss,
350 .read_alarm = wm831x_rtc_readalarm,
351 .set_alarm = wm831x_rtc_setalarm,
352 .alarm_irq_enable = wm831x_rtc_alarm_irq_enable,
353};
354
355#ifdef CONFIG_PM
356/* Turn off the alarm if it should not be a wake source. */
357static int wm831x_rtc_suspend(struct device *dev)
358{
359 struct platform_device *pdev = to_platform_device(dev);
360 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(&pdev->dev);
361 int ret, enable;
362
363 if (wm831x_rtc->alarm_enabled && device_may_wakeup(&pdev->dev))
364 enable = WM831X_RTC_ALM_ENA;
365 else
366 enable = 0;
367
368 ret = wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
369 WM831X_RTC_ALM_ENA, enable);
370 if (ret != 0)
371 dev_err(&pdev->dev, "Failed to update RTC alarm: %d\n", ret);
372
373 return 0;
374}
375
376/* Enable the alarm if it should be enabled (in case it was disabled to
377 * prevent use as a wake source).
378 */
379static int wm831x_rtc_resume(struct device *dev)
380{
381 struct platform_device *pdev = to_platform_device(dev);
382 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(&pdev->dev);
383 int ret;
384
385 if (wm831x_rtc->alarm_enabled) {
386 ret = wm831x_rtc_start_alarm(wm831x_rtc);
387 if (ret != 0)
388 dev_err(&pdev->dev,
389 "Failed to restart RTC alarm: %d\n", ret);
390 }
391
392 return 0;
393}
394
395/* Unconditionally disable the alarm */
396static int wm831x_rtc_freeze(struct device *dev)
397{
398 struct platform_device *pdev = to_platform_device(dev);
399 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(&pdev->dev);
400 int ret;
401
402 ret = wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
403 WM831X_RTC_ALM_ENA, 0);
404 if (ret != 0)
405 dev_err(&pdev->dev, "Failed to stop RTC alarm: %d\n", ret);
406
407 return 0;
408}
409#else
410#define wm831x_rtc_suspend NULL
411#define wm831x_rtc_resume NULL
412#define wm831x_rtc_freeze NULL
413#endif
414
415static int wm831x_rtc_probe(struct platform_device *pdev)
416{
417 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
418 struct wm831x_rtc *wm831x_rtc;
419 int alm_irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "ALM"));
420 int ret = 0;
421
422 wm831x_rtc = devm_kzalloc(&pdev->dev, sizeof(*wm831x_rtc), GFP_KERNEL);
423 if (wm831x_rtc == NULL)
424 return -ENOMEM;
425
426 platform_set_drvdata(pdev, wm831x_rtc);
427 wm831x_rtc->wm831x = wm831x;
428
429 ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL);
430 if (ret < 0) {
431 dev_err(&pdev->dev, "Failed to read RTC control: %d\n", ret);
432 goto err;
433 }
434 if (ret & WM831X_RTC_ALM_ENA)
435 wm831x_rtc->alarm_enabled = 1;
436
437 device_init_wakeup(&pdev->dev, 1);
438
439 wm831x_rtc->rtc = devm_rtc_device_register(&pdev->dev, "wm831x",
440 &wm831x_rtc_ops, THIS_MODULE);
441 if (IS_ERR(wm831x_rtc->rtc)) {
442 ret = PTR_ERR(wm831x_rtc->rtc);
443 goto err;
444 }
445
446 ret = devm_request_threaded_irq(&pdev->dev, alm_irq, NULL,
447 wm831x_alm_irq,
448 IRQF_TRIGGER_RISING, "RTC alarm",
449 wm831x_rtc);
450 if (ret != 0) {
451 dev_err(&pdev->dev, "Failed to request alarm IRQ %d: %d\n",
452 alm_irq, ret);
453 }
454
455 wm831x_rtc_add_randomness(wm831x);
456
457 return 0;
458
459err:
460 return ret;
461}
462
463static const struct dev_pm_ops wm831x_rtc_pm_ops = {
464 .suspend = wm831x_rtc_suspend,
465 .resume = wm831x_rtc_resume,
466
467 .freeze = wm831x_rtc_freeze,
468 .thaw = wm831x_rtc_resume,
469 .restore = wm831x_rtc_resume,
470
471 .poweroff = wm831x_rtc_suspend,
472};
473
474static struct platform_driver wm831x_rtc_driver = {
475 .probe = wm831x_rtc_probe,
476 .driver = {
477 .name = "wm831x-rtc",
478 .pm = &wm831x_rtc_pm_ops,
479 },
480};
481
482module_platform_driver(wm831x_rtc_driver);
483
484MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
485MODULE_DESCRIPTION("RTC driver for the WM831x series PMICs");
486MODULE_LICENSE("GPL");
487MODULE_ALIAS("platform:wm831x-rtc");