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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * AT86RF230/RF231 driver
4 *
5 * Copyright (C) 2009-2012 Siemens AG
6 *
7 * Written by:
8 * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
9 * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
10 * Alexander Aring <aar@pengutronix.de>
11 */
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/hrtimer.h>
15#include <linux/jiffies.h>
16#include <linux/interrupt.h>
17#include <linux/irq.h>
18#include <linux/gpio.h>
19#include <linux/delay.h>
20#include <linux/spi/spi.h>
21#include <linux/spi/at86rf230.h>
22#include <linux/regmap.h>
23#include <linux/skbuff.h>
24#include <linux/of_gpio.h>
25#include <linux/ieee802154.h>
26#include <linux/debugfs.h>
27
28#include <net/mac802154.h>
29#include <net/cfg802154.h>
30
31#include "at86rf230.h"
32
33struct at86rf230_local;
34/* at86rf2xx chip depend data.
35 * All timings are in us.
36 */
37struct at86rf2xx_chip_data {
38 u16 t_sleep_cycle;
39 u16 t_channel_switch;
40 u16 t_reset_to_off;
41 u16 t_off_to_aack;
42 u16 t_off_to_tx_on;
43 u16 t_off_to_sleep;
44 u16 t_sleep_to_off;
45 u16 t_frame;
46 u16 t_p_ack;
47 int rssi_base_val;
48
49 int (*set_channel)(struct at86rf230_local *, u8, u8);
50 int (*set_txpower)(struct at86rf230_local *, s32);
51};
52
53#define AT86RF2XX_MAX_BUF (127 + 3)
54/* tx retries to access the TX_ON state
55 * if it's above then force change will be started.
56 *
57 * We assume the max_frame_retries (7) value of 802.15.4 here.
58 */
59#define AT86RF2XX_MAX_TX_RETRIES 7
60/* We use the recommended 5 minutes timeout to recalibrate */
61#define AT86RF2XX_CAL_LOOP_TIMEOUT (5 * 60 * HZ)
62
63struct at86rf230_state_change {
64 struct at86rf230_local *lp;
65 int irq;
66
67 struct hrtimer timer;
68 struct spi_message msg;
69 struct spi_transfer trx;
70 u8 buf[AT86RF2XX_MAX_BUF];
71
72 void (*complete)(void *context);
73 u8 from_state;
74 u8 to_state;
75
76 bool free;
77};
78
79struct at86rf230_trac {
80 u64 success;
81 u64 success_data_pending;
82 u64 success_wait_for_ack;
83 u64 channel_access_failure;
84 u64 no_ack;
85 u64 invalid;
86};
87
88struct at86rf230_local {
89 struct spi_device *spi;
90
91 struct ieee802154_hw *hw;
92 struct at86rf2xx_chip_data *data;
93 struct regmap *regmap;
94 int slp_tr;
95 bool sleep;
96
97 struct completion state_complete;
98 struct at86rf230_state_change state;
99
100 unsigned long cal_timeout;
101 bool is_tx;
102 bool is_tx_from_off;
103 u8 tx_retry;
104 struct sk_buff *tx_skb;
105 struct at86rf230_state_change tx;
106
107 struct at86rf230_trac trac;
108};
109
110#define AT86RF2XX_NUMREGS 0x3F
111
112static void
113at86rf230_async_state_change(struct at86rf230_local *lp,
114 struct at86rf230_state_change *ctx,
115 const u8 state, void (*complete)(void *context));
116
117static inline void
118at86rf230_sleep(struct at86rf230_local *lp)
119{
120 if (gpio_is_valid(lp->slp_tr)) {
121 gpio_set_value(lp->slp_tr, 1);
122 usleep_range(lp->data->t_off_to_sleep,
123 lp->data->t_off_to_sleep + 10);
124 lp->sleep = true;
125 }
126}
127
128static inline void
129at86rf230_awake(struct at86rf230_local *lp)
130{
131 if (gpio_is_valid(lp->slp_tr)) {
132 gpio_set_value(lp->slp_tr, 0);
133 usleep_range(lp->data->t_sleep_to_off,
134 lp->data->t_sleep_to_off + 100);
135 lp->sleep = false;
136 }
137}
138
139static inline int
140__at86rf230_write(struct at86rf230_local *lp,
141 unsigned int addr, unsigned int data)
142{
143 bool sleep = lp->sleep;
144 int ret;
145
146 /* awake for register setting if sleep */
147 if (sleep)
148 at86rf230_awake(lp);
149
150 ret = regmap_write(lp->regmap, addr, data);
151
152 /* sleep again if was sleeping */
153 if (sleep)
154 at86rf230_sleep(lp);
155
156 return ret;
157}
158
159static inline int
160__at86rf230_read(struct at86rf230_local *lp,
161 unsigned int addr, unsigned int *data)
162{
163 bool sleep = lp->sleep;
164 int ret;
165
166 /* awake for register setting if sleep */
167 if (sleep)
168 at86rf230_awake(lp);
169
170 ret = regmap_read(lp->regmap, addr, data);
171
172 /* sleep again if was sleeping */
173 if (sleep)
174 at86rf230_sleep(lp);
175
176 return ret;
177}
178
179static inline int
180at86rf230_read_subreg(struct at86rf230_local *lp,
181 unsigned int addr, unsigned int mask,
182 unsigned int shift, unsigned int *data)
183{
184 int rc;
185
186 rc = __at86rf230_read(lp, addr, data);
187 if (!rc)
188 *data = (*data & mask) >> shift;
189
190 return rc;
191}
192
193static inline int
194at86rf230_write_subreg(struct at86rf230_local *lp,
195 unsigned int addr, unsigned int mask,
196 unsigned int shift, unsigned int data)
197{
198 bool sleep = lp->sleep;
199 int ret;
200
201 /* awake for register setting if sleep */
202 if (sleep)
203 at86rf230_awake(lp);
204
205 ret = regmap_update_bits(lp->regmap, addr, mask, data << shift);
206
207 /* sleep again if was sleeping */
208 if (sleep)
209 at86rf230_sleep(lp);
210
211 return ret;
212}
213
214static inline void
215at86rf230_slp_tr_rising_edge(struct at86rf230_local *lp)
216{
217 gpio_set_value(lp->slp_tr, 1);
218 udelay(1);
219 gpio_set_value(lp->slp_tr, 0);
220}
221
222static bool
223at86rf230_reg_writeable(struct device *dev, unsigned int reg)
224{
225 switch (reg) {
226 case RG_TRX_STATE:
227 case RG_TRX_CTRL_0:
228 case RG_TRX_CTRL_1:
229 case RG_PHY_TX_PWR:
230 case RG_PHY_ED_LEVEL:
231 case RG_PHY_CC_CCA:
232 case RG_CCA_THRES:
233 case RG_RX_CTRL:
234 case RG_SFD_VALUE:
235 case RG_TRX_CTRL_2:
236 case RG_ANT_DIV:
237 case RG_IRQ_MASK:
238 case RG_VREG_CTRL:
239 case RG_BATMON:
240 case RG_XOSC_CTRL:
241 case RG_RX_SYN:
242 case RG_XAH_CTRL_1:
243 case RG_FTN_CTRL:
244 case RG_PLL_CF:
245 case RG_PLL_DCU:
246 case RG_SHORT_ADDR_0:
247 case RG_SHORT_ADDR_1:
248 case RG_PAN_ID_0:
249 case RG_PAN_ID_1:
250 case RG_IEEE_ADDR_0:
251 case RG_IEEE_ADDR_1:
252 case RG_IEEE_ADDR_2:
253 case RG_IEEE_ADDR_3:
254 case RG_IEEE_ADDR_4:
255 case RG_IEEE_ADDR_5:
256 case RG_IEEE_ADDR_6:
257 case RG_IEEE_ADDR_7:
258 case RG_XAH_CTRL_0:
259 case RG_CSMA_SEED_0:
260 case RG_CSMA_SEED_1:
261 case RG_CSMA_BE:
262 return true;
263 default:
264 return false;
265 }
266}
267
268static bool
269at86rf230_reg_readable(struct device *dev, unsigned int reg)
270{
271 bool rc;
272
273 /* all writeable are also readable */
274 rc = at86rf230_reg_writeable(dev, reg);
275 if (rc)
276 return rc;
277
278 /* readonly regs */
279 switch (reg) {
280 case RG_TRX_STATUS:
281 case RG_PHY_RSSI:
282 case RG_IRQ_STATUS:
283 case RG_PART_NUM:
284 case RG_VERSION_NUM:
285 case RG_MAN_ID_1:
286 case RG_MAN_ID_0:
287 return true;
288 default:
289 return false;
290 }
291}
292
293static bool
294at86rf230_reg_volatile(struct device *dev, unsigned int reg)
295{
296 /* can be changed during runtime */
297 switch (reg) {
298 case RG_TRX_STATUS:
299 case RG_TRX_STATE:
300 case RG_PHY_RSSI:
301 case RG_PHY_ED_LEVEL:
302 case RG_IRQ_STATUS:
303 case RG_VREG_CTRL:
304 case RG_PLL_CF:
305 case RG_PLL_DCU:
306 return true;
307 default:
308 return false;
309 }
310}
311
312static bool
313at86rf230_reg_precious(struct device *dev, unsigned int reg)
314{
315 /* don't clear irq line on read */
316 switch (reg) {
317 case RG_IRQ_STATUS:
318 return true;
319 default:
320 return false;
321 }
322}
323
324static const struct regmap_config at86rf230_regmap_spi_config = {
325 .reg_bits = 8,
326 .val_bits = 8,
327 .write_flag_mask = CMD_REG | CMD_WRITE,
328 .read_flag_mask = CMD_REG,
329 .cache_type = REGCACHE_RBTREE,
330 .max_register = AT86RF2XX_NUMREGS,
331 .writeable_reg = at86rf230_reg_writeable,
332 .readable_reg = at86rf230_reg_readable,
333 .volatile_reg = at86rf230_reg_volatile,
334 .precious_reg = at86rf230_reg_precious,
335};
336
337static void
338at86rf230_async_error_recover_complete(void *context)
339{
340 struct at86rf230_state_change *ctx = context;
341 struct at86rf230_local *lp = ctx->lp;
342
343 if (ctx->free)
344 kfree(ctx);
345
346 ieee802154_wake_queue(lp->hw);
347}
348
349static void
350at86rf230_async_error_recover(void *context)
351{
352 struct at86rf230_state_change *ctx = context;
353 struct at86rf230_local *lp = ctx->lp;
354
355 lp->is_tx = 0;
356 at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
357 at86rf230_async_error_recover_complete);
358}
359
360static inline void
361at86rf230_async_error(struct at86rf230_local *lp,
362 struct at86rf230_state_change *ctx, int rc)
363{
364 dev_err(&lp->spi->dev, "spi_async error %d\n", rc);
365
366 at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
367 at86rf230_async_error_recover);
368}
369
370/* Generic function to get some register value in async mode */
371static void
372at86rf230_async_read_reg(struct at86rf230_local *lp, u8 reg,
373 struct at86rf230_state_change *ctx,
374 void (*complete)(void *context))
375{
376 int rc;
377
378 u8 *tx_buf = ctx->buf;
379
380 tx_buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
381 ctx->msg.complete = complete;
382 rc = spi_async(lp->spi, &ctx->msg);
383 if (rc)
384 at86rf230_async_error(lp, ctx, rc);
385}
386
387static void
388at86rf230_async_write_reg(struct at86rf230_local *lp, u8 reg, u8 val,
389 struct at86rf230_state_change *ctx,
390 void (*complete)(void *context))
391{
392 int rc;
393
394 ctx->buf[0] = (reg & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
395 ctx->buf[1] = val;
396 ctx->msg.complete = complete;
397 rc = spi_async(lp->spi, &ctx->msg);
398 if (rc)
399 at86rf230_async_error(lp, ctx, rc);
400}
401
402static void
403at86rf230_async_state_assert(void *context)
404{
405 struct at86rf230_state_change *ctx = context;
406 struct at86rf230_local *lp = ctx->lp;
407 const u8 *buf = ctx->buf;
408 const u8 trx_state = buf[1] & TRX_STATE_MASK;
409
410 /* Assert state change */
411 if (trx_state != ctx->to_state) {
412 /* Special handling if transceiver state is in
413 * STATE_BUSY_RX_AACK and a SHR was detected.
414 */
415 if (trx_state == STATE_BUSY_RX_AACK) {
416 /* Undocumented race condition. If we send a state
417 * change to STATE_RX_AACK_ON the transceiver could
418 * change his state automatically to STATE_BUSY_RX_AACK
419 * if a SHR was detected. This is not an error, but we
420 * can't assert this.
421 */
422 if (ctx->to_state == STATE_RX_AACK_ON)
423 goto done;
424
425 /* If we change to STATE_TX_ON without forcing and
426 * transceiver state is STATE_BUSY_RX_AACK, we wait
427 * 'tFrame + tPAck' receiving time. In this time the
428 * PDU should be received. If the transceiver is still
429 * in STATE_BUSY_RX_AACK, we run a force state change
430 * to STATE_TX_ON. This is a timeout handling, if the
431 * transceiver stucks in STATE_BUSY_RX_AACK.
432 *
433 * Additional we do several retries to try to get into
434 * TX_ON state without forcing. If the retries are
435 * higher or equal than AT86RF2XX_MAX_TX_RETRIES we
436 * will do a force change.
437 */
438 if (ctx->to_state == STATE_TX_ON ||
439 ctx->to_state == STATE_TRX_OFF) {
440 u8 state = ctx->to_state;
441
442 if (lp->tx_retry >= AT86RF2XX_MAX_TX_RETRIES)
443 state = STATE_FORCE_TRX_OFF;
444 lp->tx_retry++;
445
446 at86rf230_async_state_change(lp, ctx, state,
447 ctx->complete);
448 return;
449 }
450 }
451
452 dev_warn(&lp->spi->dev, "unexcept state change from 0x%02x to 0x%02x. Actual state: 0x%02x\n",
453 ctx->from_state, ctx->to_state, trx_state);
454 }
455
456done:
457 if (ctx->complete)
458 ctx->complete(context);
459}
460
461static enum hrtimer_restart at86rf230_async_state_timer(struct hrtimer *timer)
462{
463 struct at86rf230_state_change *ctx =
464 container_of(timer, struct at86rf230_state_change, timer);
465 struct at86rf230_local *lp = ctx->lp;
466
467 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
468 at86rf230_async_state_assert);
469
470 return HRTIMER_NORESTART;
471}
472
473/* Do state change timing delay. */
474static void
475at86rf230_async_state_delay(void *context)
476{
477 struct at86rf230_state_change *ctx = context;
478 struct at86rf230_local *lp = ctx->lp;
479 struct at86rf2xx_chip_data *c = lp->data;
480 bool force = false;
481 ktime_t tim;
482
483 /* The force state changes are will show as normal states in the
484 * state status subregister. We change the to_state to the
485 * corresponding one and remember if it was a force change, this
486 * differs if we do a state change from STATE_BUSY_RX_AACK.
487 */
488 switch (ctx->to_state) {
489 case STATE_FORCE_TX_ON:
490 ctx->to_state = STATE_TX_ON;
491 force = true;
492 break;
493 case STATE_FORCE_TRX_OFF:
494 ctx->to_state = STATE_TRX_OFF;
495 force = true;
496 break;
497 default:
498 break;
499 }
500
501 switch (ctx->from_state) {
502 case STATE_TRX_OFF:
503 switch (ctx->to_state) {
504 case STATE_RX_AACK_ON:
505 tim = c->t_off_to_aack * NSEC_PER_USEC;
506 /* state change from TRX_OFF to RX_AACK_ON to do a
507 * calibration, we need to reset the timeout for the
508 * next one.
509 */
510 lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
511 goto change;
512 case STATE_TX_ARET_ON:
513 case STATE_TX_ON:
514 tim = c->t_off_to_tx_on * NSEC_PER_USEC;
515 /* state change from TRX_OFF to TX_ON or ARET_ON to do
516 * a calibration, we need to reset the timeout for the
517 * next one.
518 */
519 lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
520 goto change;
521 default:
522 break;
523 }
524 break;
525 case STATE_BUSY_RX_AACK:
526 switch (ctx->to_state) {
527 case STATE_TRX_OFF:
528 case STATE_TX_ON:
529 /* Wait for worst case receiving time if we
530 * didn't make a force change from BUSY_RX_AACK
531 * to TX_ON or TRX_OFF.
532 */
533 if (!force) {
534 tim = (c->t_frame + c->t_p_ack) * NSEC_PER_USEC;
535 goto change;
536 }
537 break;
538 default:
539 break;
540 }
541 break;
542 /* Default value, means RESET state */
543 case STATE_P_ON:
544 switch (ctx->to_state) {
545 case STATE_TRX_OFF:
546 tim = c->t_reset_to_off * NSEC_PER_USEC;
547 goto change;
548 default:
549 break;
550 }
551 break;
552 default:
553 break;
554 }
555
556 /* Default delay is 1us in the most cases */
557 udelay(1);
558 at86rf230_async_state_timer(&ctx->timer);
559 return;
560
561change:
562 hrtimer_start(&ctx->timer, tim, HRTIMER_MODE_REL);
563}
564
565static void
566at86rf230_async_state_change_start(void *context)
567{
568 struct at86rf230_state_change *ctx = context;
569 struct at86rf230_local *lp = ctx->lp;
570 u8 *buf = ctx->buf;
571 const u8 trx_state = buf[1] & TRX_STATE_MASK;
572
573 /* Check for "possible" STATE_TRANSITION_IN_PROGRESS */
574 if (trx_state == STATE_TRANSITION_IN_PROGRESS) {
575 udelay(1);
576 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
577 at86rf230_async_state_change_start);
578 return;
579 }
580
581 /* Check if we already are in the state which we change in */
582 if (trx_state == ctx->to_state) {
583 if (ctx->complete)
584 ctx->complete(context);
585 return;
586 }
587
588 /* Set current state to the context of state change */
589 ctx->from_state = trx_state;
590
591 /* Going into the next step for a state change which do a timing
592 * relevant delay.
593 */
594 at86rf230_async_write_reg(lp, RG_TRX_STATE, ctx->to_state, ctx,
595 at86rf230_async_state_delay);
596}
597
598static void
599at86rf230_async_state_change(struct at86rf230_local *lp,
600 struct at86rf230_state_change *ctx,
601 const u8 state, void (*complete)(void *context))
602{
603 /* Initialization for the state change context */
604 ctx->to_state = state;
605 ctx->complete = complete;
606 at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
607 at86rf230_async_state_change_start);
608}
609
610static void
611at86rf230_sync_state_change_complete(void *context)
612{
613 struct at86rf230_state_change *ctx = context;
614 struct at86rf230_local *lp = ctx->lp;
615
616 complete(&lp->state_complete);
617}
618
619/* This function do a sync framework above the async state change.
620 * Some callbacks of the IEEE 802.15.4 driver interface need to be
621 * handled synchronously.
622 */
623static int
624at86rf230_sync_state_change(struct at86rf230_local *lp, unsigned int state)
625{
626 unsigned long rc;
627
628 at86rf230_async_state_change(lp, &lp->state, state,
629 at86rf230_sync_state_change_complete);
630
631 rc = wait_for_completion_timeout(&lp->state_complete,
632 msecs_to_jiffies(100));
633 if (!rc) {
634 at86rf230_async_error(lp, &lp->state, -ETIMEDOUT);
635 return -ETIMEDOUT;
636 }
637
638 return 0;
639}
640
641static void
642at86rf230_tx_complete(void *context)
643{
644 struct at86rf230_state_change *ctx = context;
645 struct at86rf230_local *lp = ctx->lp;
646
647 ieee802154_xmit_complete(lp->hw, lp->tx_skb, false);
648 kfree(ctx);
649}
650
651static void
652at86rf230_tx_on(void *context)
653{
654 struct at86rf230_state_change *ctx = context;
655 struct at86rf230_local *lp = ctx->lp;
656
657 at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
658 at86rf230_tx_complete);
659}
660
661static void
662at86rf230_tx_trac_check(void *context)
663{
664 struct at86rf230_state_change *ctx = context;
665 struct at86rf230_local *lp = ctx->lp;
666
667 if (IS_ENABLED(CONFIG_IEEE802154_AT86RF230_DEBUGFS)) {
668 u8 trac = TRAC_MASK(ctx->buf[1]);
669
670 switch (trac) {
671 case TRAC_SUCCESS:
672 lp->trac.success++;
673 break;
674 case TRAC_SUCCESS_DATA_PENDING:
675 lp->trac.success_data_pending++;
676 break;
677 case TRAC_CHANNEL_ACCESS_FAILURE:
678 lp->trac.channel_access_failure++;
679 break;
680 case TRAC_NO_ACK:
681 lp->trac.no_ack++;
682 break;
683 case TRAC_INVALID:
684 lp->trac.invalid++;
685 break;
686 default:
687 WARN_ONCE(1, "received tx trac status %d\n", trac);
688 break;
689 }
690 }
691
692 at86rf230_async_state_change(lp, ctx, STATE_TX_ON, at86rf230_tx_on);
693}
694
695static void
696at86rf230_rx_read_frame_complete(void *context)
697{
698 struct at86rf230_state_change *ctx = context;
699 struct at86rf230_local *lp = ctx->lp;
700 const u8 *buf = ctx->buf;
701 struct sk_buff *skb;
702 u8 len, lqi;
703
704 len = buf[1];
705 if (!ieee802154_is_valid_psdu_len(len)) {
706 dev_vdbg(&lp->spi->dev, "corrupted frame received\n");
707 len = IEEE802154_MTU;
708 }
709 lqi = buf[2 + len];
710
711 skb = dev_alloc_skb(IEEE802154_MTU);
712 if (!skb) {
713 dev_vdbg(&lp->spi->dev, "failed to allocate sk_buff\n");
714 kfree(ctx);
715 return;
716 }
717
718 skb_put_data(skb, buf + 2, len);
719 ieee802154_rx_irqsafe(lp->hw, skb, lqi);
720 kfree(ctx);
721}
722
723static void
724at86rf230_rx_trac_check(void *context)
725{
726 struct at86rf230_state_change *ctx = context;
727 struct at86rf230_local *lp = ctx->lp;
728 u8 *buf = ctx->buf;
729 int rc;
730
731 if (IS_ENABLED(CONFIG_IEEE802154_AT86RF230_DEBUGFS)) {
732 u8 trac = TRAC_MASK(buf[1]);
733
734 switch (trac) {
735 case TRAC_SUCCESS:
736 lp->trac.success++;
737 break;
738 case TRAC_SUCCESS_WAIT_FOR_ACK:
739 lp->trac.success_wait_for_ack++;
740 break;
741 case TRAC_INVALID:
742 lp->trac.invalid++;
743 break;
744 default:
745 WARN_ONCE(1, "received rx trac status %d\n", trac);
746 break;
747 }
748 }
749
750 buf[0] = CMD_FB;
751 ctx->trx.len = AT86RF2XX_MAX_BUF;
752 ctx->msg.complete = at86rf230_rx_read_frame_complete;
753 rc = spi_async(lp->spi, &ctx->msg);
754 if (rc) {
755 ctx->trx.len = 2;
756 at86rf230_async_error(lp, ctx, rc);
757 }
758}
759
760static void
761at86rf230_irq_trx_end(void *context)
762{
763 struct at86rf230_state_change *ctx = context;
764 struct at86rf230_local *lp = ctx->lp;
765
766 if (lp->is_tx) {
767 lp->is_tx = 0;
768 at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
769 at86rf230_tx_trac_check);
770 } else {
771 at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
772 at86rf230_rx_trac_check);
773 }
774}
775
776static void
777at86rf230_irq_status(void *context)
778{
779 struct at86rf230_state_change *ctx = context;
780 struct at86rf230_local *lp = ctx->lp;
781 const u8 *buf = ctx->buf;
782 u8 irq = buf[1];
783
784 enable_irq(lp->spi->irq);
785
786 if (irq & IRQ_TRX_END) {
787 at86rf230_irq_trx_end(ctx);
788 } else {
789 dev_err(&lp->spi->dev, "not supported irq %02x received\n",
790 irq);
791 kfree(ctx);
792 }
793}
794
795static void
796at86rf230_setup_spi_messages(struct at86rf230_local *lp,
797 struct at86rf230_state_change *state)
798{
799 state->lp = lp;
800 state->irq = lp->spi->irq;
801 spi_message_init(&state->msg);
802 state->msg.context = state;
803 state->trx.len = 2;
804 state->trx.tx_buf = state->buf;
805 state->trx.rx_buf = state->buf;
806 spi_message_add_tail(&state->trx, &state->msg);
807 hrtimer_init(&state->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
808 state->timer.function = at86rf230_async_state_timer;
809}
810
811static irqreturn_t at86rf230_isr(int irq, void *data)
812{
813 struct at86rf230_local *lp = data;
814 struct at86rf230_state_change *ctx;
815 int rc;
816
817 disable_irq_nosync(irq);
818
819 ctx = kzalloc(sizeof(*ctx), GFP_ATOMIC);
820 if (!ctx) {
821 enable_irq(irq);
822 return IRQ_NONE;
823 }
824
825 at86rf230_setup_spi_messages(lp, ctx);
826 /* tell on error handling to free ctx */
827 ctx->free = true;
828
829 ctx->buf[0] = (RG_IRQ_STATUS & CMD_REG_MASK) | CMD_REG;
830 ctx->msg.complete = at86rf230_irq_status;
831 rc = spi_async(lp->spi, &ctx->msg);
832 if (rc) {
833 at86rf230_async_error(lp, ctx, rc);
834 enable_irq(irq);
835 return IRQ_NONE;
836 }
837
838 return IRQ_HANDLED;
839}
840
841static void
842at86rf230_write_frame_complete(void *context)
843{
844 struct at86rf230_state_change *ctx = context;
845 struct at86rf230_local *lp = ctx->lp;
846
847 ctx->trx.len = 2;
848
849 if (gpio_is_valid(lp->slp_tr))
850 at86rf230_slp_tr_rising_edge(lp);
851 else
852 at86rf230_async_write_reg(lp, RG_TRX_STATE, STATE_BUSY_TX, ctx,
853 NULL);
854}
855
856static void
857at86rf230_write_frame(void *context)
858{
859 struct at86rf230_state_change *ctx = context;
860 struct at86rf230_local *lp = ctx->lp;
861 struct sk_buff *skb = lp->tx_skb;
862 u8 *buf = ctx->buf;
863 int rc;
864
865 lp->is_tx = 1;
866
867 buf[0] = CMD_FB | CMD_WRITE;
868 buf[1] = skb->len + 2;
869 memcpy(buf + 2, skb->data, skb->len);
870 ctx->trx.len = skb->len + 2;
871 ctx->msg.complete = at86rf230_write_frame_complete;
872 rc = spi_async(lp->spi, &ctx->msg);
873 if (rc) {
874 ctx->trx.len = 2;
875 at86rf230_async_error(lp, ctx, rc);
876 }
877}
878
879static void
880at86rf230_xmit_tx_on(void *context)
881{
882 struct at86rf230_state_change *ctx = context;
883 struct at86rf230_local *lp = ctx->lp;
884
885 at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
886 at86rf230_write_frame);
887}
888
889static void
890at86rf230_xmit_start(void *context)
891{
892 struct at86rf230_state_change *ctx = context;
893 struct at86rf230_local *lp = ctx->lp;
894
895 /* check if we change from off state */
896 if (lp->is_tx_from_off)
897 at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
898 at86rf230_write_frame);
899 else
900 at86rf230_async_state_change(lp, ctx, STATE_TX_ON,
901 at86rf230_xmit_tx_on);
902}
903
904static int
905at86rf230_xmit(struct ieee802154_hw *hw, struct sk_buff *skb)
906{
907 struct at86rf230_local *lp = hw->priv;
908 struct at86rf230_state_change *ctx = &lp->tx;
909
910 lp->tx_skb = skb;
911 lp->tx_retry = 0;
912
913 /* After 5 minutes in PLL and the same frequency we run again the
914 * calibration loops which is recommended by at86rf2xx datasheets.
915 *
916 * The calibration is initiate by a state change from TRX_OFF
917 * to TX_ON, the lp->cal_timeout should be reinit by state_delay
918 * function then to start in the next 5 minutes.
919 */
920 if (time_is_before_jiffies(lp->cal_timeout)) {
921 lp->is_tx_from_off = true;
922 at86rf230_async_state_change(lp, ctx, STATE_TRX_OFF,
923 at86rf230_xmit_start);
924 } else {
925 lp->is_tx_from_off = false;
926 at86rf230_xmit_start(ctx);
927 }
928
929 return 0;
930}
931
932static int
933at86rf230_ed(struct ieee802154_hw *hw, u8 *level)
934{
935 WARN_ON(!level);
936 *level = 0xbe;
937 return 0;
938}
939
940static int
941at86rf230_start(struct ieee802154_hw *hw)
942{
943 struct at86rf230_local *lp = hw->priv;
944
945 /* reset trac stats on start */
946 if (IS_ENABLED(CONFIG_IEEE802154_AT86RF230_DEBUGFS))
947 memset(&lp->trac, 0, sizeof(struct at86rf230_trac));
948
949 at86rf230_awake(lp);
950 enable_irq(lp->spi->irq);
951
952 return at86rf230_sync_state_change(lp, STATE_RX_AACK_ON);
953}
954
955static void
956at86rf230_stop(struct ieee802154_hw *hw)
957{
958 struct at86rf230_local *lp = hw->priv;
959 u8 csma_seed[2];
960
961 at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
962
963 disable_irq(lp->spi->irq);
964
965 /* It's recommended to set random new csma_seeds before sleep state.
966 * Makes only sense in the stop callback, not doing this inside of
967 * at86rf230_sleep, this is also used when we don't transmit afterwards
968 * when calling start callback again.
969 */
970 get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
971 at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
972 at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
973
974 at86rf230_sleep(lp);
975}
976
977static int
978at86rf23x_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
979{
980 return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
981}
982
983#define AT86RF2XX_MAX_ED_LEVELS 0xF
984static const s32 at86rf233_ed_levels[AT86RF2XX_MAX_ED_LEVELS + 1] = {
985 -9400, -9200, -9000, -8800, -8600, -8400, -8200, -8000, -7800, -7600,
986 -7400, -7200, -7000, -6800, -6600, -6400,
987};
988
989static const s32 at86rf231_ed_levels[AT86RF2XX_MAX_ED_LEVELS + 1] = {
990 -9100, -8900, -8700, -8500, -8300, -8100, -7900, -7700, -7500, -7300,
991 -7100, -6900, -6700, -6500, -6300, -6100,
992};
993
994static const s32 at86rf212_ed_levels_100[AT86RF2XX_MAX_ED_LEVELS + 1] = {
995 -10000, -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200,
996 -8000, -7800, -7600, -7400, -7200, -7000,
997};
998
999static const s32 at86rf212_ed_levels_98[AT86RF2XX_MAX_ED_LEVELS + 1] = {
1000 -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200, -8000,
1001 -7800, -7600, -7400, -7200, -7000, -6800,
1002};
1003
1004static inline int
1005at86rf212_update_cca_ed_level(struct at86rf230_local *lp, int rssi_base_val)
1006{
1007 unsigned int cca_ed_thres;
1008 int rc;
1009
1010 rc = at86rf230_read_subreg(lp, SR_CCA_ED_THRES, &cca_ed_thres);
1011 if (rc < 0)
1012 return rc;
1013
1014 switch (rssi_base_val) {
1015 case -98:
1016 lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_98;
1017 lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_98);
1018 lp->hw->phy->cca_ed_level = at86rf212_ed_levels_98[cca_ed_thres];
1019 break;
1020 case -100:
1021 lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
1022 lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
1023 lp->hw->phy->cca_ed_level = at86rf212_ed_levels_100[cca_ed_thres];
1024 break;
1025 default:
1026 WARN_ON(1);
1027 }
1028
1029 return 0;
1030}
1031
1032static int
1033at86rf212_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
1034{
1035 int rc;
1036
1037 if (channel == 0)
1038 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
1039 else
1040 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
1041 if (rc < 0)
1042 return rc;
1043
1044 if (page == 0) {
1045 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
1046 lp->data->rssi_base_val = -100;
1047 } else {
1048 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
1049 lp->data->rssi_base_val = -98;
1050 }
1051 if (rc < 0)
1052 return rc;
1053
1054 rc = at86rf212_update_cca_ed_level(lp, lp->data->rssi_base_val);
1055 if (rc < 0)
1056 return rc;
1057
1058 /* This sets the symbol_duration according frequency on the 212.
1059 * TODO move this handling while set channel and page in cfg802154.
1060 * We can do that, this timings are according 802.15.4 standard.
1061 * If we do that in cfg802154, this is a more generic calculation.
1062 *
1063 * This should also protected from ifs_timer. Means cancel timer and
1064 * init with a new value. For now, this is okay.
1065 */
1066 if (channel == 0) {
1067 if (page == 0) {
1068 /* SUB:0 and BPSK:0 -> BPSK-20 */
1069 lp->hw->phy->symbol_duration = 50;
1070 } else {
1071 /* SUB:1 and BPSK:0 -> BPSK-40 */
1072 lp->hw->phy->symbol_duration = 25;
1073 }
1074 } else {
1075 if (page == 0)
1076 /* SUB:0 and BPSK:1 -> OQPSK-100/200/400 */
1077 lp->hw->phy->symbol_duration = 40;
1078 else
1079 /* SUB:1 and BPSK:1 -> OQPSK-250/500/1000 */
1080 lp->hw->phy->symbol_duration = 16;
1081 }
1082
1083 lp->hw->phy->lifs_period = IEEE802154_LIFS_PERIOD *
1084 lp->hw->phy->symbol_duration;
1085 lp->hw->phy->sifs_period = IEEE802154_SIFS_PERIOD *
1086 lp->hw->phy->symbol_duration;
1087
1088 return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
1089}
1090
1091static int
1092at86rf230_channel(struct ieee802154_hw *hw, u8 page, u8 channel)
1093{
1094 struct at86rf230_local *lp = hw->priv;
1095 int rc;
1096
1097 rc = lp->data->set_channel(lp, page, channel);
1098 /* Wait for PLL */
1099 usleep_range(lp->data->t_channel_switch,
1100 lp->data->t_channel_switch + 10);
1101
1102 lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
1103 return rc;
1104}
1105
1106static int
1107at86rf230_set_hw_addr_filt(struct ieee802154_hw *hw,
1108 struct ieee802154_hw_addr_filt *filt,
1109 unsigned long changed)
1110{
1111 struct at86rf230_local *lp = hw->priv;
1112
1113 if (changed & IEEE802154_AFILT_SADDR_CHANGED) {
1114 u16 addr = le16_to_cpu(filt->short_addr);
1115
1116 dev_vdbg(&lp->spi->dev, "%s called for saddr\n", __func__);
1117 __at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
1118 __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
1119 }
1120
1121 if (changed & IEEE802154_AFILT_PANID_CHANGED) {
1122 u16 pan = le16_to_cpu(filt->pan_id);
1123
1124 dev_vdbg(&lp->spi->dev, "%s called for pan id\n", __func__);
1125 __at86rf230_write(lp, RG_PAN_ID_0, pan);
1126 __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
1127 }
1128
1129 if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) {
1130 u8 i, addr[8];
1131
1132 memcpy(addr, &filt->ieee_addr, 8);
1133 dev_vdbg(&lp->spi->dev, "%s called for IEEE addr\n", __func__);
1134 for (i = 0; i < 8; i++)
1135 __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
1136 }
1137
1138 if (changed & IEEE802154_AFILT_PANC_CHANGED) {
1139 dev_vdbg(&lp->spi->dev, "%s called for panc change\n", __func__);
1140 if (filt->pan_coord)
1141 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
1142 else
1143 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
1144 }
1145
1146 return 0;
1147}
1148
1149#define AT86RF23X_MAX_TX_POWERS 0xF
1150static const s32 at86rf233_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
1151 400, 370, 340, 300, 250, 200, 100, 0, -100, -200, -300, -400, -600,
1152 -800, -1200, -1700,
1153};
1154
1155static const s32 at86rf231_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
1156 300, 280, 230, 180, 130, 70, 0, -100, -200, -300, -400, -500, -700,
1157 -900, -1200, -1700,
1158};
1159
1160#define AT86RF212_MAX_TX_POWERS 0x1F
1161static const s32 at86rf212_powers[AT86RF212_MAX_TX_POWERS + 1] = {
1162 500, 400, 300, 200, 100, 0, -100, -200, -300, -400, -500, -600, -700,
1163 -800, -900, -1000, -1100, -1200, -1300, -1400, -1500, -1600, -1700,
1164 -1800, -1900, -2000, -2100, -2200, -2300, -2400, -2500, -2600,
1165};
1166
1167static int
1168at86rf23x_set_txpower(struct at86rf230_local *lp, s32 mbm)
1169{
1170 u32 i;
1171
1172 for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
1173 if (lp->hw->phy->supported.tx_powers[i] == mbm)
1174 return at86rf230_write_subreg(lp, SR_TX_PWR_23X, i);
1175 }
1176
1177 return -EINVAL;
1178}
1179
1180static int
1181at86rf212_set_txpower(struct at86rf230_local *lp, s32 mbm)
1182{
1183 u32 i;
1184
1185 for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
1186 if (lp->hw->phy->supported.tx_powers[i] == mbm)
1187 return at86rf230_write_subreg(lp, SR_TX_PWR_212, i);
1188 }
1189
1190 return -EINVAL;
1191}
1192
1193static int
1194at86rf230_set_txpower(struct ieee802154_hw *hw, s32 mbm)
1195{
1196 struct at86rf230_local *lp = hw->priv;
1197
1198 return lp->data->set_txpower(lp, mbm);
1199}
1200
1201static int
1202at86rf230_set_lbt(struct ieee802154_hw *hw, bool on)
1203{
1204 struct at86rf230_local *lp = hw->priv;
1205
1206 return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
1207}
1208
1209static int
1210at86rf230_set_cca_mode(struct ieee802154_hw *hw,
1211 const struct wpan_phy_cca *cca)
1212{
1213 struct at86rf230_local *lp = hw->priv;
1214 u8 val;
1215
1216 /* mapping 802.15.4 to driver spec */
1217 switch (cca->mode) {
1218 case NL802154_CCA_ENERGY:
1219 val = 1;
1220 break;
1221 case NL802154_CCA_CARRIER:
1222 val = 2;
1223 break;
1224 case NL802154_CCA_ENERGY_CARRIER:
1225 switch (cca->opt) {
1226 case NL802154_CCA_OPT_ENERGY_CARRIER_AND:
1227 val = 3;
1228 break;
1229 case NL802154_CCA_OPT_ENERGY_CARRIER_OR:
1230 val = 0;
1231 break;
1232 default:
1233 return -EINVAL;
1234 }
1235 break;
1236 default:
1237 return -EINVAL;
1238 }
1239
1240 return at86rf230_write_subreg(lp, SR_CCA_MODE, val);
1241}
1242
1243static int
1244at86rf230_set_cca_ed_level(struct ieee802154_hw *hw, s32 mbm)
1245{
1246 struct at86rf230_local *lp = hw->priv;
1247 u32 i;
1248
1249 for (i = 0; i < hw->phy->supported.cca_ed_levels_size; i++) {
1250 if (hw->phy->supported.cca_ed_levels[i] == mbm)
1251 return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, i);
1252 }
1253
1254 return -EINVAL;
1255}
1256
1257static int
1258at86rf230_set_csma_params(struct ieee802154_hw *hw, u8 min_be, u8 max_be,
1259 u8 retries)
1260{
1261 struct at86rf230_local *lp = hw->priv;
1262 int rc;
1263
1264 rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
1265 if (rc)
1266 return rc;
1267
1268 rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
1269 if (rc)
1270 return rc;
1271
1272 return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
1273}
1274
1275static int
1276at86rf230_set_frame_retries(struct ieee802154_hw *hw, s8 retries)
1277{
1278 struct at86rf230_local *lp = hw->priv;
1279
1280 return at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
1281}
1282
1283static int
1284at86rf230_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on)
1285{
1286 struct at86rf230_local *lp = hw->priv;
1287 int rc;
1288
1289 if (on) {
1290 rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 1);
1291 if (rc < 0)
1292 return rc;
1293
1294 rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 1);
1295 if (rc < 0)
1296 return rc;
1297 } else {
1298 rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 0);
1299 if (rc < 0)
1300 return rc;
1301
1302 rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 0);
1303 if (rc < 0)
1304 return rc;
1305 }
1306
1307 return 0;
1308}
1309
1310static const struct ieee802154_ops at86rf230_ops = {
1311 .owner = THIS_MODULE,
1312 .xmit_async = at86rf230_xmit,
1313 .ed = at86rf230_ed,
1314 .set_channel = at86rf230_channel,
1315 .start = at86rf230_start,
1316 .stop = at86rf230_stop,
1317 .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
1318 .set_txpower = at86rf230_set_txpower,
1319 .set_lbt = at86rf230_set_lbt,
1320 .set_cca_mode = at86rf230_set_cca_mode,
1321 .set_cca_ed_level = at86rf230_set_cca_ed_level,
1322 .set_csma_params = at86rf230_set_csma_params,
1323 .set_frame_retries = at86rf230_set_frame_retries,
1324 .set_promiscuous_mode = at86rf230_set_promiscuous_mode,
1325};
1326
1327static struct at86rf2xx_chip_data at86rf233_data = {
1328 .t_sleep_cycle = 330,
1329 .t_channel_switch = 11,
1330 .t_reset_to_off = 26,
1331 .t_off_to_aack = 80,
1332 .t_off_to_tx_on = 80,
1333 .t_off_to_sleep = 35,
1334 .t_sleep_to_off = 1000,
1335 .t_frame = 4096,
1336 .t_p_ack = 545,
1337 .rssi_base_val = -94,
1338 .set_channel = at86rf23x_set_channel,
1339 .set_txpower = at86rf23x_set_txpower,
1340};
1341
1342static struct at86rf2xx_chip_data at86rf231_data = {
1343 .t_sleep_cycle = 330,
1344 .t_channel_switch = 24,
1345 .t_reset_to_off = 37,
1346 .t_off_to_aack = 110,
1347 .t_off_to_tx_on = 110,
1348 .t_off_to_sleep = 35,
1349 .t_sleep_to_off = 1000,
1350 .t_frame = 4096,
1351 .t_p_ack = 545,
1352 .rssi_base_val = -91,
1353 .set_channel = at86rf23x_set_channel,
1354 .set_txpower = at86rf23x_set_txpower,
1355};
1356
1357static struct at86rf2xx_chip_data at86rf212_data = {
1358 .t_sleep_cycle = 330,
1359 .t_channel_switch = 11,
1360 .t_reset_to_off = 26,
1361 .t_off_to_aack = 200,
1362 .t_off_to_tx_on = 200,
1363 .t_off_to_sleep = 35,
1364 .t_sleep_to_off = 1000,
1365 .t_frame = 4096,
1366 .t_p_ack = 545,
1367 .rssi_base_val = -100,
1368 .set_channel = at86rf212_set_channel,
1369 .set_txpower = at86rf212_set_txpower,
1370};
1371
1372static int at86rf230_hw_init(struct at86rf230_local *lp, u8 xtal_trim)
1373{
1374 int rc, irq_type, irq_pol = IRQ_ACTIVE_HIGH;
1375 unsigned int dvdd;
1376 u8 csma_seed[2];
1377
1378 rc = at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
1379 if (rc)
1380 return rc;
1381
1382 irq_type = irq_get_trigger_type(lp->spi->irq);
1383 if (irq_type == IRQ_TYPE_EDGE_FALLING ||
1384 irq_type == IRQ_TYPE_LEVEL_LOW)
1385 irq_pol = IRQ_ACTIVE_LOW;
1386
1387 rc = at86rf230_write_subreg(lp, SR_IRQ_POLARITY, irq_pol);
1388 if (rc)
1389 return rc;
1390
1391 rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
1392 if (rc)
1393 return rc;
1394
1395 rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
1396 if (rc)
1397 return rc;
1398
1399 /* reset values differs in at86rf231 and at86rf233 */
1400 rc = at86rf230_write_subreg(lp, SR_IRQ_MASK_MODE, 0);
1401 if (rc)
1402 return rc;
1403
1404 get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
1405 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
1406 if (rc)
1407 return rc;
1408 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
1409 if (rc)
1410 return rc;
1411
1412 /* CLKM changes are applied immediately */
1413 rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
1414 if (rc)
1415 return rc;
1416
1417 /* Turn CLKM Off */
1418 rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
1419 if (rc)
1420 return rc;
1421 /* Wait the next SLEEP cycle */
1422 usleep_range(lp->data->t_sleep_cycle,
1423 lp->data->t_sleep_cycle + 100);
1424
1425 /* xtal_trim value is calculated by:
1426 * CL = 0.5 * (CX + CTRIM + CPAR)
1427 *
1428 * whereas:
1429 * CL = capacitor of used crystal
1430 * CX = connected capacitors at xtal pins
1431 * CPAR = in all at86rf2xx datasheets this is a constant value 3 pF,
1432 * but this is different on each board setup. You need to fine
1433 * tuning this value via CTRIM.
1434 * CTRIM = variable capacitor setting. Resolution is 0.3 pF range is
1435 * 0 pF upto 4.5 pF.
1436 *
1437 * Examples:
1438 * atben transceiver:
1439 *
1440 * CL = 8 pF
1441 * CX = 12 pF
1442 * CPAR = 3 pF (We assume the magic constant from datasheet)
1443 * CTRIM = 0.9 pF
1444 *
1445 * (12+0.9+3)/2 = 7.95 which is nearly at 8 pF
1446 *
1447 * xtal_trim = 0x3
1448 *
1449 * openlabs transceiver:
1450 *
1451 * CL = 16 pF
1452 * CX = 22 pF
1453 * CPAR = 3 pF (We assume the magic constant from datasheet)
1454 * CTRIM = 4.5 pF
1455 *
1456 * (22+4.5+3)/2 = 14.75 which is the nearest value to 16 pF
1457 *
1458 * xtal_trim = 0xf
1459 */
1460 rc = at86rf230_write_subreg(lp, SR_XTAL_TRIM, xtal_trim);
1461 if (rc)
1462 return rc;
1463
1464 rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &dvdd);
1465 if (rc)
1466 return rc;
1467 if (!dvdd) {
1468 dev_err(&lp->spi->dev, "DVDD error\n");
1469 return -EINVAL;
1470 }
1471
1472 /* Force setting slotted operation bit to 0. Sometimes the atben
1473 * sets this bit and I don't know why. We set this always force
1474 * to zero while probing.
1475 */
1476 return at86rf230_write_subreg(lp, SR_SLOTTED_OPERATION, 0);
1477}
1478
1479static int
1480at86rf230_get_pdata(struct spi_device *spi, int *rstn, int *slp_tr,
1481 u8 *xtal_trim)
1482{
1483 struct at86rf230_platform_data *pdata = spi->dev.platform_data;
1484 int ret;
1485
1486 if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node) {
1487 if (!pdata)
1488 return -ENOENT;
1489
1490 *rstn = pdata->rstn;
1491 *slp_tr = pdata->slp_tr;
1492 *xtal_trim = pdata->xtal_trim;
1493 return 0;
1494 }
1495
1496 *rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
1497 *slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0);
1498 ret = of_property_read_u8(spi->dev.of_node, "xtal-trim", xtal_trim);
1499 if (ret < 0 && ret != -EINVAL)
1500 return ret;
1501
1502 return 0;
1503}
1504
1505static int
1506at86rf230_detect_device(struct at86rf230_local *lp)
1507{
1508 unsigned int part, version, val;
1509 u16 man_id = 0;
1510 const char *chip;
1511 int rc;
1512
1513 rc = __at86rf230_read(lp, RG_MAN_ID_0, &val);
1514 if (rc)
1515 return rc;
1516 man_id |= val;
1517
1518 rc = __at86rf230_read(lp, RG_MAN_ID_1, &val);
1519 if (rc)
1520 return rc;
1521 man_id |= (val << 8);
1522
1523 rc = __at86rf230_read(lp, RG_PART_NUM, &part);
1524 if (rc)
1525 return rc;
1526
1527 rc = __at86rf230_read(lp, RG_VERSION_NUM, &version);
1528 if (rc)
1529 return rc;
1530
1531 if (man_id != 0x001f) {
1532 dev_err(&lp->spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
1533 man_id >> 8, man_id & 0xFF);
1534 return -EINVAL;
1535 }
1536
1537 lp->hw->flags = IEEE802154_HW_TX_OMIT_CKSUM |
1538 IEEE802154_HW_CSMA_PARAMS |
1539 IEEE802154_HW_FRAME_RETRIES | IEEE802154_HW_AFILT |
1540 IEEE802154_HW_PROMISCUOUS;
1541
1542 lp->hw->phy->flags = WPAN_PHY_FLAG_TXPOWER |
1543 WPAN_PHY_FLAG_CCA_ED_LEVEL |
1544 WPAN_PHY_FLAG_CCA_MODE;
1545
1546 lp->hw->phy->supported.cca_modes = BIT(NL802154_CCA_ENERGY) |
1547 BIT(NL802154_CCA_CARRIER) | BIT(NL802154_CCA_ENERGY_CARRIER);
1548 lp->hw->phy->supported.cca_opts = BIT(NL802154_CCA_OPT_ENERGY_CARRIER_AND) |
1549 BIT(NL802154_CCA_OPT_ENERGY_CARRIER_OR);
1550
1551 lp->hw->phy->cca.mode = NL802154_CCA_ENERGY;
1552
1553 switch (part) {
1554 case 2:
1555 chip = "at86rf230";
1556 rc = -ENOTSUPP;
1557 goto not_supp;
1558 case 3:
1559 chip = "at86rf231";
1560 lp->data = &at86rf231_data;
1561 lp->hw->phy->supported.channels[0] = 0x7FFF800;
1562 lp->hw->phy->current_channel = 11;
1563 lp->hw->phy->symbol_duration = 16;
1564 lp->hw->phy->supported.tx_powers = at86rf231_powers;
1565 lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf231_powers);
1566 lp->hw->phy->supported.cca_ed_levels = at86rf231_ed_levels;
1567 lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf231_ed_levels);
1568 break;
1569 case 7:
1570 chip = "at86rf212";
1571 lp->data = &at86rf212_data;
1572 lp->hw->flags |= IEEE802154_HW_LBT;
1573 lp->hw->phy->supported.channels[0] = 0x00007FF;
1574 lp->hw->phy->supported.channels[2] = 0x00007FF;
1575 lp->hw->phy->current_channel = 5;
1576 lp->hw->phy->symbol_duration = 25;
1577 lp->hw->phy->supported.lbt = NL802154_SUPPORTED_BOOL_BOTH;
1578 lp->hw->phy->supported.tx_powers = at86rf212_powers;
1579 lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf212_powers);
1580 lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
1581 lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
1582 break;
1583 case 11:
1584 chip = "at86rf233";
1585 lp->data = &at86rf233_data;
1586 lp->hw->phy->supported.channels[0] = 0x7FFF800;
1587 lp->hw->phy->current_channel = 13;
1588 lp->hw->phy->symbol_duration = 16;
1589 lp->hw->phy->supported.tx_powers = at86rf233_powers;
1590 lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf233_powers);
1591 lp->hw->phy->supported.cca_ed_levels = at86rf233_ed_levels;
1592 lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf233_ed_levels);
1593 break;
1594 default:
1595 chip = "unknown";
1596 rc = -ENOTSUPP;
1597 goto not_supp;
1598 }
1599
1600 lp->hw->phy->cca_ed_level = lp->hw->phy->supported.cca_ed_levels[7];
1601 lp->hw->phy->transmit_power = lp->hw->phy->supported.tx_powers[0];
1602
1603not_supp:
1604 dev_info(&lp->spi->dev, "Detected %s chip version %d\n", chip, version);
1605
1606 return rc;
1607}
1608
1609#ifdef CONFIG_IEEE802154_AT86RF230_DEBUGFS
1610static struct dentry *at86rf230_debugfs_root;
1611
1612static int at86rf230_stats_show(struct seq_file *file, void *offset)
1613{
1614 struct at86rf230_local *lp = file->private;
1615
1616 seq_printf(file, "SUCCESS:\t\t%8llu\n", lp->trac.success);
1617 seq_printf(file, "SUCCESS_DATA_PENDING:\t%8llu\n",
1618 lp->trac.success_data_pending);
1619 seq_printf(file, "SUCCESS_WAIT_FOR_ACK:\t%8llu\n",
1620 lp->trac.success_wait_for_ack);
1621 seq_printf(file, "CHANNEL_ACCESS_FAILURE:\t%8llu\n",
1622 lp->trac.channel_access_failure);
1623 seq_printf(file, "NO_ACK:\t\t\t%8llu\n", lp->trac.no_ack);
1624 seq_printf(file, "INVALID:\t\t%8llu\n", lp->trac.invalid);
1625 return 0;
1626}
1627DEFINE_SHOW_ATTRIBUTE(at86rf230_stats);
1628
1629static void at86rf230_debugfs_init(struct at86rf230_local *lp)
1630{
1631 char debugfs_dir_name[DNAME_INLINE_LEN + 1] = "at86rf230-";
1632
1633 strncat(debugfs_dir_name, dev_name(&lp->spi->dev), DNAME_INLINE_LEN);
1634
1635 at86rf230_debugfs_root = debugfs_create_dir(debugfs_dir_name, NULL);
1636
1637 debugfs_create_file("trac_stats", 0444, at86rf230_debugfs_root, lp,
1638 &at86rf230_stats_fops);
1639}
1640
1641static void at86rf230_debugfs_remove(void)
1642{
1643 debugfs_remove_recursive(at86rf230_debugfs_root);
1644}
1645#else
1646static void at86rf230_debugfs_init(struct at86rf230_local *lp) { }
1647static void at86rf230_debugfs_remove(void) { }
1648#endif
1649
1650static int at86rf230_probe(struct spi_device *spi)
1651{
1652 struct ieee802154_hw *hw;
1653 struct at86rf230_local *lp;
1654 unsigned int status;
1655 int rc, irq_type, rstn, slp_tr;
1656 u8 xtal_trim = 0;
1657
1658 if (!spi->irq) {
1659 dev_err(&spi->dev, "no IRQ specified\n");
1660 return -EINVAL;
1661 }
1662
1663 rc = at86rf230_get_pdata(spi, &rstn, &slp_tr, &xtal_trim);
1664 if (rc < 0) {
1665 dev_err(&spi->dev, "failed to parse platform_data: %d\n", rc);
1666 return rc;
1667 }
1668
1669 if (gpio_is_valid(rstn)) {
1670 rc = devm_gpio_request_one(&spi->dev, rstn,
1671 GPIOF_OUT_INIT_HIGH, "rstn");
1672 if (rc)
1673 return rc;
1674 }
1675
1676 if (gpio_is_valid(slp_tr)) {
1677 rc = devm_gpio_request_one(&spi->dev, slp_tr,
1678 GPIOF_OUT_INIT_LOW, "slp_tr");
1679 if (rc)
1680 return rc;
1681 }
1682
1683 /* Reset */
1684 if (gpio_is_valid(rstn)) {
1685 udelay(1);
1686 gpio_set_value_cansleep(rstn, 0);
1687 udelay(1);
1688 gpio_set_value_cansleep(rstn, 1);
1689 usleep_range(120, 240);
1690 }
1691
1692 hw = ieee802154_alloc_hw(sizeof(*lp), &at86rf230_ops);
1693 if (!hw)
1694 return -ENOMEM;
1695
1696 lp = hw->priv;
1697 lp->hw = hw;
1698 lp->spi = spi;
1699 lp->slp_tr = slp_tr;
1700 hw->parent = &spi->dev;
1701 ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
1702
1703 lp->regmap = devm_regmap_init_spi(spi, &at86rf230_regmap_spi_config);
1704 if (IS_ERR(lp->regmap)) {
1705 rc = PTR_ERR(lp->regmap);
1706 dev_err(&spi->dev, "Failed to allocate register map: %d\n",
1707 rc);
1708 goto free_dev;
1709 }
1710
1711 at86rf230_setup_spi_messages(lp, &lp->state);
1712 at86rf230_setup_spi_messages(lp, &lp->tx);
1713
1714 rc = at86rf230_detect_device(lp);
1715 if (rc < 0)
1716 goto free_dev;
1717
1718 init_completion(&lp->state_complete);
1719
1720 spi_set_drvdata(spi, lp);
1721
1722 rc = at86rf230_hw_init(lp, xtal_trim);
1723 if (rc)
1724 goto free_dev;
1725
1726 /* Read irq status register to reset irq line */
1727 rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
1728 if (rc)
1729 goto free_dev;
1730
1731 irq_type = irq_get_trigger_type(spi->irq);
1732 if (!irq_type)
1733 irq_type = IRQF_TRIGGER_HIGH;
1734
1735 rc = devm_request_irq(&spi->dev, spi->irq, at86rf230_isr,
1736 IRQF_SHARED | irq_type, dev_name(&spi->dev), lp);
1737 if (rc)
1738 goto free_dev;
1739
1740 /* disable_irq by default and wait for starting hardware */
1741 disable_irq(spi->irq);
1742
1743 /* going into sleep by default */
1744 at86rf230_sleep(lp);
1745
1746 at86rf230_debugfs_init(lp);
1747
1748 rc = ieee802154_register_hw(lp->hw);
1749 if (rc)
1750 goto free_debugfs;
1751
1752 return rc;
1753
1754free_debugfs:
1755 at86rf230_debugfs_remove();
1756free_dev:
1757 ieee802154_free_hw(lp->hw);
1758
1759 return rc;
1760}
1761
1762static int at86rf230_remove(struct spi_device *spi)
1763{
1764 struct at86rf230_local *lp = spi_get_drvdata(spi);
1765
1766 /* mask all at86rf230 irq's */
1767 at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
1768 ieee802154_unregister_hw(lp->hw);
1769 ieee802154_free_hw(lp->hw);
1770 at86rf230_debugfs_remove();
1771 dev_dbg(&spi->dev, "unregistered at86rf230\n");
1772
1773 return 0;
1774}
1775
1776static const struct of_device_id at86rf230_of_match[] = {
1777 { .compatible = "atmel,at86rf230", },
1778 { .compatible = "atmel,at86rf231", },
1779 { .compatible = "atmel,at86rf233", },
1780 { .compatible = "atmel,at86rf212", },
1781 { },
1782};
1783MODULE_DEVICE_TABLE(of, at86rf230_of_match);
1784
1785static const struct spi_device_id at86rf230_device_id[] = {
1786 { .name = "at86rf230", },
1787 { .name = "at86rf231", },
1788 { .name = "at86rf233", },
1789 { .name = "at86rf212", },
1790 { },
1791};
1792MODULE_DEVICE_TABLE(spi, at86rf230_device_id);
1793
1794static struct spi_driver at86rf230_driver = {
1795 .id_table = at86rf230_device_id,
1796 .driver = {
1797 .of_match_table = of_match_ptr(at86rf230_of_match),
1798 .name = "at86rf230",
1799 },
1800 .probe = at86rf230_probe,
1801 .remove = at86rf230_remove,
1802};
1803
1804module_spi_driver(at86rf230_driver);
1805
1806MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
1807MODULE_LICENSE("GPL v2");
1/*
2 * AT86RF230/RF231 driver
3 *
4 * Copyright (C) 2009-2012 Siemens AG
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Written by:
20 * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
21 * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
22 */
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/interrupt.h>
26#include <linux/gpio.h>
27#include <linux/delay.h>
28#include <linux/mutex.h>
29#include <linux/workqueue.h>
30#include <linux/spinlock.h>
31#include <linux/spi/spi.h>
32#include <linux/spi/at86rf230.h>
33#include <linux/skbuff.h>
34#include <linux/of_gpio.h>
35
36#include <net/mac802154.h>
37#include <net/wpan-phy.h>
38
39struct at86rf230_local {
40 struct spi_device *spi;
41
42 u8 part;
43 u8 vers;
44
45 u8 buf[2];
46 struct mutex bmux;
47
48 struct work_struct irqwork;
49 struct completion tx_complete;
50
51 struct ieee802154_dev *dev;
52
53 spinlock_t lock;
54 bool irq_busy;
55 bool is_tx;
56 bool tx_aret;
57
58 int rssi_base_val;
59};
60
61static bool is_rf212(struct at86rf230_local *local)
62{
63 return local->part == 7;
64}
65
66#define RG_TRX_STATUS (0x01)
67#define SR_TRX_STATUS 0x01, 0x1f, 0
68#define SR_RESERVED_01_3 0x01, 0x20, 5
69#define SR_CCA_STATUS 0x01, 0x40, 6
70#define SR_CCA_DONE 0x01, 0x80, 7
71#define RG_TRX_STATE (0x02)
72#define SR_TRX_CMD 0x02, 0x1f, 0
73#define SR_TRAC_STATUS 0x02, 0xe0, 5
74#define RG_TRX_CTRL_0 (0x03)
75#define SR_CLKM_CTRL 0x03, 0x07, 0
76#define SR_CLKM_SHA_SEL 0x03, 0x08, 3
77#define SR_PAD_IO_CLKM 0x03, 0x30, 4
78#define SR_PAD_IO 0x03, 0xc0, 6
79#define RG_TRX_CTRL_1 (0x04)
80#define SR_IRQ_POLARITY 0x04, 0x01, 0
81#define SR_IRQ_MASK_MODE 0x04, 0x02, 1
82#define SR_SPI_CMD_MODE 0x04, 0x0c, 2
83#define SR_RX_BL_CTRL 0x04, 0x10, 4
84#define SR_TX_AUTO_CRC_ON 0x04, 0x20, 5
85#define SR_IRQ_2_EXT_EN 0x04, 0x40, 6
86#define SR_PA_EXT_EN 0x04, 0x80, 7
87#define RG_PHY_TX_PWR (0x05)
88#define SR_TX_PWR 0x05, 0x0f, 0
89#define SR_PA_LT 0x05, 0x30, 4
90#define SR_PA_BUF_LT 0x05, 0xc0, 6
91#define RG_PHY_RSSI (0x06)
92#define SR_RSSI 0x06, 0x1f, 0
93#define SR_RND_VALUE 0x06, 0x60, 5
94#define SR_RX_CRC_VALID 0x06, 0x80, 7
95#define RG_PHY_ED_LEVEL (0x07)
96#define SR_ED_LEVEL 0x07, 0xff, 0
97#define RG_PHY_CC_CCA (0x08)
98#define SR_CHANNEL 0x08, 0x1f, 0
99#define SR_CCA_MODE 0x08, 0x60, 5
100#define SR_CCA_REQUEST 0x08, 0x80, 7
101#define RG_CCA_THRES (0x09)
102#define SR_CCA_ED_THRES 0x09, 0x0f, 0
103#define SR_RESERVED_09_1 0x09, 0xf0, 4
104#define RG_RX_CTRL (0x0a)
105#define SR_PDT_THRES 0x0a, 0x0f, 0
106#define SR_RESERVED_0a_1 0x0a, 0xf0, 4
107#define RG_SFD_VALUE (0x0b)
108#define SR_SFD_VALUE 0x0b, 0xff, 0
109#define RG_TRX_CTRL_2 (0x0c)
110#define SR_OQPSK_DATA_RATE 0x0c, 0x03, 0
111#define SR_SUB_MODE 0x0c, 0x04, 2
112#define SR_BPSK_QPSK 0x0c, 0x08, 3
113#define SR_OQPSK_SUB1_RC_EN 0x0c, 0x10, 4
114#define SR_RESERVED_0c_5 0x0c, 0x60, 5
115#define SR_RX_SAFE_MODE 0x0c, 0x80, 7
116#define RG_ANT_DIV (0x0d)
117#define SR_ANT_CTRL 0x0d, 0x03, 0
118#define SR_ANT_EXT_SW_EN 0x0d, 0x04, 2
119#define SR_ANT_DIV_EN 0x0d, 0x08, 3
120#define SR_RESERVED_0d_2 0x0d, 0x70, 4
121#define SR_ANT_SEL 0x0d, 0x80, 7
122#define RG_IRQ_MASK (0x0e)
123#define SR_IRQ_MASK 0x0e, 0xff, 0
124#define RG_IRQ_STATUS (0x0f)
125#define SR_IRQ_0_PLL_LOCK 0x0f, 0x01, 0
126#define SR_IRQ_1_PLL_UNLOCK 0x0f, 0x02, 1
127#define SR_IRQ_2_RX_START 0x0f, 0x04, 2
128#define SR_IRQ_3_TRX_END 0x0f, 0x08, 3
129#define SR_IRQ_4_CCA_ED_DONE 0x0f, 0x10, 4
130#define SR_IRQ_5_AMI 0x0f, 0x20, 5
131#define SR_IRQ_6_TRX_UR 0x0f, 0x40, 6
132#define SR_IRQ_7_BAT_LOW 0x0f, 0x80, 7
133#define RG_VREG_CTRL (0x10)
134#define SR_RESERVED_10_6 0x10, 0x03, 0
135#define SR_DVDD_OK 0x10, 0x04, 2
136#define SR_DVREG_EXT 0x10, 0x08, 3
137#define SR_RESERVED_10_3 0x10, 0x30, 4
138#define SR_AVDD_OK 0x10, 0x40, 6
139#define SR_AVREG_EXT 0x10, 0x80, 7
140#define RG_BATMON (0x11)
141#define SR_BATMON_VTH 0x11, 0x0f, 0
142#define SR_BATMON_HR 0x11, 0x10, 4
143#define SR_BATMON_OK 0x11, 0x20, 5
144#define SR_RESERVED_11_1 0x11, 0xc0, 6
145#define RG_XOSC_CTRL (0x12)
146#define SR_XTAL_TRIM 0x12, 0x0f, 0
147#define SR_XTAL_MODE 0x12, 0xf0, 4
148#define RG_RX_SYN (0x15)
149#define SR_RX_PDT_LEVEL 0x15, 0x0f, 0
150#define SR_RESERVED_15_2 0x15, 0x70, 4
151#define SR_RX_PDT_DIS 0x15, 0x80, 7
152#define RG_XAH_CTRL_1 (0x17)
153#define SR_RESERVED_17_8 0x17, 0x01, 0
154#define SR_AACK_PROM_MODE 0x17, 0x02, 1
155#define SR_AACK_ACK_TIME 0x17, 0x04, 2
156#define SR_RESERVED_17_5 0x17, 0x08, 3
157#define SR_AACK_UPLD_RES_FT 0x17, 0x10, 4
158#define SR_AACK_FLTR_RES_FT 0x17, 0x20, 5
159#define SR_CSMA_LBT_MODE 0x17, 0x40, 6
160#define SR_RESERVED_17_1 0x17, 0x80, 7
161#define RG_FTN_CTRL (0x18)
162#define SR_RESERVED_18_2 0x18, 0x7f, 0
163#define SR_FTN_START 0x18, 0x80, 7
164#define RG_PLL_CF (0x1a)
165#define SR_RESERVED_1a_2 0x1a, 0x7f, 0
166#define SR_PLL_CF_START 0x1a, 0x80, 7
167#define RG_PLL_DCU (0x1b)
168#define SR_RESERVED_1b_3 0x1b, 0x3f, 0
169#define SR_RESERVED_1b_2 0x1b, 0x40, 6
170#define SR_PLL_DCU_START 0x1b, 0x80, 7
171#define RG_PART_NUM (0x1c)
172#define SR_PART_NUM 0x1c, 0xff, 0
173#define RG_VERSION_NUM (0x1d)
174#define SR_VERSION_NUM 0x1d, 0xff, 0
175#define RG_MAN_ID_0 (0x1e)
176#define SR_MAN_ID_0 0x1e, 0xff, 0
177#define RG_MAN_ID_1 (0x1f)
178#define SR_MAN_ID_1 0x1f, 0xff, 0
179#define RG_SHORT_ADDR_0 (0x20)
180#define SR_SHORT_ADDR_0 0x20, 0xff, 0
181#define RG_SHORT_ADDR_1 (0x21)
182#define SR_SHORT_ADDR_1 0x21, 0xff, 0
183#define RG_PAN_ID_0 (0x22)
184#define SR_PAN_ID_0 0x22, 0xff, 0
185#define RG_PAN_ID_1 (0x23)
186#define SR_PAN_ID_1 0x23, 0xff, 0
187#define RG_IEEE_ADDR_0 (0x24)
188#define SR_IEEE_ADDR_0 0x24, 0xff, 0
189#define RG_IEEE_ADDR_1 (0x25)
190#define SR_IEEE_ADDR_1 0x25, 0xff, 0
191#define RG_IEEE_ADDR_2 (0x26)
192#define SR_IEEE_ADDR_2 0x26, 0xff, 0
193#define RG_IEEE_ADDR_3 (0x27)
194#define SR_IEEE_ADDR_3 0x27, 0xff, 0
195#define RG_IEEE_ADDR_4 (0x28)
196#define SR_IEEE_ADDR_4 0x28, 0xff, 0
197#define RG_IEEE_ADDR_5 (0x29)
198#define SR_IEEE_ADDR_5 0x29, 0xff, 0
199#define RG_IEEE_ADDR_6 (0x2a)
200#define SR_IEEE_ADDR_6 0x2a, 0xff, 0
201#define RG_IEEE_ADDR_7 (0x2b)
202#define SR_IEEE_ADDR_7 0x2b, 0xff, 0
203#define RG_XAH_CTRL_0 (0x2c)
204#define SR_SLOTTED_OPERATION 0x2c, 0x01, 0
205#define SR_MAX_CSMA_RETRIES 0x2c, 0x0e, 1
206#define SR_MAX_FRAME_RETRIES 0x2c, 0xf0, 4
207#define RG_CSMA_SEED_0 (0x2d)
208#define SR_CSMA_SEED_0 0x2d, 0xff, 0
209#define RG_CSMA_SEED_1 (0x2e)
210#define SR_CSMA_SEED_1 0x2e, 0x07, 0
211#define SR_AACK_I_AM_COORD 0x2e, 0x08, 3
212#define SR_AACK_DIS_ACK 0x2e, 0x10, 4
213#define SR_AACK_SET_PD 0x2e, 0x20, 5
214#define SR_AACK_FVN_MODE 0x2e, 0xc0, 6
215#define RG_CSMA_BE (0x2f)
216#define SR_MIN_BE 0x2f, 0x0f, 0
217#define SR_MAX_BE 0x2f, 0xf0, 4
218
219#define CMD_REG 0x80
220#define CMD_REG_MASK 0x3f
221#define CMD_WRITE 0x40
222#define CMD_FB 0x20
223
224#define IRQ_BAT_LOW (1 << 7)
225#define IRQ_TRX_UR (1 << 6)
226#define IRQ_AMI (1 << 5)
227#define IRQ_CCA_ED (1 << 4)
228#define IRQ_TRX_END (1 << 3)
229#define IRQ_RX_START (1 << 2)
230#define IRQ_PLL_UNL (1 << 1)
231#define IRQ_PLL_LOCK (1 << 0)
232
233#define IRQ_ACTIVE_HIGH 0
234#define IRQ_ACTIVE_LOW 1
235
236#define STATE_P_ON 0x00 /* BUSY */
237#define STATE_BUSY_RX 0x01
238#define STATE_BUSY_TX 0x02
239#define STATE_FORCE_TRX_OFF 0x03
240#define STATE_FORCE_TX_ON 0x04 /* IDLE */
241/* 0x05 */ /* INVALID_PARAMETER */
242#define STATE_RX_ON 0x06
243/* 0x07 */ /* SUCCESS */
244#define STATE_TRX_OFF 0x08
245#define STATE_TX_ON 0x09
246/* 0x0a - 0x0e */ /* 0x0a - UNSUPPORTED_ATTRIBUTE */
247#define STATE_SLEEP 0x0F
248#define STATE_PREP_DEEP_SLEEP 0x10
249#define STATE_BUSY_RX_AACK 0x11
250#define STATE_BUSY_TX_ARET 0x12
251#define STATE_RX_AACK_ON 0x16
252#define STATE_TX_ARET_ON 0x19
253#define STATE_RX_ON_NOCLK 0x1C
254#define STATE_RX_AACK_ON_NOCLK 0x1D
255#define STATE_BUSY_RX_AACK_NOCLK 0x1E
256#define STATE_TRANSITION_IN_PROGRESS 0x1F
257
258static int
259__at86rf230_detect_device(struct spi_device *spi, u16 *man_id, u8 *part,
260 u8 *version)
261{
262 u8 data[4];
263 u8 *buf = kmalloc(2, GFP_KERNEL);
264 int status;
265 struct spi_message msg;
266 struct spi_transfer xfer = {
267 .len = 2,
268 .tx_buf = buf,
269 .rx_buf = buf,
270 };
271 u8 reg;
272
273 if (!buf)
274 return -ENOMEM;
275
276 for (reg = RG_PART_NUM; reg <= RG_MAN_ID_1; reg++) {
277 buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
278 buf[1] = 0xff;
279 dev_vdbg(&spi->dev, "buf[0] = %02x\n", buf[0]);
280 spi_message_init(&msg);
281 spi_message_add_tail(&xfer, &msg);
282
283 status = spi_sync(spi, &msg);
284 dev_vdbg(&spi->dev, "status = %d\n", status);
285 if (msg.status)
286 status = msg.status;
287
288 dev_vdbg(&spi->dev, "status = %d\n", status);
289 dev_vdbg(&spi->dev, "buf[0] = %02x\n", buf[0]);
290 dev_vdbg(&spi->dev, "buf[1] = %02x\n", buf[1]);
291
292 if (status == 0)
293 data[reg - RG_PART_NUM] = buf[1];
294 else
295 break;
296 }
297
298 if (status == 0) {
299 *part = data[0];
300 *version = data[1];
301 *man_id = (data[3] << 8) | data[2];
302 }
303
304 kfree(buf);
305
306 return status;
307}
308
309static int
310__at86rf230_write(struct at86rf230_local *lp, u8 addr, u8 data)
311{
312 u8 *buf = lp->buf;
313 int status;
314 struct spi_message msg;
315 struct spi_transfer xfer = {
316 .len = 2,
317 .tx_buf = buf,
318 };
319
320 buf[0] = (addr & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
321 buf[1] = data;
322 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
323 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
324 spi_message_init(&msg);
325 spi_message_add_tail(&xfer, &msg);
326
327 status = spi_sync(lp->spi, &msg);
328 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
329 if (msg.status)
330 status = msg.status;
331
332 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
333 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
334 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
335
336 return status;
337}
338
339static int
340__at86rf230_read_subreg(struct at86rf230_local *lp,
341 u8 addr, u8 mask, int shift, u8 *data)
342{
343 u8 *buf = lp->buf;
344 int status;
345 struct spi_message msg;
346 struct spi_transfer xfer = {
347 .len = 2,
348 .tx_buf = buf,
349 .rx_buf = buf,
350 };
351
352 buf[0] = (addr & CMD_REG_MASK) | CMD_REG;
353 buf[1] = 0xff;
354 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
355 spi_message_init(&msg);
356 spi_message_add_tail(&xfer, &msg);
357
358 status = spi_sync(lp->spi, &msg);
359 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
360 if (msg.status)
361 status = msg.status;
362
363 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
364 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
365 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
366
367 if (status == 0)
368 *data = (buf[1] & mask) >> shift;
369
370 return status;
371}
372
373static int
374at86rf230_read_subreg(struct at86rf230_local *lp,
375 u8 addr, u8 mask, int shift, u8 *data)
376{
377 int status;
378
379 mutex_lock(&lp->bmux);
380 status = __at86rf230_read_subreg(lp, addr, mask, shift, data);
381 mutex_unlock(&lp->bmux);
382
383 return status;
384}
385
386static int
387at86rf230_write_subreg(struct at86rf230_local *lp,
388 u8 addr, u8 mask, int shift, u8 data)
389{
390 int status;
391 u8 val;
392
393 mutex_lock(&lp->bmux);
394 status = __at86rf230_read_subreg(lp, addr, 0xff, 0, &val);
395 if (status)
396 goto out;
397
398 val &= ~mask;
399 val |= (data << shift) & mask;
400
401 status = __at86rf230_write(lp, addr, val);
402out:
403 mutex_unlock(&lp->bmux);
404
405 return status;
406}
407
408static int
409at86rf230_write_fbuf(struct at86rf230_local *lp, u8 *data, u8 len)
410{
411 u8 *buf = lp->buf;
412 int status;
413 struct spi_message msg;
414 struct spi_transfer xfer_head = {
415 .len = 2,
416 .tx_buf = buf,
417
418 };
419 struct spi_transfer xfer_buf = {
420 .len = len,
421 .tx_buf = data,
422 };
423
424 mutex_lock(&lp->bmux);
425 buf[0] = CMD_WRITE | CMD_FB;
426 buf[1] = len + 2; /* 2 bytes for CRC that isn't written */
427
428 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
429 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
430
431 spi_message_init(&msg);
432 spi_message_add_tail(&xfer_head, &msg);
433 spi_message_add_tail(&xfer_buf, &msg);
434
435 status = spi_sync(lp->spi, &msg);
436 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
437 if (msg.status)
438 status = msg.status;
439
440 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
441 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
442 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
443
444 mutex_unlock(&lp->bmux);
445 return status;
446}
447
448static int
449at86rf230_read_fbuf(struct at86rf230_local *lp, u8 *data, u8 *len, u8 *lqi)
450{
451 u8 *buf = lp->buf;
452 int status;
453 struct spi_message msg;
454 struct spi_transfer xfer_head = {
455 .len = 2,
456 .tx_buf = buf,
457 .rx_buf = buf,
458 };
459 struct spi_transfer xfer_head1 = {
460 .len = 2,
461 .tx_buf = buf,
462 .rx_buf = buf,
463 };
464 struct spi_transfer xfer_buf = {
465 .len = 0,
466 .rx_buf = data,
467 };
468
469 mutex_lock(&lp->bmux);
470
471 buf[0] = CMD_FB;
472 buf[1] = 0x00;
473
474 spi_message_init(&msg);
475 spi_message_add_tail(&xfer_head, &msg);
476
477 status = spi_sync(lp->spi, &msg);
478 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
479
480 xfer_buf.len = *(buf + 1) + 1;
481 *len = buf[1];
482
483 buf[0] = CMD_FB;
484 buf[1] = 0x00;
485
486 spi_message_init(&msg);
487 spi_message_add_tail(&xfer_head1, &msg);
488 spi_message_add_tail(&xfer_buf, &msg);
489
490 status = spi_sync(lp->spi, &msg);
491
492 if (msg.status)
493 status = msg.status;
494
495 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
496 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
497 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
498
499 if (status) {
500 if (lqi && (*len > lp->buf[1]))
501 *lqi = data[lp->buf[1]];
502 }
503 mutex_unlock(&lp->bmux);
504
505 return status;
506}
507
508static int
509at86rf230_ed(struct ieee802154_dev *dev, u8 *level)
510{
511 might_sleep();
512 BUG_ON(!level);
513 *level = 0xbe;
514 return 0;
515}
516
517static int
518at86rf230_state(struct ieee802154_dev *dev, int state)
519{
520 struct at86rf230_local *lp = dev->priv;
521 int rc;
522 u8 val;
523 u8 desired_status;
524
525 might_sleep();
526
527 if (state == STATE_FORCE_TX_ON)
528 desired_status = STATE_TX_ON;
529 else if (state == STATE_FORCE_TRX_OFF)
530 desired_status = STATE_TRX_OFF;
531 else
532 desired_status = state;
533
534 do {
535 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &val);
536 if (rc)
537 goto err;
538 } while (val == STATE_TRANSITION_IN_PROGRESS);
539
540 if (val == desired_status)
541 return 0;
542
543 /* state is equal to phy states */
544 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, state);
545 if (rc)
546 goto err;
547
548 do {
549 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &val);
550 if (rc)
551 goto err;
552 } while (val == STATE_TRANSITION_IN_PROGRESS);
553
554
555 if (val == desired_status ||
556 (desired_status == STATE_RX_ON && val == STATE_BUSY_RX) ||
557 (desired_status == STATE_RX_AACK_ON && val == STATE_BUSY_RX_AACK))
558 return 0;
559
560 pr_err("unexpected state change: %d, asked for %d\n", val, state);
561 return -EBUSY;
562
563err:
564 pr_err("error: %d\n", rc);
565 return rc;
566}
567
568static int
569at86rf230_start(struct ieee802154_dev *dev)
570{
571 struct at86rf230_local *lp = dev->priv;
572 u8 rc;
573
574 rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
575 if (rc)
576 return rc;
577
578 rc = at86rf230_state(dev, STATE_TX_ON);
579 if (rc)
580 return rc;
581
582 return at86rf230_state(dev, STATE_RX_AACK_ON);
583}
584
585static void
586at86rf230_stop(struct ieee802154_dev *dev)
587{
588 at86rf230_state(dev, STATE_FORCE_TRX_OFF);
589}
590
591static int
592at86rf230_set_channel(struct at86rf230_local *lp, int page, int channel)
593{
594 lp->rssi_base_val = -91;
595
596 return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
597}
598
599static int
600at86rf212_set_channel(struct at86rf230_local *lp, int page, int channel)
601{
602 int rc;
603
604 if (channel == 0)
605 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
606 else
607 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
608 if (rc < 0)
609 return rc;
610
611 if (page == 0) {
612 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
613 lp->rssi_base_val = -100;
614 } else {
615 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
616 lp->rssi_base_val = -98;
617 }
618 if (rc < 0)
619 return rc;
620
621 return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
622}
623
624static int
625at86rf230_channel(struct ieee802154_dev *dev, int page, int channel)
626{
627 struct at86rf230_local *lp = dev->priv;
628 int rc;
629
630 might_sleep();
631
632 if (page < 0 || page > 31 ||
633 !(lp->dev->phy->channels_supported[page] & BIT(channel))) {
634 WARN_ON(1);
635 return -EINVAL;
636 }
637
638 if (is_rf212(lp))
639 rc = at86rf212_set_channel(lp, page, channel);
640 else
641 rc = at86rf230_set_channel(lp, page, channel);
642 if (rc < 0)
643 return rc;
644
645 msleep(1); /* Wait for PLL */
646 dev->phy->current_channel = channel;
647 dev->phy->current_page = page;
648
649 return 0;
650}
651
652static int
653at86rf230_xmit(struct ieee802154_dev *dev, struct sk_buff *skb)
654{
655 struct at86rf230_local *lp = dev->priv;
656 int rc;
657 unsigned long flags;
658
659 spin_lock_irqsave(&lp->lock, flags);
660 if (lp->irq_busy) {
661 spin_unlock_irqrestore(&lp->lock, flags);
662 return -EBUSY;
663 }
664 spin_unlock_irqrestore(&lp->lock, flags);
665
666 might_sleep();
667
668 rc = at86rf230_state(dev, STATE_FORCE_TX_ON);
669 if (rc)
670 goto err;
671
672 spin_lock_irqsave(&lp->lock, flags);
673 lp->is_tx = 1;
674 reinit_completion(&lp->tx_complete);
675 spin_unlock_irqrestore(&lp->lock, flags);
676
677 rc = at86rf230_write_fbuf(lp, skb->data, skb->len);
678 if (rc)
679 goto err_rx;
680
681 if (lp->tx_aret) {
682 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_TX_ARET_ON);
683 if (rc)
684 goto err_rx;
685 }
686
687 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_BUSY_TX);
688 if (rc)
689 goto err_rx;
690
691 rc = wait_for_completion_interruptible(&lp->tx_complete);
692 if (rc < 0)
693 goto err_rx;
694
695 rc = at86rf230_start(dev);
696
697 return rc;
698
699err_rx:
700 at86rf230_start(dev);
701err:
702 pr_err("error: %d\n", rc);
703
704 spin_lock_irqsave(&lp->lock, flags);
705 lp->is_tx = 0;
706 spin_unlock_irqrestore(&lp->lock, flags);
707
708 return rc;
709}
710
711static int at86rf230_rx(struct at86rf230_local *lp)
712{
713 u8 len = 128, lqi = 0;
714 struct sk_buff *skb;
715
716 skb = alloc_skb(len, GFP_KERNEL);
717
718 if (!skb)
719 return -ENOMEM;
720
721 if (at86rf230_read_fbuf(lp, skb_put(skb, len), &len, &lqi))
722 goto err;
723
724 if (len < 2)
725 goto err;
726
727 skb_trim(skb, len - 2); /* We do not put CRC into the frame */
728
729 ieee802154_rx_irqsafe(lp->dev, skb, lqi);
730
731 dev_dbg(&lp->spi->dev, "READ_FBUF: %d %x\n", len, lqi);
732
733 return 0;
734err:
735 pr_debug("received frame is too small\n");
736
737 kfree_skb(skb);
738 return -EINVAL;
739}
740
741static int
742at86rf230_set_hw_addr_filt(struct ieee802154_dev *dev,
743 struct ieee802154_hw_addr_filt *filt,
744 unsigned long changed)
745{
746 struct at86rf230_local *lp = dev->priv;
747
748 if (changed & IEEE802515_AFILT_SADDR_CHANGED) {
749 u16 addr = le16_to_cpu(filt->short_addr);
750
751 dev_vdbg(&lp->spi->dev,
752 "at86rf230_set_hw_addr_filt called for saddr\n");
753 __at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
754 __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
755 }
756
757 if (changed & IEEE802515_AFILT_PANID_CHANGED) {
758 u16 pan = le16_to_cpu(filt->pan_id);
759
760 dev_vdbg(&lp->spi->dev,
761 "at86rf230_set_hw_addr_filt called for pan id\n");
762 __at86rf230_write(lp, RG_PAN_ID_0, pan);
763 __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
764 }
765
766 if (changed & IEEE802515_AFILT_IEEEADDR_CHANGED) {
767 u8 i, addr[8];
768
769 memcpy(addr, &filt->ieee_addr, 8);
770 dev_vdbg(&lp->spi->dev,
771 "at86rf230_set_hw_addr_filt called for IEEE addr\n");
772 for (i = 0; i < 8; i++)
773 __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
774 }
775
776 if (changed & IEEE802515_AFILT_PANC_CHANGED) {
777 dev_vdbg(&lp->spi->dev,
778 "at86rf230_set_hw_addr_filt called for panc change\n");
779 if (filt->pan_coord)
780 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
781 else
782 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
783 }
784
785 return 0;
786}
787
788static int
789at86rf212_set_txpower(struct ieee802154_dev *dev, int db)
790{
791 struct at86rf230_local *lp = dev->priv;
792
793 /* typical maximum output is 5dBm with RG_PHY_TX_PWR 0x60, lower five
794 * bits decrease power in 1dB steps. 0x60 represents extra PA gain of
795 * 0dB.
796 * thus, supported values for db range from -26 to 5, for 31dB of
797 * reduction to 0dB of reduction.
798 */
799 if (db > 5 || db < -26)
800 return -EINVAL;
801
802 db = -(db - 5);
803
804 return __at86rf230_write(lp, RG_PHY_TX_PWR, 0x60 | db);
805}
806
807static int
808at86rf212_set_lbt(struct ieee802154_dev *dev, bool on)
809{
810 struct at86rf230_local *lp = dev->priv;
811
812 return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
813}
814
815static int
816at86rf212_set_cca_mode(struct ieee802154_dev *dev, u8 mode)
817{
818 struct at86rf230_local *lp = dev->priv;
819
820 return at86rf230_write_subreg(lp, SR_CCA_MODE, mode);
821}
822
823static int
824at86rf212_set_cca_ed_level(struct ieee802154_dev *dev, s32 level)
825{
826 struct at86rf230_local *lp = dev->priv;
827 int desens_steps;
828
829 if (level < lp->rssi_base_val || level > 30)
830 return -EINVAL;
831
832 desens_steps = (level - lp->rssi_base_val) * 100 / 207;
833
834 return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, desens_steps);
835}
836
837static int
838at86rf212_set_csma_params(struct ieee802154_dev *dev, u8 min_be, u8 max_be,
839 u8 retries)
840{
841 struct at86rf230_local *lp = dev->priv;
842 int rc;
843
844 if (min_be > max_be || max_be > 8 || retries > 5)
845 return -EINVAL;
846
847 rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
848 if (rc)
849 return rc;
850
851 rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
852 if (rc)
853 return rc;
854
855 return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
856}
857
858static int
859at86rf212_set_frame_retries(struct ieee802154_dev *dev, s8 retries)
860{
861 struct at86rf230_local *lp = dev->priv;
862 int rc = 0;
863
864 if (retries < -1 || retries > 15)
865 return -EINVAL;
866
867 lp->tx_aret = retries >= 0;
868
869 if (retries >= 0)
870 rc = at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
871
872 return rc;
873}
874
875static struct ieee802154_ops at86rf230_ops = {
876 .owner = THIS_MODULE,
877 .xmit = at86rf230_xmit,
878 .ed = at86rf230_ed,
879 .set_channel = at86rf230_channel,
880 .start = at86rf230_start,
881 .stop = at86rf230_stop,
882 .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
883};
884
885static struct ieee802154_ops at86rf212_ops = {
886 .owner = THIS_MODULE,
887 .xmit = at86rf230_xmit,
888 .ed = at86rf230_ed,
889 .set_channel = at86rf230_channel,
890 .start = at86rf230_start,
891 .stop = at86rf230_stop,
892 .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
893 .set_txpower = at86rf212_set_txpower,
894 .set_lbt = at86rf212_set_lbt,
895 .set_cca_mode = at86rf212_set_cca_mode,
896 .set_cca_ed_level = at86rf212_set_cca_ed_level,
897 .set_csma_params = at86rf212_set_csma_params,
898 .set_frame_retries = at86rf212_set_frame_retries,
899};
900
901static void at86rf230_irqwork(struct work_struct *work)
902{
903 struct at86rf230_local *lp =
904 container_of(work, struct at86rf230_local, irqwork);
905 u8 status = 0, val;
906 int rc;
907 unsigned long flags;
908
909 rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &val);
910 status |= val;
911
912 status &= ~IRQ_PLL_LOCK; /* ignore */
913 status &= ~IRQ_RX_START; /* ignore */
914 status &= ~IRQ_AMI; /* ignore */
915 status &= ~IRQ_TRX_UR; /* FIXME: possibly handle ???*/
916
917 if (status & IRQ_TRX_END) {
918 status &= ~IRQ_TRX_END;
919 spin_lock_irqsave(&lp->lock, flags);
920 if (lp->is_tx) {
921 lp->is_tx = 0;
922 spin_unlock_irqrestore(&lp->lock, flags);
923 complete(&lp->tx_complete);
924 } else {
925 spin_unlock_irqrestore(&lp->lock, flags);
926 at86rf230_rx(lp);
927 }
928 }
929
930 spin_lock_irqsave(&lp->lock, flags);
931 lp->irq_busy = 0;
932 spin_unlock_irqrestore(&lp->lock, flags);
933}
934
935static void at86rf230_irqwork_level(struct work_struct *work)
936{
937 struct at86rf230_local *lp =
938 container_of(work, struct at86rf230_local, irqwork);
939
940 at86rf230_irqwork(work);
941
942 enable_irq(lp->spi->irq);
943}
944
945static irqreturn_t at86rf230_isr(int irq, void *data)
946{
947 struct at86rf230_local *lp = data;
948 unsigned long flags;
949
950 spin_lock_irqsave(&lp->lock, flags);
951 lp->irq_busy = 1;
952 spin_unlock_irqrestore(&lp->lock, flags);
953
954 schedule_work(&lp->irqwork);
955
956 return IRQ_HANDLED;
957}
958
959static irqreturn_t at86rf230_isr_level(int irq, void *data)
960{
961 disable_irq_nosync(irq);
962
963 return at86rf230_isr(irq, data);
964}
965
966static int at86rf230_irq_polarity(struct at86rf230_local *lp, int pol)
967{
968 return at86rf230_write_subreg(lp, SR_IRQ_POLARITY, pol);
969}
970
971static int at86rf230_hw_init(struct at86rf230_local *lp)
972{
973 struct at86rf230_platform_data *pdata = lp->spi->dev.platform_data;
974 int rc, irq_pol;
975 u8 status;
976 u8 csma_seed[2];
977
978 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &status);
979 if (rc)
980 return rc;
981
982 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_FORCE_TRX_OFF);
983 if (rc)
984 return rc;
985
986 /* configure irq polarity, defaults to high active */
987 if (pdata->irq_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW))
988 irq_pol = IRQ_ACTIVE_LOW;
989 else
990 irq_pol = IRQ_ACTIVE_HIGH;
991
992 rc = at86rf230_irq_polarity(lp, irq_pol);
993 if (rc)
994 return rc;
995
996 rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
997 if (rc)
998 return rc;
999
1000 get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
1001 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
1002 if (rc)
1003 return rc;
1004 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
1005 if (rc)
1006 return rc;
1007
1008 /* CLKM changes are applied immediately */
1009 rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
1010 if (rc)
1011 return rc;
1012
1013 /* Turn CLKM Off */
1014 rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
1015 if (rc)
1016 return rc;
1017 /* Wait the next SLEEP cycle */
1018 msleep(100);
1019
1020 rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &status);
1021 if (rc)
1022 return rc;
1023 if (!status) {
1024 dev_err(&lp->spi->dev, "DVDD error\n");
1025 return -EINVAL;
1026 }
1027
1028 return 0;
1029}
1030
1031static struct at86rf230_platform_data *
1032at86rf230_get_pdata(struct spi_device *spi)
1033{
1034 struct at86rf230_platform_data *pdata;
1035 const char *irq_type;
1036
1037 if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node)
1038 return spi->dev.platform_data;
1039
1040 pdata = devm_kzalloc(&spi->dev, sizeof(*pdata), GFP_KERNEL);
1041 if (!pdata)
1042 goto done;
1043
1044 pdata->rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
1045 pdata->slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0);
1046
1047 pdata->irq_type = IRQF_TRIGGER_RISING;
1048 of_property_read_string(spi->dev.of_node, "irq-type", &irq_type);
1049 if (!strcmp(irq_type, "level-high"))
1050 pdata->irq_type = IRQF_TRIGGER_HIGH;
1051 else if (!strcmp(irq_type, "level-low"))
1052 pdata->irq_type = IRQF_TRIGGER_LOW;
1053 else if (!strcmp(irq_type, "edge-rising"))
1054 pdata->irq_type = IRQF_TRIGGER_RISING;
1055 else if (!strcmp(irq_type, "edge-falling"))
1056 pdata->irq_type = IRQF_TRIGGER_FALLING;
1057 else
1058 dev_warn(&spi->dev, "wrong irq-type specified using edge-rising\n");
1059
1060 spi->dev.platform_data = pdata;
1061done:
1062 return pdata;
1063}
1064
1065static int at86rf230_probe(struct spi_device *spi)
1066{
1067 struct at86rf230_platform_data *pdata;
1068 struct ieee802154_dev *dev;
1069 struct at86rf230_local *lp;
1070 u16 man_id = 0;
1071 u8 part = 0, version = 0, status;
1072 irq_handler_t irq_handler;
1073 work_func_t irq_worker;
1074 int rc;
1075 const char *chip;
1076 struct ieee802154_ops *ops = NULL;
1077
1078 if (!spi->irq) {
1079 dev_err(&spi->dev, "no IRQ specified\n");
1080 return -EINVAL;
1081 }
1082
1083 pdata = at86rf230_get_pdata(spi);
1084 if (!pdata) {
1085 dev_err(&spi->dev, "no platform_data\n");
1086 return -EINVAL;
1087 }
1088
1089 if (gpio_is_valid(pdata->rstn)) {
1090 rc = gpio_request(pdata->rstn, "rstn");
1091 if (rc)
1092 return rc;
1093 }
1094
1095 if (gpio_is_valid(pdata->slp_tr)) {
1096 rc = gpio_request(pdata->slp_tr, "slp_tr");
1097 if (rc)
1098 goto err_slp_tr;
1099 }
1100
1101 if (gpio_is_valid(pdata->rstn)) {
1102 rc = gpio_direction_output(pdata->rstn, 1);
1103 if (rc)
1104 goto err_gpio_dir;
1105 }
1106
1107 if (gpio_is_valid(pdata->slp_tr)) {
1108 rc = gpio_direction_output(pdata->slp_tr, 0);
1109 if (rc)
1110 goto err_gpio_dir;
1111 }
1112
1113 /* Reset */
1114 if (gpio_is_valid(pdata->rstn)) {
1115 udelay(1);
1116 gpio_set_value(pdata->rstn, 0);
1117 udelay(1);
1118 gpio_set_value(pdata->rstn, 1);
1119 usleep_range(120, 240);
1120 }
1121
1122 rc = __at86rf230_detect_device(spi, &man_id, &part, &version);
1123 if (rc < 0)
1124 goto err_gpio_dir;
1125
1126 if (man_id != 0x001f) {
1127 dev_err(&spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
1128 man_id >> 8, man_id & 0xFF);
1129 rc = -EINVAL;
1130 goto err_gpio_dir;
1131 }
1132
1133 switch (part) {
1134 case 2:
1135 chip = "at86rf230";
1136 /* FIXME: should be easy to support; */
1137 break;
1138 case 3:
1139 chip = "at86rf231";
1140 ops = &at86rf230_ops;
1141 break;
1142 case 7:
1143 chip = "at86rf212";
1144 if (version == 1)
1145 ops = &at86rf212_ops;
1146 break;
1147 case 11:
1148 chip = "at86rf233";
1149 ops = &at86rf230_ops;
1150 break;
1151 default:
1152 chip = "UNKNOWN";
1153 break;
1154 }
1155
1156 dev_info(&spi->dev, "Detected %s chip version %d\n", chip, version);
1157 if (!ops) {
1158 rc = -ENOTSUPP;
1159 goto err_gpio_dir;
1160 }
1161
1162 dev = ieee802154_alloc_device(sizeof(*lp), ops);
1163 if (!dev) {
1164 rc = -ENOMEM;
1165 goto err_gpio_dir;
1166 }
1167
1168 lp = dev->priv;
1169 lp->dev = dev;
1170 lp->part = part;
1171 lp->vers = version;
1172
1173 lp->spi = spi;
1174
1175 dev->parent = &spi->dev;
1176 dev->extra_tx_headroom = 0;
1177 dev->flags = IEEE802154_HW_OMIT_CKSUM | IEEE802154_HW_AACK;
1178
1179 if (pdata->irq_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
1180 irq_worker = at86rf230_irqwork;
1181 irq_handler = at86rf230_isr;
1182 } else {
1183 irq_worker = at86rf230_irqwork_level;
1184 irq_handler = at86rf230_isr_level;
1185 }
1186
1187 mutex_init(&lp->bmux);
1188 INIT_WORK(&lp->irqwork, irq_worker);
1189 spin_lock_init(&lp->lock);
1190 init_completion(&lp->tx_complete);
1191
1192 spi_set_drvdata(spi, lp);
1193
1194 if (is_rf212(lp)) {
1195 dev->phy->channels_supported[0] = 0x00007FF;
1196 dev->phy->channels_supported[2] = 0x00007FF;
1197 } else {
1198 dev->phy->channels_supported[0] = 0x7FFF800;
1199 }
1200
1201 rc = at86rf230_hw_init(lp);
1202 if (rc)
1203 goto err_hw_init;
1204
1205 rc = request_irq(spi->irq, irq_handler,
1206 IRQF_SHARED | pdata->irq_type,
1207 dev_name(&spi->dev), lp);
1208 if (rc)
1209 goto err_hw_init;
1210
1211 /* Read irq status register to reset irq line */
1212 rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
1213 if (rc)
1214 goto err_irq;
1215
1216 rc = ieee802154_register_device(lp->dev);
1217 if (rc)
1218 goto err_irq;
1219
1220 return rc;
1221
1222err_irq:
1223 free_irq(spi->irq, lp);
1224err_hw_init:
1225 flush_work(&lp->irqwork);
1226 spi_set_drvdata(spi, NULL);
1227 mutex_destroy(&lp->bmux);
1228 ieee802154_free_device(lp->dev);
1229
1230err_gpio_dir:
1231 if (gpio_is_valid(pdata->slp_tr))
1232 gpio_free(pdata->slp_tr);
1233err_slp_tr:
1234 if (gpio_is_valid(pdata->rstn))
1235 gpio_free(pdata->rstn);
1236 return rc;
1237}
1238
1239static int at86rf230_remove(struct spi_device *spi)
1240{
1241 struct at86rf230_local *lp = spi_get_drvdata(spi);
1242 struct at86rf230_platform_data *pdata = spi->dev.platform_data;
1243
1244 /* mask all at86rf230 irq's */
1245 at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
1246 ieee802154_unregister_device(lp->dev);
1247
1248 free_irq(spi->irq, lp);
1249 flush_work(&lp->irqwork);
1250
1251 if (gpio_is_valid(pdata->slp_tr))
1252 gpio_free(pdata->slp_tr);
1253 if (gpio_is_valid(pdata->rstn))
1254 gpio_free(pdata->rstn);
1255
1256 mutex_destroy(&lp->bmux);
1257 ieee802154_free_device(lp->dev);
1258
1259 dev_dbg(&spi->dev, "unregistered at86rf230\n");
1260 return 0;
1261}
1262
1263#if IS_ENABLED(CONFIG_OF)
1264static struct of_device_id at86rf230_of_match[] = {
1265 { .compatible = "atmel,at86rf230", },
1266 { .compatible = "atmel,at86rf231", },
1267 { .compatible = "atmel,at86rf233", },
1268 { .compatible = "atmel,at86rf212", },
1269 { },
1270};
1271#endif
1272
1273static struct spi_driver at86rf230_driver = {
1274 .driver = {
1275 .of_match_table = of_match_ptr(at86rf230_of_match),
1276 .name = "at86rf230",
1277 .owner = THIS_MODULE,
1278 },
1279 .probe = at86rf230_probe,
1280 .remove = at86rf230_remove,
1281};
1282
1283module_spi_driver(at86rf230_driver);
1284
1285MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
1286MODULE_LICENSE("GPL v2");