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1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2007,2008 Freescale semiconductor, Inc.
4 *
5 * Author: Li Yang <LeoLi@freescale.com>
6 * Jerry Huang <Chang-Ming.Huang@freescale.com>
7 *
8 * Initialization based on code from Shlomi Gridish.
9 */
10
11#include <linux/module.h>
12#include <linux/kernel.h>
13#include <linux/delay.h>
14#include <linux/slab.h>
15#include <linux/proc_fs.h>
16#include <linux/errno.h>
17#include <linux/interrupt.h>
18#include <linux/io.h>
19#include <linux/timer.h>
20#include <linux/usb.h>
21#include <linux/device.h>
22#include <linux/usb/ch9.h>
23#include <linux/usb/gadget.h>
24#include <linux/workqueue.h>
25#include <linux/time.h>
26#include <linux/fsl_devices.h>
27#include <linux/platform_device.h>
28#include <linux/uaccess.h>
29
30#include <asm/unaligned.h>
31
32#include "phy-fsl-usb.h"
33
34#ifdef VERBOSE
35#define VDBG(fmt, args...) pr_debug("[%s] " fmt, \
36 __func__, ## args)
37#else
38#define VDBG(stuff...) do {} while (0)
39#endif
40
41#define DRIVER_VERSION "Rev. 1.55"
42#define DRIVER_AUTHOR "Jerry Huang/Li Yang"
43#define DRIVER_DESC "Freescale USB OTG Transceiver Driver"
44#define DRIVER_INFO DRIVER_DESC " " DRIVER_VERSION
45
46static const char driver_name[] = "fsl-usb2-otg";
47
48const pm_message_t otg_suspend_state = {
49 .event = 1,
50};
51
52#define HA_DATA_PULSE
53
54static struct usb_dr_mmap *usb_dr_regs;
55static struct fsl_otg *fsl_otg_dev;
56static int srp_wait_done;
57
58/* FSM timers */
59struct fsl_otg_timer *a_wait_vrise_tmr, *a_wait_bcon_tmr, *a_aidl_bdis_tmr,
60 *b_ase0_brst_tmr, *b_se0_srp_tmr;
61
62/* Driver specific timers */
63struct fsl_otg_timer *b_data_pulse_tmr, *b_vbus_pulse_tmr, *b_srp_fail_tmr,
64 *b_srp_wait_tmr, *a_wait_enum_tmr;
65
66static struct list_head active_timers;
67
68static const struct fsl_otg_config fsl_otg_initdata = {
69 .otg_port = 1,
70};
71
72#ifdef CONFIG_PPC32
73static u32 _fsl_readl_be(const unsigned __iomem *p)
74{
75 return in_be32(p);
76}
77
78static u32 _fsl_readl_le(const unsigned __iomem *p)
79{
80 return in_le32(p);
81}
82
83static void _fsl_writel_be(u32 v, unsigned __iomem *p)
84{
85 out_be32(p, v);
86}
87
88static void _fsl_writel_le(u32 v, unsigned __iomem *p)
89{
90 out_le32(p, v);
91}
92
93static u32 (*_fsl_readl)(const unsigned __iomem *p);
94static void (*_fsl_writel)(u32 v, unsigned __iomem *p);
95
96#define fsl_readl(p) (*_fsl_readl)((p))
97#define fsl_writel(v, p) (*_fsl_writel)((v), (p))
98
99#else
100#define fsl_readl(addr) readl(addr)
101#define fsl_writel(val, addr) writel(val, addr)
102#endif /* CONFIG_PPC32 */
103
104int write_ulpi(u8 addr, u8 data)
105{
106 u32 temp;
107
108 temp = 0x60000000 | (addr << 16) | data;
109 fsl_writel(temp, &usb_dr_regs->ulpiview);
110 return 0;
111}
112
113/* -------------------------------------------------------------*/
114/* Operations that will be called from OTG Finite State Machine */
115
116/* Charge vbus for vbus pulsing in SRP */
117void fsl_otg_chrg_vbus(struct otg_fsm *fsm, int on)
118{
119 u32 tmp;
120
121 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
122
123 if (on)
124 /* stop discharging, start charging */
125 tmp = (tmp & ~OTGSC_CTRL_VBUS_DISCHARGE) |
126 OTGSC_CTRL_VBUS_CHARGE;
127 else
128 /* stop charging */
129 tmp &= ~OTGSC_CTRL_VBUS_CHARGE;
130
131 fsl_writel(tmp, &usb_dr_regs->otgsc);
132}
133
134/* Discharge vbus through a resistor to ground */
135void fsl_otg_dischrg_vbus(int on)
136{
137 u32 tmp;
138
139 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
140
141 if (on)
142 /* stop charging, start discharging */
143 tmp = (tmp & ~OTGSC_CTRL_VBUS_CHARGE) |
144 OTGSC_CTRL_VBUS_DISCHARGE;
145 else
146 /* stop discharging */
147 tmp &= ~OTGSC_CTRL_VBUS_DISCHARGE;
148
149 fsl_writel(tmp, &usb_dr_regs->otgsc);
150}
151
152/* A-device driver vbus, controlled through PP bit in PORTSC */
153void fsl_otg_drv_vbus(struct otg_fsm *fsm, int on)
154{
155 u32 tmp;
156
157 if (on) {
158 tmp = fsl_readl(&usb_dr_regs->portsc) & ~PORTSC_W1C_BITS;
159 fsl_writel(tmp | PORTSC_PORT_POWER, &usb_dr_regs->portsc);
160 } else {
161 tmp = fsl_readl(&usb_dr_regs->portsc) &
162 ~PORTSC_W1C_BITS & ~PORTSC_PORT_POWER;
163 fsl_writel(tmp, &usb_dr_regs->portsc);
164 }
165}
166
167/*
168 * Pull-up D+, signalling connect by periperal. Also used in
169 * data-line pulsing in SRP
170 */
171void fsl_otg_loc_conn(struct otg_fsm *fsm, int on)
172{
173 u32 tmp;
174
175 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
176
177 if (on)
178 tmp |= OTGSC_CTRL_DATA_PULSING;
179 else
180 tmp &= ~OTGSC_CTRL_DATA_PULSING;
181
182 fsl_writel(tmp, &usb_dr_regs->otgsc);
183}
184
185/*
186 * Generate SOF by host. This is controlled through suspend/resume the
187 * port. In host mode, controller will automatically send SOF.
188 * Suspend will block the data on the port.
189 */
190void fsl_otg_loc_sof(struct otg_fsm *fsm, int on)
191{
192 u32 tmp;
193
194 tmp = fsl_readl(&fsl_otg_dev->dr_mem_map->portsc) & ~PORTSC_W1C_BITS;
195 if (on)
196 tmp |= PORTSC_PORT_FORCE_RESUME;
197 else
198 tmp |= PORTSC_PORT_SUSPEND;
199
200 fsl_writel(tmp, &fsl_otg_dev->dr_mem_map->portsc);
201
202}
203
204/* Start SRP pulsing by data-line pulsing, followed with v-bus pulsing. */
205void fsl_otg_start_pulse(struct otg_fsm *fsm)
206{
207 u32 tmp;
208
209 srp_wait_done = 0;
210#ifdef HA_DATA_PULSE
211 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
212 tmp |= OTGSC_HA_DATA_PULSE;
213 fsl_writel(tmp, &usb_dr_regs->otgsc);
214#else
215 fsl_otg_loc_conn(1);
216#endif
217
218 fsl_otg_add_timer(fsm, b_data_pulse_tmr);
219}
220
221void b_data_pulse_end(unsigned long foo)
222{
223#ifdef HA_DATA_PULSE
224#else
225 fsl_otg_loc_conn(0);
226#endif
227
228 /* Do VBUS pulse after data pulse */
229 fsl_otg_pulse_vbus();
230}
231
232void fsl_otg_pulse_vbus(void)
233{
234 srp_wait_done = 0;
235 fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 1);
236 /* start the timer to end vbus charge */
237 fsl_otg_add_timer(&fsl_otg_dev->fsm, b_vbus_pulse_tmr);
238}
239
240void b_vbus_pulse_end(unsigned long foo)
241{
242 fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 0);
243
244 /*
245 * As USB3300 using the same a_sess_vld and b_sess_vld voltage
246 * we need to discharge the bus for a while to distinguish
247 * residual voltage of vbus pulsing and A device pull up
248 */
249 fsl_otg_dischrg_vbus(1);
250 fsl_otg_add_timer(&fsl_otg_dev->fsm, b_srp_wait_tmr);
251}
252
253void b_srp_end(unsigned long foo)
254{
255 fsl_otg_dischrg_vbus(0);
256 srp_wait_done = 1;
257
258 if ((fsl_otg_dev->phy.otg->state == OTG_STATE_B_SRP_INIT) &&
259 fsl_otg_dev->fsm.b_sess_vld)
260 fsl_otg_dev->fsm.b_srp_done = 1;
261}
262
263/*
264 * Workaround for a_host suspending too fast. When a_bus_req=0,
265 * a_host will start by SRP. It needs to set b_hnp_enable before
266 * actually suspending to start HNP
267 */
268void a_wait_enum(unsigned long foo)
269{
270 VDBG("a_wait_enum timeout\n");
271 if (!fsl_otg_dev->phy.otg->host->b_hnp_enable)
272 fsl_otg_add_timer(&fsl_otg_dev->fsm, a_wait_enum_tmr);
273 else
274 otg_statemachine(&fsl_otg_dev->fsm);
275}
276
277/* The timeout callback function to set time out bit */
278void set_tmout(unsigned long indicator)
279{
280 *(int *)indicator = 1;
281}
282
283/* Initialize timers */
284int fsl_otg_init_timers(struct otg_fsm *fsm)
285{
286 /* FSM used timers */
287 a_wait_vrise_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_VRISE,
288 (unsigned long)&fsm->a_wait_vrise_tmout);
289 if (!a_wait_vrise_tmr)
290 return -ENOMEM;
291
292 a_wait_bcon_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_BCON,
293 (unsigned long)&fsm->a_wait_bcon_tmout);
294 if (!a_wait_bcon_tmr)
295 return -ENOMEM;
296
297 a_aidl_bdis_tmr = otg_timer_initializer(&set_tmout, TA_AIDL_BDIS,
298 (unsigned long)&fsm->a_aidl_bdis_tmout);
299 if (!a_aidl_bdis_tmr)
300 return -ENOMEM;
301
302 b_ase0_brst_tmr = otg_timer_initializer(&set_tmout, TB_ASE0_BRST,
303 (unsigned long)&fsm->b_ase0_brst_tmout);
304 if (!b_ase0_brst_tmr)
305 return -ENOMEM;
306
307 b_se0_srp_tmr = otg_timer_initializer(&set_tmout, TB_SE0_SRP,
308 (unsigned long)&fsm->b_se0_srp);
309 if (!b_se0_srp_tmr)
310 return -ENOMEM;
311
312 b_srp_fail_tmr = otg_timer_initializer(&set_tmout, TB_SRP_FAIL,
313 (unsigned long)&fsm->b_srp_done);
314 if (!b_srp_fail_tmr)
315 return -ENOMEM;
316
317 a_wait_enum_tmr = otg_timer_initializer(&a_wait_enum, 10,
318 (unsigned long)&fsm);
319 if (!a_wait_enum_tmr)
320 return -ENOMEM;
321
322 /* device driver used timers */
323 b_srp_wait_tmr = otg_timer_initializer(&b_srp_end, TB_SRP_WAIT, 0);
324 if (!b_srp_wait_tmr)
325 return -ENOMEM;
326
327 b_data_pulse_tmr = otg_timer_initializer(&b_data_pulse_end,
328 TB_DATA_PLS, 0);
329 if (!b_data_pulse_tmr)
330 return -ENOMEM;
331
332 b_vbus_pulse_tmr = otg_timer_initializer(&b_vbus_pulse_end,
333 TB_VBUS_PLS, 0);
334 if (!b_vbus_pulse_tmr)
335 return -ENOMEM;
336
337 return 0;
338}
339
340/* Uninitialize timers */
341void fsl_otg_uninit_timers(void)
342{
343 /* FSM used timers */
344 kfree(a_wait_vrise_tmr);
345 kfree(a_wait_bcon_tmr);
346 kfree(a_aidl_bdis_tmr);
347 kfree(b_ase0_brst_tmr);
348 kfree(b_se0_srp_tmr);
349 kfree(b_srp_fail_tmr);
350 kfree(a_wait_enum_tmr);
351
352 /* device driver used timers */
353 kfree(b_srp_wait_tmr);
354 kfree(b_data_pulse_tmr);
355 kfree(b_vbus_pulse_tmr);
356}
357
358static struct fsl_otg_timer *fsl_otg_get_timer(enum otg_fsm_timer t)
359{
360 struct fsl_otg_timer *timer;
361
362 /* REVISIT: use array of pointers to timers instead */
363 switch (t) {
364 case A_WAIT_VRISE:
365 timer = a_wait_vrise_tmr;
366 break;
367 case A_WAIT_BCON:
368 timer = a_wait_vrise_tmr;
369 break;
370 case A_AIDL_BDIS:
371 timer = a_wait_vrise_tmr;
372 break;
373 case B_ASE0_BRST:
374 timer = a_wait_vrise_tmr;
375 break;
376 case B_SE0_SRP:
377 timer = a_wait_vrise_tmr;
378 break;
379 case B_SRP_FAIL:
380 timer = a_wait_vrise_tmr;
381 break;
382 case A_WAIT_ENUM:
383 timer = a_wait_vrise_tmr;
384 break;
385 default:
386 timer = NULL;
387 }
388
389 return timer;
390}
391
392/* Add timer to timer list */
393void fsl_otg_add_timer(struct otg_fsm *fsm, void *gtimer)
394{
395 struct fsl_otg_timer *timer = gtimer;
396 struct fsl_otg_timer *tmp_timer;
397
398 /*
399 * Check if the timer is already in the active list,
400 * if so update timer count
401 */
402 list_for_each_entry(tmp_timer, &active_timers, list)
403 if (tmp_timer == timer) {
404 timer->count = timer->expires;
405 return;
406 }
407 timer->count = timer->expires;
408 list_add_tail(&timer->list, &active_timers);
409}
410
411static void fsl_otg_fsm_add_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
412{
413 struct fsl_otg_timer *timer;
414
415 timer = fsl_otg_get_timer(t);
416 if (!timer)
417 return;
418
419 fsl_otg_add_timer(fsm, timer);
420}
421
422/* Remove timer from the timer list; clear timeout status */
423void fsl_otg_del_timer(struct otg_fsm *fsm, void *gtimer)
424{
425 struct fsl_otg_timer *timer = gtimer;
426 struct fsl_otg_timer *tmp_timer, *del_tmp;
427
428 list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list)
429 if (tmp_timer == timer)
430 list_del(&timer->list);
431}
432
433static void fsl_otg_fsm_del_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
434{
435 struct fsl_otg_timer *timer;
436
437 timer = fsl_otg_get_timer(t);
438 if (!timer)
439 return;
440
441 fsl_otg_del_timer(fsm, timer);
442}
443
444/* Reset controller, not reset the bus */
445void otg_reset_controller(void)
446{
447 u32 command;
448
449 command = fsl_readl(&usb_dr_regs->usbcmd);
450 command |= (1 << 1);
451 fsl_writel(command, &usb_dr_regs->usbcmd);
452 while (fsl_readl(&usb_dr_regs->usbcmd) & (1 << 1))
453 ;
454}
455
456/* Call suspend/resume routines in host driver */
457int fsl_otg_start_host(struct otg_fsm *fsm, int on)
458{
459 struct usb_otg *otg = fsm->otg;
460 struct device *dev;
461 struct fsl_otg *otg_dev =
462 container_of(otg->usb_phy, struct fsl_otg, phy);
463 u32 retval = 0;
464
465 if (!otg->host)
466 return -ENODEV;
467 dev = otg->host->controller;
468
469 /*
470 * Update a_vbus_vld state as a_vbus_vld int is disabled
471 * in device mode
472 */
473 fsm->a_vbus_vld =
474 !!(fsl_readl(&usb_dr_regs->otgsc) & OTGSC_STS_A_VBUS_VALID);
475 if (on) {
476 /* start fsl usb host controller */
477 if (otg_dev->host_working)
478 goto end;
479 else {
480 otg_reset_controller();
481 VDBG("host on......\n");
482 if (dev->driver->pm && dev->driver->pm->resume) {
483 retval = dev->driver->pm->resume(dev);
484 if (fsm->id) {
485 /* default-b */
486 fsl_otg_drv_vbus(fsm, 1);
487 /*
488 * Workaround: b_host can't driver
489 * vbus, but PP in PORTSC needs to
490 * be 1 for host to work.
491 * So we set drv_vbus bit in
492 * transceiver to 0 thru ULPI.
493 */
494 write_ulpi(0x0c, 0x20);
495 }
496 }
497
498 otg_dev->host_working = 1;
499 }
500 } else {
501 /* stop fsl usb host controller */
502 if (!otg_dev->host_working)
503 goto end;
504 else {
505 VDBG("host off......\n");
506 if (dev && dev->driver) {
507 if (dev->driver->pm && dev->driver->pm->suspend)
508 retval = dev->driver->pm->suspend(dev);
509 if (fsm->id)
510 /* default-b */
511 fsl_otg_drv_vbus(fsm, 0);
512 }
513 otg_dev->host_working = 0;
514 }
515 }
516end:
517 return retval;
518}
519
520/*
521 * Call suspend and resume function in udc driver
522 * to stop and start udc driver.
523 */
524int fsl_otg_start_gadget(struct otg_fsm *fsm, int on)
525{
526 struct usb_otg *otg = fsm->otg;
527 struct device *dev;
528
529 if (!otg->gadget || !otg->gadget->dev.parent)
530 return -ENODEV;
531
532 VDBG("gadget %s\n", on ? "on" : "off");
533 dev = otg->gadget->dev.parent;
534
535 if (on) {
536 if (dev->driver->resume)
537 dev->driver->resume(dev);
538 } else {
539 if (dev->driver->suspend)
540 dev->driver->suspend(dev, otg_suspend_state);
541 }
542
543 return 0;
544}
545
546/*
547 * Called by initialization code of host driver. Register host controller
548 * to the OTG. Suspend host for OTG role detection.
549 */
550static int fsl_otg_set_host(struct usb_otg *otg, struct usb_bus *host)
551{
552 struct fsl_otg *otg_dev;
553
554 if (!otg)
555 return -ENODEV;
556
557 otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
558 if (otg_dev != fsl_otg_dev)
559 return -ENODEV;
560
561 otg->host = host;
562
563 otg_dev->fsm.a_bus_drop = 0;
564 otg_dev->fsm.a_bus_req = 1;
565
566 if (host) {
567 VDBG("host off......\n");
568
569 otg->host->otg_port = fsl_otg_initdata.otg_port;
570 otg->host->is_b_host = otg_dev->fsm.id;
571 /*
572 * must leave time for hub_wq to finish its thing
573 * before yanking the host driver out from under it,
574 * so suspend the host after a short delay.
575 */
576 otg_dev->host_working = 1;
577 schedule_delayed_work(&otg_dev->otg_event, 100);
578 return 0;
579 } else {
580 /* host driver going away */
581 if (!(fsl_readl(&otg_dev->dr_mem_map->otgsc) &
582 OTGSC_STS_USB_ID)) {
583 /* Mini-A cable connected */
584 struct otg_fsm *fsm = &otg_dev->fsm;
585
586 otg->state = OTG_STATE_UNDEFINED;
587 fsm->protocol = PROTO_UNDEF;
588 }
589 }
590
591 otg_dev->host_working = 0;
592
593 otg_statemachine(&otg_dev->fsm);
594
595 return 0;
596}
597
598/* Called by initialization code of udc. Register udc to OTG. */
599static int fsl_otg_set_peripheral(struct usb_otg *otg,
600 struct usb_gadget *gadget)
601{
602 struct fsl_otg *otg_dev;
603
604 if (!otg)
605 return -ENODEV;
606
607 otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
608 VDBG("otg_dev 0x%x\n", (int)otg_dev);
609 VDBG("fsl_otg_dev 0x%x\n", (int)fsl_otg_dev);
610 if (otg_dev != fsl_otg_dev)
611 return -ENODEV;
612
613 if (!gadget) {
614 if (!otg->default_a)
615 otg->gadget->ops->vbus_draw(otg->gadget, 0);
616 usb_gadget_vbus_disconnect(otg->gadget);
617 otg->gadget = 0;
618 otg_dev->fsm.b_bus_req = 0;
619 otg_statemachine(&otg_dev->fsm);
620 return 0;
621 }
622
623 otg->gadget = gadget;
624 otg->gadget->is_a_peripheral = !otg_dev->fsm.id;
625
626 otg_dev->fsm.b_bus_req = 1;
627
628 /* start the gadget right away if the ID pin says Mini-B */
629 pr_debug("ID pin=%d\n", otg_dev->fsm.id);
630 if (otg_dev->fsm.id == 1) {
631 fsl_otg_start_host(&otg_dev->fsm, 0);
632 otg_drv_vbus(&otg_dev->fsm, 0);
633 fsl_otg_start_gadget(&otg_dev->fsm, 1);
634 }
635
636 return 0;
637}
638
639/*
640 * Delayed pin detect interrupt processing.
641 *
642 * When the Mini-A cable is disconnected from the board,
643 * the pin-detect interrupt happens before the disconnect
644 * interrupts for the connected device(s). In order to
645 * process the disconnect interrupt(s) prior to switching
646 * roles, the pin-detect interrupts are delayed, and handled
647 * by this routine.
648 */
649static void fsl_otg_event(struct work_struct *work)
650{
651 struct fsl_otg *og = container_of(work, struct fsl_otg, otg_event.work);
652 struct otg_fsm *fsm = &og->fsm;
653
654 if (fsm->id) { /* switch to gadget */
655 fsl_otg_start_host(fsm, 0);
656 otg_drv_vbus(fsm, 0);
657 fsl_otg_start_gadget(fsm, 1);
658 }
659}
660
661/* B-device start SRP */
662static int fsl_otg_start_srp(struct usb_otg *otg)
663{
664 struct fsl_otg *otg_dev;
665
666 if (!otg || otg->state != OTG_STATE_B_IDLE)
667 return -ENODEV;
668
669 otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
670 if (otg_dev != fsl_otg_dev)
671 return -ENODEV;
672
673 otg_dev->fsm.b_bus_req = 1;
674 otg_statemachine(&otg_dev->fsm);
675
676 return 0;
677}
678
679/* A_host suspend will call this function to start hnp */
680static int fsl_otg_start_hnp(struct usb_otg *otg)
681{
682 struct fsl_otg *otg_dev;
683
684 if (!otg)
685 return -ENODEV;
686
687 otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy);
688 if (otg_dev != fsl_otg_dev)
689 return -ENODEV;
690
691 pr_debug("start_hnp...\n");
692
693 /* clear a_bus_req to enter a_suspend state */
694 otg_dev->fsm.a_bus_req = 0;
695 otg_statemachine(&otg_dev->fsm);
696
697 return 0;
698}
699
700/*
701 * Interrupt handler. OTG/host/peripheral share the same int line.
702 * OTG driver clears OTGSC interrupts and leaves USB interrupts
703 * intact. It needs to have knowledge of some USB interrupts
704 * such as port change.
705 */
706irqreturn_t fsl_otg_isr(int irq, void *dev_id)
707{
708 struct otg_fsm *fsm = &((struct fsl_otg *)dev_id)->fsm;
709 struct usb_otg *otg = ((struct fsl_otg *)dev_id)->phy.otg;
710 u32 otg_int_src, otg_sc;
711
712 otg_sc = fsl_readl(&usb_dr_regs->otgsc);
713 otg_int_src = otg_sc & OTGSC_INTSTS_MASK & (otg_sc >> 8);
714
715 /* Only clear otg interrupts */
716 fsl_writel(otg_sc, &usb_dr_regs->otgsc);
717
718 /*FIXME: ID change not generate when init to 0 */
719 fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
720 otg->default_a = (fsm->id == 0);
721
722 /* process OTG interrupts */
723 if (otg_int_src) {
724 if (otg_int_src & OTGSC_INTSTS_USB_ID) {
725 fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
726 otg->default_a = (fsm->id == 0);
727 /* clear conn information */
728 if (fsm->id)
729 fsm->b_conn = 0;
730 else
731 fsm->a_conn = 0;
732
733 if (otg->host)
734 otg->host->is_b_host = fsm->id;
735 if (otg->gadget)
736 otg->gadget->is_a_peripheral = !fsm->id;
737 VDBG("ID int (ID is %d)\n", fsm->id);
738
739 if (fsm->id) { /* switch to gadget */
740 schedule_delayed_work(
741 &((struct fsl_otg *)dev_id)->otg_event,
742 100);
743 } else { /* switch to host */
744 cancel_delayed_work(&
745 ((struct fsl_otg *)dev_id)->
746 otg_event);
747 fsl_otg_start_gadget(fsm, 0);
748 otg_drv_vbus(fsm, 1);
749 fsl_otg_start_host(fsm, 1);
750 }
751 return IRQ_HANDLED;
752 }
753 }
754 return IRQ_NONE;
755}
756
757static struct otg_fsm_ops fsl_otg_ops = {
758 .chrg_vbus = fsl_otg_chrg_vbus,
759 .drv_vbus = fsl_otg_drv_vbus,
760 .loc_conn = fsl_otg_loc_conn,
761 .loc_sof = fsl_otg_loc_sof,
762 .start_pulse = fsl_otg_start_pulse,
763
764 .add_timer = fsl_otg_fsm_add_timer,
765 .del_timer = fsl_otg_fsm_del_timer,
766
767 .start_host = fsl_otg_start_host,
768 .start_gadget = fsl_otg_start_gadget,
769};
770
771/* Initialize the global variable fsl_otg_dev and request IRQ for OTG */
772static int fsl_otg_conf(struct platform_device *pdev)
773{
774 struct fsl_otg *fsl_otg_tc;
775 int status;
776
777 if (fsl_otg_dev)
778 return 0;
779
780 /* allocate space to fsl otg device */
781 fsl_otg_tc = kzalloc(sizeof(struct fsl_otg), GFP_KERNEL);
782 if (!fsl_otg_tc)
783 return -ENOMEM;
784
785 fsl_otg_tc->phy.otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
786 if (!fsl_otg_tc->phy.otg) {
787 kfree(fsl_otg_tc);
788 return -ENOMEM;
789 }
790
791 INIT_DELAYED_WORK(&fsl_otg_tc->otg_event, fsl_otg_event);
792
793 INIT_LIST_HEAD(&active_timers);
794 status = fsl_otg_init_timers(&fsl_otg_tc->fsm);
795 if (status) {
796 pr_info("Couldn't init OTG timers\n");
797 goto err;
798 }
799 mutex_init(&fsl_otg_tc->fsm.lock);
800
801 /* Set OTG state machine operations */
802 fsl_otg_tc->fsm.ops = &fsl_otg_ops;
803
804 /* initialize the otg structure */
805 fsl_otg_tc->phy.label = DRIVER_DESC;
806 fsl_otg_tc->phy.dev = &pdev->dev;
807
808 fsl_otg_tc->phy.otg->usb_phy = &fsl_otg_tc->phy;
809 fsl_otg_tc->phy.otg->set_host = fsl_otg_set_host;
810 fsl_otg_tc->phy.otg->set_peripheral = fsl_otg_set_peripheral;
811 fsl_otg_tc->phy.otg->start_hnp = fsl_otg_start_hnp;
812 fsl_otg_tc->phy.otg->start_srp = fsl_otg_start_srp;
813
814 fsl_otg_dev = fsl_otg_tc;
815
816 /* Store the otg transceiver */
817 status = usb_add_phy(&fsl_otg_tc->phy, USB_PHY_TYPE_USB2);
818 if (status) {
819 pr_warn(FSL_OTG_NAME ": unable to register OTG transceiver.\n");
820 goto err;
821 }
822
823 return 0;
824err:
825 fsl_otg_uninit_timers();
826 kfree(fsl_otg_tc->phy.otg);
827 kfree(fsl_otg_tc);
828 return status;
829}
830
831/* OTG Initialization */
832int usb_otg_start(struct platform_device *pdev)
833{
834 struct fsl_otg *p_otg;
835 struct usb_phy *otg_trans = usb_get_phy(USB_PHY_TYPE_USB2);
836 struct otg_fsm *fsm;
837 int status;
838 struct resource *res;
839 u32 temp;
840 struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
841
842 p_otg = container_of(otg_trans, struct fsl_otg, phy);
843 fsm = &p_otg->fsm;
844
845 /* Initialize the state machine structure with default values */
846 SET_OTG_STATE(otg_trans, OTG_STATE_UNDEFINED);
847 fsm->otg = p_otg->phy.otg;
848
849 /* We don't require predefined MEM/IRQ resource index */
850 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
851 if (!res)
852 return -ENXIO;
853
854 /* We don't request_mem_region here to enable resource sharing
855 * with host/device */
856
857 usb_dr_regs = ioremap(res->start, sizeof(struct usb_dr_mmap));
858 p_otg->dr_mem_map = (struct usb_dr_mmap *)usb_dr_regs;
859 pdata->regs = (void *)usb_dr_regs;
860
861 if (pdata->init && pdata->init(pdev) != 0)
862 return -EINVAL;
863
864#ifdef CONFIG_PPC32
865 if (pdata->big_endian_mmio) {
866 _fsl_readl = _fsl_readl_be;
867 _fsl_writel = _fsl_writel_be;
868 } else {
869 _fsl_readl = _fsl_readl_le;
870 _fsl_writel = _fsl_writel_le;
871 }
872#endif
873
874 /* request irq */
875 p_otg->irq = platform_get_irq(pdev, 0);
876 status = request_irq(p_otg->irq, fsl_otg_isr,
877 IRQF_SHARED, driver_name, p_otg);
878 if (status) {
879 dev_dbg(p_otg->phy.dev, "can't get IRQ %d, error %d\n",
880 p_otg->irq, status);
881 iounmap(p_otg->dr_mem_map);
882 kfree(p_otg->phy.otg);
883 kfree(p_otg);
884 return status;
885 }
886
887 /* stop the controller */
888 temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
889 temp &= ~USB_CMD_RUN_STOP;
890 fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
891
892 /* reset the controller */
893 temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
894 temp |= USB_CMD_CTRL_RESET;
895 fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
896
897 /* wait reset completed */
898 while (fsl_readl(&p_otg->dr_mem_map->usbcmd) & USB_CMD_CTRL_RESET)
899 ;
900
901 /* configure the VBUSHS as IDLE(both host and device) */
902 temp = USB_MODE_STREAM_DISABLE | (pdata->es ? USB_MODE_ES : 0);
903 fsl_writel(temp, &p_otg->dr_mem_map->usbmode);
904
905 /* configure PHY interface */
906 temp = fsl_readl(&p_otg->dr_mem_map->portsc);
907 temp &= ~(PORTSC_PHY_TYPE_SEL | PORTSC_PTW);
908 switch (pdata->phy_mode) {
909 case FSL_USB2_PHY_ULPI:
910 temp |= PORTSC_PTS_ULPI;
911 break;
912 case FSL_USB2_PHY_UTMI_WIDE:
913 temp |= PORTSC_PTW_16BIT;
914 fallthrough;
915 case FSL_USB2_PHY_UTMI:
916 temp |= PORTSC_PTS_UTMI;
917 fallthrough;
918 default:
919 break;
920 }
921 fsl_writel(temp, &p_otg->dr_mem_map->portsc);
922
923 if (pdata->have_sysif_regs) {
924 /* configure control enable IO output, big endian register */
925 temp = __raw_readl(&p_otg->dr_mem_map->control);
926 temp |= USB_CTRL_IOENB;
927 __raw_writel(temp, &p_otg->dr_mem_map->control);
928 }
929
930 /* disable all interrupt and clear all OTGSC status */
931 temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
932 temp &= ~OTGSC_INTERRUPT_ENABLE_BITS_MASK;
933 temp |= OTGSC_INTERRUPT_STATUS_BITS_MASK | OTGSC_CTRL_VBUS_DISCHARGE;
934 fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
935
936 /*
937 * The identification (id) input is FALSE when a Mini-A plug is inserted
938 * in the devices Mini-AB receptacle. Otherwise, this input is TRUE.
939 * Also: record initial state of ID pin
940 */
941 if (fsl_readl(&p_otg->dr_mem_map->otgsc) & OTGSC_STS_USB_ID) {
942 p_otg->phy.otg->state = OTG_STATE_UNDEFINED;
943 p_otg->fsm.id = 1;
944 } else {
945 p_otg->phy.otg->state = OTG_STATE_A_IDLE;
946 p_otg->fsm.id = 0;
947 }
948
949 pr_debug("initial ID pin=%d\n", p_otg->fsm.id);
950
951 /* enable OTG ID pin interrupt */
952 temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
953 temp |= OTGSC_INTR_USB_ID_EN;
954 temp &= ~(OTGSC_CTRL_VBUS_DISCHARGE | OTGSC_INTR_1MS_TIMER_EN);
955 fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
956
957 return 0;
958}
959
960static int fsl_otg_probe(struct platform_device *pdev)
961{
962 int ret;
963
964 if (!dev_get_platdata(&pdev->dev))
965 return -ENODEV;
966
967 /* configure the OTG */
968 ret = fsl_otg_conf(pdev);
969 if (ret) {
970 dev_err(&pdev->dev, "Couldn't configure OTG module\n");
971 return ret;
972 }
973
974 /* start OTG */
975 ret = usb_otg_start(pdev);
976 if (ret) {
977 dev_err(&pdev->dev, "Can't init FSL OTG device\n");
978 return ret;
979 }
980
981 return ret;
982}
983
984static int fsl_otg_remove(struct platform_device *pdev)
985{
986 struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
987
988 usb_remove_phy(&fsl_otg_dev->phy);
989 free_irq(fsl_otg_dev->irq, fsl_otg_dev);
990
991 iounmap((void *)usb_dr_regs);
992
993 fsl_otg_uninit_timers();
994 kfree(fsl_otg_dev->phy.otg);
995 kfree(fsl_otg_dev);
996
997 if (pdata->exit)
998 pdata->exit(pdev);
999
1000 return 0;
1001}
1002
1003struct platform_driver fsl_otg_driver = {
1004 .probe = fsl_otg_probe,
1005 .remove = fsl_otg_remove,
1006 .driver = {
1007 .name = driver_name,
1008 .owner = THIS_MODULE,
1009 },
1010};
1011
1012module_platform_driver(fsl_otg_driver);
1013
1014MODULE_DESCRIPTION(DRIVER_INFO);
1015MODULE_AUTHOR(DRIVER_AUTHOR);
1016MODULE_LICENSE("GPL");
1/*
2 * Copyright (C) 2007,2008 Freescale semiconductor, Inc.
3 *
4 * Author: Li Yang <LeoLi@freescale.com>
5 * Jerry Huang <Chang-Ming.Huang@freescale.com>
6 *
7 * Initialization based on code from Shlomi Gridish.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24#include <linux/module.h>
25#include <linux/kernel.h>
26#include <linux/delay.h>
27#include <linux/slab.h>
28#include <linux/proc_fs.h>
29#include <linux/errno.h>
30#include <linux/interrupt.h>
31#include <linux/io.h>
32#include <linux/timer.h>
33#include <linux/usb.h>
34#include <linux/device.h>
35#include <linux/usb/ch9.h>
36#include <linux/usb/gadget.h>
37#include <linux/workqueue.h>
38#include <linux/time.h>
39#include <linux/fsl_devices.h>
40#include <linux/platform_device.h>
41#include <linux/uaccess.h>
42
43#include <asm/unaligned.h>
44
45#include "phy-fsl-usb.h"
46
47#define DRIVER_VERSION "Rev. 1.55"
48#define DRIVER_AUTHOR "Jerry Huang/Li Yang"
49#define DRIVER_DESC "Freescale USB OTG Transceiver Driver"
50#define DRIVER_INFO DRIVER_DESC " " DRIVER_VERSION
51
52static const char driver_name[] = "fsl-usb2-otg";
53
54const pm_message_t otg_suspend_state = {
55 .event = 1,
56};
57
58#define HA_DATA_PULSE
59
60static struct usb_dr_mmap *usb_dr_regs;
61static struct fsl_otg *fsl_otg_dev;
62static int srp_wait_done;
63
64/* FSM timers */
65struct fsl_otg_timer *a_wait_vrise_tmr, *a_wait_bcon_tmr, *a_aidl_bdis_tmr,
66 *b_ase0_brst_tmr, *b_se0_srp_tmr;
67
68/* Driver specific timers */
69struct fsl_otg_timer *b_data_pulse_tmr, *b_vbus_pulse_tmr, *b_srp_fail_tmr,
70 *b_srp_wait_tmr, *a_wait_enum_tmr;
71
72static struct list_head active_timers;
73
74static struct fsl_otg_config fsl_otg_initdata = {
75 .otg_port = 1,
76};
77
78#ifdef CONFIG_PPC32
79static u32 _fsl_readl_be(const unsigned __iomem *p)
80{
81 return in_be32(p);
82}
83
84static u32 _fsl_readl_le(const unsigned __iomem *p)
85{
86 return in_le32(p);
87}
88
89static void _fsl_writel_be(u32 v, unsigned __iomem *p)
90{
91 out_be32(p, v);
92}
93
94static void _fsl_writel_le(u32 v, unsigned __iomem *p)
95{
96 out_le32(p, v);
97}
98
99static u32 (*_fsl_readl)(const unsigned __iomem *p);
100static void (*_fsl_writel)(u32 v, unsigned __iomem *p);
101
102#define fsl_readl(p) (*_fsl_readl)((p))
103#define fsl_writel(v, p) (*_fsl_writel)((v), (p))
104
105#else
106#define fsl_readl(addr) readl(addr)
107#define fsl_writel(val, addr) writel(val, addr)
108#endif /* CONFIG_PPC32 */
109
110/* Routines to access transceiver ULPI registers */
111u8 view_ulpi(u8 addr)
112{
113 u32 temp;
114
115 temp = 0x40000000 | (addr << 16);
116 fsl_writel(temp, &usb_dr_regs->ulpiview);
117 udelay(1000);
118 while (temp & 0x40)
119 temp = fsl_readl(&usb_dr_regs->ulpiview);
120 return (le32_to_cpu(temp) & 0x0000ff00) >> 8;
121}
122
123int write_ulpi(u8 addr, u8 data)
124{
125 u32 temp;
126
127 temp = 0x60000000 | (addr << 16) | data;
128 fsl_writel(temp, &usb_dr_regs->ulpiview);
129 return 0;
130}
131
132/* -------------------------------------------------------------*/
133/* Operations that will be called from OTG Finite State Machine */
134
135/* Charge vbus for vbus pulsing in SRP */
136void fsl_otg_chrg_vbus(struct otg_fsm *fsm, int on)
137{
138 u32 tmp;
139
140 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
141
142 if (on)
143 /* stop discharging, start charging */
144 tmp = (tmp & ~OTGSC_CTRL_VBUS_DISCHARGE) |
145 OTGSC_CTRL_VBUS_CHARGE;
146 else
147 /* stop charging */
148 tmp &= ~OTGSC_CTRL_VBUS_CHARGE;
149
150 fsl_writel(tmp, &usb_dr_regs->otgsc);
151}
152
153/* Discharge vbus through a resistor to ground */
154void fsl_otg_dischrg_vbus(int on)
155{
156 u32 tmp;
157
158 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
159
160 if (on)
161 /* stop charging, start discharging */
162 tmp = (tmp & ~OTGSC_CTRL_VBUS_CHARGE) |
163 OTGSC_CTRL_VBUS_DISCHARGE;
164 else
165 /* stop discharging */
166 tmp &= ~OTGSC_CTRL_VBUS_DISCHARGE;
167
168 fsl_writel(tmp, &usb_dr_regs->otgsc);
169}
170
171/* A-device driver vbus, controlled through PP bit in PORTSC */
172void fsl_otg_drv_vbus(struct otg_fsm *fsm, int on)
173{
174 u32 tmp;
175
176 if (on) {
177 tmp = fsl_readl(&usb_dr_regs->portsc) & ~PORTSC_W1C_BITS;
178 fsl_writel(tmp | PORTSC_PORT_POWER, &usb_dr_regs->portsc);
179 } else {
180 tmp = fsl_readl(&usb_dr_regs->portsc) &
181 ~PORTSC_W1C_BITS & ~PORTSC_PORT_POWER;
182 fsl_writel(tmp, &usb_dr_regs->portsc);
183 }
184}
185
186/*
187 * Pull-up D+, signalling connect by periperal. Also used in
188 * data-line pulsing in SRP
189 */
190void fsl_otg_loc_conn(struct otg_fsm *fsm, int on)
191{
192 u32 tmp;
193
194 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
195
196 if (on)
197 tmp |= OTGSC_CTRL_DATA_PULSING;
198 else
199 tmp &= ~OTGSC_CTRL_DATA_PULSING;
200
201 fsl_writel(tmp, &usb_dr_regs->otgsc);
202}
203
204/*
205 * Generate SOF by host. This is controlled through suspend/resume the
206 * port. In host mode, controller will automatically send SOF.
207 * Suspend will block the data on the port.
208 */
209void fsl_otg_loc_sof(struct otg_fsm *fsm, int on)
210{
211 u32 tmp;
212
213 tmp = fsl_readl(&fsl_otg_dev->dr_mem_map->portsc) & ~PORTSC_W1C_BITS;
214 if (on)
215 tmp |= PORTSC_PORT_FORCE_RESUME;
216 else
217 tmp |= PORTSC_PORT_SUSPEND;
218
219 fsl_writel(tmp, &fsl_otg_dev->dr_mem_map->portsc);
220
221}
222
223/* Start SRP pulsing by data-line pulsing, followed with v-bus pulsing. */
224void fsl_otg_start_pulse(struct otg_fsm *fsm)
225{
226 u32 tmp;
227
228 srp_wait_done = 0;
229#ifdef HA_DATA_PULSE
230 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK;
231 tmp |= OTGSC_HA_DATA_PULSE;
232 fsl_writel(tmp, &usb_dr_regs->otgsc);
233#else
234 fsl_otg_loc_conn(1);
235#endif
236
237 fsl_otg_add_timer(fsm, b_data_pulse_tmr);
238}
239
240void b_data_pulse_end(unsigned long foo)
241{
242#ifdef HA_DATA_PULSE
243#else
244 fsl_otg_loc_conn(0);
245#endif
246
247 /* Do VBUS pulse after data pulse */
248 fsl_otg_pulse_vbus();
249}
250
251void fsl_otg_pulse_vbus(void)
252{
253 srp_wait_done = 0;
254 fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 1);
255 /* start the timer to end vbus charge */
256 fsl_otg_add_timer(&fsl_otg_dev->fsm, b_vbus_pulse_tmr);
257}
258
259void b_vbus_pulse_end(unsigned long foo)
260{
261 fsl_otg_chrg_vbus(&fsl_otg_dev->fsm, 0);
262
263 /*
264 * As USB3300 using the same a_sess_vld and b_sess_vld voltage
265 * we need to discharge the bus for a while to distinguish
266 * residual voltage of vbus pulsing and A device pull up
267 */
268 fsl_otg_dischrg_vbus(1);
269 fsl_otg_add_timer(&fsl_otg_dev->fsm, b_srp_wait_tmr);
270}
271
272void b_srp_end(unsigned long foo)
273{
274 fsl_otg_dischrg_vbus(0);
275 srp_wait_done = 1;
276
277 if ((fsl_otg_dev->phy.state == OTG_STATE_B_SRP_INIT) &&
278 fsl_otg_dev->fsm.b_sess_vld)
279 fsl_otg_dev->fsm.b_srp_done = 1;
280}
281
282/*
283 * Workaround for a_host suspending too fast. When a_bus_req=0,
284 * a_host will start by SRP. It needs to set b_hnp_enable before
285 * actually suspending to start HNP
286 */
287void a_wait_enum(unsigned long foo)
288{
289 VDBG("a_wait_enum timeout\n");
290 if (!fsl_otg_dev->phy.otg->host->b_hnp_enable)
291 fsl_otg_add_timer(&fsl_otg_dev->fsm, a_wait_enum_tmr);
292 else
293 otg_statemachine(&fsl_otg_dev->fsm);
294}
295
296/* The timeout callback function to set time out bit */
297void set_tmout(unsigned long indicator)
298{
299 *(int *)indicator = 1;
300}
301
302/* Initialize timers */
303int fsl_otg_init_timers(struct otg_fsm *fsm)
304{
305 /* FSM used timers */
306 a_wait_vrise_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_VRISE,
307 (unsigned long)&fsm->a_wait_vrise_tmout);
308 if (!a_wait_vrise_tmr)
309 return -ENOMEM;
310
311 a_wait_bcon_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_BCON,
312 (unsigned long)&fsm->a_wait_bcon_tmout);
313 if (!a_wait_bcon_tmr)
314 return -ENOMEM;
315
316 a_aidl_bdis_tmr = otg_timer_initializer(&set_tmout, TA_AIDL_BDIS,
317 (unsigned long)&fsm->a_aidl_bdis_tmout);
318 if (!a_aidl_bdis_tmr)
319 return -ENOMEM;
320
321 b_ase0_brst_tmr = otg_timer_initializer(&set_tmout, TB_ASE0_BRST,
322 (unsigned long)&fsm->b_ase0_brst_tmout);
323 if (!b_ase0_brst_tmr)
324 return -ENOMEM;
325
326 b_se0_srp_tmr = otg_timer_initializer(&set_tmout, TB_SE0_SRP,
327 (unsigned long)&fsm->b_se0_srp);
328 if (!b_se0_srp_tmr)
329 return -ENOMEM;
330
331 b_srp_fail_tmr = otg_timer_initializer(&set_tmout, TB_SRP_FAIL,
332 (unsigned long)&fsm->b_srp_done);
333 if (!b_srp_fail_tmr)
334 return -ENOMEM;
335
336 a_wait_enum_tmr = otg_timer_initializer(&a_wait_enum, 10,
337 (unsigned long)&fsm);
338 if (!a_wait_enum_tmr)
339 return -ENOMEM;
340
341 /* device driver used timers */
342 b_srp_wait_tmr = otg_timer_initializer(&b_srp_end, TB_SRP_WAIT, 0);
343 if (!b_srp_wait_tmr)
344 return -ENOMEM;
345
346 b_data_pulse_tmr = otg_timer_initializer(&b_data_pulse_end,
347 TB_DATA_PLS, 0);
348 if (!b_data_pulse_tmr)
349 return -ENOMEM;
350
351 b_vbus_pulse_tmr = otg_timer_initializer(&b_vbus_pulse_end,
352 TB_VBUS_PLS, 0);
353 if (!b_vbus_pulse_tmr)
354 return -ENOMEM;
355
356 return 0;
357}
358
359/* Uninitialize timers */
360void fsl_otg_uninit_timers(void)
361{
362 /* FSM used timers */
363 kfree(a_wait_vrise_tmr);
364 kfree(a_wait_bcon_tmr);
365 kfree(a_aidl_bdis_tmr);
366 kfree(b_ase0_brst_tmr);
367 kfree(b_se0_srp_tmr);
368 kfree(b_srp_fail_tmr);
369 kfree(a_wait_enum_tmr);
370
371 /* device driver used timers */
372 kfree(b_srp_wait_tmr);
373 kfree(b_data_pulse_tmr);
374 kfree(b_vbus_pulse_tmr);
375}
376
377static struct fsl_otg_timer *fsl_otg_get_timer(enum otg_fsm_timer t)
378{
379 struct fsl_otg_timer *timer;
380
381 /* REVISIT: use array of pointers to timers instead */
382 switch (t) {
383 case A_WAIT_VRISE:
384 timer = a_wait_vrise_tmr;
385 break;
386 case A_WAIT_BCON:
387 timer = a_wait_vrise_tmr;
388 break;
389 case A_AIDL_BDIS:
390 timer = a_wait_vrise_tmr;
391 break;
392 case B_ASE0_BRST:
393 timer = a_wait_vrise_tmr;
394 break;
395 case B_SE0_SRP:
396 timer = a_wait_vrise_tmr;
397 break;
398 case B_SRP_FAIL:
399 timer = a_wait_vrise_tmr;
400 break;
401 case A_WAIT_ENUM:
402 timer = a_wait_vrise_tmr;
403 break;
404 default:
405 timer = NULL;
406 }
407
408 return timer;
409}
410
411/* Add timer to timer list */
412void fsl_otg_add_timer(struct otg_fsm *fsm, void *gtimer)
413{
414 struct fsl_otg_timer *timer = gtimer;
415 struct fsl_otg_timer *tmp_timer;
416
417 /*
418 * Check if the timer is already in the active list,
419 * if so update timer count
420 */
421 list_for_each_entry(tmp_timer, &active_timers, list)
422 if (tmp_timer == timer) {
423 timer->count = timer->expires;
424 return;
425 }
426 timer->count = timer->expires;
427 list_add_tail(&timer->list, &active_timers);
428}
429
430static void fsl_otg_fsm_add_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
431{
432 struct fsl_otg_timer *timer;
433
434 timer = fsl_otg_get_timer(t);
435 if (!timer)
436 return;
437
438 fsl_otg_add_timer(fsm, timer);
439}
440
441/* Remove timer from the timer list; clear timeout status */
442void fsl_otg_del_timer(struct otg_fsm *fsm, void *gtimer)
443{
444 struct fsl_otg_timer *timer = gtimer;
445 struct fsl_otg_timer *tmp_timer, *del_tmp;
446
447 list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list)
448 if (tmp_timer == timer)
449 list_del(&timer->list);
450}
451
452static void fsl_otg_fsm_del_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
453{
454 struct fsl_otg_timer *timer;
455
456 timer = fsl_otg_get_timer(t);
457 if (!timer)
458 return;
459
460 fsl_otg_del_timer(fsm, timer);
461}
462
463/*
464 * Reduce timer count by 1, and find timeout conditions.
465 * Called by fsl_otg 1ms timer interrupt
466 */
467int fsl_otg_tick_timer(void)
468{
469 struct fsl_otg_timer *tmp_timer, *del_tmp;
470 int expired = 0;
471
472 list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list) {
473 tmp_timer->count--;
474 /* check if timer expires */
475 if (!tmp_timer->count) {
476 list_del(&tmp_timer->list);
477 tmp_timer->function(tmp_timer->data);
478 expired = 1;
479 }
480 }
481
482 return expired;
483}
484
485/* Reset controller, not reset the bus */
486void otg_reset_controller(void)
487{
488 u32 command;
489
490 command = fsl_readl(&usb_dr_regs->usbcmd);
491 command |= (1 << 1);
492 fsl_writel(command, &usb_dr_regs->usbcmd);
493 while (fsl_readl(&usb_dr_regs->usbcmd) & (1 << 1))
494 ;
495}
496
497/* Call suspend/resume routines in host driver */
498int fsl_otg_start_host(struct otg_fsm *fsm, int on)
499{
500 struct usb_otg *otg = fsm->otg;
501 struct device *dev;
502 struct fsl_otg *otg_dev = container_of(otg->phy, struct fsl_otg, phy);
503 u32 retval = 0;
504
505 if (!otg->host)
506 return -ENODEV;
507 dev = otg->host->controller;
508
509 /*
510 * Update a_vbus_vld state as a_vbus_vld int is disabled
511 * in device mode
512 */
513 fsm->a_vbus_vld =
514 !!(fsl_readl(&usb_dr_regs->otgsc) & OTGSC_STS_A_VBUS_VALID);
515 if (on) {
516 /* start fsl usb host controller */
517 if (otg_dev->host_working)
518 goto end;
519 else {
520 otg_reset_controller();
521 VDBG("host on......\n");
522 if (dev->driver->pm && dev->driver->pm->resume) {
523 retval = dev->driver->pm->resume(dev);
524 if (fsm->id) {
525 /* default-b */
526 fsl_otg_drv_vbus(fsm, 1);
527 /*
528 * Workaround: b_host can't driver
529 * vbus, but PP in PORTSC needs to
530 * be 1 for host to work.
531 * So we set drv_vbus bit in
532 * transceiver to 0 thru ULPI.
533 */
534 write_ulpi(0x0c, 0x20);
535 }
536 }
537
538 otg_dev->host_working = 1;
539 }
540 } else {
541 /* stop fsl usb host controller */
542 if (!otg_dev->host_working)
543 goto end;
544 else {
545 VDBG("host off......\n");
546 if (dev && dev->driver) {
547 if (dev->driver->pm && dev->driver->pm->suspend)
548 retval = dev->driver->pm->suspend(dev);
549 if (fsm->id)
550 /* default-b */
551 fsl_otg_drv_vbus(fsm, 0);
552 }
553 otg_dev->host_working = 0;
554 }
555 }
556end:
557 return retval;
558}
559
560/*
561 * Call suspend and resume function in udc driver
562 * to stop and start udc driver.
563 */
564int fsl_otg_start_gadget(struct otg_fsm *fsm, int on)
565{
566 struct usb_otg *otg = fsm->otg;
567 struct device *dev;
568
569 if (!otg->gadget || !otg->gadget->dev.parent)
570 return -ENODEV;
571
572 VDBG("gadget %s\n", on ? "on" : "off");
573 dev = otg->gadget->dev.parent;
574
575 if (on) {
576 if (dev->driver->resume)
577 dev->driver->resume(dev);
578 } else {
579 if (dev->driver->suspend)
580 dev->driver->suspend(dev, otg_suspend_state);
581 }
582
583 return 0;
584}
585
586/*
587 * Called by initialization code of host driver. Register host controller
588 * to the OTG. Suspend host for OTG role detection.
589 */
590static int fsl_otg_set_host(struct usb_otg *otg, struct usb_bus *host)
591{
592 struct fsl_otg *otg_dev;
593
594 if (!otg)
595 return -ENODEV;
596
597 otg_dev = container_of(otg->phy, struct fsl_otg, phy);
598 if (otg_dev != fsl_otg_dev)
599 return -ENODEV;
600
601 otg->host = host;
602
603 otg_dev->fsm.a_bus_drop = 0;
604 otg_dev->fsm.a_bus_req = 1;
605
606 if (host) {
607 VDBG("host off......\n");
608
609 otg->host->otg_port = fsl_otg_initdata.otg_port;
610 otg->host->is_b_host = otg_dev->fsm.id;
611 /*
612 * must leave time for khubd to finish its thing
613 * before yanking the host driver out from under it,
614 * so suspend the host after a short delay.
615 */
616 otg_dev->host_working = 1;
617 schedule_delayed_work(&otg_dev->otg_event, 100);
618 return 0;
619 } else {
620 /* host driver going away */
621 if (!(fsl_readl(&otg_dev->dr_mem_map->otgsc) &
622 OTGSC_STS_USB_ID)) {
623 /* Mini-A cable connected */
624 struct otg_fsm *fsm = &otg_dev->fsm;
625
626 otg->phy->state = OTG_STATE_UNDEFINED;
627 fsm->protocol = PROTO_UNDEF;
628 }
629 }
630
631 otg_dev->host_working = 0;
632
633 otg_statemachine(&otg_dev->fsm);
634
635 return 0;
636}
637
638/* Called by initialization code of udc. Register udc to OTG. */
639static int fsl_otg_set_peripheral(struct usb_otg *otg,
640 struct usb_gadget *gadget)
641{
642 struct fsl_otg *otg_dev;
643
644 if (!otg)
645 return -ENODEV;
646
647 otg_dev = container_of(otg->phy, struct fsl_otg, phy);
648 VDBG("otg_dev 0x%x\n", (int)otg_dev);
649 VDBG("fsl_otg_dev 0x%x\n", (int)fsl_otg_dev);
650 if (otg_dev != fsl_otg_dev)
651 return -ENODEV;
652
653 if (!gadget) {
654 if (!otg->default_a)
655 otg->gadget->ops->vbus_draw(otg->gadget, 0);
656 usb_gadget_vbus_disconnect(otg->gadget);
657 otg->gadget = 0;
658 otg_dev->fsm.b_bus_req = 0;
659 otg_statemachine(&otg_dev->fsm);
660 return 0;
661 }
662
663 otg->gadget = gadget;
664 otg->gadget->is_a_peripheral = !otg_dev->fsm.id;
665
666 otg_dev->fsm.b_bus_req = 1;
667
668 /* start the gadget right away if the ID pin says Mini-B */
669 pr_debug("ID pin=%d\n", otg_dev->fsm.id);
670 if (otg_dev->fsm.id == 1) {
671 fsl_otg_start_host(&otg_dev->fsm, 0);
672 otg_drv_vbus(&otg_dev->fsm, 0);
673 fsl_otg_start_gadget(&otg_dev->fsm, 1);
674 }
675
676 return 0;
677}
678
679/* Set OTG port power, only for B-device */
680static int fsl_otg_set_power(struct usb_phy *phy, unsigned mA)
681{
682 if (!fsl_otg_dev)
683 return -ENODEV;
684 if (phy->state == OTG_STATE_B_PERIPHERAL)
685 pr_info("FSL OTG: Draw %d mA\n", mA);
686
687 return 0;
688}
689
690/*
691 * Delayed pin detect interrupt processing.
692 *
693 * When the Mini-A cable is disconnected from the board,
694 * the pin-detect interrupt happens before the disconnect
695 * interrupts for the connected device(s). In order to
696 * process the disconnect interrupt(s) prior to switching
697 * roles, the pin-detect interrupts are delayed, and handled
698 * by this routine.
699 */
700static void fsl_otg_event(struct work_struct *work)
701{
702 struct fsl_otg *og = container_of(work, struct fsl_otg, otg_event.work);
703 struct otg_fsm *fsm = &og->fsm;
704
705 if (fsm->id) { /* switch to gadget */
706 fsl_otg_start_host(fsm, 0);
707 otg_drv_vbus(fsm, 0);
708 fsl_otg_start_gadget(fsm, 1);
709 }
710}
711
712/* B-device start SRP */
713static int fsl_otg_start_srp(struct usb_otg *otg)
714{
715 struct fsl_otg *otg_dev;
716
717 if (!otg || otg->phy->state != OTG_STATE_B_IDLE)
718 return -ENODEV;
719
720 otg_dev = container_of(otg->phy, struct fsl_otg, phy);
721 if (otg_dev != fsl_otg_dev)
722 return -ENODEV;
723
724 otg_dev->fsm.b_bus_req = 1;
725 otg_statemachine(&otg_dev->fsm);
726
727 return 0;
728}
729
730/* A_host suspend will call this function to start hnp */
731static int fsl_otg_start_hnp(struct usb_otg *otg)
732{
733 struct fsl_otg *otg_dev;
734
735 if (!otg)
736 return -ENODEV;
737
738 otg_dev = container_of(otg->phy, struct fsl_otg, phy);
739 if (otg_dev != fsl_otg_dev)
740 return -ENODEV;
741
742 pr_debug("start_hnp...\n");
743
744 /* clear a_bus_req to enter a_suspend state */
745 otg_dev->fsm.a_bus_req = 0;
746 otg_statemachine(&otg_dev->fsm);
747
748 return 0;
749}
750
751/*
752 * Interrupt handler. OTG/host/peripheral share the same int line.
753 * OTG driver clears OTGSC interrupts and leaves USB interrupts
754 * intact. It needs to have knowledge of some USB interrupts
755 * such as port change.
756 */
757irqreturn_t fsl_otg_isr(int irq, void *dev_id)
758{
759 struct otg_fsm *fsm = &((struct fsl_otg *)dev_id)->fsm;
760 struct usb_otg *otg = ((struct fsl_otg *)dev_id)->phy.otg;
761 u32 otg_int_src, otg_sc;
762
763 otg_sc = fsl_readl(&usb_dr_regs->otgsc);
764 otg_int_src = otg_sc & OTGSC_INTSTS_MASK & (otg_sc >> 8);
765
766 /* Only clear otg interrupts */
767 fsl_writel(otg_sc, &usb_dr_regs->otgsc);
768
769 /*FIXME: ID change not generate when init to 0 */
770 fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
771 otg->default_a = (fsm->id == 0);
772
773 /* process OTG interrupts */
774 if (otg_int_src) {
775 if (otg_int_src & OTGSC_INTSTS_USB_ID) {
776 fsm->id = (otg_sc & OTGSC_STS_USB_ID) ? 1 : 0;
777 otg->default_a = (fsm->id == 0);
778 /* clear conn information */
779 if (fsm->id)
780 fsm->b_conn = 0;
781 else
782 fsm->a_conn = 0;
783
784 if (otg->host)
785 otg->host->is_b_host = fsm->id;
786 if (otg->gadget)
787 otg->gadget->is_a_peripheral = !fsm->id;
788 VDBG("ID int (ID is %d)\n", fsm->id);
789
790 if (fsm->id) { /* switch to gadget */
791 schedule_delayed_work(
792 &((struct fsl_otg *)dev_id)->otg_event,
793 100);
794 } else { /* switch to host */
795 cancel_delayed_work(&
796 ((struct fsl_otg *)dev_id)->
797 otg_event);
798 fsl_otg_start_gadget(fsm, 0);
799 otg_drv_vbus(fsm, 1);
800 fsl_otg_start_host(fsm, 1);
801 }
802 return IRQ_HANDLED;
803 }
804 }
805 return IRQ_NONE;
806}
807
808static struct otg_fsm_ops fsl_otg_ops = {
809 .chrg_vbus = fsl_otg_chrg_vbus,
810 .drv_vbus = fsl_otg_drv_vbus,
811 .loc_conn = fsl_otg_loc_conn,
812 .loc_sof = fsl_otg_loc_sof,
813 .start_pulse = fsl_otg_start_pulse,
814
815 .add_timer = fsl_otg_fsm_add_timer,
816 .del_timer = fsl_otg_fsm_del_timer,
817
818 .start_host = fsl_otg_start_host,
819 .start_gadget = fsl_otg_start_gadget,
820};
821
822/* Initialize the global variable fsl_otg_dev and request IRQ for OTG */
823static int fsl_otg_conf(struct platform_device *pdev)
824{
825 struct fsl_otg *fsl_otg_tc;
826 int status;
827
828 if (fsl_otg_dev)
829 return 0;
830
831 /* allocate space to fsl otg device */
832 fsl_otg_tc = kzalloc(sizeof(struct fsl_otg), GFP_KERNEL);
833 if (!fsl_otg_tc)
834 return -ENOMEM;
835
836 fsl_otg_tc->phy.otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
837 if (!fsl_otg_tc->phy.otg) {
838 kfree(fsl_otg_tc);
839 return -ENOMEM;
840 }
841
842 INIT_DELAYED_WORK(&fsl_otg_tc->otg_event, fsl_otg_event);
843
844 INIT_LIST_HEAD(&active_timers);
845 status = fsl_otg_init_timers(&fsl_otg_tc->fsm);
846 if (status) {
847 pr_info("Couldn't init OTG timers\n");
848 goto err;
849 }
850 mutex_init(&fsl_otg_tc->fsm.lock);
851
852 /* Set OTG state machine operations */
853 fsl_otg_tc->fsm.ops = &fsl_otg_ops;
854
855 /* initialize the otg structure */
856 fsl_otg_tc->phy.label = DRIVER_DESC;
857 fsl_otg_tc->phy.dev = &pdev->dev;
858 fsl_otg_tc->phy.set_power = fsl_otg_set_power;
859
860 fsl_otg_tc->phy.otg->phy = &fsl_otg_tc->phy;
861 fsl_otg_tc->phy.otg->set_host = fsl_otg_set_host;
862 fsl_otg_tc->phy.otg->set_peripheral = fsl_otg_set_peripheral;
863 fsl_otg_tc->phy.otg->start_hnp = fsl_otg_start_hnp;
864 fsl_otg_tc->phy.otg->start_srp = fsl_otg_start_srp;
865
866 fsl_otg_dev = fsl_otg_tc;
867
868 /* Store the otg transceiver */
869 status = usb_add_phy(&fsl_otg_tc->phy, USB_PHY_TYPE_USB2);
870 if (status) {
871 pr_warn(FSL_OTG_NAME ": unable to register OTG transceiver.\n");
872 goto err;
873 }
874
875 return 0;
876err:
877 fsl_otg_uninit_timers();
878 kfree(fsl_otg_tc->phy.otg);
879 kfree(fsl_otg_tc);
880 return status;
881}
882
883/* OTG Initialization */
884int usb_otg_start(struct platform_device *pdev)
885{
886 struct fsl_otg *p_otg;
887 struct usb_phy *otg_trans = usb_get_phy(USB_PHY_TYPE_USB2);
888 struct otg_fsm *fsm;
889 int status;
890 struct resource *res;
891 u32 temp;
892 struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
893
894 p_otg = container_of(otg_trans, struct fsl_otg, phy);
895 fsm = &p_otg->fsm;
896
897 /* Initialize the state machine structure with default values */
898 SET_OTG_STATE(otg_trans, OTG_STATE_UNDEFINED);
899 fsm->otg = p_otg->phy.otg;
900
901 /* We don't require predefined MEM/IRQ resource index */
902 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
903 if (!res)
904 return -ENXIO;
905
906 /* We don't request_mem_region here to enable resource sharing
907 * with host/device */
908
909 usb_dr_regs = ioremap(res->start, sizeof(struct usb_dr_mmap));
910 p_otg->dr_mem_map = (struct usb_dr_mmap *)usb_dr_regs;
911 pdata->regs = (void *)usb_dr_regs;
912
913 if (pdata->init && pdata->init(pdev) != 0)
914 return -EINVAL;
915
916 if (pdata->big_endian_mmio) {
917 _fsl_readl = _fsl_readl_be;
918 _fsl_writel = _fsl_writel_be;
919 } else {
920 _fsl_readl = _fsl_readl_le;
921 _fsl_writel = _fsl_writel_le;
922 }
923
924 /* request irq */
925 p_otg->irq = platform_get_irq(pdev, 0);
926 status = request_irq(p_otg->irq, fsl_otg_isr,
927 IRQF_SHARED, driver_name, p_otg);
928 if (status) {
929 dev_dbg(p_otg->phy.dev, "can't get IRQ %d, error %d\n",
930 p_otg->irq, status);
931 iounmap(p_otg->dr_mem_map);
932 kfree(p_otg->phy.otg);
933 kfree(p_otg);
934 return status;
935 }
936
937 /* stop the controller */
938 temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
939 temp &= ~USB_CMD_RUN_STOP;
940 fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
941
942 /* reset the controller */
943 temp = fsl_readl(&p_otg->dr_mem_map->usbcmd);
944 temp |= USB_CMD_CTRL_RESET;
945 fsl_writel(temp, &p_otg->dr_mem_map->usbcmd);
946
947 /* wait reset completed */
948 while (fsl_readl(&p_otg->dr_mem_map->usbcmd) & USB_CMD_CTRL_RESET)
949 ;
950
951 /* configure the VBUSHS as IDLE(both host and device) */
952 temp = USB_MODE_STREAM_DISABLE | (pdata->es ? USB_MODE_ES : 0);
953 fsl_writel(temp, &p_otg->dr_mem_map->usbmode);
954
955 /* configure PHY interface */
956 temp = fsl_readl(&p_otg->dr_mem_map->portsc);
957 temp &= ~(PORTSC_PHY_TYPE_SEL | PORTSC_PTW);
958 switch (pdata->phy_mode) {
959 case FSL_USB2_PHY_ULPI:
960 temp |= PORTSC_PTS_ULPI;
961 break;
962 case FSL_USB2_PHY_UTMI_WIDE:
963 temp |= PORTSC_PTW_16BIT;
964 /* fall through */
965 case FSL_USB2_PHY_UTMI:
966 temp |= PORTSC_PTS_UTMI;
967 /* fall through */
968 default:
969 break;
970 }
971 fsl_writel(temp, &p_otg->dr_mem_map->portsc);
972
973 if (pdata->have_sysif_regs) {
974 /* configure control enable IO output, big endian register */
975 temp = __raw_readl(&p_otg->dr_mem_map->control);
976 temp |= USB_CTRL_IOENB;
977 __raw_writel(temp, &p_otg->dr_mem_map->control);
978 }
979
980 /* disable all interrupt and clear all OTGSC status */
981 temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
982 temp &= ~OTGSC_INTERRUPT_ENABLE_BITS_MASK;
983 temp |= OTGSC_INTERRUPT_STATUS_BITS_MASK | OTGSC_CTRL_VBUS_DISCHARGE;
984 fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
985
986 /*
987 * The identification (id) input is FALSE when a Mini-A plug is inserted
988 * in the devices Mini-AB receptacle. Otherwise, this input is TRUE.
989 * Also: record initial state of ID pin
990 */
991 if (fsl_readl(&p_otg->dr_mem_map->otgsc) & OTGSC_STS_USB_ID) {
992 p_otg->phy.state = OTG_STATE_UNDEFINED;
993 p_otg->fsm.id = 1;
994 } else {
995 p_otg->phy.state = OTG_STATE_A_IDLE;
996 p_otg->fsm.id = 0;
997 }
998
999 pr_debug("initial ID pin=%d\n", p_otg->fsm.id);
1000
1001 /* enable OTG ID pin interrupt */
1002 temp = fsl_readl(&p_otg->dr_mem_map->otgsc);
1003 temp |= OTGSC_INTR_USB_ID_EN;
1004 temp &= ~(OTGSC_CTRL_VBUS_DISCHARGE | OTGSC_INTR_1MS_TIMER_EN);
1005 fsl_writel(temp, &p_otg->dr_mem_map->otgsc);
1006
1007 return 0;
1008}
1009
1010/*
1011 * state file in sysfs
1012 */
1013static int show_fsl_usb2_otg_state(struct device *dev,
1014 struct device_attribute *attr, char *buf)
1015{
1016 struct otg_fsm *fsm = &fsl_otg_dev->fsm;
1017 char *next = buf;
1018 unsigned size = PAGE_SIZE;
1019 int t;
1020
1021 mutex_lock(&fsm->lock);
1022
1023 /* basic driver infomation */
1024 t = scnprintf(next, size,
1025 DRIVER_DESC "\n" "fsl_usb2_otg version: %s\n\n",
1026 DRIVER_VERSION);
1027 size -= t;
1028 next += t;
1029
1030 /* Registers */
1031 t = scnprintf(next, size,
1032 "OTGSC: 0x%08x\n"
1033 "PORTSC: 0x%08x\n"
1034 "USBMODE: 0x%08x\n"
1035 "USBCMD: 0x%08x\n"
1036 "USBSTS: 0x%08x\n"
1037 "USBINTR: 0x%08x\n",
1038 fsl_readl(&usb_dr_regs->otgsc),
1039 fsl_readl(&usb_dr_regs->portsc),
1040 fsl_readl(&usb_dr_regs->usbmode),
1041 fsl_readl(&usb_dr_regs->usbcmd),
1042 fsl_readl(&usb_dr_regs->usbsts),
1043 fsl_readl(&usb_dr_regs->usbintr));
1044 size -= t;
1045 next += t;
1046
1047 /* State */
1048 t = scnprintf(next, size,
1049 "OTG state: %s\n\n",
1050 usb_otg_state_string(fsl_otg_dev->phy.state));
1051 size -= t;
1052 next += t;
1053
1054 /* State Machine Variables */
1055 t = scnprintf(next, size,
1056 "a_bus_req: %d\n"
1057 "b_bus_req: %d\n"
1058 "a_bus_resume: %d\n"
1059 "a_bus_suspend: %d\n"
1060 "a_conn: %d\n"
1061 "a_sess_vld: %d\n"
1062 "a_srp_det: %d\n"
1063 "a_vbus_vld: %d\n"
1064 "b_bus_resume: %d\n"
1065 "b_bus_suspend: %d\n"
1066 "b_conn: %d\n"
1067 "b_se0_srp: %d\n"
1068 "b_ssend_srp: %d\n"
1069 "b_sess_vld: %d\n"
1070 "id: %d\n",
1071 fsm->a_bus_req,
1072 fsm->b_bus_req,
1073 fsm->a_bus_resume,
1074 fsm->a_bus_suspend,
1075 fsm->a_conn,
1076 fsm->a_sess_vld,
1077 fsm->a_srp_det,
1078 fsm->a_vbus_vld,
1079 fsm->b_bus_resume,
1080 fsm->b_bus_suspend,
1081 fsm->b_conn,
1082 fsm->b_se0_srp,
1083 fsm->b_ssend_srp,
1084 fsm->b_sess_vld,
1085 fsm->id);
1086 size -= t;
1087 next += t;
1088
1089 mutex_unlock(&fsm->lock);
1090
1091 return PAGE_SIZE - size;
1092}
1093
1094static DEVICE_ATTR(fsl_usb2_otg_state, S_IRUGO, show_fsl_usb2_otg_state, NULL);
1095
1096
1097/* Char driver interface to control some OTG input */
1098
1099/*
1100 * Handle some ioctl command, such as get otg
1101 * status and set host suspend
1102 */
1103static long fsl_otg_ioctl(struct file *file, unsigned int cmd,
1104 unsigned long arg)
1105{
1106 u32 retval = 0;
1107
1108 switch (cmd) {
1109 case GET_OTG_STATUS:
1110 retval = fsl_otg_dev->host_working;
1111 break;
1112
1113 case SET_A_SUSPEND_REQ:
1114 fsl_otg_dev->fsm.a_suspend_req_inf = arg;
1115 break;
1116
1117 case SET_A_BUS_DROP:
1118 fsl_otg_dev->fsm.a_bus_drop = arg;
1119 break;
1120
1121 case SET_A_BUS_REQ:
1122 fsl_otg_dev->fsm.a_bus_req = arg;
1123 break;
1124
1125 case SET_B_BUS_REQ:
1126 fsl_otg_dev->fsm.b_bus_req = arg;
1127 break;
1128
1129 default:
1130 break;
1131 }
1132
1133 otg_statemachine(&fsl_otg_dev->fsm);
1134
1135 return retval;
1136}
1137
1138static int fsl_otg_open(struct inode *inode, struct file *file)
1139{
1140 return 0;
1141}
1142
1143static int fsl_otg_release(struct inode *inode, struct file *file)
1144{
1145 return 0;
1146}
1147
1148static const struct file_operations otg_fops = {
1149 .owner = THIS_MODULE,
1150 .llseek = NULL,
1151 .read = NULL,
1152 .write = NULL,
1153 .unlocked_ioctl = fsl_otg_ioctl,
1154 .open = fsl_otg_open,
1155 .release = fsl_otg_release,
1156};
1157
1158static int fsl_otg_probe(struct platform_device *pdev)
1159{
1160 int ret;
1161
1162 if (!dev_get_platdata(&pdev->dev))
1163 return -ENODEV;
1164
1165 /* configure the OTG */
1166 ret = fsl_otg_conf(pdev);
1167 if (ret) {
1168 dev_err(&pdev->dev, "Couldn't configure OTG module\n");
1169 return ret;
1170 }
1171
1172 /* start OTG */
1173 ret = usb_otg_start(pdev);
1174 if (ret) {
1175 dev_err(&pdev->dev, "Can't init FSL OTG device\n");
1176 return ret;
1177 }
1178
1179 ret = register_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME, &otg_fops);
1180 if (ret) {
1181 dev_err(&pdev->dev, "unable to register FSL OTG device\n");
1182 return ret;
1183 }
1184
1185 ret = device_create_file(&pdev->dev, &dev_attr_fsl_usb2_otg_state);
1186 if (ret)
1187 dev_warn(&pdev->dev, "Can't register sysfs attribute\n");
1188
1189 return ret;
1190}
1191
1192static int fsl_otg_remove(struct platform_device *pdev)
1193{
1194 struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
1195
1196 usb_remove_phy(&fsl_otg_dev->phy);
1197 free_irq(fsl_otg_dev->irq, fsl_otg_dev);
1198
1199 iounmap((void *)usb_dr_regs);
1200
1201 fsl_otg_uninit_timers();
1202 kfree(fsl_otg_dev->phy.otg);
1203 kfree(fsl_otg_dev);
1204
1205 device_remove_file(&pdev->dev, &dev_attr_fsl_usb2_otg_state);
1206
1207 unregister_chrdev(FSL_OTG_MAJOR, FSL_OTG_NAME);
1208
1209 if (pdata->exit)
1210 pdata->exit(pdev);
1211
1212 return 0;
1213}
1214
1215struct platform_driver fsl_otg_driver = {
1216 .probe = fsl_otg_probe,
1217 .remove = fsl_otg_remove,
1218 .driver = {
1219 .name = driver_name,
1220 .owner = THIS_MODULE,
1221 },
1222};
1223
1224module_platform_driver(fsl_otg_driver);
1225
1226MODULE_DESCRIPTION(DRIVER_INFO);
1227MODULE_AUTHOR(DRIVER_AUTHOR);
1228MODULE_LICENSE("GPL");