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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * udc.c - ChipIdea UDC driver
4 *
5 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
6 *
7 * Author: David Lopo
8 */
9
10#include <linux/delay.h>
11#include <linux/device.h>
12#include <linux/dmapool.h>
13#include <linux/err.h>
14#include <linux/irqreturn.h>
15#include <linux/kernel.h>
16#include <linux/slab.h>
17#include <linux/pm_runtime.h>
18#include <linux/pinctrl/consumer.h>
19#include <linux/usb/ch9.h>
20#include <linux/usb/gadget.h>
21#include <linux/usb/otg-fsm.h>
22#include <linux/usb/chipidea.h>
23
24#include "ci.h"
25#include "udc.h"
26#include "bits.h"
27#include "otg.h"
28#include "otg_fsm.h"
29
30/* control endpoint description */
31static const struct usb_endpoint_descriptor
32ctrl_endpt_out_desc = {
33 .bLength = USB_DT_ENDPOINT_SIZE,
34 .bDescriptorType = USB_DT_ENDPOINT,
35
36 .bEndpointAddress = USB_DIR_OUT,
37 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
38 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
39};
40
41static const struct usb_endpoint_descriptor
42ctrl_endpt_in_desc = {
43 .bLength = USB_DT_ENDPOINT_SIZE,
44 .bDescriptorType = USB_DT_ENDPOINT,
45
46 .bEndpointAddress = USB_DIR_IN,
47 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
48 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
49};
50
51/**
52 * hw_ep_bit: calculates the bit number
53 * @num: endpoint number
54 * @dir: endpoint direction
55 *
56 * This function returns bit number
57 */
58static inline int hw_ep_bit(int num, int dir)
59{
60 return num + ((dir == TX) ? 16 : 0);
61}
62
63static inline int ep_to_bit(struct ci_hdrc *ci, int n)
64{
65 int fill = 16 - ci->hw_ep_max / 2;
66
67 if (n >= ci->hw_ep_max / 2)
68 n += fill;
69
70 return n;
71}
72
73/**
74 * hw_device_state: enables/disables interrupts (execute without interruption)
75 * @ci: the controller
76 * @dma: 0 => disable, !0 => enable and set dma engine
77 *
78 * This function returns an error code
79 */
80static int hw_device_state(struct ci_hdrc *ci, u32 dma)
81{
82 if (dma) {
83 hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
84 /* interrupt, error, port change, reset, sleep/suspend */
85 hw_write(ci, OP_USBINTR, ~0,
86 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
87 } else {
88 hw_write(ci, OP_USBINTR, ~0, 0);
89 }
90 return 0;
91}
92
93/**
94 * hw_ep_flush: flush endpoint fifo (execute without interruption)
95 * @ci: the controller
96 * @num: endpoint number
97 * @dir: endpoint direction
98 *
99 * This function returns an error code
100 */
101static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
102{
103 int n = hw_ep_bit(num, dir);
104
105 do {
106 /* flush any pending transfer */
107 hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
108 while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
109 cpu_relax();
110 } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
111
112 return 0;
113}
114
115/**
116 * hw_ep_disable: disables endpoint (execute without interruption)
117 * @ci: the controller
118 * @num: endpoint number
119 * @dir: endpoint direction
120 *
121 * This function returns an error code
122 */
123static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
124{
125 hw_write(ci, OP_ENDPTCTRL + num,
126 (dir == TX) ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
127 return 0;
128}
129
130/**
131 * hw_ep_enable: enables endpoint (execute without interruption)
132 * @ci: the controller
133 * @num: endpoint number
134 * @dir: endpoint direction
135 * @type: endpoint type
136 *
137 * This function returns an error code
138 */
139static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
140{
141 u32 mask, data;
142
143 if (dir == TX) {
144 mask = ENDPTCTRL_TXT; /* type */
145 data = type << __ffs(mask);
146
147 mask |= ENDPTCTRL_TXS; /* unstall */
148 mask |= ENDPTCTRL_TXR; /* reset data toggle */
149 data |= ENDPTCTRL_TXR;
150 mask |= ENDPTCTRL_TXE; /* enable */
151 data |= ENDPTCTRL_TXE;
152 } else {
153 mask = ENDPTCTRL_RXT; /* type */
154 data = type << __ffs(mask);
155
156 mask |= ENDPTCTRL_RXS; /* unstall */
157 mask |= ENDPTCTRL_RXR; /* reset data toggle */
158 data |= ENDPTCTRL_RXR;
159 mask |= ENDPTCTRL_RXE; /* enable */
160 data |= ENDPTCTRL_RXE;
161 }
162 hw_write(ci, OP_ENDPTCTRL + num, mask, data);
163 return 0;
164}
165
166/**
167 * hw_ep_get_halt: return endpoint halt status
168 * @ci: the controller
169 * @num: endpoint number
170 * @dir: endpoint direction
171 *
172 * This function returns 1 if endpoint halted
173 */
174static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
175{
176 u32 mask = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
177
178 return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
179}
180
181/**
182 * hw_ep_prime: primes endpoint (execute without interruption)
183 * @ci: the controller
184 * @num: endpoint number
185 * @dir: endpoint direction
186 * @is_ctrl: true if control endpoint
187 *
188 * This function returns an error code
189 */
190static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
191{
192 int n = hw_ep_bit(num, dir);
193
194 /* Synchronize before ep prime */
195 wmb();
196
197 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
198 return -EAGAIN;
199
200 hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
201
202 while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
203 cpu_relax();
204 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
205 return -EAGAIN;
206
207 /* status shoult be tested according with manual but it doesn't work */
208 return 0;
209}
210
211/**
212 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
213 * without interruption)
214 * @ci: the controller
215 * @num: endpoint number
216 * @dir: endpoint direction
217 * @value: true => stall, false => unstall
218 *
219 * This function returns an error code
220 */
221static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
222{
223 if (value != 0 && value != 1)
224 return -EINVAL;
225
226 do {
227 enum ci_hw_regs reg = OP_ENDPTCTRL + num;
228 u32 mask_xs = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
229 u32 mask_xr = (dir == TX) ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
230
231 /* data toggle - reserved for EP0 but it's in ESS */
232 hw_write(ci, reg, mask_xs|mask_xr,
233 value ? mask_xs : mask_xr);
234 } while (value != hw_ep_get_halt(ci, num, dir));
235
236 return 0;
237}
238
239/**
240 * hw_is_port_high_speed: test if port is high speed
241 * @ci: the controller
242 *
243 * This function returns true if high speed port
244 */
245static int hw_port_is_high_speed(struct ci_hdrc *ci)
246{
247 return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
248 hw_read(ci, OP_PORTSC, PORTSC_HSP);
249}
250
251/**
252 * hw_test_and_clear_complete: test & clear complete status (execute without
253 * interruption)
254 * @ci: the controller
255 * @n: endpoint number
256 *
257 * This function returns complete status
258 */
259static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
260{
261 n = ep_to_bit(ci, n);
262 return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
263}
264
265/**
266 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
267 * without interruption)
268 * @ci: the controller
269 *
270 * This function returns active interrutps
271 */
272static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
273{
274 u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
275
276 hw_write(ci, OP_USBSTS, ~0, reg);
277 return reg;
278}
279
280/**
281 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
282 * interruption)
283 * @ci: the controller
284 *
285 * This function returns guard value
286 */
287static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
288{
289 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
290}
291
292/**
293 * hw_test_and_set_setup_guard: test & set setup guard (execute without
294 * interruption)
295 * @ci: the controller
296 *
297 * This function returns guard value
298 */
299static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
300{
301 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
302}
303
304/**
305 * hw_usb_set_address: configures USB address (execute without interruption)
306 * @ci: the controller
307 * @value: new USB address
308 *
309 * This function explicitly sets the address, without the "USBADRA" (advance)
310 * feature, which is not supported by older versions of the controller.
311 */
312static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
313{
314 hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
315 value << __ffs(DEVICEADDR_USBADR));
316}
317
318/**
319 * hw_usb_reset: restart device after a bus reset (execute without
320 * interruption)
321 * @ci: the controller
322 *
323 * This function returns an error code
324 */
325static int hw_usb_reset(struct ci_hdrc *ci)
326{
327 hw_usb_set_address(ci, 0);
328
329 /* ESS flushes only at end?!? */
330 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
331
332 /* clear setup token semaphores */
333 hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
334
335 /* clear complete status */
336 hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
337
338 /* wait until all bits cleared */
339 while (hw_read(ci, OP_ENDPTPRIME, ~0))
340 udelay(10); /* not RTOS friendly */
341
342 /* reset all endpoints ? */
343
344 /* reset internal status and wait for further instructions
345 no need to verify the port reset status (ESS does it) */
346
347 return 0;
348}
349
350/******************************************************************************
351 * UTIL block
352 *****************************************************************************/
353
354static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
355 unsigned int length, struct scatterlist *s)
356{
357 int i;
358 u32 temp;
359 struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
360 GFP_ATOMIC);
361
362 if (node == NULL)
363 return -ENOMEM;
364
365 node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC, &node->dma);
366 if (node->ptr == NULL) {
367 kfree(node);
368 return -ENOMEM;
369 }
370
371 node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
372 node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
373 node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
374 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
375 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
376
377 if (hwreq->req.length == 0
378 || hwreq->req.length % hwep->ep.maxpacket)
379 mul++;
380 node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO));
381 }
382
383 if (s) {
384 temp = (u32) (sg_dma_address(s) + hwreq->req.actual);
385 node->td_remaining_size = CI_MAX_BUF_SIZE - length;
386 } else {
387 temp = (u32) (hwreq->req.dma + hwreq->req.actual);
388 }
389
390 if (length) {
391 node->ptr->page[0] = cpu_to_le32(temp);
392 for (i = 1; i < TD_PAGE_COUNT; i++) {
393 u32 page = temp + i * CI_HDRC_PAGE_SIZE;
394 page &= ~TD_RESERVED_MASK;
395 node->ptr->page[i] = cpu_to_le32(page);
396 }
397 }
398
399 hwreq->req.actual += length;
400
401 if (!list_empty(&hwreq->tds)) {
402 /* get the last entry */
403 lastnode = list_entry(hwreq->tds.prev,
404 struct td_node, td);
405 lastnode->ptr->next = cpu_to_le32(node->dma);
406 }
407
408 INIT_LIST_HEAD(&node->td);
409 list_add_tail(&node->td, &hwreq->tds);
410
411 return 0;
412}
413
414/**
415 * _usb_addr: calculates endpoint address from direction & number
416 * @ep: endpoint
417 */
418static inline u8 _usb_addr(struct ci_hw_ep *ep)
419{
420 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
421}
422
423static int prepare_td_for_non_sg(struct ci_hw_ep *hwep,
424 struct ci_hw_req *hwreq)
425{
426 unsigned int rest = hwreq->req.length;
427 int pages = TD_PAGE_COUNT;
428 int ret = 0;
429
430 if (rest == 0) {
431 ret = add_td_to_list(hwep, hwreq, 0, NULL);
432 if (ret < 0)
433 return ret;
434 }
435
436 /*
437 * The first buffer could be not page aligned.
438 * In that case we have to span into one extra td.
439 */
440 if (hwreq->req.dma % PAGE_SIZE)
441 pages--;
442
443 while (rest > 0) {
444 unsigned int count = min(hwreq->req.length - hwreq->req.actual,
445 (unsigned int)(pages * CI_HDRC_PAGE_SIZE));
446
447 ret = add_td_to_list(hwep, hwreq, count, NULL);
448 if (ret < 0)
449 return ret;
450
451 rest -= count;
452 }
453
454 if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
455 && (hwreq->req.length % hwep->ep.maxpacket == 0)) {
456 ret = add_td_to_list(hwep, hwreq, 0, NULL);
457 if (ret < 0)
458 return ret;
459 }
460
461 return ret;
462}
463
464static int prepare_td_per_sg(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
465 struct scatterlist *s)
466{
467 unsigned int rest = sg_dma_len(s);
468 int ret = 0;
469
470 hwreq->req.actual = 0;
471 while (rest > 0) {
472 unsigned int count = min_t(unsigned int, rest,
473 CI_MAX_BUF_SIZE);
474
475 ret = add_td_to_list(hwep, hwreq, count, s);
476 if (ret < 0)
477 return ret;
478
479 rest -= count;
480 }
481
482 return ret;
483}
484
485static void ci_add_buffer_entry(struct td_node *node, struct scatterlist *s)
486{
487 int empty_td_slot_index = (CI_MAX_BUF_SIZE - node->td_remaining_size)
488 / CI_HDRC_PAGE_SIZE;
489 int i;
490 u32 token;
491
492 token = le32_to_cpu(node->ptr->token) + (sg_dma_len(s) << __ffs(TD_TOTAL_BYTES));
493 node->ptr->token = cpu_to_le32(token);
494
495 for (i = empty_td_slot_index; i < TD_PAGE_COUNT; i++) {
496 u32 page = (u32) sg_dma_address(s) +
497 (i - empty_td_slot_index) * CI_HDRC_PAGE_SIZE;
498
499 page &= ~TD_RESERVED_MASK;
500 node->ptr->page[i] = cpu_to_le32(page);
501 }
502}
503
504static int prepare_td_for_sg(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
505{
506 struct usb_request *req = &hwreq->req;
507 struct scatterlist *s = req->sg;
508 int ret = 0, i = 0;
509 struct td_node *node = NULL;
510
511 if (!s || req->zero || req->length == 0) {
512 dev_err(hwep->ci->dev, "not supported operation for sg\n");
513 return -EINVAL;
514 }
515
516 while (i++ < req->num_mapped_sgs) {
517 if (sg_dma_address(s) % PAGE_SIZE) {
518 dev_err(hwep->ci->dev, "not page aligned sg buffer\n");
519 return -EINVAL;
520 }
521
522 if (node && (node->td_remaining_size >= sg_dma_len(s))) {
523 ci_add_buffer_entry(node, s);
524 node->td_remaining_size -= sg_dma_len(s);
525 } else {
526 ret = prepare_td_per_sg(hwep, hwreq, s);
527 if (ret)
528 return ret;
529
530 node = list_entry(hwreq->tds.prev,
531 struct td_node, td);
532 }
533
534 s = sg_next(s);
535 }
536
537 return ret;
538}
539
540/**
541 * _hardware_enqueue: configures a request at hardware level
542 * @hwep: endpoint
543 * @hwreq: request
544 *
545 * This function returns an error code
546 */
547static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
548{
549 struct ci_hdrc *ci = hwep->ci;
550 int ret = 0;
551 struct td_node *firstnode, *lastnode;
552
553 /* don't queue twice */
554 if (hwreq->req.status == -EALREADY)
555 return -EALREADY;
556
557 hwreq->req.status = -EALREADY;
558
559 ret = usb_gadget_map_request_by_dev(ci->dev->parent,
560 &hwreq->req, hwep->dir);
561 if (ret)
562 return ret;
563
564 if (hwreq->req.num_mapped_sgs)
565 ret = prepare_td_for_sg(hwep, hwreq);
566 else
567 ret = prepare_td_for_non_sg(hwep, hwreq);
568
569 if (ret)
570 return ret;
571
572 firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
573
574 lastnode = list_entry(hwreq->tds.prev,
575 struct td_node, td);
576
577 lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
578 if (!hwreq->req.no_interrupt)
579 lastnode->ptr->token |= cpu_to_le32(TD_IOC);
580 wmb();
581
582 hwreq->req.actual = 0;
583 if (!list_empty(&hwep->qh.queue)) {
584 struct ci_hw_req *hwreqprev;
585 int n = hw_ep_bit(hwep->num, hwep->dir);
586 int tmp_stat;
587 struct td_node *prevlastnode;
588 u32 next = firstnode->dma & TD_ADDR_MASK;
589
590 hwreqprev = list_entry(hwep->qh.queue.prev,
591 struct ci_hw_req, queue);
592 prevlastnode = list_entry(hwreqprev->tds.prev,
593 struct td_node, td);
594
595 prevlastnode->ptr->next = cpu_to_le32(next);
596 wmb();
597 if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
598 goto done;
599 do {
600 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
601 tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
602 } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
603 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
604 if (tmp_stat)
605 goto done;
606 }
607
608 /* QH configuration */
609 hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
610 hwep->qh.ptr->td.token &=
611 cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
612
613 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
614 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
615
616 if (hwreq->req.length == 0
617 || hwreq->req.length % hwep->ep.maxpacket)
618 mul++;
619 hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT));
620 }
621
622 ret = hw_ep_prime(ci, hwep->num, hwep->dir,
623 hwep->type == USB_ENDPOINT_XFER_CONTROL);
624done:
625 return ret;
626}
627
628/**
629 * free_pending_td: remove a pending request for the endpoint
630 * @hwep: endpoint
631 */
632static void free_pending_td(struct ci_hw_ep *hwep)
633{
634 struct td_node *pending = hwep->pending_td;
635
636 dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
637 hwep->pending_td = NULL;
638 kfree(pending);
639}
640
641static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
642 struct td_node *node)
643{
644 hwep->qh.ptr->td.next = cpu_to_le32(node->dma);
645 hwep->qh.ptr->td.token &=
646 cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
647
648 return hw_ep_prime(ci, hwep->num, hwep->dir,
649 hwep->type == USB_ENDPOINT_XFER_CONTROL);
650}
651
652/**
653 * _hardware_dequeue: handles a request at hardware level
654 * @hwep: endpoint
655 * @hwreq: request
656 *
657 * This function returns an error code
658 */
659static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
660{
661 u32 tmptoken;
662 struct td_node *node, *tmpnode;
663 unsigned remaining_length;
664 unsigned actual = hwreq->req.length;
665 struct ci_hdrc *ci = hwep->ci;
666
667 if (hwreq->req.status != -EALREADY)
668 return -EINVAL;
669
670 hwreq->req.status = 0;
671
672 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
673 tmptoken = le32_to_cpu(node->ptr->token);
674 if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
675 int n = hw_ep_bit(hwep->num, hwep->dir);
676
677 if (ci->rev == CI_REVISION_24)
678 if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
679 reprime_dtd(ci, hwep, node);
680 hwreq->req.status = -EALREADY;
681 return -EBUSY;
682 }
683
684 remaining_length = (tmptoken & TD_TOTAL_BYTES);
685 remaining_length >>= __ffs(TD_TOTAL_BYTES);
686 actual -= remaining_length;
687
688 hwreq->req.status = tmptoken & TD_STATUS;
689 if ((TD_STATUS_HALTED & hwreq->req.status)) {
690 hwreq->req.status = -EPIPE;
691 break;
692 } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
693 hwreq->req.status = -EPROTO;
694 break;
695 } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
696 hwreq->req.status = -EILSEQ;
697 break;
698 }
699
700 if (remaining_length) {
701 if (hwep->dir == TX) {
702 hwreq->req.status = -EPROTO;
703 break;
704 }
705 }
706 /*
707 * As the hardware could still address the freed td
708 * which will run the udc unusable, the cleanup of the
709 * td has to be delayed by one.
710 */
711 if (hwep->pending_td)
712 free_pending_td(hwep);
713
714 hwep->pending_td = node;
715 list_del_init(&node->td);
716 }
717
718 usb_gadget_unmap_request_by_dev(hwep->ci->dev->parent,
719 &hwreq->req, hwep->dir);
720
721 hwreq->req.actual += actual;
722
723 if (hwreq->req.status)
724 return hwreq->req.status;
725
726 return hwreq->req.actual;
727}
728
729/**
730 * _ep_nuke: dequeues all endpoint requests
731 * @hwep: endpoint
732 *
733 * This function returns an error code
734 * Caller must hold lock
735 */
736static int _ep_nuke(struct ci_hw_ep *hwep)
737__releases(hwep->lock)
738__acquires(hwep->lock)
739{
740 struct td_node *node, *tmpnode;
741 if (hwep == NULL)
742 return -EINVAL;
743
744 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
745
746 while (!list_empty(&hwep->qh.queue)) {
747
748 /* pop oldest request */
749 struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
750 struct ci_hw_req, queue);
751
752 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
753 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
754 list_del_init(&node->td);
755 node->ptr = NULL;
756 kfree(node);
757 }
758
759 list_del_init(&hwreq->queue);
760 hwreq->req.status = -ESHUTDOWN;
761
762 if (hwreq->req.complete != NULL) {
763 spin_unlock(hwep->lock);
764 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
765 spin_lock(hwep->lock);
766 }
767 }
768
769 if (hwep->pending_td)
770 free_pending_td(hwep);
771
772 return 0;
773}
774
775static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
776{
777 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
778 int direction, retval = 0;
779 unsigned long flags;
780
781 if (ep == NULL || hwep->ep.desc == NULL)
782 return -EINVAL;
783
784 if (usb_endpoint_xfer_isoc(hwep->ep.desc))
785 return -EOPNOTSUPP;
786
787 spin_lock_irqsave(hwep->lock, flags);
788
789 if (value && hwep->dir == TX && check_transfer &&
790 !list_empty(&hwep->qh.queue) &&
791 !usb_endpoint_xfer_control(hwep->ep.desc)) {
792 spin_unlock_irqrestore(hwep->lock, flags);
793 return -EAGAIN;
794 }
795
796 direction = hwep->dir;
797 do {
798 retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
799
800 if (!value)
801 hwep->wedge = 0;
802
803 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
804 hwep->dir = (hwep->dir == TX) ? RX : TX;
805
806 } while (hwep->dir != direction);
807
808 spin_unlock_irqrestore(hwep->lock, flags);
809 return retval;
810}
811
812
813/**
814 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
815 * @gadget: gadget
816 *
817 * This function returns an error code
818 */
819static int _gadget_stop_activity(struct usb_gadget *gadget)
820{
821 struct usb_ep *ep;
822 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
823 unsigned long flags;
824
825 /* flush all endpoints */
826 gadget_for_each_ep(ep, gadget) {
827 usb_ep_fifo_flush(ep);
828 }
829 usb_ep_fifo_flush(&ci->ep0out->ep);
830 usb_ep_fifo_flush(&ci->ep0in->ep);
831
832 /* make sure to disable all endpoints */
833 gadget_for_each_ep(ep, gadget) {
834 usb_ep_disable(ep);
835 }
836
837 if (ci->status != NULL) {
838 usb_ep_free_request(&ci->ep0in->ep, ci->status);
839 ci->status = NULL;
840 }
841
842 spin_lock_irqsave(&ci->lock, flags);
843 ci->gadget.speed = USB_SPEED_UNKNOWN;
844 ci->remote_wakeup = 0;
845 ci->suspended = 0;
846 spin_unlock_irqrestore(&ci->lock, flags);
847
848 return 0;
849}
850
851/******************************************************************************
852 * ISR block
853 *****************************************************************************/
854/**
855 * isr_reset_handler: USB reset interrupt handler
856 * @ci: UDC device
857 *
858 * This function resets USB engine after a bus reset occurred
859 */
860static void isr_reset_handler(struct ci_hdrc *ci)
861__releases(ci->lock)
862__acquires(ci->lock)
863{
864 int retval;
865
866 spin_unlock(&ci->lock);
867 if (ci->gadget.speed != USB_SPEED_UNKNOWN)
868 usb_gadget_udc_reset(&ci->gadget, ci->driver);
869
870 retval = _gadget_stop_activity(&ci->gadget);
871 if (retval)
872 goto done;
873
874 retval = hw_usb_reset(ci);
875 if (retval)
876 goto done;
877
878 ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
879 if (ci->status == NULL)
880 retval = -ENOMEM;
881
882done:
883 spin_lock(&ci->lock);
884
885 if (retval)
886 dev_err(ci->dev, "error: %i\n", retval);
887}
888
889/**
890 * isr_get_status_complete: get_status request complete function
891 * @ep: endpoint
892 * @req: request handled
893 *
894 * Caller must release lock
895 */
896static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
897{
898 if (ep == NULL || req == NULL)
899 return;
900
901 kfree(req->buf);
902 usb_ep_free_request(ep, req);
903}
904
905/**
906 * _ep_queue: queues (submits) an I/O request to an endpoint
907 * @ep: endpoint
908 * @req: request
909 * @gfp_flags: GFP flags (not used)
910 *
911 * Caller must hold lock
912 * This function returns an error code
913 */
914static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
915 gfp_t __maybe_unused gfp_flags)
916{
917 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
918 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
919 struct ci_hdrc *ci = hwep->ci;
920 int retval = 0;
921
922 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
923 return -EINVAL;
924
925 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
926 if (req->length)
927 hwep = (ci->ep0_dir == RX) ?
928 ci->ep0out : ci->ep0in;
929 if (!list_empty(&hwep->qh.queue)) {
930 _ep_nuke(hwep);
931 dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
932 _usb_addr(hwep));
933 }
934 }
935
936 if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
937 hwreq->req.length > hwep->ep.mult * hwep->ep.maxpacket) {
938 dev_err(hwep->ci->dev, "request length too big for isochronous\n");
939 return -EMSGSIZE;
940 }
941
942 /* first nuke then test link, e.g. previous status has not sent */
943 if (!list_empty(&hwreq->queue)) {
944 dev_err(hwep->ci->dev, "request already in queue\n");
945 return -EBUSY;
946 }
947
948 /* push request */
949 hwreq->req.status = -EINPROGRESS;
950 hwreq->req.actual = 0;
951
952 retval = _hardware_enqueue(hwep, hwreq);
953
954 if (retval == -EALREADY)
955 retval = 0;
956 if (!retval)
957 list_add_tail(&hwreq->queue, &hwep->qh.queue);
958
959 return retval;
960}
961
962/**
963 * isr_get_status_response: get_status request response
964 * @ci: ci struct
965 * @setup: setup request packet
966 *
967 * This function returns an error code
968 */
969static int isr_get_status_response(struct ci_hdrc *ci,
970 struct usb_ctrlrequest *setup)
971__releases(hwep->lock)
972__acquires(hwep->lock)
973{
974 struct ci_hw_ep *hwep = ci->ep0in;
975 struct usb_request *req = NULL;
976 gfp_t gfp_flags = GFP_ATOMIC;
977 int dir, num, retval;
978
979 if (hwep == NULL || setup == NULL)
980 return -EINVAL;
981
982 spin_unlock(hwep->lock);
983 req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
984 spin_lock(hwep->lock);
985 if (req == NULL)
986 return -ENOMEM;
987
988 req->complete = isr_get_status_complete;
989 req->length = 2;
990 req->buf = kzalloc(req->length, gfp_flags);
991 if (req->buf == NULL) {
992 retval = -ENOMEM;
993 goto err_free_req;
994 }
995
996 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
997 *(u16 *)req->buf = (ci->remote_wakeup << 1) |
998 ci->gadget.is_selfpowered;
999 } else if ((setup->bRequestType & USB_RECIP_MASK) \
1000 == USB_RECIP_ENDPOINT) {
1001 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
1002 TX : RX;
1003 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
1004 *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
1005 }
1006 /* else do nothing; reserved for future use */
1007
1008 retval = _ep_queue(&hwep->ep, req, gfp_flags);
1009 if (retval)
1010 goto err_free_buf;
1011
1012 return 0;
1013
1014 err_free_buf:
1015 kfree(req->buf);
1016 err_free_req:
1017 spin_unlock(hwep->lock);
1018 usb_ep_free_request(&hwep->ep, req);
1019 spin_lock(hwep->lock);
1020 return retval;
1021}
1022
1023/**
1024 * isr_setup_status_complete: setup_status request complete function
1025 * @ep: endpoint
1026 * @req: request handled
1027 *
1028 * Caller must release lock. Put the port in test mode if test mode
1029 * feature is selected.
1030 */
1031static void
1032isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
1033{
1034 struct ci_hdrc *ci = req->context;
1035 unsigned long flags;
1036
1037 if (ci->setaddr) {
1038 hw_usb_set_address(ci, ci->address);
1039 ci->setaddr = false;
1040 if (ci->address)
1041 usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
1042 }
1043
1044 spin_lock_irqsave(&ci->lock, flags);
1045 if (ci->test_mode)
1046 hw_port_test_set(ci, ci->test_mode);
1047 spin_unlock_irqrestore(&ci->lock, flags);
1048}
1049
1050/**
1051 * isr_setup_status_phase: queues the status phase of a setup transation
1052 * @ci: ci struct
1053 *
1054 * This function returns an error code
1055 */
1056static int isr_setup_status_phase(struct ci_hdrc *ci)
1057{
1058 struct ci_hw_ep *hwep;
1059
1060 /*
1061 * Unexpected USB controller behavior, caused by bad signal integrity
1062 * or ground reference problems, can lead to isr_setup_status_phase
1063 * being called with ci->status equal to NULL.
1064 * If this situation occurs, you should review your USB hardware design.
1065 */
1066 if (WARN_ON_ONCE(!ci->status))
1067 return -EPIPE;
1068
1069 hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
1070 ci->status->context = ci;
1071 ci->status->complete = isr_setup_status_complete;
1072
1073 return _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
1074}
1075
1076/**
1077 * isr_tr_complete_low: transaction complete low level handler
1078 * @hwep: endpoint
1079 *
1080 * This function returns an error code
1081 * Caller must hold lock
1082 */
1083static int isr_tr_complete_low(struct ci_hw_ep *hwep)
1084__releases(hwep->lock)
1085__acquires(hwep->lock)
1086{
1087 struct ci_hw_req *hwreq, *hwreqtemp;
1088 struct ci_hw_ep *hweptemp = hwep;
1089 int retval = 0;
1090
1091 list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
1092 queue) {
1093 retval = _hardware_dequeue(hwep, hwreq);
1094 if (retval < 0)
1095 break;
1096 list_del_init(&hwreq->queue);
1097 if (hwreq->req.complete != NULL) {
1098 spin_unlock(hwep->lock);
1099 if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
1100 hwreq->req.length)
1101 hweptemp = hwep->ci->ep0in;
1102 usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
1103 spin_lock(hwep->lock);
1104 }
1105 }
1106
1107 if (retval == -EBUSY)
1108 retval = 0;
1109
1110 return retval;
1111}
1112
1113static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
1114{
1115 dev_warn(&ci->gadget.dev,
1116 "connect the device to an alternate port if you want HNP\n");
1117 return isr_setup_status_phase(ci);
1118}
1119
1120/**
1121 * isr_setup_packet_handler: setup packet handler
1122 * @ci: UDC descriptor
1123 *
1124 * This function handles setup packet
1125 */
1126static void isr_setup_packet_handler(struct ci_hdrc *ci)
1127__releases(ci->lock)
1128__acquires(ci->lock)
1129{
1130 struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
1131 struct usb_ctrlrequest req;
1132 int type, num, dir, err = -EINVAL;
1133 u8 tmode = 0;
1134
1135 /*
1136 * Flush data and handshake transactions of previous
1137 * setup packet.
1138 */
1139 _ep_nuke(ci->ep0out);
1140 _ep_nuke(ci->ep0in);
1141
1142 /* read_setup_packet */
1143 do {
1144 hw_test_and_set_setup_guard(ci);
1145 memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
1146 } while (!hw_test_and_clear_setup_guard(ci));
1147
1148 type = req.bRequestType;
1149
1150 ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
1151
1152 switch (req.bRequest) {
1153 case USB_REQ_CLEAR_FEATURE:
1154 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1155 le16_to_cpu(req.wValue) ==
1156 USB_ENDPOINT_HALT) {
1157 if (req.wLength != 0)
1158 break;
1159 num = le16_to_cpu(req.wIndex);
1160 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1161 num &= USB_ENDPOINT_NUMBER_MASK;
1162 if (dir == TX)
1163 num += ci->hw_ep_max / 2;
1164 if (!ci->ci_hw_ep[num].wedge) {
1165 spin_unlock(&ci->lock);
1166 err = usb_ep_clear_halt(
1167 &ci->ci_hw_ep[num].ep);
1168 spin_lock(&ci->lock);
1169 if (err)
1170 break;
1171 }
1172 err = isr_setup_status_phase(ci);
1173 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1174 le16_to_cpu(req.wValue) ==
1175 USB_DEVICE_REMOTE_WAKEUP) {
1176 if (req.wLength != 0)
1177 break;
1178 ci->remote_wakeup = 0;
1179 err = isr_setup_status_phase(ci);
1180 } else {
1181 goto delegate;
1182 }
1183 break;
1184 case USB_REQ_GET_STATUS:
1185 if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) ||
1186 le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) &&
1187 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1188 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1189 goto delegate;
1190 if (le16_to_cpu(req.wLength) != 2 ||
1191 le16_to_cpu(req.wValue) != 0)
1192 break;
1193 err = isr_get_status_response(ci, &req);
1194 break;
1195 case USB_REQ_SET_ADDRESS:
1196 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1197 goto delegate;
1198 if (le16_to_cpu(req.wLength) != 0 ||
1199 le16_to_cpu(req.wIndex) != 0)
1200 break;
1201 ci->address = (u8)le16_to_cpu(req.wValue);
1202 ci->setaddr = true;
1203 err = isr_setup_status_phase(ci);
1204 break;
1205 case USB_REQ_SET_FEATURE:
1206 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1207 le16_to_cpu(req.wValue) ==
1208 USB_ENDPOINT_HALT) {
1209 if (req.wLength != 0)
1210 break;
1211 num = le16_to_cpu(req.wIndex);
1212 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1213 num &= USB_ENDPOINT_NUMBER_MASK;
1214 if (dir == TX)
1215 num += ci->hw_ep_max / 2;
1216
1217 spin_unlock(&ci->lock);
1218 err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
1219 spin_lock(&ci->lock);
1220 if (!err)
1221 isr_setup_status_phase(ci);
1222 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
1223 if (req.wLength != 0)
1224 break;
1225 switch (le16_to_cpu(req.wValue)) {
1226 case USB_DEVICE_REMOTE_WAKEUP:
1227 ci->remote_wakeup = 1;
1228 err = isr_setup_status_phase(ci);
1229 break;
1230 case USB_DEVICE_TEST_MODE:
1231 tmode = le16_to_cpu(req.wIndex) >> 8;
1232 switch (tmode) {
1233 case USB_TEST_J:
1234 case USB_TEST_K:
1235 case USB_TEST_SE0_NAK:
1236 case USB_TEST_PACKET:
1237 case USB_TEST_FORCE_ENABLE:
1238 ci->test_mode = tmode;
1239 err = isr_setup_status_phase(
1240 ci);
1241 break;
1242 default:
1243 break;
1244 }
1245 break;
1246 case USB_DEVICE_B_HNP_ENABLE:
1247 if (ci_otg_is_fsm_mode(ci)) {
1248 ci->gadget.b_hnp_enable = 1;
1249 err = isr_setup_status_phase(
1250 ci);
1251 }
1252 break;
1253 case USB_DEVICE_A_ALT_HNP_SUPPORT:
1254 if (ci_otg_is_fsm_mode(ci))
1255 err = otg_a_alt_hnp_support(ci);
1256 break;
1257 case USB_DEVICE_A_HNP_SUPPORT:
1258 if (ci_otg_is_fsm_mode(ci)) {
1259 ci->gadget.a_hnp_support = 1;
1260 err = isr_setup_status_phase(
1261 ci);
1262 }
1263 break;
1264 default:
1265 goto delegate;
1266 }
1267 } else {
1268 goto delegate;
1269 }
1270 break;
1271 default:
1272delegate:
1273 if (req.wLength == 0) /* no data phase */
1274 ci->ep0_dir = TX;
1275
1276 spin_unlock(&ci->lock);
1277 err = ci->driver->setup(&ci->gadget, &req);
1278 spin_lock(&ci->lock);
1279 break;
1280 }
1281
1282 if (err < 0) {
1283 spin_unlock(&ci->lock);
1284 if (_ep_set_halt(&hwep->ep, 1, false))
1285 dev_err(ci->dev, "error: _ep_set_halt\n");
1286 spin_lock(&ci->lock);
1287 }
1288}
1289
1290/**
1291 * isr_tr_complete_handler: transaction complete interrupt handler
1292 * @ci: UDC descriptor
1293 *
1294 * This function handles traffic events
1295 */
1296static void isr_tr_complete_handler(struct ci_hdrc *ci)
1297__releases(ci->lock)
1298__acquires(ci->lock)
1299{
1300 unsigned i;
1301 int err;
1302
1303 for (i = 0; i < ci->hw_ep_max; i++) {
1304 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1305
1306 if (hwep->ep.desc == NULL)
1307 continue; /* not configured */
1308
1309 if (hw_test_and_clear_complete(ci, i)) {
1310 err = isr_tr_complete_low(hwep);
1311 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1312 if (err > 0) /* needs status phase */
1313 err = isr_setup_status_phase(ci);
1314 if (err < 0) {
1315 spin_unlock(&ci->lock);
1316 if (_ep_set_halt(&hwep->ep, 1, false))
1317 dev_err(ci->dev,
1318 "error: _ep_set_halt\n");
1319 spin_lock(&ci->lock);
1320 }
1321 }
1322 }
1323
1324 /* Only handle setup packet below */
1325 if (i == 0 &&
1326 hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
1327 isr_setup_packet_handler(ci);
1328 }
1329}
1330
1331/******************************************************************************
1332 * ENDPT block
1333 *****************************************************************************/
1334/*
1335 * ep_enable: configure endpoint, making it usable
1336 *
1337 * Check usb_ep_enable() at "usb_gadget.h" for details
1338 */
1339static int ep_enable(struct usb_ep *ep,
1340 const struct usb_endpoint_descriptor *desc)
1341{
1342 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1343 int retval = 0;
1344 unsigned long flags;
1345 u32 cap = 0;
1346
1347 if (ep == NULL || desc == NULL)
1348 return -EINVAL;
1349
1350 spin_lock_irqsave(hwep->lock, flags);
1351
1352 /* only internal SW should enable ctrl endpts */
1353
1354 if (!list_empty(&hwep->qh.queue)) {
1355 dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
1356 spin_unlock_irqrestore(hwep->lock, flags);
1357 return -EBUSY;
1358 }
1359
1360 hwep->ep.desc = desc;
1361
1362 hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
1363 hwep->num = usb_endpoint_num(desc);
1364 hwep->type = usb_endpoint_type(desc);
1365
1366 hwep->ep.maxpacket = usb_endpoint_maxp(desc);
1367 hwep->ep.mult = usb_endpoint_maxp_mult(desc);
1368
1369 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1370 cap |= QH_IOS;
1371
1372 cap |= QH_ZLT;
1373 cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
1374 /*
1375 * For ISO-TX, we set mult at QH as the largest value, and use
1376 * MultO at TD as real mult value.
1377 */
1378 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
1379 cap |= 3 << __ffs(QH_MULT);
1380
1381 hwep->qh.ptr->cap = cpu_to_le32(cap);
1382
1383 hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
1384
1385 if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1386 dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
1387 retval = -EINVAL;
1388 }
1389
1390 /*
1391 * Enable endpoints in the HW other than ep0 as ep0
1392 * is always enabled
1393 */
1394 if (hwep->num)
1395 retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
1396 hwep->type);
1397
1398 spin_unlock_irqrestore(hwep->lock, flags);
1399 return retval;
1400}
1401
1402/*
1403 * ep_disable: endpoint is no longer usable
1404 *
1405 * Check usb_ep_disable() at "usb_gadget.h" for details
1406 */
1407static int ep_disable(struct usb_ep *ep)
1408{
1409 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1410 int direction, retval = 0;
1411 unsigned long flags;
1412
1413 if (ep == NULL)
1414 return -EINVAL;
1415 else if (hwep->ep.desc == NULL)
1416 return -EBUSY;
1417
1418 spin_lock_irqsave(hwep->lock, flags);
1419 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1420 spin_unlock_irqrestore(hwep->lock, flags);
1421 return 0;
1422 }
1423
1424 /* only internal SW should disable ctrl endpts */
1425
1426 direction = hwep->dir;
1427 do {
1428 retval |= _ep_nuke(hwep);
1429 retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
1430
1431 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1432 hwep->dir = (hwep->dir == TX) ? RX : TX;
1433
1434 } while (hwep->dir != direction);
1435
1436 hwep->ep.desc = NULL;
1437
1438 spin_unlock_irqrestore(hwep->lock, flags);
1439 return retval;
1440}
1441
1442/*
1443 * ep_alloc_request: allocate a request object to use with this endpoint
1444 *
1445 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1446 */
1447static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1448{
1449 struct ci_hw_req *hwreq = NULL;
1450
1451 if (ep == NULL)
1452 return NULL;
1453
1454 hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
1455 if (hwreq != NULL) {
1456 INIT_LIST_HEAD(&hwreq->queue);
1457 INIT_LIST_HEAD(&hwreq->tds);
1458 }
1459
1460 return (hwreq == NULL) ? NULL : &hwreq->req;
1461}
1462
1463/*
1464 * ep_free_request: frees a request object
1465 *
1466 * Check usb_ep_free_request() at "usb_gadget.h" for details
1467 */
1468static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1469{
1470 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1471 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1472 struct td_node *node, *tmpnode;
1473 unsigned long flags;
1474
1475 if (ep == NULL || req == NULL) {
1476 return;
1477 } else if (!list_empty(&hwreq->queue)) {
1478 dev_err(hwep->ci->dev, "freeing queued request\n");
1479 return;
1480 }
1481
1482 spin_lock_irqsave(hwep->lock, flags);
1483
1484 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1485 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1486 list_del_init(&node->td);
1487 node->ptr = NULL;
1488 kfree(node);
1489 }
1490
1491 kfree(hwreq);
1492
1493 spin_unlock_irqrestore(hwep->lock, flags);
1494}
1495
1496/*
1497 * ep_queue: queues (submits) an I/O request to an endpoint
1498 *
1499 * Check usb_ep_queue()* at usb_gadget.h" for details
1500 */
1501static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1502 gfp_t __maybe_unused gfp_flags)
1503{
1504 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1505 int retval = 0;
1506 unsigned long flags;
1507
1508 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
1509 return -EINVAL;
1510
1511 spin_lock_irqsave(hwep->lock, flags);
1512 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1513 spin_unlock_irqrestore(hwep->lock, flags);
1514 return 0;
1515 }
1516 retval = _ep_queue(ep, req, gfp_flags);
1517 spin_unlock_irqrestore(hwep->lock, flags);
1518 return retval;
1519}
1520
1521/*
1522 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1523 *
1524 * Check usb_ep_dequeue() at "usb_gadget.h" for details
1525 */
1526static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1527{
1528 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1529 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1530 unsigned long flags;
1531 struct td_node *node, *tmpnode;
1532
1533 if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
1534 hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
1535 list_empty(&hwep->qh.queue))
1536 return -EINVAL;
1537
1538 spin_lock_irqsave(hwep->lock, flags);
1539 if (hwep->ci->gadget.speed != USB_SPEED_UNKNOWN)
1540 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1541
1542 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1543 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1544 list_del(&node->td);
1545 kfree(node);
1546 }
1547
1548 /* pop request */
1549 list_del_init(&hwreq->queue);
1550
1551 usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
1552
1553 req->status = -ECONNRESET;
1554
1555 if (hwreq->req.complete != NULL) {
1556 spin_unlock(hwep->lock);
1557 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
1558 spin_lock(hwep->lock);
1559 }
1560
1561 spin_unlock_irqrestore(hwep->lock, flags);
1562 return 0;
1563}
1564
1565/*
1566 * ep_set_halt: sets the endpoint halt feature
1567 *
1568 * Check usb_ep_set_halt() at "usb_gadget.h" for details
1569 */
1570static int ep_set_halt(struct usb_ep *ep, int value)
1571{
1572 return _ep_set_halt(ep, value, true);
1573}
1574
1575/*
1576 * ep_set_wedge: sets the halt feature and ignores clear requests
1577 *
1578 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1579 */
1580static int ep_set_wedge(struct usb_ep *ep)
1581{
1582 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1583 unsigned long flags;
1584
1585 if (ep == NULL || hwep->ep.desc == NULL)
1586 return -EINVAL;
1587
1588 spin_lock_irqsave(hwep->lock, flags);
1589 hwep->wedge = 1;
1590 spin_unlock_irqrestore(hwep->lock, flags);
1591
1592 return usb_ep_set_halt(ep);
1593}
1594
1595/*
1596 * ep_fifo_flush: flushes contents of a fifo
1597 *
1598 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1599 */
1600static void ep_fifo_flush(struct usb_ep *ep)
1601{
1602 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1603 unsigned long flags;
1604
1605 if (ep == NULL) {
1606 dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
1607 return;
1608 }
1609
1610 spin_lock_irqsave(hwep->lock, flags);
1611 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1612 spin_unlock_irqrestore(hwep->lock, flags);
1613 return;
1614 }
1615
1616 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1617
1618 spin_unlock_irqrestore(hwep->lock, flags);
1619}
1620
1621/*
1622 * Endpoint-specific part of the API to the USB controller hardware
1623 * Check "usb_gadget.h" for details
1624 */
1625static const struct usb_ep_ops usb_ep_ops = {
1626 .enable = ep_enable,
1627 .disable = ep_disable,
1628 .alloc_request = ep_alloc_request,
1629 .free_request = ep_free_request,
1630 .queue = ep_queue,
1631 .dequeue = ep_dequeue,
1632 .set_halt = ep_set_halt,
1633 .set_wedge = ep_set_wedge,
1634 .fifo_flush = ep_fifo_flush,
1635};
1636
1637/******************************************************************************
1638 * GADGET block
1639 *****************************************************************************/
1640/*
1641 * ci_hdrc_gadget_connect: caller makes sure gadget driver is binded
1642 */
1643static void ci_hdrc_gadget_connect(struct usb_gadget *_gadget, int is_active)
1644{
1645 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1646
1647 if (is_active) {
1648 pm_runtime_get_sync(ci->dev);
1649 hw_device_reset(ci);
1650 spin_lock_irq(&ci->lock);
1651 if (ci->driver) {
1652 hw_device_state(ci, ci->ep0out->qh.dma);
1653 usb_gadget_set_state(_gadget, USB_STATE_POWERED);
1654 spin_unlock_irq(&ci->lock);
1655 usb_udc_vbus_handler(_gadget, true);
1656 } else {
1657 spin_unlock_irq(&ci->lock);
1658 }
1659 } else {
1660 usb_udc_vbus_handler(_gadget, false);
1661 if (ci->driver)
1662 ci->driver->disconnect(&ci->gadget);
1663 hw_device_state(ci, 0);
1664 if (ci->platdata->notify_event)
1665 ci->platdata->notify_event(ci,
1666 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1667 _gadget_stop_activity(&ci->gadget);
1668 pm_runtime_put_sync(ci->dev);
1669 usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
1670 }
1671}
1672
1673static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1674{
1675 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1676 unsigned long flags;
1677 int ret = 0;
1678
1679 spin_lock_irqsave(&ci->lock, flags);
1680 ci->vbus_active = is_active;
1681 spin_unlock_irqrestore(&ci->lock, flags);
1682
1683 if (ci->usb_phy)
1684 usb_phy_set_charger_state(ci->usb_phy, is_active ?
1685 USB_CHARGER_PRESENT : USB_CHARGER_ABSENT);
1686
1687 if (ci->platdata->notify_event)
1688 ret = ci->platdata->notify_event(ci,
1689 CI_HDRC_CONTROLLER_VBUS_EVENT);
1690
1691 if (ci->driver)
1692 ci_hdrc_gadget_connect(_gadget, is_active);
1693
1694 return ret;
1695}
1696
1697static int ci_udc_wakeup(struct usb_gadget *_gadget)
1698{
1699 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1700 unsigned long flags;
1701 int ret = 0;
1702
1703 spin_lock_irqsave(&ci->lock, flags);
1704 if (ci->gadget.speed == USB_SPEED_UNKNOWN) {
1705 spin_unlock_irqrestore(&ci->lock, flags);
1706 return 0;
1707 }
1708 if (!ci->remote_wakeup) {
1709 ret = -EOPNOTSUPP;
1710 goto out;
1711 }
1712 if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
1713 ret = -EINVAL;
1714 goto out;
1715 }
1716 hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
1717out:
1718 spin_unlock_irqrestore(&ci->lock, flags);
1719 return ret;
1720}
1721
1722static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1723{
1724 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1725
1726 if (ci->usb_phy)
1727 return usb_phy_set_power(ci->usb_phy, ma);
1728 return -ENOTSUPP;
1729}
1730
1731static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
1732{
1733 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1734 struct ci_hw_ep *hwep = ci->ep0in;
1735 unsigned long flags;
1736
1737 spin_lock_irqsave(hwep->lock, flags);
1738 _gadget->is_selfpowered = (is_on != 0);
1739 spin_unlock_irqrestore(hwep->lock, flags);
1740
1741 return 0;
1742}
1743
1744/* Change Data+ pullup status
1745 * this func is used by usb_gadget_connect/disconnect
1746 */
1747static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
1748{
1749 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1750
1751 /*
1752 * Data+ pullup controlled by OTG state machine in OTG fsm mode;
1753 * and don't touch Data+ in host mode for dual role config.
1754 */
1755 if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST)
1756 return 0;
1757
1758 pm_runtime_get_sync(ci->dev);
1759 if (is_on)
1760 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
1761 else
1762 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1763 pm_runtime_put_sync(ci->dev);
1764
1765 return 0;
1766}
1767
1768static int ci_udc_start(struct usb_gadget *gadget,
1769 struct usb_gadget_driver *driver);
1770static int ci_udc_stop(struct usb_gadget *gadget);
1771
1772/* Match ISOC IN from the highest endpoint */
1773static struct usb_ep *ci_udc_match_ep(struct usb_gadget *gadget,
1774 struct usb_endpoint_descriptor *desc,
1775 struct usb_ss_ep_comp_descriptor *comp_desc)
1776{
1777 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1778 struct usb_ep *ep;
1779
1780 if (usb_endpoint_xfer_isoc(desc) && usb_endpoint_dir_in(desc)) {
1781 list_for_each_entry_reverse(ep, &ci->gadget.ep_list, ep_list) {
1782 if (ep->caps.dir_in && !ep->claimed)
1783 return ep;
1784 }
1785 }
1786
1787 return NULL;
1788}
1789
1790/*
1791 * Device operations part of the API to the USB controller hardware,
1792 * which don't involve endpoints (or i/o)
1793 * Check "usb_gadget.h" for details
1794 */
1795static const struct usb_gadget_ops usb_gadget_ops = {
1796 .vbus_session = ci_udc_vbus_session,
1797 .wakeup = ci_udc_wakeup,
1798 .set_selfpowered = ci_udc_selfpowered,
1799 .pullup = ci_udc_pullup,
1800 .vbus_draw = ci_udc_vbus_draw,
1801 .udc_start = ci_udc_start,
1802 .udc_stop = ci_udc_stop,
1803 .match_ep = ci_udc_match_ep,
1804};
1805
1806static int init_eps(struct ci_hdrc *ci)
1807{
1808 int retval = 0, i, j;
1809
1810 for (i = 0; i < ci->hw_ep_max/2; i++)
1811 for (j = RX; j <= TX; j++) {
1812 int k = i + j * ci->hw_ep_max/2;
1813 struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
1814
1815 scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
1816 (j == TX) ? "in" : "out");
1817
1818 hwep->ci = ci;
1819 hwep->lock = &ci->lock;
1820 hwep->td_pool = ci->td_pool;
1821
1822 hwep->ep.name = hwep->name;
1823 hwep->ep.ops = &usb_ep_ops;
1824
1825 if (i == 0) {
1826 hwep->ep.caps.type_control = true;
1827 } else {
1828 hwep->ep.caps.type_iso = true;
1829 hwep->ep.caps.type_bulk = true;
1830 hwep->ep.caps.type_int = true;
1831 }
1832
1833 if (j == TX)
1834 hwep->ep.caps.dir_in = true;
1835 else
1836 hwep->ep.caps.dir_out = true;
1837
1838 /*
1839 * for ep0: maxP defined in desc, for other
1840 * eps, maxP is set by epautoconfig() called
1841 * by gadget layer
1842 */
1843 usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
1844
1845 INIT_LIST_HEAD(&hwep->qh.queue);
1846 hwep->qh.ptr = dma_pool_zalloc(ci->qh_pool, GFP_KERNEL,
1847 &hwep->qh.dma);
1848 if (hwep->qh.ptr == NULL)
1849 retval = -ENOMEM;
1850
1851 /*
1852 * set up shorthands for ep0 out and in endpoints,
1853 * don't add to gadget's ep_list
1854 */
1855 if (i == 0) {
1856 if (j == RX)
1857 ci->ep0out = hwep;
1858 else
1859 ci->ep0in = hwep;
1860
1861 usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
1862 continue;
1863 }
1864
1865 list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
1866 }
1867
1868 return retval;
1869}
1870
1871static void destroy_eps(struct ci_hdrc *ci)
1872{
1873 int i;
1874
1875 for (i = 0; i < ci->hw_ep_max; i++) {
1876 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1877
1878 if (hwep->pending_td)
1879 free_pending_td(hwep);
1880 dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
1881 }
1882}
1883
1884/**
1885 * ci_udc_start: register a gadget driver
1886 * @gadget: our gadget
1887 * @driver: the driver being registered
1888 *
1889 * Interrupts are enabled here.
1890 */
1891static int ci_udc_start(struct usb_gadget *gadget,
1892 struct usb_gadget_driver *driver)
1893{
1894 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1895 int retval;
1896
1897 if (driver->disconnect == NULL)
1898 return -EINVAL;
1899
1900 ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
1901 retval = usb_ep_enable(&ci->ep0out->ep);
1902 if (retval)
1903 return retval;
1904
1905 ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
1906 retval = usb_ep_enable(&ci->ep0in->ep);
1907 if (retval)
1908 return retval;
1909
1910 ci->driver = driver;
1911
1912 /* Start otg fsm for B-device */
1913 if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
1914 ci_hdrc_otg_fsm_start(ci);
1915 return retval;
1916 }
1917
1918 if (ci->vbus_active)
1919 ci_hdrc_gadget_connect(gadget, 1);
1920 else
1921 usb_udc_vbus_handler(&ci->gadget, false);
1922
1923 return retval;
1924}
1925
1926static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
1927{
1928 if (!ci_otg_is_fsm_mode(ci))
1929 return;
1930
1931 mutex_lock(&ci->fsm.lock);
1932 if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
1933 ci->fsm.a_bidl_adis_tmout = 1;
1934 ci_hdrc_otg_fsm_start(ci);
1935 } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
1936 ci->fsm.protocol = PROTO_UNDEF;
1937 ci->fsm.otg->state = OTG_STATE_UNDEFINED;
1938 }
1939 mutex_unlock(&ci->fsm.lock);
1940}
1941
1942/*
1943 * ci_udc_stop: unregister a gadget driver
1944 */
1945static int ci_udc_stop(struct usb_gadget *gadget)
1946{
1947 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1948 unsigned long flags;
1949
1950 spin_lock_irqsave(&ci->lock, flags);
1951 ci->driver = NULL;
1952
1953 if (ci->vbus_active) {
1954 hw_device_state(ci, 0);
1955 spin_unlock_irqrestore(&ci->lock, flags);
1956 if (ci->platdata->notify_event)
1957 ci->platdata->notify_event(ci,
1958 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1959 _gadget_stop_activity(&ci->gadget);
1960 spin_lock_irqsave(&ci->lock, flags);
1961 pm_runtime_put(ci->dev);
1962 }
1963
1964 spin_unlock_irqrestore(&ci->lock, flags);
1965
1966 ci_udc_stop_for_otg_fsm(ci);
1967 return 0;
1968}
1969
1970/******************************************************************************
1971 * BUS block
1972 *****************************************************************************/
1973/*
1974 * udc_irq: ci interrupt handler
1975 *
1976 * This function returns IRQ_HANDLED if the IRQ has been handled
1977 * It locks access to registers
1978 */
1979static irqreturn_t udc_irq(struct ci_hdrc *ci)
1980{
1981 irqreturn_t retval;
1982 u32 intr;
1983
1984 if (ci == NULL)
1985 return IRQ_HANDLED;
1986
1987 spin_lock(&ci->lock);
1988
1989 if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
1990 if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
1991 USBMODE_CM_DC) {
1992 spin_unlock(&ci->lock);
1993 return IRQ_NONE;
1994 }
1995 }
1996 intr = hw_test_and_clear_intr_active(ci);
1997
1998 if (intr) {
1999 /* order defines priority - do NOT change it */
2000 if (USBi_URI & intr)
2001 isr_reset_handler(ci);
2002
2003 if (USBi_PCI & intr) {
2004 ci->gadget.speed = hw_port_is_high_speed(ci) ?
2005 USB_SPEED_HIGH : USB_SPEED_FULL;
2006 if (ci->suspended) {
2007 if (ci->driver->resume) {
2008 spin_unlock(&ci->lock);
2009 ci->driver->resume(&ci->gadget);
2010 spin_lock(&ci->lock);
2011 }
2012 ci->suspended = 0;
2013 usb_gadget_set_state(&ci->gadget,
2014 ci->resume_state);
2015 }
2016 }
2017
2018 if (USBi_UI & intr)
2019 isr_tr_complete_handler(ci);
2020
2021 if ((USBi_SLI & intr) && !(ci->suspended)) {
2022 ci->suspended = 1;
2023 ci->resume_state = ci->gadget.state;
2024 if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
2025 ci->driver->suspend) {
2026 spin_unlock(&ci->lock);
2027 ci->driver->suspend(&ci->gadget);
2028 spin_lock(&ci->lock);
2029 }
2030 usb_gadget_set_state(&ci->gadget,
2031 USB_STATE_SUSPENDED);
2032 }
2033 retval = IRQ_HANDLED;
2034 } else {
2035 retval = IRQ_NONE;
2036 }
2037 spin_unlock(&ci->lock);
2038
2039 return retval;
2040}
2041
2042/**
2043 * udc_start: initialize gadget role
2044 * @ci: chipidea controller
2045 */
2046static int udc_start(struct ci_hdrc *ci)
2047{
2048 struct device *dev = ci->dev;
2049 struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
2050 int retval = 0;
2051
2052 ci->gadget.ops = &usb_gadget_ops;
2053 ci->gadget.speed = USB_SPEED_UNKNOWN;
2054 ci->gadget.max_speed = USB_SPEED_HIGH;
2055 ci->gadget.name = ci->platdata->name;
2056 ci->gadget.otg_caps = otg_caps;
2057 ci->gadget.sg_supported = 1;
2058
2059 if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA)
2060 ci->gadget.quirk_avoids_skb_reserve = 1;
2061
2062 if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
2063 otg_caps->adp_support))
2064 ci->gadget.is_otg = 1;
2065
2066 INIT_LIST_HEAD(&ci->gadget.ep_list);
2067
2068 /* alloc resources */
2069 ci->qh_pool = dma_pool_create("ci_hw_qh", dev->parent,
2070 sizeof(struct ci_hw_qh),
2071 64, CI_HDRC_PAGE_SIZE);
2072 if (ci->qh_pool == NULL)
2073 return -ENOMEM;
2074
2075 ci->td_pool = dma_pool_create("ci_hw_td", dev->parent,
2076 sizeof(struct ci_hw_td),
2077 64, CI_HDRC_PAGE_SIZE);
2078 if (ci->td_pool == NULL) {
2079 retval = -ENOMEM;
2080 goto free_qh_pool;
2081 }
2082
2083 retval = init_eps(ci);
2084 if (retval)
2085 goto free_pools;
2086
2087 ci->gadget.ep0 = &ci->ep0in->ep;
2088
2089 retval = usb_add_gadget_udc(dev, &ci->gadget);
2090 if (retval)
2091 goto destroy_eps;
2092
2093 return retval;
2094
2095destroy_eps:
2096 destroy_eps(ci);
2097free_pools:
2098 dma_pool_destroy(ci->td_pool);
2099free_qh_pool:
2100 dma_pool_destroy(ci->qh_pool);
2101 return retval;
2102}
2103
2104/*
2105 * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
2106 *
2107 * No interrupts active, the IRQ has been released
2108 */
2109void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
2110{
2111 if (!ci->roles[CI_ROLE_GADGET])
2112 return;
2113
2114 usb_del_gadget_udc(&ci->gadget);
2115
2116 destroy_eps(ci);
2117
2118 dma_pool_destroy(ci->td_pool);
2119 dma_pool_destroy(ci->qh_pool);
2120}
2121
2122static int udc_id_switch_for_device(struct ci_hdrc *ci)
2123{
2124 if (ci->platdata->pins_device)
2125 pinctrl_select_state(ci->platdata->pctl,
2126 ci->platdata->pins_device);
2127
2128 if (ci->is_otg)
2129 /* Clear and enable BSV irq */
2130 hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
2131 OTGSC_BSVIS | OTGSC_BSVIE);
2132
2133 return 0;
2134}
2135
2136static void udc_id_switch_for_host(struct ci_hdrc *ci)
2137{
2138 /*
2139 * host doesn't care B_SESSION_VALID event
2140 * so clear and disbale BSV irq
2141 */
2142 if (ci->is_otg)
2143 hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
2144
2145 ci->vbus_active = 0;
2146
2147 if (ci->platdata->pins_device && ci->platdata->pins_default)
2148 pinctrl_select_state(ci->platdata->pctl,
2149 ci->platdata->pins_default);
2150}
2151
2152/**
2153 * ci_hdrc_gadget_init - initialize device related bits
2154 * @ci: the controller
2155 *
2156 * This function initializes the gadget, if the device is "device capable".
2157 */
2158int ci_hdrc_gadget_init(struct ci_hdrc *ci)
2159{
2160 struct ci_role_driver *rdrv;
2161 int ret;
2162
2163 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
2164 return -ENXIO;
2165
2166 rdrv = devm_kzalloc(ci->dev, sizeof(*rdrv), GFP_KERNEL);
2167 if (!rdrv)
2168 return -ENOMEM;
2169
2170 rdrv->start = udc_id_switch_for_device;
2171 rdrv->stop = udc_id_switch_for_host;
2172 rdrv->irq = udc_irq;
2173 rdrv->name = "gadget";
2174
2175 ret = udc_start(ci);
2176 if (!ret)
2177 ci->roles[CI_ROLE_GADGET] = rdrv;
2178
2179 return ret;
2180}