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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * ST M48T59 RTC driver
4 *
5 * Copyright (c) 2007 Wind River Systems, Inc.
6 *
7 * Author: Mark Zhan <rongkai.zhan@windriver.com>
8 */
9
10#include <linux/kernel.h>
11#include <linux/module.h>
12#include <linux/init.h>
13#include <linux/io.h>
14#include <linux/device.h>
15#include <linux/platform_device.h>
16#include <linux/rtc.h>
17#include <linux/rtc/m48t59.h>
18#include <linux/bcd.h>
19#include <linux/slab.h>
20
21#ifndef NO_IRQ
22#define NO_IRQ (-1)
23#endif
24
25#define M48T59_READ(reg) (pdata->read_byte(dev, pdata->offset + reg))
26#define M48T59_WRITE(val, reg) \
27 (pdata->write_byte(dev, pdata->offset + reg, val))
28
29#define M48T59_SET_BITS(mask, reg) \
30 M48T59_WRITE((M48T59_READ(reg) | (mask)), (reg))
31#define M48T59_CLEAR_BITS(mask, reg) \
32 M48T59_WRITE((M48T59_READ(reg) & ~(mask)), (reg))
33
34struct m48t59_private {
35 void __iomem *ioaddr;
36 int irq;
37 struct rtc_device *rtc;
38 spinlock_t lock; /* serialize the NVRAM and RTC access */
39};
40
41/*
42 * This is the generic access method when the chip is memory-mapped
43 */
44static void
45m48t59_mem_writeb(struct device *dev, u32 ofs, u8 val)
46{
47 struct m48t59_private *m48t59 = dev_get_drvdata(dev);
48
49 writeb(val, m48t59->ioaddr+ofs);
50}
51
52static u8
53m48t59_mem_readb(struct device *dev, u32 ofs)
54{
55 struct m48t59_private *m48t59 = dev_get_drvdata(dev);
56
57 return readb(m48t59->ioaddr+ofs);
58}
59
60/*
61 * NOTE: M48T59 only uses BCD mode
62 */
63static int m48t59_rtc_read_time(struct device *dev, struct rtc_time *tm)
64{
65 struct m48t59_plat_data *pdata = dev_get_platdata(dev);
66 struct m48t59_private *m48t59 = dev_get_drvdata(dev);
67 unsigned long flags;
68 u8 val;
69
70 spin_lock_irqsave(&m48t59->lock, flags);
71 /* Issue the READ command */
72 M48T59_SET_BITS(M48T59_CNTL_READ, M48T59_CNTL);
73
74 tm->tm_year = bcd2bin(M48T59_READ(M48T59_YEAR));
75 /* tm_mon is 0-11 */
76 tm->tm_mon = bcd2bin(M48T59_READ(M48T59_MONTH)) - 1;
77 tm->tm_mday = bcd2bin(M48T59_READ(M48T59_MDAY));
78
79 val = M48T59_READ(M48T59_WDAY);
80 if ((pdata->type == M48T59RTC_TYPE_M48T59) &&
81 (val & M48T59_WDAY_CEB) && (val & M48T59_WDAY_CB)) {
82 dev_dbg(dev, "Century bit is enabled\n");
83 tm->tm_year += 100; /* one century */
84 }
85#ifdef CONFIG_SPARC
86 /* Sun SPARC machines count years since 1968 */
87 tm->tm_year += 68;
88#endif
89
90 tm->tm_wday = bcd2bin(val & 0x07);
91 tm->tm_hour = bcd2bin(M48T59_READ(M48T59_HOUR) & 0x3F);
92 tm->tm_min = bcd2bin(M48T59_READ(M48T59_MIN) & 0x7F);
93 tm->tm_sec = bcd2bin(M48T59_READ(M48T59_SEC) & 0x7F);
94
95 /* Clear the READ bit */
96 M48T59_CLEAR_BITS(M48T59_CNTL_READ, M48T59_CNTL);
97 spin_unlock_irqrestore(&m48t59->lock, flags);
98
99 dev_dbg(dev, "RTC read time %ptR\n", tm);
100 return 0;
101}
102
103static int m48t59_rtc_set_time(struct device *dev, struct rtc_time *tm)
104{
105 struct m48t59_plat_data *pdata = dev_get_platdata(dev);
106 struct m48t59_private *m48t59 = dev_get_drvdata(dev);
107 unsigned long flags;
108 u8 val = 0;
109 int year = tm->tm_year;
110
111#ifdef CONFIG_SPARC
112 /* Sun SPARC machines count years since 1968 */
113 year -= 68;
114#endif
115
116 dev_dbg(dev, "RTC set time %04d-%02d-%02d %02d/%02d/%02d\n",
117 year + 1900, tm->tm_mon, tm->tm_mday,
118 tm->tm_hour, tm->tm_min, tm->tm_sec);
119
120 if (year < 0)
121 return -EINVAL;
122
123 spin_lock_irqsave(&m48t59->lock, flags);
124 /* Issue the WRITE command */
125 M48T59_SET_BITS(M48T59_CNTL_WRITE, M48T59_CNTL);
126
127 M48T59_WRITE((bin2bcd(tm->tm_sec) & 0x7F), M48T59_SEC);
128 M48T59_WRITE((bin2bcd(tm->tm_min) & 0x7F), M48T59_MIN);
129 M48T59_WRITE((bin2bcd(tm->tm_hour) & 0x3F), M48T59_HOUR);
130 M48T59_WRITE((bin2bcd(tm->tm_mday) & 0x3F), M48T59_MDAY);
131 /* tm_mon is 0-11 */
132 M48T59_WRITE((bin2bcd(tm->tm_mon + 1) & 0x1F), M48T59_MONTH);
133 M48T59_WRITE(bin2bcd(year % 100), M48T59_YEAR);
134
135 if (pdata->type == M48T59RTC_TYPE_M48T59 && (year / 100))
136 val = (M48T59_WDAY_CEB | M48T59_WDAY_CB);
137 val |= (bin2bcd(tm->tm_wday) & 0x07);
138 M48T59_WRITE(val, M48T59_WDAY);
139
140 /* Clear the WRITE bit */
141 M48T59_CLEAR_BITS(M48T59_CNTL_WRITE, M48T59_CNTL);
142 spin_unlock_irqrestore(&m48t59->lock, flags);
143 return 0;
144}
145
146/*
147 * Read alarm time and date in RTC
148 */
149static int m48t59_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
150{
151 struct m48t59_plat_data *pdata = dev_get_platdata(dev);
152 struct m48t59_private *m48t59 = dev_get_drvdata(dev);
153 struct rtc_time *tm = &alrm->time;
154 unsigned long flags;
155 u8 val;
156
157 /* If no irq, we don't support ALARM */
158 if (m48t59->irq == NO_IRQ)
159 return -EIO;
160
161 spin_lock_irqsave(&m48t59->lock, flags);
162 /* Issue the READ command */
163 M48T59_SET_BITS(M48T59_CNTL_READ, M48T59_CNTL);
164
165 tm->tm_year = bcd2bin(M48T59_READ(M48T59_YEAR));
166#ifdef CONFIG_SPARC
167 /* Sun SPARC machines count years since 1968 */
168 tm->tm_year += 68;
169#endif
170 /* tm_mon is 0-11 */
171 tm->tm_mon = bcd2bin(M48T59_READ(M48T59_MONTH)) - 1;
172
173 val = M48T59_READ(M48T59_WDAY);
174 if ((val & M48T59_WDAY_CEB) && (val & M48T59_WDAY_CB))
175 tm->tm_year += 100; /* one century */
176
177 tm->tm_mday = bcd2bin(M48T59_READ(M48T59_ALARM_DATE));
178 tm->tm_hour = bcd2bin(M48T59_READ(M48T59_ALARM_HOUR));
179 tm->tm_min = bcd2bin(M48T59_READ(M48T59_ALARM_MIN));
180 tm->tm_sec = bcd2bin(M48T59_READ(M48T59_ALARM_SEC));
181
182 /* Clear the READ bit */
183 M48T59_CLEAR_BITS(M48T59_CNTL_READ, M48T59_CNTL);
184 spin_unlock_irqrestore(&m48t59->lock, flags);
185
186 dev_dbg(dev, "RTC read alarm time %ptR\n", tm);
187 return rtc_valid_tm(tm);
188}
189
190/*
191 * Set alarm time and date in RTC
192 */
193static int m48t59_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
194{
195 struct m48t59_plat_data *pdata = dev_get_platdata(dev);
196 struct m48t59_private *m48t59 = dev_get_drvdata(dev);
197 struct rtc_time *tm = &alrm->time;
198 u8 mday, hour, min, sec;
199 unsigned long flags;
200 int year = tm->tm_year;
201
202#ifdef CONFIG_SPARC
203 /* Sun SPARC machines count years since 1968 */
204 year -= 68;
205#endif
206
207 /* If no irq, we don't support ALARM */
208 if (m48t59->irq == NO_IRQ)
209 return -EIO;
210
211 if (year < 0)
212 return -EINVAL;
213
214 /*
215 * 0xff means "always match"
216 */
217 mday = tm->tm_mday;
218 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
219 if (mday == 0xff)
220 mday = M48T59_READ(M48T59_MDAY);
221
222 hour = tm->tm_hour;
223 hour = (hour < 24) ? bin2bcd(hour) : 0x00;
224
225 min = tm->tm_min;
226 min = (min < 60) ? bin2bcd(min) : 0x00;
227
228 sec = tm->tm_sec;
229 sec = (sec < 60) ? bin2bcd(sec) : 0x00;
230
231 spin_lock_irqsave(&m48t59->lock, flags);
232 /* Issue the WRITE command */
233 M48T59_SET_BITS(M48T59_CNTL_WRITE, M48T59_CNTL);
234
235 M48T59_WRITE(mday, M48T59_ALARM_DATE);
236 M48T59_WRITE(hour, M48T59_ALARM_HOUR);
237 M48T59_WRITE(min, M48T59_ALARM_MIN);
238 M48T59_WRITE(sec, M48T59_ALARM_SEC);
239
240 /* Clear the WRITE bit */
241 M48T59_CLEAR_BITS(M48T59_CNTL_WRITE, M48T59_CNTL);
242 spin_unlock_irqrestore(&m48t59->lock, flags);
243
244 dev_dbg(dev, "RTC set alarm time %04d-%02d-%02d %02d/%02d/%02d\n",
245 year + 1900, tm->tm_mon, tm->tm_mday,
246 tm->tm_hour, tm->tm_min, tm->tm_sec);
247 return 0;
248}
249
250/*
251 * Handle commands from user-space
252 */
253static int m48t59_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
254{
255 struct m48t59_plat_data *pdata = dev_get_platdata(dev);
256 struct m48t59_private *m48t59 = dev_get_drvdata(dev);
257 unsigned long flags;
258
259 spin_lock_irqsave(&m48t59->lock, flags);
260 if (enabled)
261 M48T59_WRITE(M48T59_INTR_AFE, M48T59_INTR);
262 else
263 M48T59_WRITE(0x00, M48T59_INTR);
264 spin_unlock_irqrestore(&m48t59->lock, flags);
265
266 return 0;
267}
268
269static int m48t59_rtc_proc(struct device *dev, struct seq_file *seq)
270{
271 struct m48t59_plat_data *pdata = dev_get_platdata(dev);
272 struct m48t59_private *m48t59 = dev_get_drvdata(dev);
273 unsigned long flags;
274 u8 val;
275
276 spin_lock_irqsave(&m48t59->lock, flags);
277 val = M48T59_READ(M48T59_FLAGS);
278 spin_unlock_irqrestore(&m48t59->lock, flags);
279
280 seq_printf(seq, "battery\t\t: %s\n",
281 (val & M48T59_FLAGS_BF) ? "low" : "normal");
282 return 0;
283}
284
285/*
286 * IRQ handler for the RTC
287 */
288static irqreturn_t m48t59_rtc_interrupt(int irq, void *dev_id)
289{
290 struct device *dev = (struct device *)dev_id;
291 struct m48t59_plat_data *pdata = dev_get_platdata(dev);
292 struct m48t59_private *m48t59 = dev_get_drvdata(dev);
293 u8 event;
294
295 spin_lock(&m48t59->lock);
296 event = M48T59_READ(M48T59_FLAGS);
297 spin_unlock(&m48t59->lock);
298
299 if (event & M48T59_FLAGS_AF) {
300 rtc_update_irq(m48t59->rtc, 1, (RTC_AF | RTC_IRQF));
301 return IRQ_HANDLED;
302 }
303
304 return IRQ_NONE;
305}
306
307static const struct rtc_class_ops m48t59_rtc_ops = {
308 .read_time = m48t59_rtc_read_time,
309 .set_time = m48t59_rtc_set_time,
310 .read_alarm = m48t59_rtc_readalarm,
311 .set_alarm = m48t59_rtc_setalarm,
312 .proc = m48t59_rtc_proc,
313 .alarm_irq_enable = m48t59_rtc_alarm_irq_enable,
314};
315
316static const struct rtc_class_ops m48t02_rtc_ops = {
317 .read_time = m48t59_rtc_read_time,
318 .set_time = m48t59_rtc_set_time,
319};
320
321static int m48t59_nvram_read(void *priv, unsigned int offset, void *val,
322 size_t size)
323{
324 struct platform_device *pdev = priv;
325 struct device *dev = &pdev->dev;
326 struct m48t59_plat_data *pdata = dev_get_platdata(&pdev->dev);
327 struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
328 ssize_t cnt = 0;
329 unsigned long flags;
330 u8 *buf = val;
331
332 spin_lock_irqsave(&m48t59->lock, flags);
333
334 for (; cnt < size; cnt++)
335 *buf++ = M48T59_READ(cnt);
336
337 spin_unlock_irqrestore(&m48t59->lock, flags);
338
339 return 0;
340}
341
342static int m48t59_nvram_write(void *priv, unsigned int offset, void *val,
343 size_t size)
344{
345 struct platform_device *pdev = priv;
346 struct device *dev = &pdev->dev;
347 struct m48t59_plat_data *pdata = dev_get_platdata(&pdev->dev);
348 struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
349 ssize_t cnt = 0;
350 unsigned long flags;
351 u8 *buf = val;
352
353 spin_lock_irqsave(&m48t59->lock, flags);
354
355 for (; cnt < size; cnt++)
356 M48T59_WRITE(*buf++, cnt);
357
358 spin_unlock_irqrestore(&m48t59->lock, flags);
359
360 return 0;
361}
362
363static int m48t59_rtc_probe(struct platform_device *pdev)
364{
365 struct m48t59_plat_data *pdata = dev_get_platdata(&pdev->dev);
366 struct m48t59_private *m48t59 = NULL;
367 struct resource *res;
368 int ret = -ENOMEM;
369 const struct rtc_class_ops *ops;
370 struct nvmem_config nvmem_cfg = {
371 .name = "m48t59-",
372 .word_size = 1,
373 .stride = 1,
374 .reg_read = m48t59_nvram_read,
375 .reg_write = m48t59_nvram_write,
376 .priv = pdev,
377 };
378
379 /* This chip could be memory-mapped or I/O-mapped */
380 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
381 if (!res) {
382 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
383 if (!res)
384 return -EINVAL;
385 }
386
387 if (res->flags & IORESOURCE_IO) {
388 /* If we are I/O-mapped, the platform should provide
389 * the operations accessing chip registers.
390 */
391 if (!pdata || !pdata->write_byte || !pdata->read_byte)
392 return -EINVAL;
393 } else if (res->flags & IORESOURCE_MEM) {
394 /* we are memory-mapped */
395 if (!pdata) {
396 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata),
397 GFP_KERNEL);
398 if (!pdata)
399 return -ENOMEM;
400 /* Ensure we only kmalloc platform data once */
401 pdev->dev.platform_data = pdata;
402 }
403 if (!pdata->type)
404 pdata->type = M48T59RTC_TYPE_M48T59;
405
406 /* Try to use the generic memory read/write ops */
407 if (!pdata->write_byte)
408 pdata->write_byte = m48t59_mem_writeb;
409 if (!pdata->read_byte)
410 pdata->read_byte = m48t59_mem_readb;
411 }
412
413 m48t59 = devm_kzalloc(&pdev->dev, sizeof(*m48t59), GFP_KERNEL);
414 if (!m48t59)
415 return -ENOMEM;
416
417 m48t59->ioaddr = pdata->ioaddr;
418
419 if (!m48t59->ioaddr) {
420 /* ioaddr not mapped externally */
421 m48t59->ioaddr = devm_ioremap(&pdev->dev, res->start,
422 resource_size(res));
423 if (!m48t59->ioaddr)
424 return ret;
425 }
426
427 /* Try to get irq number. We also can work in
428 * the mode without IRQ.
429 */
430 m48t59->irq = platform_get_irq(pdev, 0);
431 if (m48t59->irq <= 0)
432 m48t59->irq = NO_IRQ;
433
434 if (m48t59->irq != NO_IRQ) {
435 ret = devm_request_irq(&pdev->dev, m48t59->irq,
436 m48t59_rtc_interrupt, IRQF_SHARED,
437 "rtc-m48t59", &pdev->dev);
438 if (ret)
439 return ret;
440 }
441 switch (pdata->type) {
442 case M48T59RTC_TYPE_M48T59:
443 ops = &m48t59_rtc_ops;
444 pdata->offset = 0x1ff0;
445 break;
446 case M48T59RTC_TYPE_M48T02:
447 ops = &m48t02_rtc_ops;
448 pdata->offset = 0x7f0;
449 break;
450 case M48T59RTC_TYPE_M48T08:
451 ops = &m48t02_rtc_ops;
452 pdata->offset = 0x1ff0;
453 break;
454 default:
455 dev_err(&pdev->dev, "Unknown RTC type\n");
456 return -ENODEV;
457 }
458
459 spin_lock_init(&m48t59->lock);
460 platform_set_drvdata(pdev, m48t59);
461
462 m48t59->rtc = devm_rtc_allocate_device(&pdev->dev);
463 if (IS_ERR(m48t59->rtc))
464 return PTR_ERR(m48t59->rtc);
465
466 m48t59->rtc->nvram_old_abi = true;
467 m48t59->rtc->ops = ops;
468
469 nvmem_cfg.size = pdata->offset;
470 ret = rtc_nvmem_register(m48t59->rtc, &nvmem_cfg);
471 if (ret)
472 return ret;
473
474 ret = rtc_register_device(m48t59->rtc);
475 if (ret)
476 return ret;
477
478 return 0;
479}
480
481/* work with hotplug and coldplug */
482MODULE_ALIAS("platform:rtc-m48t59");
483
484static struct platform_driver m48t59_rtc_driver = {
485 .driver = {
486 .name = "rtc-m48t59",
487 },
488 .probe = m48t59_rtc_probe,
489};
490
491module_platform_driver(m48t59_rtc_driver);
492
493MODULE_AUTHOR("Mark Zhan <rongkai.zhan@windriver.com>");
494MODULE_DESCRIPTION("M48T59/M48T02/M48T08 RTC driver");
495MODULE_LICENSE("GPL");
1/*
2 * ST M48T59 RTC driver
3 *
4 * Copyright (c) 2007 Wind River Systems, Inc.
5 *
6 * Author: Mark Zhan <rongkai.zhan@windriver.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/kernel.h>
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/io.h>
17#include <linux/device.h>
18#include <linux/platform_device.h>
19#include <linux/rtc.h>
20#include <linux/rtc/m48t59.h>
21#include <linux/bcd.h>
22#include <linux/slab.h>
23
24#ifndef NO_IRQ
25#define NO_IRQ (-1)
26#endif
27
28#define M48T59_READ(reg) (pdata->read_byte(dev, pdata->offset + reg))
29#define M48T59_WRITE(val, reg) \
30 (pdata->write_byte(dev, pdata->offset + reg, val))
31
32#define M48T59_SET_BITS(mask, reg) \
33 M48T59_WRITE((M48T59_READ(reg) | (mask)), (reg))
34#define M48T59_CLEAR_BITS(mask, reg) \
35 M48T59_WRITE((M48T59_READ(reg) & ~(mask)), (reg))
36
37struct m48t59_private {
38 void __iomem *ioaddr;
39 int irq;
40 struct rtc_device *rtc;
41 spinlock_t lock; /* serialize the NVRAM and RTC access */
42};
43
44/*
45 * This is the generic access method when the chip is memory-mapped
46 */
47static void
48m48t59_mem_writeb(struct device *dev, u32 ofs, u8 val)
49{
50 struct platform_device *pdev = to_platform_device(dev);
51 struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
52
53 writeb(val, m48t59->ioaddr+ofs);
54}
55
56static u8
57m48t59_mem_readb(struct device *dev, u32 ofs)
58{
59 struct platform_device *pdev = to_platform_device(dev);
60 struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
61
62 return readb(m48t59->ioaddr+ofs);
63}
64
65/*
66 * NOTE: M48T59 only uses BCD mode
67 */
68static int m48t59_rtc_read_time(struct device *dev, struct rtc_time *tm)
69{
70 struct platform_device *pdev = to_platform_device(dev);
71 struct m48t59_plat_data *pdata = pdev->dev.platform_data;
72 struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
73 unsigned long flags;
74 u8 val;
75
76 spin_lock_irqsave(&m48t59->lock, flags);
77 /* Issue the READ command */
78 M48T59_SET_BITS(M48T59_CNTL_READ, M48T59_CNTL);
79
80 tm->tm_year = bcd2bin(M48T59_READ(M48T59_YEAR));
81 /* tm_mon is 0-11 */
82 tm->tm_mon = bcd2bin(M48T59_READ(M48T59_MONTH)) - 1;
83 tm->tm_mday = bcd2bin(M48T59_READ(M48T59_MDAY));
84
85 val = M48T59_READ(M48T59_WDAY);
86 if ((pdata->type == M48T59RTC_TYPE_M48T59) &&
87 (val & M48T59_WDAY_CEB) && (val & M48T59_WDAY_CB)) {
88 dev_dbg(dev, "Century bit is enabled\n");
89 tm->tm_year += 100; /* one century */
90 }
91#ifdef CONFIG_SPARC
92 /* Sun SPARC machines count years since 1968 */
93 tm->tm_year += 68;
94#endif
95
96 tm->tm_wday = bcd2bin(val & 0x07);
97 tm->tm_hour = bcd2bin(M48T59_READ(M48T59_HOUR) & 0x3F);
98 tm->tm_min = bcd2bin(M48T59_READ(M48T59_MIN) & 0x7F);
99 tm->tm_sec = bcd2bin(M48T59_READ(M48T59_SEC) & 0x7F);
100
101 /* Clear the READ bit */
102 M48T59_CLEAR_BITS(M48T59_CNTL_READ, M48T59_CNTL);
103 spin_unlock_irqrestore(&m48t59->lock, flags);
104
105 dev_dbg(dev, "RTC read time %04d-%02d-%02d %02d/%02d/%02d\n",
106 tm->tm_year + 1900, tm->tm_mon, tm->tm_mday,
107 tm->tm_hour, tm->tm_min, tm->tm_sec);
108 return rtc_valid_tm(tm);
109}
110
111static int m48t59_rtc_set_time(struct device *dev, struct rtc_time *tm)
112{
113 struct platform_device *pdev = to_platform_device(dev);
114 struct m48t59_plat_data *pdata = pdev->dev.platform_data;
115 struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
116 unsigned long flags;
117 u8 val = 0;
118 int year = tm->tm_year;
119
120#ifdef CONFIG_SPARC
121 /* Sun SPARC machines count years since 1968 */
122 year -= 68;
123#endif
124
125 dev_dbg(dev, "RTC set time %04d-%02d-%02d %02d/%02d/%02d\n",
126 year + 1900, tm->tm_mon, tm->tm_mday,
127 tm->tm_hour, tm->tm_min, tm->tm_sec);
128
129 if (year < 0)
130 return -EINVAL;
131
132 spin_lock_irqsave(&m48t59->lock, flags);
133 /* Issue the WRITE command */
134 M48T59_SET_BITS(M48T59_CNTL_WRITE, M48T59_CNTL);
135
136 M48T59_WRITE((bin2bcd(tm->tm_sec) & 0x7F), M48T59_SEC);
137 M48T59_WRITE((bin2bcd(tm->tm_min) & 0x7F), M48T59_MIN);
138 M48T59_WRITE((bin2bcd(tm->tm_hour) & 0x3F), M48T59_HOUR);
139 M48T59_WRITE((bin2bcd(tm->tm_mday) & 0x3F), M48T59_MDAY);
140 /* tm_mon is 0-11 */
141 M48T59_WRITE((bin2bcd(tm->tm_mon + 1) & 0x1F), M48T59_MONTH);
142 M48T59_WRITE(bin2bcd(year % 100), M48T59_YEAR);
143
144 if (pdata->type == M48T59RTC_TYPE_M48T59 && (year / 100))
145 val = (M48T59_WDAY_CEB | M48T59_WDAY_CB);
146 val |= (bin2bcd(tm->tm_wday) & 0x07);
147 M48T59_WRITE(val, M48T59_WDAY);
148
149 /* Clear the WRITE bit */
150 M48T59_CLEAR_BITS(M48T59_CNTL_WRITE, M48T59_CNTL);
151 spin_unlock_irqrestore(&m48t59->lock, flags);
152 return 0;
153}
154
155/*
156 * Read alarm time and date in RTC
157 */
158static int m48t59_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
159{
160 struct platform_device *pdev = to_platform_device(dev);
161 struct m48t59_plat_data *pdata = pdev->dev.platform_data;
162 struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
163 struct rtc_time *tm = &alrm->time;
164 unsigned long flags;
165 u8 val;
166
167 /* If no irq, we don't support ALARM */
168 if (m48t59->irq == NO_IRQ)
169 return -EIO;
170
171 spin_lock_irqsave(&m48t59->lock, flags);
172 /* Issue the READ command */
173 M48T59_SET_BITS(M48T59_CNTL_READ, M48T59_CNTL);
174
175 tm->tm_year = bcd2bin(M48T59_READ(M48T59_YEAR));
176#ifdef CONFIG_SPARC
177 /* Sun SPARC machines count years since 1968 */
178 tm->tm_year += 68;
179#endif
180 /* tm_mon is 0-11 */
181 tm->tm_mon = bcd2bin(M48T59_READ(M48T59_MONTH)) - 1;
182
183 val = M48T59_READ(M48T59_WDAY);
184 if ((val & M48T59_WDAY_CEB) && (val & M48T59_WDAY_CB))
185 tm->tm_year += 100; /* one century */
186
187 tm->tm_mday = bcd2bin(M48T59_READ(M48T59_ALARM_DATE));
188 tm->tm_hour = bcd2bin(M48T59_READ(M48T59_ALARM_HOUR));
189 tm->tm_min = bcd2bin(M48T59_READ(M48T59_ALARM_MIN));
190 tm->tm_sec = bcd2bin(M48T59_READ(M48T59_ALARM_SEC));
191
192 /* Clear the READ bit */
193 M48T59_CLEAR_BITS(M48T59_CNTL_READ, M48T59_CNTL);
194 spin_unlock_irqrestore(&m48t59->lock, flags);
195
196 dev_dbg(dev, "RTC read alarm time %04d-%02d-%02d %02d/%02d/%02d\n",
197 tm->tm_year + 1900, tm->tm_mon, tm->tm_mday,
198 tm->tm_hour, tm->tm_min, tm->tm_sec);
199 return rtc_valid_tm(tm);
200}
201
202/*
203 * Set alarm time and date in RTC
204 */
205static int m48t59_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
206{
207 struct platform_device *pdev = to_platform_device(dev);
208 struct m48t59_plat_data *pdata = pdev->dev.platform_data;
209 struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
210 struct rtc_time *tm = &alrm->time;
211 u8 mday, hour, min, sec;
212 unsigned long flags;
213 int year = tm->tm_year;
214
215#ifdef CONFIG_SPARC
216 /* Sun SPARC machines count years since 1968 */
217 year -= 68;
218#endif
219
220 /* If no irq, we don't support ALARM */
221 if (m48t59->irq == NO_IRQ)
222 return -EIO;
223
224 if (year < 0)
225 return -EINVAL;
226
227 /*
228 * 0xff means "always match"
229 */
230 mday = tm->tm_mday;
231 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
232 if (mday == 0xff)
233 mday = M48T59_READ(M48T59_MDAY);
234
235 hour = tm->tm_hour;
236 hour = (hour < 24) ? bin2bcd(hour) : 0x00;
237
238 min = tm->tm_min;
239 min = (min < 60) ? bin2bcd(min) : 0x00;
240
241 sec = tm->tm_sec;
242 sec = (sec < 60) ? bin2bcd(sec) : 0x00;
243
244 spin_lock_irqsave(&m48t59->lock, flags);
245 /* Issue the WRITE command */
246 M48T59_SET_BITS(M48T59_CNTL_WRITE, M48T59_CNTL);
247
248 M48T59_WRITE(mday, M48T59_ALARM_DATE);
249 M48T59_WRITE(hour, M48T59_ALARM_HOUR);
250 M48T59_WRITE(min, M48T59_ALARM_MIN);
251 M48T59_WRITE(sec, M48T59_ALARM_SEC);
252
253 /* Clear the WRITE bit */
254 M48T59_CLEAR_BITS(M48T59_CNTL_WRITE, M48T59_CNTL);
255 spin_unlock_irqrestore(&m48t59->lock, flags);
256
257 dev_dbg(dev, "RTC set alarm time %04d-%02d-%02d %02d/%02d/%02d\n",
258 year + 1900, tm->tm_mon, tm->tm_mday,
259 tm->tm_hour, tm->tm_min, tm->tm_sec);
260 return 0;
261}
262
263/*
264 * Handle commands from user-space
265 */
266static int m48t59_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
267{
268 struct platform_device *pdev = to_platform_device(dev);
269 struct m48t59_plat_data *pdata = pdev->dev.platform_data;
270 struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
271 unsigned long flags;
272
273 spin_lock_irqsave(&m48t59->lock, flags);
274 if (enabled)
275 M48T59_WRITE(M48T59_INTR_AFE, M48T59_INTR);
276 else
277 M48T59_WRITE(0x00, M48T59_INTR);
278 spin_unlock_irqrestore(&m48t59->lock, flags);
279
280 return 0;
281}
282
283static int m48t59_rtc_proc(struct device *dev, struct seq_file *seq)
284{
285 struct platform_device *pdev = to_platform_device(dev);
286 struct m48t59_plat_data *pdata = pdev->dev.platform_data;
287 struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
288 unsigned long flags;
289 u8 val;
290
291 spin_lock_irqsave(&m48t59->lock, flags);
292 val = M48T59_READ(M48T59_FLAGS);
293 spin_unlock_irqrestore(&m48t59->lock, flags);
294
295 seq_printf(seq, "battery\t\t: %s\n",
296 (val & M48T59_FLAGS_BF) ? "low" : "normal");
297 return 0;
298}
299
300/*
301 * IRQ handler for the RTC
302 */
303static irqreturn_t m48t59_rtc_interrupt(int irq, void *dev_id)
304{
305 struct device *dev = (struct device *)dev_id;
306 struct platform_device *pdev = to_platform_device(dev);
307 struct m48t59_plat_data *pdata = pdev->dev.platform_data;
308 struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
309 u8 event;
310
311 spin_lock(&m48t59->lock);
312 event = M48T59_READ(M48T59_FLAGS);
313 spin_unlock(&m48t59->lock);
314
315 if (event & M48T59_FLAGS_AF) {
316 rtc_update_irq(m48t59->rtc, 1, (RTC_AF | RTC_IRQF));
317 return IRQ_HANDLED;
318 }
319
320 return IRQ_NONE;
321}
322
323static const struct rtc_class_ops m48t59_rtc_ops = {
324 .read_time = m48t59_rtc_read_time,
325 .set_time = m48t59_rtc_set_time,
326 .read_alarm = m48t59_rtc_readalarm,
327 .set_alarm = m48t59_rtc_setalarm,
328 .proc = m48t59_rtc_proc,
329 .alarm_irq_enable = m48t59_rtc_alarm_irq_enable,
330};
331
332static const struct rtc_class_ops m48t02_rtc_ops = {
333 .read_time = m48t59_rtc_read_time,
334 .set_time = m48t59_rtc_set_time,
335};
336
337static ssize_t m48t59_nvram_read(struct file *filp, struct kobject *kobj,
338 struct bin_attribute *bin_attr,
339 char *buf, loff_t pos, size_t size)
340{
341 struct device *dev = container_of(kobj, struct device, kobj);
342 struct platform_device *pdev = to_platform_device(dev);
343 struct m48t59_plat_data *pdata = pdev->dev.platform_data;
344 struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
345 ssize_t cnt = 0;
346 unsigned long flags;
347
348 for (; size > 0 && pos < pdata->offset; cnt++, size--) {
349 spin_lock_irqsave(&m48t59->lock, flags);
350 *buf++ = M48T59_READ(cnt);
351 spin_unlock_irqrestore(&m48t59->lock, flags);
352 }
353
354 return cnt;
355}
356
357static ssize_t m48t59_nvram_write(struct file *filp, struct kobject *kobj,
358 struct bin_attribute *bin_attr,
359 char *buf, loff_t pos, size_t size)
360{
361 struct device *dev = container_of(kobj, struct device, kobj);
362 struct platform_device *pdev = to_platform_device(dev);
363 struct m48t59_plat_data *pdata = pdev->dev.platform_data;
364 struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
365 ssize_t cnt = 0;
366 unsigned long flags;
367
368 for (; size > 0 && pos < pdata->offset; cnt++, size--) {
369 spin_lock_irqsave(&m48t59->lock, flags);
370 M48T59_WRITE(*buf++, cnt);
371 spin_unlock_irqrestore(&m48t59->lock, flags);
372 }
373
374 return cnt;
375}
376
377static struct bin_attribute m48t59_nvram_attr = {
378 .attr = {
379 .name = "nvram",
380 .mode = S_IRUGO | S_IWUSR,
381 },
382 .read = m48t59_nvram_read,
383 .write = m48t59_nvram_write,
384};
385
386static int __devinit m48t59_rtc_probe(struct platform_device *pdev)
387{
388 struct m48t59_plat_data *pdata = pdev->dev.platform_data;
389 struct m48t59_private *m48t59 = NULL;
390 struct resource *res;
391 int ret = -ENOMEM;
392 char *name;
393 const struct rtc_class_ops *ops;
394
395 /* This chip could be memory-mapped or I/O-mapped */
396 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
397 if (!res) {
398 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
399 if (!res)
400 return -EINVAL;
401 }
402
403 if (res->flags & IORESOURCE_IO) {
404 /* If we are I/O-mapped, the platform should provide
405 * the operations accessing chip registers.
406 */
407 if (!pdata || !pdata->write_byte || !pdata->read_byte)
408 return -EINVAL;
409 } else if (res->flags & IORESOURCE_MEM) {
410 /* we are memory-mapped */
411 if (!pdata) {
412 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
413 if (!pdata)
414 return -ENOMEM;
415 /* Ensure we only kmalloc platform data once */
416 pdev->dev.platform_data = pdata;
417 }
418 if (!pdata->type)
419 pdata->type = M48T59RTC_TYPE_M48T59;
420
421 /* Try to use the generic memory read/write ops */
422 if (!pdata->write_byte)
423 pdata->write_byte = m48t59_mem_writeb;
424 if (!pdata->read_byte)
425 pdata->read_byte = m48t59_mem_readb;
426 }
427
428 m48t59 = kzalloc(sizeof(*m48t59), GFP_KERNEL);
429 if (!m48t59)
430 return -ENOMEM;
431
432 m48t59->ioaddr = pdata->ioaddr;
433
434 if (!m48t59->ioaddr) {
435 /* ioaddr not mapped externally */
436 m48t59->ioaddr = ioremap(res->start, resource_size(res));
437 if (!m48t59->ioaddr)
438 goto out;
439 }
440
441 /* Try to get irq number. We also can work in
442 * the mode without IRQ.
443 */
444 m48t59->irq = platform_get_irq(pdev, 0);
445 if (m48t59->irq <= 0)
446 m48t59->irq = NO_IRQ;
447
448 if (m48t59->irq != NO_IRQ) {
449 ret = request_irq(m48t59->irq, m48t59_rtc_interrupt,
450 IRQF_SHARED, "rtc-m48t59", &pdev->dev);
451 if (ret)
452 goto out;
453 }
454 switch (pdata->type) {
455 case M48T59RTC_TYPE_M48T59:
456 name = "m48t59";
457 ops = &m48t59_rtc_ops;
458 pdata->offset = 0x1ff0;
459 break;
460 case M48T59RTC_TYPE_M48T02:
461 name = "m48t02";
462 ops = &m48t02_rtc_ops;
463 pdata->offset = 0x7f0;
464 break;
465 case M48T59RTC_TYPE_M48T08:
466 name = "m48t08";
467 ops = &m48t02_rtc_ops;
468 pdata->offset = 0x1ff0;
469 break;
470 default:
471 dev_err(&pdev->dev, "Unknown RTC type\n");
472 ret = -ENODEV;
473 goto out;
474 }
475
476 spin_lock_init(&m48t59->lock);
477 platform_set_drvdata(pdev, m48t59);
478
479 m48t59->rtc = rtc_device_register(name, &pdev->dev, ops, THIS_MODULE);
480 if (IS_ERR(m48t59->rtc)) {
481 ret = PTR_ERR(m48t59->rtc);
482 goto out;
483 }
484
485 m48t59_nvram_attr.size = pdata->offset;
486
487 ret = sysfs_create_bin_file(&pdev->dev.kobj, &m48t59_nvram_attr);
488 if (ret) {
489 rtc_device_unregister(m48t59->rtc);
490 goto out;
491 }
492
493 return 0;
494
495out:
496 if (m48t59->irq != NO_IRQ)
497 free_irq(m48t59->irq, &pdev->dev);
498 if (m48t59->ioaddr)
499 iounmap(m48t59->ioaddr);
500 kfree(m48t59);
501 return ret;
502}
503
504static int __devexit m48t59_rtc_remove(struct platform_device *pdev)
505{
506 struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
507 struct m48t59_plat_data *pdata = pdev->dev.platform_data;
508
509 sysfs_remove_bin_file(&pdev->dev.kobj, &m48t59_nvram_attr);
510 if (!IS_ERR(m48t59->rtc))
511 rtc_device_unregister(m48t59->rtc);
512 if (m48t59->ioaddr && !pdata->ioaddr)
513 iounmap(m48t59->ioaddr);
514 if (m48t59->irq != NO_IRQ)
515 free_irq(m48t59->irq, &pdev->dev);
516 platform_set_drvdata(pdev, NULL);
517 kfree(m48t59);
518 return 0;
519}
520
521/* work with hotplug and coldplug */
522MODULE_ALIAS("platform:rtc-m48t59");
523
524static struct platform_driver m48t59_rtc_driver = {
525 .driver = {
526 .name = "rtc-m48t59",
527 .owner = THIS_MODULE,
528 },
529 .probe = m48t59_rtc_probe,
530 .remove = __devexit_p(m48t59_rtc_remove),
531};
532
533static int __init m48t59_rtc_init(void)
534{
535 return platform_driver_register(&m48t59_rtc_driver);
536}
537
538static void __exit m48t59_rtc_exit(void)
539{
540 platform_driver_unregister(&m48t59_rtc_driver);
541}
542
543module_init(m48t59_rtc_init);
544module_exit(m48t59_rtc_exit);
545
546MODULE_AUTHOR("Mark Zhan <rongkai.zhan@windriver.com>");
547MODULE_DESCRIPTION("M48T59/M48T02/M48T08 RTC driver");
548MODULE_LICENSE("GPL");