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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * AXP20x pinctrl and GPIO driver
4 *
5 * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>
6 * Copyright (C) 2017 Quentin Schulz <quentin.schulz@free-electrons.com>
7 */
8
9#include <linux/bitops.h>
10#include <linux/device.h>
11#include <linux/gpio/driver.h>
12#include <linux/init.h>
13#include <linux/interrupt.h>
14#include <linux/kernel.h>
15#include <linux/mfd/axp20x.h>
16#include <linux/module.h>
17#include <linux/of.h>
18#include <linux/of_device.h>
19#include <linux/pinctrl/pinconf-generic.h>
20#include <linux/pinctrl/pinctrl.h>
21#include <linux/pinctrl/pinmux.h>
22#include <linux/platform_device.h>
23#include <linux/regmap.h>
24#include <linux/slab.h>
25
26#define AXP20X_GPIO_FUNCTIONS 0x7
27#define AXP20X_GPIO_FUNCTION_OUT_LOW 0
28#define AXP20X_GPIO_FUNCTION_OUT_HIGH 1
29#define AXP20X_GPIO_FUNCTION_INPUT 2
30
31#define AXP20X_FUNC_GPIO_OUT 0
32#define AXP20X_FUNC_GPIO_IN 1
33#define AXP20X_FUNC_LDO 2
34#define AXP20X_FUNC_ADC 3
35#define AXP20X_FUNCS_NB 4
36
37#define AXP20X_MUX_GPIO_OUT 0
38#define AXP20X_MUX_GPIO_IN BIT(1)
39#define AXP20X_MUX_ADC BIT(2)
40
41#define AXP813_MUX_ADC (BIT(2) | BIT(0))
42
43struct axp20x_pctrl_desc {
44 const struct pinctrl_pin_desc *pins;
45 unsigned int npins;
46 /* Stores the pins supporting LDO function. Bit offset is pin number. */
47 u8 ldo_mask;
48 /* Stores the pins supporting ADC function. Bit offset is pin number. */
49 u8 adc_mask;
50 u8 gpio_status_offset;
51 u8 adc_mux;
52};
53
54struct axp20x_pinctrl_function {
55 const char *name;
56 unsigned int muxval;
57 const char **groups;
58 unsigned int ngroups;
59};
60
61struct axp20x_pctl {
62 struct gpio_chip chip;
63 struct regmap *regmap;
64 struct pinctrl_dev *pctl_dev;
65 struct device *dev;
66 const struct axp20x_pctrl_desc *desc;
67 struct axp20x_pinctrl_function funcs[AXP20X_FUNCS_NB];
68};
69
70static const struct pinctrl_pin_desc axp209_pins[] = {
71 PINCTRL_PIN(0, "GPIO0"),
72 PINCTRL_PIN(1, "GPIO1"),
73 PINCTRL_PIN(2, "GPIO2"),
74};
75
76static const struct pinctrl_pin_desc axp813_pins[] = {
77 PINCTRL_PIN(0, "GPIO0"),
78 PINCTRL_PIN(1, "GPIO1"),
79};
80
81static const struct axp20x_pctrl_desc axp20x_data = {
82 .pins = axp209_pins,
83 .npins = ARRAY_SIZE(axp209_pins),
84 .ldo_mask = BIT(0) | BIT(1),
85 .adc_mask = BIT(0) | BIT(1),
86 .gpio_status_offset = 4,
87 .adc_mux = AXP20X_MUX_ADC,
88};
89
90static const struct axp20x_pctrl_desc axp813_data = {
91 .pins = axp813_pins,
92 .npins = ARRAY_SIZE(axp813_pins),
93 .ldo_mask = BIT(0) | BIT(1),
94 .adc_mask = BIT(0),
95 .gpio_status_offset = 0,
96 .adc_mux = AXP813_MUX_ADC,
97};
98
99static int axp20x_gpio_get_reg(unsigned int offset)
100{
101 switch (offset) {
102 case 0:
103 return AXP20X_GPIO0_CTRL;
104 case 1:
105 return AXP20X_GPIO1_CTRL;
106 case 2:
107 return AXP20X_GPIO2_CTRL;
108 }
109
110 return -EINVAL;
111}
112
113static int axp20x_gpio_input(struct gpio_chip *chip, unsigned int offset)
114{
115 return pinctrl_gpio_direction_input(chip->base + offset);
116}
117
118static int axp20x_gpio_get(struct gpio_chip *chip, unsigned int offset)
119{
120 struct axp20x_pctl *pctl = gpiochip_get_data(chip);
121 unsigned int val;
122 int ret;
123
124 ret = regmap_read(pctl->regmap, AXP20X_GPIO20_SS, &val);
125 if (ret)
126 return ret;
127
128 return !!(val & BIT(offset + pctl->desc->gpio_status_offset));
129}
130
131static int axp20x_gpio_get_direction(struct gpio_chip *chip,
132 unsigned int offset)
133{
134 struct axp20x_pctl *pctl = gpiochip_get_data(chip);
135 unsigned int val;
136 int reg, ret;
137
138 reg = axp20x_gpio_get_reg(offset);
139 if (reg < 0)
140 return reg;
141
142 ret = regmap_read(pctl->regmap, reg, &val);
143 if (ret)
144 return ret;
145
146 /*
147 * This shouldn't really happen if the pin is in use already,
148 * or if it's not in use yet, it doesn't matter since we're
149 * going to change the value soon anyway. Default to output.
150 */
151 if ((val & AXP20X_GPIO_FUNCTIONS) > 2)
152 return GPIO_LINE_DIRECTION_OUT;
153
154 /*
155 * The GPIO directions are the three lowest values.
156 * 2 is input, 0 and 1 are output
157 */
158 if (val & 2)
159 return GPIO_LINE_DIRECTION_IN;
160
161 return GPIO_LINE_DIRECTION_OUT;
162}
163
164static int axp20x_gpio_output(struct gpio_chip *chip, unsigned int offset,
165 int value)
166{
167 chip->set(chip, offset, value);
168
169 return 0;
170}
171
172static void axp20x_gpio_set(struct gpio_chip *chip, unsigned int offset,
173 int value)
174{
175 struct axp20x_pctl *pctl = gpiochip_get_data(chip);
176 int reg;
177
178 reg = axp20x_gpio_get_reg(offset);
179 if (reg < 0)
180 return;
181
182 regmap_update_bits(pctl->regmap, reg,
183 AXP20X_GPIO_FUNCTIONS,
184 value ? AXP20X_GPIO_FUNCTION_OUT_HIGH :
185 AXP20X_GPIO_FUNCTION_OUT_LOW);
186}
187
188static int axp20x_pmx_set(struct pinctrl_dev *pctldev, unsigned int offset,
189 u8 config)
190{
191 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
192 int reg;
193
194 reg = axp20x_gpio_get_reg(offset);
195 if (reg < 0)
196 return reg;
197
198 return regmap_update_bits(pctl->regmap, reg, AXP20X_GPIO_FUNCTIONS,
199 config);
200}
201
202static int axp20x_pmx_func_cnt(struct pinctrl_dev *pctldev)
203{
204 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
205
206 return ARRAY_SIZE(pctl->funcs);
207}
208
209static const char *axp20x_pmx_func_name(struct pinctrl_dev *pctldev,
210 unsigned int selector)
211{
212 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
213
214 return pctl->funcs[selector].name;
215}
216
217static int axp20x_pmx_func_groups(struct pinctrl_dev *pctldev,
218 unsigned int selector,
219 const char * const **groups,
220 unsigned int *num_groups)
221{
222 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
223
224 *groups = pctl->funcs[selector].groups;
225 *num_groups = pctl->funcs[selector].ngroups;
226
227 return 0;
228}
229
230static int axp20x_pmx_set_mux(struct pinctrl_dev *pctldev,
231 unsigned int function, unsigned int group)
232{
233 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
234 unsigned int mask;
235
236 /* Every pin supports GPIO_OUT and GPIO_IN functions */
237 if (function <= AXP20X_FUNC_GPIO_IN)
238 return axp20x_pmx_set(pctldev, group,
239 pctl->funcs[function].muxval);
240
241 if (function == AXP20X_FUNC_LDO)
242 mask = pctl->desc->ldo_mask;
243 else
244 mask = pctl->desc->adc_mask;
245
246 if (!(BIT(group) & mask))
247 return -EINVAL;
248
249 /*
250 * We let the regulator framework handle the LDO muxing as muxing bits
251 * are basically also regulators on/off bits. It's better not to enforce
252 * any state of the regulator when selecting LDO mux so that we don't
253 * interfere with the regulator driver.
254 */
255 if (function == AXP20X_FUNC_LDO)
256 return 0;
257
258 return axp20x_pmx_set(pctldev, group, pctl->funcs[function].muxval);
259}
260
261static int axp20x_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
262 struct pinctrl_gpio_range *range,
263 unsigned int offset, bool input)
264{
265 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
266
267 if (input)
268 return axp20x_pmx_set(pctldev, offset,
269 pctl->funcs[AXP20X_FUNC_GPIO_IN].muxval);
270
271 return axp20x_pmx_set(pctldev, offset,
272 pctl->funcs[AXP20X_FUNC_GPIO_OUT].muxval);
273}
274
275static const struct pinmux_ops axp20x_pmx_ops = {
276 .get_functions_count = axp20x_pmx_func_cnt,
277 .get_function_name = axp20x_pmx_func_name,
278 .get_function_groups = axp20x_pmx_func_groups,
279 .set_mux = axp20x_pmx_set_mux,
280 .gpio_set_direction = axp20x_pmx_gpio_set_direction,
281 .strict = true,
282};
283
284static int axp20x_groups_cnt(struct pinctrl_dev *pctldev)
285{
286 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
287
288 return pctl->desc->npins;
289}
290
291static int axp20x_group_pins(struct pinctrl_dev *pctldev, unsigned int selector,
292 const unsigned int **pins, unsigned int *num_pins)
293{
294 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
295
296 *pins = (unsigned int *)&pctl->desc->pins[selector];
297 *num_pins = 1;
298
299 return 0;
300}
301
302static const char *axp20x_group_name(struct pinctrl_dev *pctldev,
303 unsigned int selector)
304{
305 struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev);
306
307 return pctl->desc->pins[selector].name;
308}
309
310static const struct pinctrl_ops axp20x_pctrl_ops = {
311 .dt_node_to_map = pinconf_generic_dt_node_to_map_group,
312 .dt_free_map = pinconf_generic_dt_free_map,
313 .get_groups_count = axp20x_groups_cnt,
314 .get_group_name = axp20x_group_name,
315 .get_group_pins = axp20x_group_pins,
316};
317
318static int axp20x_funcs_groups_from_mask(struct device *dev, unsigned int mask,
319 unsigned int mask_len,
320 struct axp20x_pinctrl_function *func,
321 const struct pinctrl_pin_desc *pins)
322{
323 unsigned long int mask_cpy = mask;
324 const char **group;
325 unsigned int ngroups = hweight8(mask);
326 int bit;
327
328 func->ngroups = ngroups;
329 if (func->ngroups > 0) {
330 func->groups = devm_kcalloc(dev,
331 ngroups, sizeof(const char *),
332 GFP_KERNEL);
333 if (!func->groups)
334 return -ENOMEM;
335 group = func->groups;
336 for_each_set_bit(bit, &mask_cpy, mask_len) {
337 *group = pins[bit].name;
338 group++;
339 }
340 }
341
342 return 0;
343}
344
345static int axp20x_build_funcs_groups(struct platform_device *pdev)
346{
347 struct axp20x_pctl *pctl = platform_get_drvdata(pdev);
348 int i, ret, pin, npins = pctl->desc->npins;
349
350 pctl->funcs[AXP20X_FUNC_GPIO_OUT].name = "gpio_out";
351 pctl->funcs[AXP20X_FUNC_GPIO_OUT].muxval = AXP20X_MUX_GPIO_OUT;
352 pctl->funcs[AXP20X_FUNC_GPIO_IN].name = "gpio_in";
353 pctl->funcs[AXP20X_FUNC_GPIO_IN].muxval = AXP20X_MUX_GPIO_IN;
354 pctl->funcs[AXP20X_FUNC_LDO].name = "ldo";
355 /*
356 * Muxval for LDO is useless as we won't use it.
357 * See comment in axp20x_pmx_set_mux.
358 */
359 pctl->funcs[AXP20X_FUNC_ADC].name = "adc";
360 pctl->funcs[AXP20X_FUNC_ADC].muxval = pctl->desc->adc_mux;
361
362 /* Every pin supports GPIO_OUT and GPIO_IN functions */
363 for (i = 0; i <= AXP20X_FUNC_GPIO_IN; i++) {
364 pctl->funcs[i].ngroups = npins;
365 pctl->funcs[i].groups = devm_kcalloc(&pdev->dev,
366 npins, sizeof(char *),
367 GFP_KERNEL);
368 if (!pctl->funcs[i].groups)
369 return -ENOMEM;
370 for (pin = 0; pin < npins; pin++)
371 pctl->funcs[i].groups[pin] = pctl->desc->pins[pin].name;
372 }
373
374 ret = axp20x_funcs_groups_from_mask(&pdev->dev, pctl->desc->ldo_mask,
375 npins, &pctl->funcs[AXP20X_FUNC_LDO],
376 pctl->desc->pins);
377 if (ret)
378 return ret;
379
380 ret = axp20x_funcs_groups_from_mask(&pdev->dev, pctl->desc->adc_mask,
381 npins, &pctl->funcs[AXP20X_FUNC_ADC],
382 pctl->desc->pins);
383 if (ret)
384 return ret;
385
386 return 0;
387}
388
389static const struct of_device_id axp20x_pctl_match[] = {
390 { .compatible = "x-powers,axp209-gpio", .data = &axp20x_data, },
391 { .compatible = "x-powers,axp813-gpio", .data = &axp813_data, },
392 { }
393};
394MODULE_DEVICE_TABLE(of, axp20x_pctl_match);
395
396static int axp20x_pctl_probe(struct platform_device *pdev)
397{
398 struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent);
399 struct axp20x_pctl *pctl;
400 struct device *dev = &pdev->dev;
401 struct pinctrl_desc *pctrl_desc;
402 int ret;
403
404 if (!of_device_is_available(pdev->dev.of_node))
405 return -ENODEV;
406
407 if (!axp20x) {
408 dev_err(&pdev->dev, "Parent drvdata not set\n");
409 return -EINVAL;
410 }
411
412 pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
413 if (!pctl)
414 return -ENOMEM;
415
416 pctl->chip.base = -1;
417 pctl->chip.can_sleep = true;
418 pctl->chip.request = gpiochip_generic_request;
419 pctl->chip.free = gpiochip_generic_free;
420 pctl->chip.parent = &pdev->dev;
421 pctl->chip.label = dev_name(&pdev->dev);
422 pctl->chip.owner = THIS_MODULE;
423 pctl->chip.get = axp20x_gpio_get;
424 pctl->chip.get_direction = axp20x_gpio_get_direction;
425 pctl->chip.set = axp20x_gpio_set;
426 pctl->chip.direction_input = axp20x_gpio_input;
427 pctl->chip.direction_output = axp20x_gpio_output;
428
429 pctl->desc = of_device_get_match_data(dev);
430
431 pctl->chip.ngpio = pctl->desc->npins;
432
433 pctl->regmap = axp20x->regmap;
434 pctl->dev = &pdev->dev;
435
436 platform_set_drvdata(pdev, pctl);
437
438 ret = axp20x_build_funcs_groups(pdev);
439 if (ret) {
440 dev_err(&pdev->dev, "failed to build groups\n");
441 return ret;
442 }
443
444 pctrl_desc = devm_kzalloc(&pdev->dev, sizeof(*pctrl_desc), GFP_KERNEL);
445 if (!pctrl_desc)
446 return -ENOMEM;
447
448 pctrl_desc->name = dev_name(&pdev->dev);
449 pctrl_desc->owner = THIS_MODULE;
450 pctrl_desc->pins = pctl->desc->pins;
451 pctrl_desc->npins = pctl->desc->npins;
452 pctrl_desc->pctlops = &axp20x_pctrl_ops;
453 pctrl_desc->pmxops = &axp20x_pmx_ops;
454
455 pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, pctrl_desc, pctl);
456 if (IS_ERR(pctl->pctl_dev)) {
457 dev_err(&pdev->dev, "couldn't register pinctrl driver\n");
458 return PTR_ERR(pctl->pctl_dev);
459 }
460
461 ret = devm_gpiochip_add_data(&pdev->dev, &pctl->chip, pctl);
462 if (ret) {
463 dev_err(&pdev->dev, "Failed to register GPIO chip\n");
464 return ret;
465 }
466
467 ret = gpiochip_add_pin_range(&pctl->chip, dev_name(&pdev->dev),
468 pctl->desc->pins->number,
469 pctl->desc->pins->number,
470 pctl->desc->npins);
471 if (ret) {
472 dev_err(&pdev->dev, "failed to add pin range\n");
473 return ret;
474 }
475
476 dev_info(&pdev->dev, "AXP209 pinctrl and GPIO driver loaded\n");
477
478 return 0;
479}
480
481static struct platform_driver axp20x_pctl_driver = {
482 .probe = axp20x_pctl_probe,
483 .driver = {
484 .name = "axp20x-gpio",
485 .of_match_table = axp20x_pctl_match,
486 },
487};
488
489module_platform_driver(axp20x_pctl_driver);
490
491MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
492MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>");
493MODULE_DESCRIPTION("AXP20x PMIC pinctrl and GPIO driver");
494MODULE_LICENSE("GPL");