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Defined in 10 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_3_1_d.h, line 79 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h, line 80 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_d.h, line 77 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h, line 83 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h, line 99 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h, line 208 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h, line 396 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h, line 700 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h, line 813 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_offset.h, line 1199 (as a macro)