1/*
 2 * This file is subject to the terms and conditions of the GNU General Public
 3 * License.  See the file "COPYING" in the main directory of this archive
 4 * for more details.
 5 *
 6 * Copyright (C) 2003 Ralf Baechle
 7 * 6/2004	pf
 8 */
 9#ifndef __ASM_MACH_IP28_CPU_FEATURE_OVERRIDES_H
10#define __ASM_MACH_IP28_CPU_FEATURE_OVERRIDES_H
11
12#include <asm/cpu.h>
13
14/*
15 * IP28 only comes with R10000 family processors all using the same config
16 */
17#define cpu_has_watch		1
18#define cpu_has_mips16		0
19#define cpu_has_mips16e2	0
20#define cpu_has_divec		0
21#define cpu_has_vce		0
22#define cpu_has_cache_cdex_p	0
23#define cpu_has_cache_cdex_s	0
24#define cpu_has_prefetch	1
25#define cpu_has_mcheck		0
26#define cpu_has_ejtag		0
27
28#define cpu_has_llsc		1
29#define cpu_has_vtag_icache	0
30#define cpu_has_dc_aliases	0 /* see probe_pcache() */
31#define cpu_has_ic_fills_f_dc	0
32#define cpu_has_dsp		0
33#define cpu_has_dsp2		0
34#define cpu_icache_snoops_remote_store	1
35#define cpu_has_mipsmt		0
36#define cpu_has_userlocal	0
37
38#define cpu_has_nofpuex		0
39#define cpu_has_64bits		1
40
41#define cpu_has_4kex		1
42#define cpu_has_4k_cache	1
43
44#define cpu_has_inclusive_pcaches	1
45
46#define cpu_dcache_line_size()	32
47#define cpu_icache_line_size()	64
48
49#define cpu_has_mips32r1	0
50#define cpu_has_mips32r2	0
51#define cpu_has_mips64r1	0
52#define cpu_has_mips64r2	0
53
54#endif /* __ASM_MACH_IP28_CPU_FEATURE_OVERRIDES_H */