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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Atheros AR933X SoC built-in UART driver
4 *
5 * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
6 *
7 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 */
9
10#include <linux/module.h>
11#include <linux/ioport.h>
12#include <linux/init.h>
13#include <linux/console.h>
14#include <linux/sysrq.h>
15#include <linux/delay.h>
16#include <linux/platform_device.h>
17#include <linux/of.h>
18#include <linux/of_platform.h>
19#include <linux/tty.h>
20#include <linux/tty_flip.h>
21#include <linux/serial_core.h>
22#include <linux/serial.h>
23#include <linux/slab.h>
24#include <linux/io.h>
25#include <linux/irq.h>
26#include <linux/clk.h>
27
28#include <asm/div64.h>
29
30#include <asm/mach-ath79/ar933x_uart.h>
31
32#define DRIVER_NAME "ar933x-uart"
33
34#define AR933X_UART_MAX_SCALE 0xff
35#define AR933X_UART_MAX_STEP 0xffff
36
37#define AR933X_UART_MIN_BAUD 300
38#define AR933X_UART_MAX_BAUD 3000000
39
40#define AR933X_DUMMY_STATUS_RD 0x01
41
42static struct uart_driver ar933x_uart_driver;
43
44struct ar933x_uart_port {
45 struct uart_port port;
46 unsigned int ier; /* shadow Interrupt Enable Register */
47 unsigned int min_baud;
48 unsigned int max_baud;
49 struct clk *clk;
50};
51
52static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up,
53 int offset)
54{
55 return readl(up->port.membase + offset);
56}
57
58static inline void ar933x_uart_write(struct ar933x_uart_port *up,
59 int offset, unsigned int value)
60{
61 writel(value, up->port.membase + offset);
62}
63
64static inline void ar933x_uart_rmw(struct ar933x_uart_port *up,
65 unsigned int offset,
66 unsigned int mask,
67 unsigned int val)
68{
69 unsigned int t;
70
71 t = ar933x_uart_read(up, offset);
72 t &= ~mask;
73 t |= val;
74 ar933x_uart_write(up, offset, t);
75}
76
77static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up,
78 unsigned int offset,
79 unsigned int val)
80{
81 ar933x_uart_rmw(up, offset, 0, val);
82}
83
84static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up,
85 unsigned int offset,
86 unsigned int val)
87{
88 ar933x_uart_rmw(up, offset, val, 0);
89}
90
91static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up)
92{
93 up->ier |= AR933X_UART_INT_TX_EMPTY;
94 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
95}
96
97static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up)
98{
99 up->ier &= ~AR933X_UART_INT_TX_EMPTY;
100 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
101}
102
103static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch)
104{
105 unsigned int rdata;
106
107 rdata = ch & AR933X_UART_DATA_TX_RX_MASK;
108 rdata |= AR933X_UART_DATA_TX_CSR;
109 ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
110}
111
112static unsigned int ar933x_uart_tx_empty(struct uart_port *port)
113{
114 struct ar933x_uart_port *up =
115 container_of(port, struct ar933x_uart_port, port);
116 unsigned long flags;
117 unsigned int rdata;
118
119 spin_lock_irqsave(&up->port.lock, flags);
120 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
121 spin_unlock_irqrestore(&up->port.lock, flags);
122
123 return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT;
124}
125
126static unsigned int ar933x_uart_get_mctrl(struct uart_port *port)
127{
128 return TIOCM_CAR;
129}
130
131static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
132{
133}
134
135static void ar933x_uart_start_tx(struct uart_port *port)
136{
137 struct ar933x_uart_port *up =
138 container_of(port, struct ar933x_uart_port, port);
139
140 ar933x_uart_start_tx_interrupt(up);
141}
142
143static void ar933x_uart_stop_tx(struct uart_port *port)
144{
145 struct ar933x_uart_port *up =
146 container_of(port, struct ar933x_uart_port, port);
147
148 ar933x_uart_stop_tx_interrupt(up);
149}
150
151static void ar933x_uart_stop_rx(struct uart_port *port)
152{
153 struct ar933x_uart_port *up =
154 container_of(port, struct ar933x_uart_port, port);
155
156 up->ier &= ~AR933X_UART_INT_RX_VALID;
157 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
158}
159
160static void ar933x_uart_break_ctl(struct uart_port *port, int break_state)
161{
162 struct ar933x_uart_port *up =
163 container_of(port, struct ar933x_uart_port, port);
164 unsigned long flags;
165
166 spin_lock_irqsave(&up->port.lock, flags);
167 if (break_state == -1)
168 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
169 AR933X_UART_CS_TX_BREAK);
170 else
171 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
172 AR933X_UART_CS_TX_BREAK);
173 spin_unlock_irqrestore(&up->port.lock, flags);
174}
175
176/*
177 * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17))
178 */
179static unsigned long ar933x_uart_get_baud(unsigned int clk,
180 unsigned int scale,
181 unsigned int step)
182{
183 u64 t;
184 u32 div;
185
186 div = (2 << 16) * (scale + 1);
187 t = clk;
188 t *= step;
189 t += (div / 2);
190 do_div(t, div);
191
192 return t;
193}
194
195static void ar933x_uart_get_scale_step(unsigned int clk,
196 unsigned int baud,
197 unsigned int *scale,
198 unsigned int *step)
199{
200 unsigned int tscale;
201 long min_diff;
202
203 *scale = 0;
204 *step = 0;
205
206 min_diff = baud;
207 for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) {
208 u64 tstep;
209 int diff;
210
211 tstep = baud * (tscale + 1);
212 tstep *= (2 << 16);
213 do_div(tstep, clk);
214
215 if (tstep > AR933X_UART_MAX_STEP)
216 break;
217
218 diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud);
219 if (diff < min_diff) {
220 min_diff = diff;
221 *scale = tscale;
222 *step = tstep;
223 }
224 }
225}
226
227static void ar933x_uart_set_termios(struct uart_port *port,
228 struct ktermios *new,
229 struct ktermios *old)
230{
231 struct ar933x_uart_port *up =
232 container_of(port, struct ar933x_uart_port, port);
233 unsigned int cs;
234 unsigned long flags;
235 unsigned int baud, scale, step;
236
237 /* Only CS8 is supported */
238 new->c_cflag &= ~CSIZE;
239 new->c_cflag |= CS8;
240
241 /* Only one stop bit is supported */
242 new->c_cflag &= ~CSTOPB;
243
244 cs = 0;
245 if (new->c_cflag & PARENB) {
246 if (!(new->c_cflag & PARODD))
247 cs |= AR933X_UART_CS_PARITY_EVEN;
248 else
249 cs |= AR933X_UART_CS_PARITY_ODD;
250 } else {
251 cs |= AR933X_UART_CS_PARITY_NONE;
252 }
253
254 /* Mark/space parity is not supported */
255 new->c_cflag &= ~CMSPAR;
256
257 baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud);
258 ar933x_uart_get_scale_step(port->uartclk, baud, &scale, &step);
259
260 /*
261 * Ok, we're now changing the port state. Do it with
262 * interrupts disabled.
263 */
264 spin_lock_irqsave(&up->port.lock, flags);
265
266 /* disable the UART */
267 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
268 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S);
269
270 /* Update the per-port timeout. */
271 uart_update_timeout(port, new->c_cflag, baud);
272
273 up->port.ignore_status_mask = 0;
274
275 /* ignore all characters if CREAD is not set */
276 if ((new->c_cflag & CREAD) == 0)
277 up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD;
278
279 ar933x_uart_write(up, AR933X_UART_CLOCK_REG,
280 scale << AR933X_UART_CLOCK_SCALE_S | step);
281
282 /* setup configuration register */
283 ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs);
284
285 /* enable host interrupt */
286 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
287 AR933X_UART_CS_HOST_INT_EN);
288
289 /* reenable the UART */
290 ar933x_uart_rmw(up, AR933X_UART_CS_REG,
291 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S,
292 AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S);
293
294 spin_unlock_irqrestore(&up->port.lock, flags);
295
296 if (tty_termios_baud_rate(new))
297 tty_termios_encode_baud_rate(new, baud, baud);
298}
299
300static void ar933x_uart_rx_chars(struct ar933x_uart_port *up)
301{
302 struct tty_port *port = &up->port.state->port;
303 int max_count = 256;
304
305 do {
306 unsigned int rdata;
307 unsigned char ch;
308
309 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
310 if ((rdata & AR933X_UART_DATA_RX_CSR) == 0)
311 break;
312
313 /* remove the character from the FIFO */
314 ar933x_uart_write(up, AR933X_UART_DATA_REG,
315 AR933X_UART_DATA_RX_CSR);
316
317 up->port.icount.rx++;
318 ch = rdata & AR933X_UART_DATA_TX_RX_MASK;
319
320 if (uart_handle_sysrq_char(&up->port, ch))
321 continue;
322
323 if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0)
324 tty_insert_flip_char(port, ch, TTY_NORMAL);
325 } while (max_count-- > 0);
326
327 spin_unlock(&up->port.lock);
328 tty_flip_buffer_push(port);
329 spin_lock(&up->port.lock);
330}
331
332static void ar933x_uart_tx_chars(struct ar933x_uart_port *up)
333{
334 struct circ_buf *xmit = &up->port.state->xmit;
335 int count;
336
337 if (uart_tx_stopped(&up->port))
338 return;
339
340 count = up->port.fifosize;
341 do {
342 unsigned int rdata;
343
344 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
345 if ((rdata & AR933X_UART_DATA_TX_CSR) == 0)
346 break;
347
348 if (up->port.x_char) {
349 ar933x_uart_putc(up, up->port.x_char);
350 up->port.icount.tx++;
351 up->port.x_char = 0;
352 continue;
353 }
354
355 if (uart_circ_empty(xmit))
356 break;
357
358 ar933x_uart_putc(up, xmit->buf[xmit->tail]);
359
360 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
361 up->port.icount.tx++;
362 } while (--count > 0);
363
364 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
365 uart_write_wakeup(&up->port);
366
367 if (!uart_circ_empty(xmit))
368 ar933x_uart_start_tx_interrupt(up);
369}
370
371static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id)
372{
373 struct ar933x_uart_port *up = dev_id;
374 unsigned int status;
375
376 status = ar933x_uart_read(up, AR933X_UART_CS_REG);
377 if ((status & AR933X_UART_CS_HOST_INT) == 0)
378 return IRQ_NONE;
379
380 spin_lock(&up->port.lock);
381
382 status = ar933x_uart_read(up, AR933X_UART_INT_REG);
383 status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
384
385 if (status & AR933X_UART_INT_RX_VALID) {
386 ar933x_uart_write(up, AR933X_UART_INT_REG,
387 AR933X_UART_INT_RX_VALID);
388 ar933x_uart_rx_chars(up);
389 }
390
391 if (status & AR933X_UART_INT_TX_EMPTY) {
392 ar933x_uart_write(up, AR933X_UART_INT_REG,
393 AR933X_UART_INT_TX_EMPTY);
394 ar933x_uart_stop_tx_interrupt(up);
395 ar933x_uart_tx_chars(up);
396 }
397
398 spin_unlock(&up->port.lock);
399
400 return IRQ_HANDLED;
401}
402
403static int ar933x_uart_startup(struct uart_port *port)
404{
405 struct ar933x_uart_port *up =
406 container_of(port, struct ar933x_uart_port, port);
407 unsigned long flags;
408 int ret;
409
410 ret = request_irq(up->port.irq, ar933x_uart_interrupt,
411 up->port.irqflags, dev_name(up->port.dev), up);
412 if (ret)
413 return ret;
414
415 spin_lock_irqsave(&up->port.lock, flags);
416
417 /* Enable HOST interrupts */
418 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
419 AR933X_UART_CS_HOST_INT_EN);
420
421 /* Enable RX interrupts */
422 up->ier = AR933X_UART_INT_RX_VALID;
423 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
424
425 spin_unlock_irqrestore(&up->port.lock, flags);
426
427 return 0;
428}
429
430static void ar933x_uart_shutdown(struct uart_port *port)
431{
432 struct ar933x_uart_port *up =
433 container_of(port, struct ar933x_uart_port, port);
434
435 /* Disable all interrupts */
436 up->ier = 0;
437 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
438
439 /* Disable break condition */
440 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
441 AR933X_UART_CS_TX_BREAK);
442
443 free_irq(up->port.irq, up);
444}
445
446static const char *ar933x_uart_type(struct uart_port *port)
447{
448 return (port->type == PORT_AR933X) ? "AR933X UART" : NULL;
449}
450
451static void ar933x_uart_release_port(struct uart_port *port)
452{
453 /* Nothing to release ... */
454}
455
456static int ar933x_uart_request_port(struct uart_port *port)
457{
458 /* UARTs always present */
459 return 0;
460}
461
462static void ar933x_uart_config_port(struct uart_port *port, int flags)
463{
464 if (flags & UART_CONFIG_TYPE)
465 port->type = PORT_AR933X;
466}
467
468static int ar933x_uart_verify_port(struct uart_port *port,
469 struct serial_struct *ser)
470{
471 struct ar933x_uart_port *up =
472 container_of(port, struct ar933x_uart_port, port);
473
474 if (ser->type != PORT_UNKNOWN &&
475 ser->type != PORT_AR933X)
476 return -EINVAL;
477
478 if (ser->irq < 0 || ser->irq >= NR_IRQS)
479 return -EINVAL;
480
481 if (ser->baud_base < up->min_baud ||
482 ser->baud_base > up->max_baud)
483 return -EINVAL;
484
485 return 0;
486}
487
488static const struct uart_ops ar933x_uart_ops = {
489 .tx_empty = ar933x_uart_tx_empty,
490 .set_mctrl = ar933x_uart_set_mctrl,
491 .get_mctrl = ar933x_uart_get_mctrl,
492 .stop_tx = ar933x_uart_stop_tx,
493 .start_tx = ar933x_uart_start_tx,
494 .stop_rx = ar933x_uart_stop_rx,
495 .break_ctl = ar933x_uart_break_ctl,
496 .startup = ar933x_uart_startup,
497 .shutdown = ar933x_uart_shutdown,
498 .set_termios = ar933x_uart_set_termios,
499 .type = ar933x_uart_type,
500 .release_port = ar933x_uart_release_port,
501 .request_port = ar933x_uart_request_port,
502 .config_port = ar933x_uart_config_port,
503 .verify_port = ar933x_uart_verify_port,
504};
505
506#ifdef CONFIG_SERIAL_AR933X_CONSOLE
507static struct ar933x_uart_port *
508ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS];
509
510static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up)
511{
512 unsigned int status;
513 unsigned int timeout = 60000;
514
515 /* Wait up to 60ms for the character(s) to be sent. */
516 do {
517 status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
518 if (--timeout == 0)
519 break;
520 udelay(1);
521 } while ((status & AR933X_UART_DATA_TX_CSR) == 0);
522}
523
524static void ar933x_uart_console_putchar(struct uart_port *port, int ch)
525{
526 struct ar933x_uart_port *up =
527 container_of(port, struct ar933x_uart_port, port);
528
529 ar933x_uart_wait_xmitr(up);
530 ar933x_uart_putc(up, ch);
531}
532
533static void ar933x_uart_console_write(struct console *co, const char *s,
534 unsigned int count)
535{
536 struct ar933x_uart_port *up = ar933x_console_ports[co->index];
537 unsigned long flags;
538 unsigned int int_en;
539 int locked = 1;
540
541 local_irq_save(flags);
542
543 if (up->port.sysrq)
544 locked = 0;
545 else if (oops_in_progress)
546 locked = spin_trylock(&up->port.lock);
547 else
548 spin_lock(&up->port.lock);
549
550 /*
551 * First save the IER then disable the interrupts
552 */
553 int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
554 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0);
555
556 uart_console_write(&up->port, s, count, ar933x_uart_console_putchar);
557
558 /*
559 * Finally, wait for transmitter to become empty
560 * and restore the IER
561 */
562 ar933x_uart_wait_xmitr(up);
563 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en);
564
565 ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);
566
567 if (locked)
568 spin_unlock(&up->port.lock);
569
570 local_irq_restore(flags);
571}
572
573static int ar933x_uart_console_setup(struct console *co, char *options)
574{
575 struct ar933x_uart_port *up;
576 int baud = 115200;
577 int bits = 8;
578 int parity = 'n';
579 int flow = 'n';
580
581 if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS)
582 return -EINVAL;
583
584 up = ar933x_console_ports[co->index];
585 if (!up)
586 return -ENODEV;
587
588 if (options)
589 uart_parse_options(options, &baud, &parity, &bits, &flow);
590
591 return uart_set_options(&up->port, co, baud, parity, bits, flow);
592}
593
594static struct console ar933x_uart_console = {
595 .name = "ttyATH",
596 .write = ar933x_uart_console_write,
597 .device = uart_console_device,
598 .setup = ar933x_uart_console_setup,
599 .flags = CON_PRINTBUFFER,
600 .index = -1,
601 .data = &ar933x_uart_driver,
602};
603#endif /* CONFIG_SERIAL_AR933X_CONSOLE */
604
605static struct uart_driver ar933x_uart_driver = {
606 .owner = THIS_MODULE,
607 .driver_name = DRIVER_NAME,
608 .dev_name = "ttyATH",
609 .nr = CONFIG_SERIAL_AR933X_NR_UARTS,
610 .cons = NULL, /* filled in runtime */
611};
612
613static int ar933x_uart_probe(struct platform_device *pdev)
614{
615 struct ar933x_uart_port *up;
616 struct uart_port *port;
617 struct resource *mem_res;
618 struct resource *irq_res;
619 struct device_node *np;
620 unsigned int baud;
621 int id;
622 int ret;
623
624 np = pdev->dev.of_node;
625 if (IS_ENABLED(CONFIG_OF) && np) {
626 id = of_alias_get_id(np, "serial");
627 if (id < 0) {
628 dev_err(&pdev->dev, "unable to get alias id, err=%d\n",
629 id);
630 return id;
631 }
632 } else {
633 id = pdev->id;
634 if (id == -1)
635 id = 0;
636 }
637
638 if (id >= CONFIG_SERIAL_AR933X_NR_UARTS)
639 return -EINVAL;
640
641 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
642 if (!irq_res) {
643 dev_err(&pdev->dev, "no IRQ resource\n");
644 return -EINVAL;
645 }
646
647 up = devm_kzalloc(&pdev->dev, sizeof(struct ar933x_uart_port),
648 GFP_KERNEL);
649 if (!up)
650 return -ENOMEM;
651
652 up->clk = devm_clk_get(&pdev->dev, "uart");
653 if (IS_ERR(up->clk)) {
654 dev_err(&pdev->dev, "unable to get UART clock\n");
655 return PTR_ERR(up->clk);
656 }
657
658 port = &up->port;
659
660 mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
661 port->membase = devm_ioremap_resource(&pdev->dev, mem_res);
662 if (IS_ERR(port->membase))
663 return PTR_ERR(port->membase);
664
665 ret = clk_prepare_enable(up->clk);
666 if (ret)
667 return ret;
668
669 port->uartclk = clk_get_rate(up->clk);
670 if (!port->uartclk) {
671 ret = -EINVAL;
672 goto err_disable_clk;
673 }
674
675 port->mapbase = mem_res->start;
676 port->line = id;
677 port->irq = irq_res->start;
678 port->dev = &pdev->dev;
679 port->type = PORT_AR933X;
680 port->iotype = UPIO_MEM32;
681
682 port->regshift = 2;
683 port->fifosize = AR933X_UART_FIFO_SIZE;
684 port->ops = &ar933x_uart_ops;
685
686 baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1);
687 up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD);
688
689 baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP);
690 up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD);
691
692#ifdef CONFIG_SERIAL_AR933X_CONSOLE
693 ar933x_console_ports[up->port.line] = up;
694#endif
695
696 ret = uart_add_one_port(&ar933x_uart_driver, &up->port);
697 if (ret)
698 goto err_disable_clk;
699
700 platform_set_drvdata(pdev, up);
701 return 0;
702
703err_disable_clk:
704 clk_disable_unprepare(up->clk);
705 return ret;
706}
707
708static int ar933x_uart_remove(struct platform_device *pdev)
709{
710 struct ar933x_uart_port *up;
711
712 up = platform_get_drvdata(pdev);
713
714 if (up) {
715 uart_remove_one_port(&ar933x_uart_driver, &up->port);
716 clk_disable_unprepare(up->clk);
717 }
718
719 return 0;
720}
721
722#ifdef CONFIG_OF
723static const struct of_device_id ar933x_uart_of_ids[] = {
724 { .compatible = "qca,ar9330-uart" },
725 {},
726};
727MODULE_DEVICE_TABLE(of, ar933x_uart_of_ids);
728#endif
729
730static struct platform_driver ar933x_uart_platform_driver = {
731 .probe = ar933x_uart_probe,
732 .remove = ar933x_uart_remove,
733 .driver = {
734 .name = DRIVER_NAME,
735 .of_match_table = of_match_ptr(ar933x_uart_of_ids),
736 },
737};
738
739static int __init ar933x_uart_init(void)
740{
741 int ret;
742
743#ifdef CONFIG_SERIAL_AR933X_CONSOLE
744 ar933x_uart_driver.cons = &ar933x_uart_console;
745#endif
746
747 ret = uart_register_driver(&ar933x_uart_driver);
748 if (ret)
749 goto err_out;
750
751 ret = platform_driver_register(&ar933x_uart_platform_driver);
752 if (ret)
753 goto err_unregister_uart_driver;
754
755 return 0;
756
757err_unregister_uart_driver:
758 uart_unregister_driver(&ar933x_uart_driver);
759err_out:
760 return ret;
761}
762
763static void __exit ar933x_uart_exit(void)
764{
765 platform_driver_unregister(&ar933x_uart_platform_driver);
766 uart_unregister_driver(&ar933x_uart_driver);
767}
768
769module_init(ar933x_uart_init);
770module_exit(ar933x_uart_exit);
771
772MODULE_DESCRIPTION("Atheros AR933X UART driver");
773MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
774MODULE_LICENSE("GPL v2");
775MODULE_ALIAS("platform:" DRIVER_NAME);
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Atheros AR933X SoC built-in UART driver
4 *
5 * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
6 *
7 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 */
9
10#include <linux/module.h>
11#include <linux/ioport.h>
12#include <linux/init.h>
13#include <linux/console.h>
14#include <linux/sysrq.h>
15#include <linux/delay.h>
16#include <linux/gpio/consumer.h>
17#include <linux/platform_device.h>
18#include <linux/of.h>
19#include <linux/of_platform.h>
20#include <linux/tty.h>
21#include <linux/tty_flip.h>
22#include <linux/serial_core.h>
23#include <linux/serial.h>
24#include <linux/slab.h>
25#include <linux/io.h>
26#include <linux/irq.h>
27#include <linux/clk.h>
28
29#include <asm/div64.h>
30
31#include <asm/mach-ath79/ar933x_uart.h>
32
33#include "serial_mctrl_gpio.h"
34
35#define DRIVER_NAME "ar933x-uart"
36
37#define AR933X_UART_MAX_SCALE 0xff
38#define AR933X_UART_MAX_STEP 0xffff
39
40#define AR933X_UART_MIN_BAUD 300
41#define AR933X_UART_MAX_BAUD 3000000
42
43#define AR933X_DUMMY_STATUS_RD 0x01
44
45static struct uart_driver ar933x_uart_driver;
46
47struct ar933x_uart_port {
48 struct uart_port port;
49 unsigned int ier; /* shadow Interrupt Enable Register */
50 unsigned int min_baud;
51 unsigned int max_baud;
52 struct clk *clk;
53 struct mctrl_gpios *gpios;
54 struct gpio_desc *rts_gpiod;
55};
56
57static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up,
58 int offset)
59{
60 return readl(up->port.membase + offset);
61}
62
63static inline void ar933x_uart_write(struct ar933x_uart_port *up,
64 int offset, unsigned int value)
65{
66 writel(value, up->port.membase + offset);
67}
68
69static inline void ar933x_uart_rmw(struct ar933x_uart_port *up,
70 unsigned int offset,
71 unsigned int mask,
72 unsigned int val)
73{
74 unsigned int t;
75
76 t = ar933x_uart_read(up, offset);
77 t &= ~mask;
78 t |= val;
79 ar933x_uart_write(up, offset, t);
80}
81
82static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up,
83 unsigned int offset,
84 unsigned int val)
85{
86 ar933x_uart_rmw(up, offset, 0, val);
87}
88
89static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up,
90 unsigned int offset,
91 unsigned int val)
92{
93 ar933x_uart_rmw(up, offset, val, 0);
94}
95
96static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up)
97{
98 up->ier |= AR933X_UART_INT_TX_EMPTY;
99 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
100}
101
102static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up)
103{
104 up->ier &= ~AR933X_UART_INT_TX_EMPTY;
105 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
106}
107
108static inline void ar933x_uart_start_rx_interrupt(struct ar933x_uart_port *up)
109{
110 up->ier |= AR933X_UART_INT_RX_VALID;
111 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
112}
113
114static inline void ar933x_uart_stop_rx_interrupt(struct ar933x_uart_port *up)
115{
116 up->ier &= ~AR933X_UART_INT_RX_VALID;
117 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
118}
119
120static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch)
121{
122 unsigned int rdata;
123
124 rdata = ch & AR933X_UART_DATA_TX_RX_MASK;
125 rdata |= AR933X_UART_DATA_TX_CSR;
126 ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
127}
128
129static unsigned int ar933x_uart_tx_empty(struct uart_port *port)
130{
131 struct ar933x_uart_port *up =
132 container_of(port, struct ar933x_uart_port, port);
133 unsigned long flags;
134 unsigned int rdata;
135
136 uart_port_lock_irqsave(&up->port, &flags);
137 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
138 uart_port_unlock_irqrestore(&up->port, flags);
139
140 return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT;
141}
142
143static unsigned int ar933x_uart_get_mctrl(struct uart_port *port)
144{
145 struct ar933x_uart_port *up =
146 container_of(port, struct ar933x_uart_port, port);
147 int ret = TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
148
149 mctrl_gpio_get(up->gpios, &ret);
150
151 return ret;
152}
153
154static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
155{
156 struct ar933x_uart_port *up =
157 container_of(port, struct ar933x_uart_port, port);
158
159 mctrl_gpio_set(up->gpios, mctrl);
160}
161
162static void ar933x_uart_start_tx(struct uart_port *port)
163{
164 struct ar933x_uart_port *up =
165 container_of(port, struct ar933x_uart_port, port);
166
167 ar933x_uart_start_tx_interrupt(up);
168}
169
170static void ar933x_uart_wait_tx_complete(struct ar933x_uart_port *up)
171{
172 unsigned int status;
173 unsigned int timeout = 60000;
174
175 /* Wait up to 60ms for the character(s) to be sent. */
176 do {
177 status = ar933x_uart_read(up, AR933X_UART_CS_REG);
178 if (--timeout == 0)
179 break;
180 udelay(1);
181 } while (status & AR933X_UART_CS_TX_BUSY);
182
183 if (timeout == 0)
184 dev_err(up->port.dev, "waiting for TX timed out\n");
185}
186
187static void ar933x_uart_rx_flush(struct ar933x_uart_port *up)
188{
189 unsigned int status;
190
191 /* clear RX_VALID interrupt */
192 ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_RX_VALID);
193
194 /* remove characters from the RX FIFO */
195 do {
196 ar933x_uart_write(up, AR933X_UART_DATA_REG, AR933X_UART_DATA_RX_CSR);
197 status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
198 } while (status & AR933X_UART_DATA_RX_CSR);
199}
200
201static void ar933x_uart_stop_tx(struct uart_port *port)
202{
203 struct ar933x_uart_port *up =
204 container_of(port, struct ar933x_uart_port, port);
205
206 ar933x_uart_stop_tx_interrupt(up);
207}
208
209static void ar933x_uart_stop_rx(struct uart_port *port)
210{
211 struct ar933x_uart_port *up =
212 container_of(port, struct ar933x_uart_port, port);
213
214 ar933x_uart_stop_rx_interrupt(up);
215}
216
217static void ar933x_uart_break_ctl(struct uart_port *port, int break_state)
218{
219 struct ar933x_uart_port *up =
220 container_of(port, struct ar933x_uart_port, port);
221 unsigned long flags;
222
223 uart_port_lock_irqsave(&up->port, &flags);
224 if (break_state == -1)
225 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
226 AR933X_UART_CS_TX_BREAK);
227 else
228 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
229 AR933X_UART_CS_TX_BREAK);
230 uart_port_unlock_irqrestore(&up->port, flags);
231}
232
233/*
234 * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17))
235 */
236static unsigned long ar933x_uart_get_baud(unsigned int clk,
237 unsigned int scale,
238 unsigned int step)
239{
240 u64 t;
241 u32 div;
242
243 div = (2 << 16) * (scale + 1);
244 t = clk;
245 t *= step;
246 t += (div / 2);
247 do_div(t, div);
248
249 return t;
250}
251
252static void ar933x_uart_get_scale_step(unsigned int clk,
253 unsigned int baud,
254 unsigned int *scale,
255 unsigned int *step)
256{
257 unsigned int tscale;
258 long min_diff;
259
260 *scale = 0;
261 *step = 0;
262
263 min_diff = baud;
264 for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) {
265 u64 tstep;
266 int diff;
267
268 tstep = baud * (tscale + 1);
269 tstep *= (2 << 16);
270 do_div(tstep, clk);
271
272 if (tstep > AR933X_UART_MAX_STEP)
273 break;
274
275 diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud);
276 if (diff < min_diff) {
277 min_diff = diff;
278 *scale = tscale;
279 *step = tstep;
280 }
281 }
282}
283
284static void ar933x_uart_set_termios(struct uart_port *port,
285 struct ktermios *new,
286 const struct ktermios *old)
287{
288 struct ar933x_uart_port *up =
289 container_of(port, struct ar933x_uart_port, port);
290 unsigned int cs;
291 unsigned long flags;
292 unsigned int baud, scale, step;
293
294 /* Only CS8 is supported */
295 new->c_cflag &= ~CSIZE;
296 new->c_cflag |= CS8;
297
298 /* Only one stop bit is supported */
299 new->c_cflag &= ~CSTOPB;
300
301 cs = 0;
302 if (new->c_cflag & PARENB) {
303 if (!(new->c_cflag & PARODD))
304 cs |= AR933X_UART_CS_PARITY_EVEN;
305 else
306 cs |= AR933X_UART_CS_PARITY_ODD;
307 } else {
308 cs |= AR933X_UART_CS_PARITY_NONE;
309 }
310
311 /* Mark/space parity is not supported */
312 new->c_cflag &= ~CMSPAR;
313
314 baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud);
315 ar933x_uart_get_scale_step(port->uartclk, baud, &scale, &step);
316
317 /*
318 * Ok, we're now changing the port state. Do it with
319 * interrupts disabled.
320 */
321 uart_port_lock_irqsave(&up->port, &flags);
322
323 /* disable the UART */
324 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
325 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S);
326
327 /* Update the per-port timeout. */
328 uart_update_timeout(port, new->c_cflag, baud);
329
330 up->port.ignore_status_mask = 0;
331
332 /* ignore all characters if CREAD is not set */
333 if ((new->c_cflag & CREAD) == 0)
334 up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD;
335
336 ar933x_uart_write(up, AR933X_UART_CLOCK_REG,
337 scale << AR933X_UART_CLOCK_SCALE_S | step);
338
339 /* setup configuration register */
340 ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs);
341
342 /* enable host interrupt */
343 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
344 AR933X_UART_CS_HOST_INT_EN);
345
346 /* enable RX and TX ready overide */
347 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
348 AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE);
349
350 /* reenable the UART */
351 ar933x_uart_rmw(up, AR933X_UART_CS_REG,
352 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S,
353 AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S);
354
355 uart_port_unlock_irqrestore(&up->port, flags);
356
357 if (tty_termios_baud_rate(new))
358 tty_termios_encode_baud_rate(new, baud, baud);
359}
360
361static void ar933x_uart_rx_chars(struct ar933x_uart_port *up)
362{
363 struct tty_port *port = &up->port.state->port;
364 int max_count = 256;
365
366 do {
367 unsigned int rdata;
368 unsigned char ch;
369
370 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
371 if ((rdata & AR933X_UART_DATA_RX_CSR) == 0)
372 break;
373
374 /* remove the character from the FIFO */
375 ar933x_uart_write(up, AR933X_UART_DATA_REG,
376 AR933X_UART_DATA_RX_CSR);
377
378 up->port.icount.rx++;
379 ch = rdata & AR933X_UART_DATA_TX_RX_MASK;
380
381 if (uart_prepare_sysrq_char(&up->port, ch))
382 continue;
383
384 if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0)
385 tty_insert_flip_char(port, ch, TTY_NORMAL);
386 } while (max_count-- > 0);
387
388 tty_flip_buffer_push(port);
389}
390
391static void ar933x_uart_tx_chars(struct ar933x_uart_port *up)
392{
393 struct circ_buf *xmit = &up->port.state->xmit;
394 struct serial_rs485 *rs485conf = &up->port.rs485;
395 int count;
396 bool half_duplex_send = false;
397
398 if (uart_tx_stopped(&up->port))
399 return;
400
401 if ((rs485conf->flags & SER_RS485_ENABLED) &&
402 (up->port.x_char || !uart_circ_empty(xmit))) {
403 ar933x_uart_stop_rx_interrupt(up);
404 gpiod_set_value(up->rts_gpiod, !!(rs485conf->flags & SER_RS485_RTS_ON_SEND));
405 half_duplex_send = true;
406 }
407
408 count = up->port.fifosize;
409 do {
410 unsigned int rdata;
411
412 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
413 if ((rdata & AR933X_UART_DATA_TX_CSR) == 0)
414 break;
415
416 if (up->port.x_char) {
417 ar933x_uart_putc(up, up->port.x_char);
418 up->port.icount.tx++;
419 up->port.x_char = 0;
420 continue;
421 }
422
423 if (uart_circ_empty(xmit))
424 break;
425
426 ar933x_uart_putc(up, xmit->buf[xmit->tail]);
427
428 uart_xmit_advance(&up->port, 1);
429 } while (--count > 0);
430
431 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
432 uart_write_wakeup(&up->port);
433
434 if (!uart_circ_empty(xmit)) {
435 ar933x_uart_start_tx_interrupt(up);
436 } else if (half_duplex_send) {
437 ar933x_uart_wait_tx_complete(up);
438 ar933x_uart_rx_flush(up);
439 ar933x_uart_start_rx_interrupt(up);
440 gpiod_set_value(up->rts_gpiod, !!(rs485conf->flags & SER_RS485_RTS_AFTER_SEND));
441 }
442}
443
444static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id)
445{
446 struct ar933x_uart_port *up = dev_id;
447 unsigned int status;
448
449 status = ar933x_uart_read(up, AR933X_UART_CS_REG);
450 if ((status & AR933X_UART_CS_HOST_INT) == 0)
451 return IRQ_NONE;
452
453 uart_port_lock(&up->port);
454
455 status = ar933x_uart_read(up, AR933X_UART_INT_REG);
456 status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
457
458 if (status & AR933X_UART_INT_RX_VALID) {
459 ar933x_uart_write(up, AR933X_UART_INT_REG,
460 AR933X_UART_INT_RX_VALID);
461 ar933x_uart_rx_chars(up);
462 }
463
464 if (status & AR933X_UART_INT_TX_EMPTY) {
465 ar933x_uart_write(up, AR933X_UART_INT_REG,
466 AR933X_UART_INT_TX_EMPTY);
467 ar933x_uart_stop_tx_interrupt(up);
468 ar933x_uart_tx_chars(up);
469 }
470
471 uart_unlock_and_check_sysrq(&up->port);
472
473 return IRQ_HANDLED;
474}
475
476static int ar933x_uart_startup(struct uart_port *port)
477{
478 struct ar933x_uart_port *up =
479 container_of(port, struct ar933x_uart_port, port);
480 unsigned long flags;
481 int ret;
482
483 ret = request_irq(up->port.irq, ar933x_uart_interrupt,
484 up->port.irqflags, dev_name(up->port.dev), up);
485 if (ret)
486 return ret;
487
488 uart_port_lock_irqsave(&up->port, &flags);
489
490 /* Enable HOST interrupts */
491 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
492 AR933X_UART_CS_HOST_INT_EN);
493
494 /* enable RX and TX ready overide */
495 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
496 AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE);
497
498 /* Enable RX interrupts */
499 ar933x_uart_start_rx_interrupt(up);
500
501 uart_port_unlock_irqrestore(&up->port, flags);
502
503 return 0;
504}
505
506static void ar933x_uart_shutdown(struct uart_port *port)
507{
508 struct ar933x_uart_port *up =
509 container_of(port, struct ar933x_uart_port, port);
510
511 /* Disable all interrupts */
512 up->ier = 0;
513 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
514
515 /* Disable break condition */
516 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
517 AR933X_UART_CS_TX_BREAK);
518
519 free_irq(up->port.irq, up);
520}
521
522static const char *ar933x_uart_type(struct uart_port *port)
523{
524 return (port->type == PORT_AR933X) ? "AR933X UART" : NULL;
525}
526
527static void ar933x_uart_release_port(struct uart_port *port)
528{
529 /* Nothing to release ... */
530}
531
532static int ar933x_uart_request_port(struct uart_port *port)
533{
534 /* UARTs always present */
535 return 0;
536}
537
538static void ar933x_uart_config_port(struct uart_port *port, int flags)
539{
540 if (flags & UART_CONFIG_TYPE)
541 port->type = PORT_AR933X;
542}
543
544static int ar933x_uart_verify_port(struct uart_port *port,
545 struct serial_struct *ser)
546{
547 struct ar933x_uart_port *up =
548 container_of(port, struct ar933x_uart_port, port);
549
550 if (ser->type != PORT_UNKNOWN &&
551 ser->type != PORT_AR933X)
552 return -EINVAL;
553
554 if (ser->irq < 0 || ser->irq >= NR_IRQS)
555 return -EINVAL;
556
557 if (ser->baud_base < up->min_baud ||
558 ser->baud_base > up->max_baud)
559 return -EINVAL;
560
561 return 0;
562}
563
564static const struct uart_ops ar933x_uart_ops = {
565 .tx_empty = ar933x_uart_tx_empty,
566 .set_mctrl = ar933x_uart_set_mctrl,
567 .get_mctrl = ar933x_uart_get_mctrl,
568 .stop_tx = ar933x_uart_stop_tx,
569 .start_tx = ar933x_uart_start_tx,
570 .stop_rx = ar933x_uart_stop_rx,
571 .break_ctl = ar933x_uart_break_ctl,
572 .startup = ar933x_uart_startup,
573 .shutdown = ar933x_uart_shutdown,
574 .set_termios = ar933x_uart_set_termios,
575 .type = ar933x_uart_type,
576 .release_port = ar933x_uart_release_port,
577 .request_port = ar933x_uart_request_port,
578 .config_port = ar933x_uart_config_port,
579 .verify_port = ar933x_uart_verify_port,
580};
581
582static int ar933x_config_rs485(struct uart_port *port, struct ktermios *termios,
583 struct serial_rs485 *rs485conf)
584{
585 struct ar933x_uart_port *up =
586 container_of(port, struct ar933x_uart_port, port);
587
588 if (port->rs485.flags & SER_RS485_ENABLED)
589 gpiod_set_value(up->rts_gpiod,
590 !!(rs485conf->flags & SER_RS485_RTS_AFTER_SEND));
591
592 return 0;
593}
594
595#ifdef CONFIG_SERIAL_AR933X_CONSOLE
596static struct ar933x_uart_port *
597ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS];
598
599static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up)
600{
601 unsigned int status;
602 unsigned int timeout = 60000;
603
604 /* Wait up to 60ms for the character(s) to be sent. */
605 do {
606 status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
607 if (--timeout == 0)
608 break;
609 udelay(1);
610 } while ((status & AR933X_UART_DATA_TX_CSR) == 0);
611}
612
613static void ar933x_uart_console_putchar(struct uart_port *port, unsigned char ch)
614{
615 struct ar933x_uart_port *up =
616 container_of(port, struct ar933x_uart_port, port);
617
618 ar933x_uart_wait_xmitr(up);
619 ar933x_uart_putc(up, ch);
620}
621
622static void ar933x_uart_console_write(struct console *co, const char *s,
623 unsigned int count)
624{
625 struct ar933x_uart_port *up = ar933x_console_ports[co->index];
626 unsigned long flags;
627 unsigned int int_en;
628 int locked = 1;
629
630 if (oops_in_progress)
631 locked = uart_port_trylock_irqsave(&up->port, &flags);
632 else
633 uart_port_lock_irqsave(&up->port, &flags);
634
635 /*
636 * First save the IER then disable the interrupts
637 */
638 int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
639 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0);
640
641 uart_console_write(&up->port, s, count, ar933x_uart_console_putchar);
642
643 /*
644 * Finally, wait for transmitter to become empty
645 * and restore the IER
646 */
647 ar933x_uart_wait_xmitr(up);
648 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en);
649
650 ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);
651
652 if (locked)
653 uart_port_unlock_irqrestore(&up->port, flags);
654}
655
656static int ar933x_uart_console_setup(struct console *co, char *options)
657{
658 struct ar933x_uart_port *up;
659 int baud = 115200;
660 int bits = 8;
661 int parity = 'n';
662 int flow = 'n';
663
664 if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS)
665 return -EINVAL;
666
667 up = ar933x_console_ports[co->index];
668 if (!up)
669 return -ENODEV;
670
671 if (options)
672 uart_parse_options(options, &baud, &parity, &bits, &flow);
673
674 return uart_set_options(&up->port, co, baud, parity, bits, flow);
675}
676
677static struct console ar933x_uart_console = {
678 .name = "ttyATH",
679 .write = ar933x_uart_console_write,
680 .device = uart_console_device,
681 .setup = ar933x_uart_console_setup,
682 .flags = CON_PRINTBUFFER,
683 .index = -1,
684 .data = &ar933x_uart_driver,
685};
686#endif /* CONFIG_SERIAL_AR933X_CONSOLE */
687
688static struct uart_driver ar933x_uart_driver = {
689 .owner = THIS_MODULE,
690 .driver_name = DRIVER_NAME,
691 .dev_name = "ttyATH",
692 .nr = CONFIG_SERIAL_AR933X_NR_UARTS,
693 .cons = NULL, /* filled in runtime */
694};
695
696static const struct serial_rs485 ar933x_no_rs485 = {};
697static const struct serial_rs485 ar933x_rs485_supported = {
698 .flags = SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND | SER_RS485_RTS_AFTER_SEND,
699};
700
701static int ar933x_uart_probe(struct platform_device *pdev)
702{
703 struct ar933x_uart_port *up;
704 struct uart_port *port;
705 struct resource *mem_res;
706 struct device_node *np;
707 unsigned int baud;
708 int id;
709 int ret;
710 int irq;
711
712 np = pdev->dev.of_node;
713 if (IS_ENABLED(CONFIG_OF) && np) {
714 id = of_alias_get_id(np, "serial");
715 if (id < 0) {
716 dev_err(&pdev->dev, "unable to get alias id, err=%d\n",
717 id);
718 return id;
719 }
720 } else {
721 id = pdev->id;
722 if (id == -1)
723 id = 0;
724 }
725
726 if (id >= CONFIG_SERIAL_AR933X_NR_UARTS)
727 return -EINVAL;
728
729 irq = platform_get_irq(pdev, 0);
730 if (irq < 0)
731 return irq;
732
733 up = devm_kzalloc(&pdev->dev, sizeof(struct ar933x_uart_port),
734 GFP_KERNEL);
735 if (!up)
736 return -ENOMEM;
737
738 up->clk = devm_clk_get(&pdev->dev, "uart");
739 if (IS_ERR(up->clk)) {
740 dev_err(&pdev->dev, "unable to get UART clock\n");
741 return PTR_ERR(up->clk);
742 }
743
744 port = &up->port;
745
746 port->membase = devm_platform_get_and_ioremap_resource(pdev, 0, &mem_res);
747 if (IS_ERR(port->membase))
748 return PTR_ERR(port->membase);
749
750 ret = clk_prepare_enable(up->clk);
751 if (ret)
752 return ret;
753
754 port->uartclk = clk_get_rate(up->clk);
755 if (!port->uartclk) {
756 ret = -EINVAL;
757 goto err_disable_clk;
758 }
759
760 port->mapbase = mem_res->start;
761 port->line = id;
762 port->irq = irq;
763 port->dev = &pdev->dev;
764 port->type = PORT_AR933X;
765 port->iotype = UPIO_MEM32;
766
767 port->regshift = 2;
768 port->fifosize = AR933X_UART_FIFO_SIZE;
769 port->ops = &ar933x_uart_ops;
770 port->rs485_config = ar933x_config_rs485;
771 port->rs485_supported = ar933x_rs485_supported;
772
773 baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1);
774 up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD);
775
776 baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP);
777 up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD);
778
779 ret = uart_get_rs485_mode(port);
780 if (ret)
781 goto err_disable_clk;
782
783 up->gpios = mctrl_gpio_init(port, 0);
784 if (IS_ERR(up->gpios) && PTR_ERR(up->gpios) != -ENOSYS) {
785 ret = PTR_ERR(up->gpios);
786 goto err_disable_clk;
787 }
788
789 up->rts_gpiod = mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_RTS);
790
791 if (!up->rts_gpiod) {
792 port->rs485_supported = ar933x_no_rs485;
793 if (port->rs485.flags & SER_RS485_ENABLED) {
794 dev_err(&pdev->dev, "lacking rts-gpio, disabling RS485\n");
795 port->rs485.flags &= ~SER_RS485_ENABLED;
796 }
797 }
798
799#ifdef CONFIG_SERIAL_AR933X_CONSOLE
800 ar933x_console_ports[up->port.line] = up;
801#endif
802
803 ret = uart_add_one_port(&ar933x_uart_driver, &up->port);
804 if (ret)
805 goto err_disable_clk;
806
807 platform_set_drvdata(pdev, up);
808 return 0;
809
810err_disable_clk:
811 clk_disable_unprepare(up->clk);
812 return ret;
813}
814
815static void ar933x_uart_remove(struct platform_device *pdev)
816{
817 struct ar933x_uart_port *up;
818
819 up = platform_get_drvdata(pdev);
820
821 if (up) {
822 uart_remove_one_port(&ar933x_uart_driver, &up->port);
823 clk_disable_unprepare(up->clk);
824 }
825}
826
827#ifdef CONFIG_OF
828static const struct of_device_id ar933x_uart_of_ids[] = {
829 { .compatible = "qca,ar9330-uart" },
830 {},
831};
832MODULE_DEVICE_TABLE(of, ar933x_uart_of_ids);
833#endif
834
835static struct platform_driver ar933x_uart_platform_driver = {
836 .probe = ar933x_uart_probe,
837 .remove_new = ar933x_uart_remove,
838 .driver = {
839 .name = DRIVER_NAME,
840 .of_match_table = of_match_ptr(ar933x_uart_of_ids),
841 },
842};
843
844static int __init ar933x_uart_init(void)
845{
846 int ret;
847
848#ifdef CONFIG_SERIAL_AR933X_CONSOLE
849 ar933x_uart_driver.cons = &ar933x_uart_console;
850#endif
851
852 ret = uart_register_driver(&ar933x_uart_driver);
853 if (ret)
854 goto err_out;
855
856 ret = platform_driver_register(&ar933x_uart_platform_driver);
857 if (ret)
858 goto err_unregister_uart_driver;
859
860 return 0;
861
862err_unregister_uart_driver:
863 uart_unregister_driver(&ar933x_uart_driver);
864err_out:
865 return ret;
866}
867
868static void __exit ar933x_uart_exit(void)
869{
870 platform_driver_unregister(&ar933x_uart_platform_driver);
871 uart_unregister_driver(&ar933x_uart_driver);
872}
873
874module_init(ar933x_uart_init);
875module_exit(ar933x_uart_exit);
876
877MODULE_DESCRIPTION("Atheros AR933X UART driver");
878MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
879MODULE_LICENSE("GPL v2");
880MODULE_ALIAS("platform:" DRIVER_NAME);