1// SPDX-License-Identifier: GPL-2.0
  2
  3#include <linux/cpuhotplug.h>
  4#include <linux/cpumask.h>
  5#include <linux/slab.h>
  6#include <linux/mm.h>
  7
  8#include <asm/apic.h>
  9
 10#include "local.h"
 11
 12struct cluster_mask {
 13	unsigned int	clusterid;
 14	int		node;
 15	struct cpumask	mask;
 16};
 
 
 
 17
 18static DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid);
 19static DEFINE_PER_CPU(cpumask_var_t, ipi_mask);
 20static DEFINE_PER_CPU(struct cluster_mask *, cluster_masks);
 21static struct cluster_mask *cluster_hotplug_mask;
 22
 23static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
 24{
 25	return x2apic_enabled();
 26}
 27
 28static void x2apic_send_IPI(int cpu, int vector)
 29{
 30	u32 dest = per_cpu(x86_cpu_to_logical_apicid, cpu);
 31
 32	x2apic_wrmsr_fence();
 
 33	__x2apic_send_IPI_dest(dest, vector, APIC_DEST_LOGICAL);
 34}
 35
 36static void
 37__x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest)
 38{
 39	unsigned int cpu, clustercpu;
 40	struct cpumask *tmpmsk;
 41	unsigned long flags;
 42	u32 dest;
 43
 44	x2apic_wrmsr_fence();
 
 45	local_irq_save(flags);
 46
 47	tmpmsk = this_cpu_cpumask_var_ptr(ipi_mask);
 48	cpumask_copy(tmpmsk, mask);
 49	/* If IPI should not be sent to self, clear current CPU */
 50	if (apic_dest != APIC_DEST_ALLINC)
 51		__cpumask_clear_cpu(smp_processor_id(), tmpmsk);
 52
 53	/* Collapse cpus in a cluster so a single IPI per cluster is sent */
 54	for_each_cpu(cpu, tmpmsk) {
 55		struct cluster_mask *cmsk = per_cpu(cluster_masks, cpu);
 56
 57		dest = 0;
 58		for_each_cpu_and(clustercpu, tmpmsk, &cmsk->mask)
 59			dest |= per_cpu(x86_cpu_to_logical_apicid, clustercpu);
 60
 61		if (!dest)
 62			continue;
 63
 64		__x2apic_send_IPI_dest(dest, vector, apic->dest_logical);
 65		/* Remove cluster CPUs from tmpmask */
 66		cpumask_andnot(tmpmsk, tmpmsk, &cmsk->mask);
 67	}
 68
 69	local_irq_restore(flags);
 70}
 71
 72static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
 73{
 74	__x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC);
 75}
 76
 77static void
 78x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
 79{
 80	__x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT);
 81}
 82
 83static void x2apic_send_IPI_allbutself(int vector)
 84{
 85	__x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLBUT);
 86}
 87
 88static void x2apic_send_IPI_all(int vector)
 89{
 90	__x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLINC);
 91}
 92
 93static u32 x2apic_calc_apicid(unsigned int cpu)
 94{
 95	return per_cpu(x86_cpu_to_logical_apicid, cpu);
 96}
 97
 98static void init_x2apic_ldr(void)
 
 
 
 
 
 99{
100	struct cluster_mask *cmsk = this_cpu_read(cluster_masks);
101	u32 cluster, apicid = apic_read(APIC_LDR);
102	unsigned int cpu;
103
104	this_cpu_write(x86_cpu_to_logical_apicid, apicid);
 
 
105
106	if (cmsk)
107		goto update;
 
 
 
108
109	cluster = apicid >> 16;
110	for_each_online_cpu(cpu) {
111		cmsk = per_cpu(cluster_masks, cpu);
112		/* Matching cluster found. Link and update it. */
113		if (cmsk && cmsk->clusterid == cluster)
114			goto update;
115	}
116	cmsk = cluster_hotplug_mask;
117	cmsk->clusterid = cluster;
118	cluster_hotplug_mask = NULL;
119update:
120	this_cpu_write(cluster_masks, cmsk);
121	cpumask_set_cpu(smp_processor_id(), &cmsk->mask);
122}
123
124static int alloc_clustermask(unsigned int cpu, int node)
125{
 
 
 
 
 
 
 
 
 
126	if (per_cpu(cluster_masks, cpu))
127		return 0;
 
 
 
 
128	/*
129	 * If a hotplug spare mask exists, check whether it's on the right
130	 * node. If not, free it and allocate a new one.
 
131	 */
132	if (cluster_hotplug_mask) {
133		if (cluster_hotplug_mask->node == node)
134			return 0;
135		kfree(cluster_hotplug_mask);
136	}
137
138	cluster_hotplug_mask = kzalloc_node(sizeof(*cluster_hotplug_mask),
139					    GFP_KERNEL, node);
140	if (!cluster_hotplug_mask)
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
141		return -ENOMEM;
142	cluster_hotplug_mask->node = node;
 
 
143	return 0;
144}
145
146static int x2apic_prepare_cpu(unsigned int cpu)
147{
148	if (alloc_clustermask(cpu, cpu_to_node(cpu)) < 0)
 
 
 
 
 
 
149		return -ENOMEM;
150	if (!zalloc_cpumask_var(&per_cpu(ipi_mask, cpu), GFP_KERNEL))
151		return -ENOMEM;
152	return 0;
153}
154
155static int x2apic_dead_cpu(unsigned int dead_cpu)
156{
157	struct cluster_mask *cmsk = per_cpu(cluster_masks, dead_cpu);
158
159	if (cmsk)
160		cpumask_clear_cpu(dead_cpu, &cmsk->mask);
161	free_cpumask_var(per_cpu(ipi_mask, dead_cpu));
162	return 0;
163}
164
165static int x2apic_cluster_probe(void)
166{
 
 
167	if (!x2apic_mode)
168		return 0;
169
 
 
 
 
 
170	if (cpuhp_setup_state(CPUHP_X2APIC_PREPARE, "x86/x2apic:prepare",
171			      x2apic_prepare_cpu, x2apic_dead_cpu) < 0) {
172		pr_err("Failed to register X2APIC_PREPARE\n");
 
 
173		return 0;
174	}
175	init_x2apic_ldr();
176	return 1;
177}
178
179static struct apic apic_x2apic_cluster __ro_after_init = {
180
181	.name				= "cluster x2apic",
182	.probe				= x2apic_cluster_probe,
183	.acpi_madt_oem_check		= x2apic_acpi_madt_oem_check,
184	.apic_id_valid			= x2apic_apic_id_valid,
185	.apic_id_registered		= x2apic_apic_id_registered,
186
187	.irq_delivery_mode		= dest_Fixed,
188	.irq_dest_mode			= 1, /* logical */
189
190	.disable_esr			= 0,
191	.dest_logical			= APIC_DEST_LOGICAL,
192	.check_apicid_used		= NULL,
193
 
194	.init_apic_ldr			= init_x2apic_ldr,
195
196	.ioapic_phys_id_map		= NULL,
197	.setup_apic_routing		= NULL,
198	.cpu_present_to_apicid		= default_cpu_present_to_apicid,
199	.apicid_to_cpu_present		= NULL,
200	.check_phys_apicid_present	= default_check_phys_apicid_present,
201	.phys_pkg_id			= x2apic_phys_pkg_id,
202
 
 
203	.get_apic_id			= x2apic_get_apic_id,
204	.set_apic_id			= x2apic_set_apic_id,
205
206	.calc_dest_apicid		= x2apic_calc_apicid,
207
208	.send_IPI			= x2apic_send_IPI,
209	.send_IPI_mask			= x2apic_send_IPI_mask,
210	.send_IPI_mask_allbutself	= x2apic_send_IPI_mask_allbutself,
211	.send_IPI_allbutself		= x2apic_send_IPI_allbutself,
212	.send_IPI_all			= x2apic_send_IPI_all,
213	.send_IPI_self			= x2apic_send_IPI_self,
214
215	.inquire_remote_apic		= NULL,
216
217	.read				= native_apic_msr_read,
218	.write				= native_apic_msr_write,
219	.eoi_write			= native_apic_msr_eoi_write,
220	.icr_read			= native_x2apic_icr_read,
221	.icr_write			= native_x2apic_icr_write,
222	.wait_icr_idle			= native_x2apic_wait_icr_idle,
223	.safe_wait_icr_idle		= native_safe_x2apic_wait_icr_idle,
224};
225
226apic_driver(apic_x2apic_cluster);

  1// SPDX-License-Identifier: GPL-2.0
  2
  3#include <linux/cpuhotplug.h>
  4#include <linux/cpumask.h>
  5#include <linux/slab.h>
  6#include <linux/mm.h>
  7
  8#include <asm/apic.h>
  9
 10#include "local.h"
 11
 12#define apic_cluster(apicid) ((apicid) >> 4)
 13
 14/*
 15 * __x2apic_send_IPI_mask() possibly needs to read
 16 * x86_cpu_to_logical_apicid for all online cpus in a sequential way.
 17 * Using per cpu variable would cost one cache line per cpu.
 18 */
 19static u32 *x86_cpu_to_logical_apicid __read_mostly;
 20
 
 21static DEFINE_PER_CPU(cpumask_var_t, ipi_mask);
 22static DEFINE_PER_CPU_READ_MOSTLY(struct cpumask *, cluster_masks);
 
 23
 24static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
 25{
 26	return x2apic_enabled();
 27}
 28
 29static void x2apic_send_IPI(int cpu, int vector)
 30{
 31	u32 dest = x86_cpu_to_logical_apicid[cpu];
 32
 33	/* x2apic MSRs are special and need a special fence: */
 34	weak_wrmsr_fence();
 35	__x2apic_send_IPI_dest(dest, vector, APIC_DEST_LOGICAL);
 36}
 37
 38static void
 39__x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest)
 40{
 41	unsigned int cpu, clustercpu;
 42	struct cpumask *tmpmsk;
 43	unsigned long flags;
 44	u32 dest;
 45
 46	/* x2apic MSRs are special and need a special fence: */
 47	weak_wrmsr_fence();
 48	local_irq_save(flags);
 49
 50	tmpmsk = this_cpu_cpumask_var_ptr(ipi_mask);
 51	cpumask_copy(tmpmsk, mask);
 52	/* If IPI should not be sent to self, clear current CPU */
 53	if (apic_dest != APIC_DEST_ALLINC)
 54		__cpumask_clear_cpu(smp_processor_id(), tmpmsk);
 55
 56	/* Collapse cpus in a cluster so a single IPI per cluster is sent */
 57	for_each_cpu(cpu, tmpmsk) {
 58		struct cpumask *cmsk = per_cpu(cluster_masks, cpu);
 59
 60		dest = 0;
 61		for_each_cpu_and(clustercpu, tmpmsk, cmsk)
 62			dest |= x86_cpu_to_logical_apicid[clustercpu];
 63
 64		if (!dest)
 65			continue;
 66
 67		__x2apic_send_IPI_dest(dest, vector, APIC_DEST_LOGICAL);
 68		/* Remove cluster CPUs from tmpmask */
 69		cpumask_andnot(tmpmsk, tmpmsk, cmsk);
 70	}
 71
 72	local_irq_restore(flags);
 73}
 74
 75static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
 76{
 77	__x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC);
 78}
 79
 80static void
 81x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
 82{
 83	__x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT);
 84}
 85
 86static u32 x2apic_calc_apicid(unsigned int cpu)
 87{
 88	return x86_cpu_to_logical_apicid[cpu];
 89}
 90
 91static void init_x2apic_ldr(void)
 92{
 93	struct cpumask *cmsk = this_cpu_read(cluster_masks);
 
 94
 95	BUG_ON(!cmsk);
 96
 97	cpumask_set_cpu(smp_processor_id(), cmsk);
 98}
 99
100/*
101 * As an optimisation during boot, set the cluster_mask for all present
102 * CPUs at once, to prevent each of them having to iterate over the others
103 * to find the existing cluster_mask.
104 */
105static void prefill_clustermask(struct cpumask *cmsk, unsigned int cpu, u32 cluster)
106{
107	int cpu_i;
 
 
108
109	for_each_present_cpu(cpu_i) {
110		struct cpumask **cpu_cmsk = &per_cpu(cluster_masks, cpu_i);
111		u32 apicid = apic->cpu_present_to_apicid(cpu_i);
112
113		if (apicid == BAD_APICID || cpu_i == cpu || apic_cluster(apicid) != cluster)
114			continue;
115
116		if (WARN_ON_ONCE(*cpu_cmsk == cmsk))
117			continue;
118
119		BUG_ON(*cpu_cmsk);
120		*cpu_cmsk = cmsk;
 
 
 
 
121	}
 
 
 
 
 
 
122}
123
124static int alloc_clustermask(unsigned int cpu, u32 cluster, int node)
125{
126	struct cpumask *cmsk = NULL;
127	unsigned int cpu_i;
128
129	/*
130	 * At boot time, the CPU present mask is stable. The cluster mask is
131	 * allocated for the first CPU in the cluster and propagated to all
132	 * present siblings in the cluster. If the cluster mask is already set
133	 * on entry to this function for a given CPU, there is nothing to do.
134	 */
135	if (per_cpu(cluster_masks, cpu))
136		return 0;
137
138	if (system_state < SYSTEM_RUNNING)
139		goto alloc;
140
141	/*
142	 * On post boot hotplug for a CPU which was not present at boot time,
143	 * iterate over all possible CPUs (even those which are not present
144	 * any more) to find any existing cluster mask.
145	 */
146	for_each_possible_cpu(cpu_i) {
147		u32 apicid = apic->cpu_present_to_apicid(cpu_i);
 
 
 
148
149		if (apicid != BAD_APICID && apic_cluster(apicid) == cluster) {
150			cmsk = per_cpu(cluster_masks, cpu_i);
151			/*
152			 * If the cluster is already initialized, just store
153			 * the mask and return. There's no need to propagate.
154			 */
155			if (cmsk) {
156				per_cpu(cluster_masks, cpu) = cmsk;
157				return 0;
158			}
159		}
160	}
161	/*
162	 * No CPU in the cluster has ever been initialized, so fall through to
163	 * the boot time code which will also populate the cluster mask for any
164	 * other CPU in the cluster which is (now) present.
165	 */
166alloc:
167	cmsk = kzalloc_node(sizeof(*cmsk), GFP_KERNEL, node);
168	if (!cmsk)
169		return -ENOMEM;
170	per_cpu(cluster_masks, cpu) = cmsk;
171	prefill_clustermask(cmsk, cpu, cluster);
172
173	return 0;
174}
175
176static int x2apic_prepare_cpu(unsigned int cpu)
177{
178	u32 phys_apicid = apic->cpu_present_to_apicid(cpu);
179	u32 cluster = apic_cluster(phys_apicid);
180	u32 logical_apicid = (cluster << 16) | (1 << (phys_apicid & 0xf));
181
182	x86_cpu_to_logical_apicid[cpu] = logical_apicid;
183
184	if (alloc_clustermask(cpu, cluster, cpu_to_node(cpu)) < 0)
185		return -ENOMEM;
186	if (!zalloc_cpumask_var(&per_cpu(ipi_mask, cpu), GFP_KERNEL))
187		return -ENOMEM;
188	return 0;
189}
190
191static int x2apic_dead_cpu(unsigned int dead_cpu)
192{
193	struct cpumask *cmsk = per_cpu(cluster_masks, dead_cpu);
194
195	if (cmsk)
196		cpumask_clear_cpu(dead_cpu, cmsk);
197	free_cpumask_var(per_cpu(ipi_mask, dead_cpu));
198	return 0;
199}
200
201static int x2apic_cluster_probe(void)
202{
203	u32 slots;
204
205	if (!x2apic_mode)
206		return 0;
207
208	slots = max_t(u32, L1_CACHE_BYTES/sizeof(u32), nr_cpu_ids);
209	x86_cpu_to_logical_apicid = kcalloc(slots, sizeof(u32), GFP_KERNEL);
210	if (!x86_cpu_to_logical_apicid)
211		return 0;
212
213	if (cpuhp_setup_state(CPUHP_X2APIC_PREPARE, "x86/x2apic:prepare",
214			      x2apic_prepare_cpu, x2apic_dead_cpu) < 0) {
215		pr_err("Failed to register X2APIC_PREPARE\n");
216		kfree(x86_cpu_to_logical_apicid);
217		x86_cpu_to_logical_apicid = NULL;
218		return 0;
219	}
220	init_x2apic_ldr();
221	return 1;
222}
223
224static struct apic apic_x2apic_cluster __ro_after_init = {
225
226	.name				= "cluster x2apic",
227	.probe				= x2apic_cluster_probe,
228	.acpi_madt_oem_check		= x2apic_acpi_madt_oem_check,
 
 
229
230	.dest_mode_logical		= true,
 
231
232	.disable_esr			= 0,
 
 
233
234	.check_apicid_used		= NULL,
235	.init_apic_ldr			= init_x2apic_ldr,
 
236	.ioapic_phys_id_map		= NULL,
 
237	.cpu_present_to_apicid		= default_cpu_present_to_apicid,
 
 
238	.phys_pkg_id			= x2apic_phys_pkg_id,
239
240	.max_apic_id			= UINT_MAX,
241	.x2apic_set_max_apicid		= true,
242	.get_apic_id			= x2apic_get_apic_id,
243	.set_apic_id			= x2apic_set_apic_id,
244
245	.calc_dest_apicid		= x2apic_calc_apicid,
246
247	.send_IPI			= x2apic_send_IPI,
248	.send_IPI_mask			= x2apic_send_IPI_mask,
249	.send_IPI_mask_allbutself	= x2apic_send_IPI_mask_allbutself,
250	.send_IPI_allbutself		= x2apic_send_IPI_allbutself,
251	.send_IPI_all			= x2apic_send_IPI_all,
252	.send_IPI_self			= x2apic_send_IPI_self,
253	.nmi_to_offline_cpu		= true,
 
254
255	.read				= native_apic_msr_read,
256	.write				= native_apic_msr_write,
257	.eoi				= native_apic_msr_eoi,
258	.icr_read			= native_x2apic_icr_read,
259	.icr_write			= native_x2apic_icr_write,
 
 
260};
261
262apic_driver(apic_x2apic_cluster);