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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright IBM Corp. 2012
4 *
5 * Author(s):
6 * Jan Glauber <jang@linux.vnet.ibm.com>
7 */
8
9#define KMSG_COMPONENT "zpci"
10#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11
12#include <linux/compat.h>
13#include <linux/kernel.h>
14#include <linux/miscdevice.h>
15#include <linux/slab.h>
16#include <linux/err.h>
17#include <linux/delay.h>
18#include <linux/pci.h>
19#include <linux/uaccess.h>
20#include <asm/pci_debug.h>
21#include <asm/pci_clp.h>
22#include <asm/clp.h>
23#include <uapi/asm/clp.h>
24
25bool zpci_unique_uid;
26
27static void update_uid_checking(bool new)
28{
29 if (zpci_unique_uid != new)
30 zpci_dbg(1, "uid checking:%d\n", new);
31
32 zpci_unique_uid = new;
33}
34
35static inline void zpci_err_clp(unsigned int rsp, int rc)
36{
37 struct {
38 unsigned int rsp;
39 int rc;
40 } __packed data = {rsp, rc};
41
42 zpci_err_hex(&data, sizeof(data));
43}
44
45/*
46 * Call Logical Processor with c=1, lps=0 and command 1
47 * to get the bit mask of installed logical processors
48 */
49static inline int clp_get_ilp(unsigned long *ilp)
50{
51 unsigned long mask;
52 int cc = 3;
53
54 asm volatile (
55 " .insn rrf,0xb9a00000,%[mask],%[cmd],8,0\n"
56 "0: ipm %[cc]\n"
57 " srl %[cc],28\n"
58 "1:\n"
59 EX_TABLE(0b, 1b)
60 : [cc] "+d" (cc), [mask] "=d" (mask) : [cmd] "a" (1)
61 : "cc");
62 *ilp = mask;
63 return cc;
64}
65
66/*
67 * Call Logical Processor with c=0, the give constant lps and an lpcb request.
68 */
69static __always_inline int clp_req(void *data, unsigned int lps)
70{
71 struct { u8 _[CLP_BLK_SIZE]; } *req = data;
72 u64 ignored;
73 int cc = 3;
74
75 asm volatile (
76 " .insn rrf,0xb9a00000,%[ign],%[req],0,%[lps]\n"
77 "0: ipm %[cc]\n"
78 " srl %[cc],28\n"
79 "1:\n"
80 EX_TABLE(0b, 1b)
81 : [cc] "+d" (cc), [ign] "=d" (ignored), "+m" (*req)
82 : [req] "a" (req), [lps] "i" (lps)
83 : "cc");
84 return cc;
85}
86
87static void *clp_alloc_block(gfp_t gfp_mask)
88{
89 return (void *) __get_free_pages(gfp_mask, get_order(CLP_BLK_SIZE));
90}
91
92static void clp_free_block(void *ptr)
93{
94 free_pages((unsigned long) ptr, get_order(CLP_BLK_SIZE));
95}
96
97static void clp_store_query_pci_fngrp(struct zpci_dev *zdev,
98 struct clp_rsp_query_pci_grp *response)
99{
100 zdev->tlb_refresh = response->refresh;
101 zdev->dma_mask = response->dasm;
102 zdev->msi_addr = response->msia;
103 zdev->max_msi = response->noi;
104 zdev->fmb_update = response->mui;
105
106 switch (response->version) {
107 case 1:
108 zdev->max_bus_speed = PCIE_SPEED_5_0GT;
109 break;
110 default:
111 zdev->max_bus_speed = PCI_SPEED_UNKNOWN;
112 break;
113 }
114}
115
116static int clp_query_pci_fngrp(struct zpci_dev *zdev, u8 pfgid)
117{
118 struct clp_req_rsp_query_pci_grp *rrb;
119 int rc;
120
121 rrb = clp_alloc_block(GFP_KERNEL);
122 if (!rrb)
123 return -ENOMEM;
124
125 memset(rrb, 0, sizeof(*rrb));
126 rrb->request.hdr.len = sizeof(rrb->request);
127 rrb->request.hdr.cmd = CLP_QUERY_PCI_FNGRP;
128 rrb->response.hdr.len = sizeof(rrb->response);
129 rrb->request.pfgid = pfgid;
130
131 rc = clp_req(rrb, CLP_LPS_PCI);
132 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK)
133 clp_store_query_pci_fngrp(zdev, &rrb->response);
134 else {
135 zpci_err("Q PCI FGRP:\n");
136 zpci_err_clp(rrb->response.hdr.rsp, rc);
137 rc = -EIO;
138 }
139 clp_free_block(rrb);
140 return rc;
141}
142
143static int clp_store_query_pci_fn(struct zpci_dev *zdev,
144 struct clp_rsp_query_pci *response)
145{
146 int i;
147
148 for (i = 0; i < PCI_BAR_COUNT; i++) {
149 zdev->bars[i].val = le32_to_cpu(response->bar[i]);
150 zdev->bars[i].size = response->bar_size[i];
151 }
152 zdev->start_dma = response->sdma;
153 zdev->end_dma = response->edma;
154 zdev->pchid = response->pchid;
155 zdev->pfgid = response->pfgid;
156 zdev->pft = response->pft;
157 zdev->vfn = response->vfn;
158 zdev->uid = response->uid;
159 zdev->fmb_length = sizeof(u32) * response->fmb_len;
160
161 memcpy(zdev->pfip, response->pfip, sizeof(zdev->pfip));
162 if (response->util_str_avail) {
163 memcpy(zdev->util_str, response->util_str,
164 sizeof(zdev->util_str));
165 }
166 zdev->mio_capable = response->mio_addr_avail;
167 for (i = 0; i < PCI_BAR_COUNT; i++) {
168 if (!(response->mio.valid & (1 << (PCI_BAR_COUNT - i - 1))))
169 continue;
170
171 zdev->bars[i].mio_wb = (void __iomem *) response->mio.addr[i].wb;
172 zdev->bars[i].mio_wt = (void __iomem *) response->mio.addr[i].wt;
173 }
174 return 0;
175}
176
177static int clp_query_pci_fn(struct zpci_dev *zdev, u32 fh)
178{
179 struct clp_req_rsp_query_pci *rrb;
180 int rc;
181
182 rrb = clp_alloc_block(GFP_KERNEL);
183 if (!rrb)
184 return -ENOMEM;
185
186 memset(rrb, 0, sizeof(*rrb));
187 rrb->request.hdr.len = sizeof(rrb->request);
188 rrb->request.hdr.cmd = CLP_QUERY_PCI_FN;
189 rrb->response.hdr.len = sizeof(rrb->response);
190 rrb->request.fh = fh;
191
192 rc = clp_req(rrb, CLP_LPS_PCI);
193 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
194 rc = clp_store_query_pci_fn(zdev, &rrb->response);
195 if (rc)
196 goto out;
197 rc = clp_query_pci_fngrp(zdev, rrb->response.pfgid);
198 } else {
199 zpci_err("Q PCI FN:\n");
200 zpci_err_clp(rrb->response.hdr.rsp, rc);
201 rc = -EIO;
202 }
203out:
204 clp_free_block(rrb);
205 return rc;
206}
207
208int clp_add_pci_device(u32 fid, u32 fh, int configured)
209{
210 struct zpci_dev *zdev;
211 int rc = -ENOMEM;
212
213 zpci_dbg(3, "add fid:%x, fh:%x, c:%d\n", fid, fh, configured);
214 zdev = kzalloc(sizeof(*zdev), GFP_KERNEL);
215 if (!zdev)
216 goto error;
217
218 zdev->fh = fh;
219 zdev->fid = fid;
220
221 /* Query function properties and update zdev */
222 rc = clp_query_pci_fn(zdev, fh);
223 if (rc)
224 goto error;
225
226 if (configured)
227 zdev->state = ZPCI_FN_STATE_CONFIGURED;
228 else
229 zdev->state = ZPCI_FN_STATE_STANDBY;
230
231 rc = zpci_create_device(zdev);
232 if (rc)
233 goto error;
234 return 0;
235
236error:
237 zpci_dbg(0, "add fid:%x, rc:%d\n", fid, rc);
238 kfree(zdev);
239 return rc;
240}
241
242/*
243 * Enable/Disable a given PCI function defined by its function handle.
244 */
245static int clp_set_pci_fn(u32 *fh, u8 nr_dma_as, u8 command)
246{
247 struct clp_req_rsp_set_pci *rrb;
248 int rc, retries = 100;
249
250 rrb = clp_alloc_block(GFP_KERNEL);
251 if (!rrb)
252 return -ENOMEM;
253
254 do {
255 memset(rrb, 0, sizeof(*rrb));
256 rrb->request.hdr.len = sizeof(rrb->request);
257 rrb->request.hdr.cmd = CLP_SET_PCI_FN;
258 rrb->response.hdr.len = sizeof(rrb->response);
259 rrb->request.fh = *fh;
260 rrb->request.oc = command;
261 rrb->request.ndas = nr_dma_as;
262
263 rc = clp_req(rrb, CLP_LPS_PCI);
264 if (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY) {
265 retries--;
266 if (retries < 0)
267 break;
268 msleep(20);
269 }
270 } while (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY);
271
272 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK)
273 *fh = rrb->response.fh;
274 else {
275 zpci_err("Set PCI FN:\n");
276 zpci_err_clp(rrb->response.hdr.rsp, rc);
277 rc = -EIO;
278 }
279 clp_free_block(rrb);
280 return rc;
281}
282
283int clp_enable_fh(struct zpci_dev *zdev, u8 nr_dma_as)
284{
285 u32 fh = zdev->fh;
286 int rc;
287
288 rc = clp_set_pci_fn(&fh, nr_dma_as, CLP_SET_ENABLE_PCI_FN);
289 zpci_dbg(3, "ena fid:%x, fh:%x, rc:%d\n", zdev->fid, fh, rc);
290 if (rc)
291 goto out;
292
293 zdev->fh = fh;
294 if (zpci_use_mio(zdev)) {
295 rc = clp_set_pci_fn(&fh, nr_dma_as, CLP_SET_ENABLE_MIO);
296 zpci_dbg(3, "ena mio fid:%x, fh:%x, rc:%d\n", zdev->fid, fh, rc);
297 if (rc)
298 clp_disable_fh(zdev);
299 }
300out:
301 return rc;
302}
303
304int clp_disable_fh(struct zpci_dev *zdev)
305{
306 u32 fh = zdev->fh;
307 int rc;
308
309 if (!zdev_enabled(zdev))
310 return 0;
311
312 rc = clp_set_pci_fn(&fh, 0, CLP_SET_DISABLE_PCI_FN);
313 zpci_dbg(3, "dis fid:%x, fh:%x, rc:%d\n", zdev->fid, fh, rc);
314 if (!rc)
315 zdev->fh = fh;
316
317 return rc;
318}
319
320static int clp_list_pci(struct clp_req_rsp_list_pci *rrb, void *data,
321 void (*cb)(struct clp_fh_list_entry *, void *))
322{
323 u64 resume_token = 0;
324 int entries, i, rc;
325
326 do {
327 memset(rrb, 0, sizeof(*rrb));
328 rrb->request.hdr.len = sizeof(rrb->request);
329 rrb->request.hdr.cmd = CLP_LIST_PCI;
330 /* store as many entries as possible */
331 rrb->response.hdr.len = CLP_BLK_SIZE - LIST_PCI_HDR_LEN;
332 rrb->request.resume_token = resume_token;
333
334 /* Get PCI function handle list */
335 rc = clp_req(rrb, CLP_LPS_PCI);
336 if (rc || rrb->response.hdr.rsp != CLP_RC_OK) {
337 zpci_err("List PCI FN:\n");
338 zpci_err_clp(rrb->response.hdr.rsp, rc);
339 rc = -EIO;
340 goto out;
341 }
342
343 update_uid_checking(rrb->response.uid_checking);
344 WARN_ON_ONCE(rrb->response.entry_size !=
345 sizeof(struct clp_fh_list_entry));
346
347 entries = (rrb->response.hdr.len - LIST_PCI_HDR_LEN) /
348 rrb->response.entry_size;
349
350 resume_token = rrb->response.resume_token;
351 for (i = 0; i < entries; i++)
352 cb(&rrb->response.fh_list[i], data);
353 } while (resume_token);
354out:
355 return rc;
356}
357
358static void __clp_add(struct clp_fh_list_entry *entry, void *data)
359{
360 struct zpci_dev *zdev;
361
362 if (!entry->vendor_id)
363 return;
364
365 zdev = get_zdev_by_fid(entry->fid);
366 if (!zdev)
367 clp_add_pci_device(entry->fid, entry->fh, entry->config_state);
368}
369
370static void __clp_update(struct clp_fh_list_entry *entry, void *data)
371{
372 struct zpci_dev *zdev;
373
374 if (!entry->vendor_id)
375 return;
376
377 zdev = get_zdev_by_fid(entry->fid);
378 if (!zdev)
379 return;
380
381 zdev->fh = entry->fh;
382}
383
384int clp_scan_pci_devices(void)
385{
386 struct clp_req_rsp_list_pci *rrb;
387 int rc;
388
389 rrb = clp_alloc_block(GFP_KERNEL);
390 if (!rrb)
391 return -ENOMEM;
392
393 rc = clp_list_pci(rrb, NULL, __clp_add);
394
395 clp_free_block(rrb);
396 return rc;
397}
398
399int clp_rescan_pci_devices(void)
400{
401 struct clp_req_rsp_list_pci *rrb;
402 int rc;
403
404 zpci_remove_reserved_devices();
405
406 rrb = clp_alloc_block(GFP_KERNEL);
407 if (!rrb)
408 return -ENOMEM;
409
410 rc = clp_list_pci(rrb, NULL, __clp_add);
411
412 clp_free_block(rrb);
413 return rc;
414}
415
416int clp_rescan_pci_devices_simple(void)
417{
418 struct clp_req_rsp_list_pci *rrb;
419 int rc;
420
421 rrb = clp_alloc_block(GFP_NOWAIT);
422 if (!rrb)
423 return -ENOMEM;
424
425 rc = clp_list_pci(rrb, NULL, __clp_update);
426
427 clp_free_block(rrb);
428 return rc;
429}
430
431struct clp_state_data {
432 u32 fid;
433 enum zpci_state state;
434};
435
436static void __clp_get_state(struct clp_fh_list_entry *entry, void *data)
437{
438 struct clp_state_data *sd = data;
439
440 if (entry->fid != sd->fid)
441 return;
442
443 sd->state = entry->config_state;
444}
445
446int clp_get_state(u32 fid, enum zpci_state *state)
447{
448 struct clp_req_rsp_list_pci *rrb;
449 struct clp_state_data sd = {fid, ZPCI_FN_STATE_RESERVED};
450 int rc;
451
452 rrb = clp_alloc_block(GFP_ATOMIC);
453 if (!rrb)
454 return -ENOMEM;
455
456 rc = clp_list_pci(rrb, &sd, __clp_get_state);
457 if (!rc)
458 *state = sd.state;
459
460 clp_free_block(rrb);
461 return rc;
462}
463
464static int clp_base_slpc(struct clp_req *req, struct clp_req_rsp_slpc *lpcb)
465{
466 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
467
468 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
469 lpcb->response.hdr.len > limit)
470 return -EINVAL;
471 return clp_req(lpcb, CLP_LPS_BASE) ? -EOPNOTSUPP : 0;
472}
473
474static int clp_base_command(struct clp_req *req, struct clp_req_hdr *lpcb)
475{
476 switch (lpcb->cmd) {
477 case 0x0001: /* store logical-processor characteristics */
478 return clp_base_slpc(req, (void *) lpcb);
479 default:
480 return -EINVAL;
481 }
482}
483
484static int clp_pci_slpc(struct clp_req *req, struct clp_req_rsp_slpc *lpcb)
485{
486 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
487
488 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
489 lpcb->response.hdr.len > limit)
490 return -EINVAL;
491 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
492}
493
494static int clp_pci_list(struct clp_req *req, struct clp_req_rsp_list_pci *lpcb)
495{
496 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
497
498 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
499 lpcb->response.hdr.len > limit)
500 return -EINVAL;
501 if (lpcb->request.reserved2 != 0)
502 return -EINVAL;
503 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
504}
505
506static int clp_pci_query(struct clp_req *req,
507 struct clp_req_rsp_query_pci *lpcb)
508{
509 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
510
511 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
512 lpcb->response.hdr.len > limit)
513 return -EINVAL;
514 if (lpcb->request.reserved2 != 0 || lpcb->request.reserved3 != 0)
515 return -EINVAL;
516 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
517}
518
519static int clp_pci_query_grp(struct clp_req *req,
520 struct clp_req_rsp_query_pci_grp *lpcb)
521{
522 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
523
524 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
525 lpcb->response.hdr.len > limit)
526 return -EINVAL;
527 if (lpcb->request.reserved2 != 0 || lpcb->request.reserved3 != 0 ||
528 lpcb->request.reserved4 != 0)
529 return -EINVAL;
530 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
531}
532
533static int clp_pci_command(struct clp_req *req, struct clp_req_hdr *lpcb)
534{
535 switch (lpcb->cmd) {
536 case 0x0001: /* store logical-processor characteristics */
537 return clp_pci_slpc(req, (void *) lpcb);
538 case 0x0002: /* list PCI functions */
539 return clp_pci_list(req, (void *) lpcb);
540 case 0x0003: /* query PCI function */
541 return clp_pci_query(req, (void *) lpcb);
542 case 0x0004: /* query PCI function group */
543 return clp_pci_query_grp(req, (void *) lpcb);
544 default:
545 return -EINVAL;
546 }
547}
548
549static int clp_normal_command(struct clp_req *req)
550{
551 struct clp_req_hdr *lpcb;
552 void __user *uptr;
553 int rc;
554
555 rc = -EINVAL;
556 if (req->lps != 0 && req->lps != 2)
557 goto out;
558
559 rc = -ENOMEM;
560 lpcb = clp_alloc_block(GFP_KERNEL);
561 if (!lpcb)
562 goto out;
563
564 rc = -EFAULT;
565 uptr = (void __force __user *)(unsigned long) req->data_p;
566 if (copy_from_user(lpcb, uptr, PAGE_SIZE) != 0)
567 goto out_free;
568
569 rc = -EINVAL;
570 if (lpcb->fmt != 0 || lpcb->reserved1 != 0 || lpcb->reserved2 != 0)
571 goto out_free;
572
573 switch (req->lps) {
574 case 0:
575 rc = clp_base_command(req, lpcb);
576 break;
577 case 2:
578 rc = clp_pci_command(req, lpcb);
579 break;
580 }
581 if (rc)
582 goto out_free;
583
584 rc = -EFAULT;
585 if (copy_to_user(uptr, lpcb, PAGE_SIZE) != 0)
586 goto out_free;
587
588 rc = 0;
589
590out_free:
591 clp_free_block(lpcb);
592out:
593 return rc;
594}
595
596static int clp_immediate_command(struct clp_req *req)
597{
598 void __user *uptr;
599 unsigned long ilp;
600 int exists;
601
602 if (req->cmd > 1 || clp_get_ilp(&ilp) != 0)
603 return -EINVAL;
604
605 uptr = (void __force __user *)(unsigned long) req->data_p;
606 if (req->cmd == 0) {
607 /* Command code 0: test for a specific processor */
608 exists = test_bit_inv(req->lps, &ilp);
609 return put_user(exists, (int __user *) uptr);
610 }
611 /* Command code 1: return bit mask of installed processors */
612 return put_user(ilp, (unsigned long __user *) uptr);
613}
614
615static long clp_misc_ioctl(struct file *filp, unsigned int cmd,
616 unsigned long arg)
617{
618 struct clp_req req;
619 void __user *argp;
620
621 if (cmd != CLP_SYNC)
622 return -EINVAL;
623
624 argp = is_compat_task() ? compat_ptr(arg) : (void __user *) arg;
625 if (copy_from_user(&req, argp, sizeof(req)))
626 return -EFAULT;
627 if (req.r != 0)
628 return -EINVAL;
629 return req.c ? clp_immediate_command(&req) : clp_normal_command(&req);
630}
631
632static int clp_misc_release(struct inode *inode, struct file *filp)
633{
634 return 0;
635}
636
637static const struct file_operations clp_misc_fops = {
638 .owner = THIS_MODULE,
639 .open = nonseekable_open,
640 .release = clp_misc_release,
641 .unlocked_ioctl = clp_misc_ioctl,
642 .compat_ioctl = clp_misc_ioctl,
643 .llseek = no_llseek,
644};
645
646static struct miscdevice clp_misc_device = {
647 .minor = MISC_DYNAMIC_MINOR,
648 .name = "clp",
649 .fops = &clp_misc_fops,
650};
651
652static int __init clp_misc_init(void)
653{
654 return misc_register(&clp_misc_device);
655}
656
657device_initcall(clp_misc_init);
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright IBM Corp. 2012
4 *
5 * Author(s):
6 * Jan Glauber <jang@linux.vnet.ibm.com>
7 */
8
9#define KMSG_COMPONENT "zpci"
10#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11
12#include <linux/compat.h>
13#include <linux/kernel.h>
14#include <linux/miscdevice.h>
15#include <linux/slab.h>
16#include <linux/err.h>
17#include <linux/delay.h>
18#include <linux/pci.h>
19#include <linux/uaccess.h>
20#include <asm/asm-extable.h>
21#include <asm/pci_debug.h>
22#include <asm/pci_clp.h>
23#include <asm/clp.h>
24#include <uapi/asm/clp.h>
25
26#include "pci_bus.h"
27
28bool zpci_unique_uid;
29
30void update_uid_checking(bool new)
31{
32 if (zpci_unique_uid != new)
33 zpci_dbg(3, "uid checking:%d\n", new);
34
35 zpci_unique_uid = new;
36}
37
38static inline void zpci_err_clp(unsigned int rsp, int rc)
39{
40 struct {
41 unsigned int rsp;
42 int rc;
43 } __packed data = {rsp, rc};
44
45 zpci_err_hex(&data, sizeof(data));
46}
47
48/*
49 * Call Logical Processor with c=1, lps=0 and command 1
50 * to get the bit mask of installed logical processors
51 */
52static inline int clp_get_ilp(unsigned long *ilp)
53{
54 unsigned long mask;
55 int cc = 3;
56
57 asm volatile (
58 " .insn rrf,0xb9a00000,%[mask],%[cmd],8,0\n"
59 "0: ipm %[cc]\n"
60 " srl %[cc],28\n"
61 "1:\n"
62 EX_TABLE(0b, 1b)
63 : [cc] "+d" (cc), [mask] "=d" (mask) : [cmd] "a" (1)
64 : "cc");
65 *ilp = mask;
66 return cc;
67}
68
69/*
70 * Call Logical Processor with c=0, the give constant lps and an lpcb request.
71 */
72static __always_inline int clp_req(void *data, unsigned int lps)
73{
74 struct { u8 _[CLP_BLK_SIZE]; } *req = data;
75 u64 ignored;
76 int cc = 3;
77
78 asm volatile (
79 " .insn rrf,0xb9a00000,%[ign],%[req],0,%[lps]\n"
80 "0: ipm %[cc]\n"
81 " srl %[cc],28\n"
82 "1:\n"
83 EX_TABLE(0b, 1b)
84 : [cc] "+d" (cc), [ign] "=d" (ignored), "+m" (*req)
85 : [req] "a" (req), [lps] "i" (lps)
86 : "cc");
87 return cc;
88}
89
90static void *clp_alloc_block(gfp_t gfp_mask)
91{
92 return (void *) __get_free_pages(gfp_mask, get_order(CLP_BLK_SIZE));
93}
94
95static void clp_free_block(void *ptr)
96{
97 free_pages((unsigned long) ptr, get_order(CLP_BLK_SIZE));
98}
99
100static void clp_store_query_pci_fngrp(struct zpci_dev *zdev,
101 struct clp_rsp_query_pci_grp *response)
102{
103 zdev->tlb_refresh = response->refresh;
104 zdev->dma_mask = response->dasm;
105 zdev->msi_addr = response->msia;
106 zdev->max_msi = response->noi;
107 zdev->fmb_update = response->mui;
108 zdev->version = response->version;
109 zdev->maxstbl = response->maxstbl;
110 zdev->dtsm = response->dtsm;
111
112 switch (response->version) {
113 case 1:
114 zdev->max_bus_speed = PCIE_SPEED_5_0GT;
115 break;
116 default:
117 zdev->max_bus_speed = PCI_SPEED_UNKNOWN;
118 break;
119 }
120}
121
122static int clp_query_pci_fngrp(struct zpci_dev *zdev, u8 pfgid)
123{
124 struct clp_req_rsp_query_pci_grp *rrb;
125 int rc;
126
127 rrb = clp_alloc_block(GFP_KERNEL);
128 if (!rrb)
129 return -ENOMEM;
130
131 memset(rrb, 0, sizeof(*rrb));
132 rrb->request.hdr.len = sizeof(rrb->request);
133 rrb->request.hdr.cmd = CLP_QUERY_PCI_FNGRP;
134 rrb->response.hdr.len = sizeof(rrb->response);
135 rrb->request.pfgid = pfgid;
136
137 rc = clp_req(rrb, CLP_LPS_PCI);
138 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK)
139 clp_store_query_pci_fngrp(zdev, &rrb->response);
140 else {
141 zpci_err("Q PCI FGRP:\n");
142 zpci_err_clp(rrb->response.hdr.rsp, rc);
143 rc = -EIO;
144 }
145 clp_free_block(rrb);
146 return rc;
147}
148
149static int clp_store_query_pci_fn(struct zpci_dev *zdev,
150 struct clp_rsp_query_pci *response)
151{
152 int i;
153
154 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
155 zdev->bars[i].val = le32_to_cpu(response->bar[i]);
156 zdev->bars[i].size = response->bar_size[i];
157 }
158 zdev->start_dma = response->sdma;
159 zdev->end_dma = response->edma;
160 zdev->pchid = response->pchid;
161 zdev->pfgid = response->pfgid;
162 zdev->pft = response->pft;
163 zdev->vfn = response->vfn;
164 zdev->port = response->port;
165 zdev->uid = response->uid;
166 zdev->fmb_length = sizeof(u32) * response->fmb_len;
167 zdev->rid_available = response->rid_avail;
168 zdev->is_physfn = response->is_physfn;
169 if (!s390_pci_no_rid && zdev->rid_available)
170 zdev->devfn = response->rid & ZPCI_RID_MASK_DEVFN;
171
172 memcpy(zdev->pfip, response->pfip, sizeof(zdev->pfip));
173 if (response->util_str_avail) {
174 memcpy(zdev->util_str, response->util_str,
175 sizeof(zdev->util_str));
176 zdev->util_str_avail = 1;
177 }
178 zdev->mio_capable = response->mio_addr_avail;
179 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
180 if (!(response->mio.valid & (1 << (PCI_STD_NUM_BARS - i - 1))))
181 continue;
182
183 zdev->bars[i].mio_wb = (void __iomem *) response->mio.addr[i].wb;
184 zdev->bars[i].mio_wt = (void __iomem *) response->mio.addr[i].wt;
185 }
186 return 0;
187}
188
189int clp_query_pci_fn(struct zpci_dev *zdev)
190{
191 struct clp_req_rsp_query_pci *rrb;
192 int rc;
193
194 rrb = clp_alloc_block(GFP_KERNEL);
195 if (!rrb)
196 return -ENOMEM;
197
198 memset(rrb, 0, sizeof(*rrb));
199 rrb->request.hdr.len = sizeof(rrb->request);
200 rrb->request.hdr.cmd = CLP_QUERY_PCI_FN;
201 rrb->response.hdr.len = sizeof(rrb->response);
202 rrb->request.fh = zdev->fh;
203
204 rc = clp_req(rrb, CLP_LPS_PCI);
205 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
206 rc = clp_store_query_pci_fn(zdev, &rrb->response);
207 if (rc)
208 goto out;
209 rc = clp_query_pci_fngrp(zdev, rrb->response.pfgid);
210 } else {
211 zpci_err("Q PCI FN:\n");
212 zpci_err_clp(rrb->response.hdr.rsp, rc);
213 rc = -EIO;
214 }
215out:
216 clp_free_block(rrb);
217 return rc;
218}
219
220/**
221 * clp_set_pci_fn() - Execute a command on a PCI function
222 * @zdev: Function that will be affected
223 * @fh: Out parameter for updated function handle
224 * @nr_dma_as: DMA address space number
225 * @command: The command code to execute
226 *
227 * Returns: 0 on success, < 0 for Linux errors (e.g. -ENOMEM), and
228 * > 0 for non-success platform responses
229 */
230static int clp_set_pci_fn(struct zpci_dev *zdev, u32 *fh, u8 nr_dma_as, u8 command)
231{
232 struct clp_req_rsp_set_pci *rrb;
233 int rc, retries = 100;
234 u32 gisa = 0;
235
236 *fh = 0;
237 rrb = clp_alloc_block(GFP_KERNEL);
238 if (!rrb)
239 return -ENOMEM;
240
241 if (command != CLP_SET_DISABLE_PCI_FN)
242 gisa = zdev->gisa;
243
244 do {
245 memset(rrb, 0, sizeof(*rrb));
246 rrb->request.hdr.len = sizeof(rrb->request);
247 rrb->request.hdr.cmd = CLP_SET_PCI_FN;
248 rrb->response.hdr.len = sizeof(rrb->response);
249 rrb->request.fh = zdev->fh;
250 rrb->request.oc = command;
251 rrb->request.ndas = nr_dma_as;
252 rrb->request.gisa = gisa;
253
254 rc = clp_req(rrb, CLP_LPS_PCI);
255 if (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY) {
256 retries--;
257 if (retries < 0)
258 break;
259 msleep(20);
260 }
261 } while (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY);
262
263 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
264 *fh = rrb->response.fh;
265 } else {
266 zpci_err("Set PCI FN:\n");
267 zpci_err_clp(rrb->response.hdr.rsp, rc);
268 if (!rc)
269 rc = rrb->response.hdr.rsp;
270 }
271 clp_free_block(rrb);
272 return rc;
273}
274
275int clp_setup_writeback_mio(void)
276{
277 struct clp_req_rsp_slpc_pci *rrb;
278 u8 wb_bit_pos;
279 int rc;
280
281 rrb = clp_alloc_block(GFP_KERNEL);
282 if (!rrb)
283 return -ENOMEM;
284
285 memset(rrb, 0, sizeof(*rrb));
286 rrb->request.hdr.len = sizeof(rrb->request);
287 rrb->request.hdr.cmd = CLP_SLPC;
288 rrb->response.hdr.len = sizeof(rrb->response);
289
290 rc = clp_req(rrb, CLP_LPS_PCI);
291 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
292 if (rrb->response.vwb) {
293 wb_bit_pos = rrb->response.mio_wb;
294 set_bit_inv(wb_bit_pos, &mio_wb_bit_mask);
295 zpci_dbg(3, "wb bit: %d\n", wb_bit_pos);
296 } else {
297 zpci_dbg(3, "wb bit: n.a.\n");
298 }
299
300 } else {
301 zpci_err("SLPC PCI:\n");
302 zpci_err_clp(rrb->response.hdr.rsp, rc);
303 rc = -EIO;
304 }
305 clp_free_block(rrb);
306 return rc;
307}
308
309int clp_enable_fh(struct zpci_dev *zdev, u32 *fh, u8 nr_dma_as)
310{
311 int rc;
312
313 rc = clp_set_pci_fn(zdev, fh, nr_dma_as, CLP_SET_ENABLE_PCI_FN);
314 zpci_dbg(3, "ena fid:%x, fh:%x, rc:%d\n", zdev->fid, *fh, rc);
315 if (!rc && zpci_use_mio(zdev)) {
316 rc = clp_set_pci_fn(zdev, fh, nr_dma_as, CLP_SET_ENABLE_MIO);
317 zpci_dbg(3, "ena mio fid:%x, fh:%x, rc:%d\n",
318 zdev->fid, *fh, rc);
319 if (rc)
320 clp_disable_fh(zdev, fh);
321 }
322 return rc;
323}
324
325int clp_disable_fh(struct zpci_dev *zdev, u32 *fh)
326{
327 int rc;
328
329 if (!zdev_enabled(zdev))
330 return 0;
331
332 rc = clp_set_pci_fn(zdev, fh, 0, CLP_SET_DISABLE_PCI_FN);
333 zpci_dbg(3, "dis fid:%x, fh:%x, rc:%d\n", zdev->fid, *fh, rc);
334 return rc;
335}
336
337static int clp_list_pci_req(struct clp_req_rsp_list_pci *rrb,
338 u64 *resume_token, int *nentries)
339{
340 int rc;
341
342 memset(rrb, 0, sizeof(*rrb));
343 rrb->request.hdr.len = sizeof(rrb->request);
344 rrb->request.hdr.cmd = CLP_LIST_PCI;
345 /* store as many entries as possible */
346 rrb->response.hdr.len = CLP_BLK_SIZE - LIST_PCI_HDR_LEN;
347 rrb->request.resume_token = *resume_token;
348
349 /* Get PCI function handle list */
350 rc = clp_req(rrb, CLP_LPS_PCI);
351 if (rc || rrb->response.hdr.rsp != CLP_RC_OK) {
352 zpci_err("List PCI FN:\n");
353 zpci_err_clp(rrb->response.hdr.rsp, rc);
354 return -EIO;
355 }
356
357 update_uid_checking(rrb->response.uid_checking);
358 WARN_ON_ONCE(rrb->response.entry_size !=
359 sizeof(struct clp_fh_list_entry));
360
361 *nentries = (rrb->response.hdr.len - LIST_PCI_HDR_LEN) /
362 rrb->response.entry_size;
363 *resume_token = rrb->response.resume_token;
364
365 return rc;
366}
367
368static int clp_list_pci(struct clp_req_rsp_list_pci *rrb, void *data,
369 void (*cb)(struct clp_fh_list_entry *, void *))
370{
371 u64 resume_token = 0;
372 int nentries, i, rc;
373
374 do {
375 rc = clp_list_pci_req(rrb, &resume_token, &nentries);
376 if (rc)
377 return rc;
378 for (i = 0; i < nentries; i++)
379 cb(&rrb->response.fh_list[i], data);
380 } while (resume_token);
381
382 return rc;
383}
384
385static int clp_find_pci(struct clp_req_rsp_list_pci *rrb, u32 fid,
386 struct clp_fh_list_entry *entry)
387{
388 struct clp_fh_list_entry *fh_list;
389 u64 resume_token = 0;
390 int nentries, i, rc;
391
392 do {
393 rc = clp_list_pci_req(rrb, &resume_token, &nentries);
394 if (rc)
395 return rc;
396 fh_list = rrb->response.fh_list;
397 for (i = 0; i < nentries; i++) {
398 if (fh_list[i].fid == fid) {
399 *entry = fh_list[i];
400 return 0;
401 }
402 }
403 } while (resume_token);
404
405 return -ENODEV;
406}
407
408static void __clp_add(struct clp_fh_list_entry *entry, void *data)
409{
410 struct zpci_dev *zdev;
411
412 if (!entry->vendor_id)
413 return;
414
415 zdev = get_zdev_by_fid(entry->fid);
416 if (zdev) {
417 zpci_zdev_put(zdev);
418 return;
419 }
420 zpci_create_device(entry->fid, entry->fh, entry->config_state);
421}
422
423int clp_scan_pci_devices(void)
424{
425 struct clp_req_rsp_list_pci *rrb;
426 int rc;
427
428 rrb = clp_alloc_block(GFP_KERNEL);
429 if (!rrb)
430 return -ENOMEM;
431
432 rc = clp_list_pci(rrb, NULL, __clp_add);
433
434 clp_free_block(rrb);
435 return rc;
436}
437
438/*
439 * Get the current function handle of the function matching @fid
440 */
441int clp_refresh_fh(u32 fid, u32 *fh)
442{
443 struct clp_req_rsp_list_pci *rrb;
444 struct clp_fh_list_entry entry;
445 int rc;
446
447 rrb = clp_alloc_block(GFP_NOWAIT);
448 if (!rrb)
449 return -ENOMEM;
450
451 rc = clp_find_pci(rrb, fid, &entry);
452 if (!rc)
453 *fh = entry.fh;
454
455 clp_free_block(rrb);
456 return rc;
457}
458
459int clp_get_state(u32 fid, enum zpci_state *state)
460{
461 struct clp_req_rsp_list_pci *rrb;
462 struct clp_fh_list_entry entry;
463 int rc;
464
465 rrb = clp_alloc_block(GFP_ATOMIC);
466 if (!rrb)
467 return -ENOMEM;
468
469 rc = clp_find_pci(rrb, fid, &entry);
470 if (!rc) {
471 *state = entry.config_state;
472 } else if (rc == -ENODEV) {
473 *state = ZPCI_FN_STATE_RESERVED;
474 rc = 0;
475 }
476
477 clp_free_block(rrb);
478 return rc;
479}
480
481static int clp_base_slpc(struct clp_req *req, struct clp_req_rsp_slpc *lpcb)
482{
483 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
484
485 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
486 lpcb->response.hdr.len > limit)
487 return -EINVAL;
488 return clp_req(lpcb, CLP_LPS_BASE) ? -EOPNOTSUPP : 0;
489}
490
491static int clp_base_command(struct clp_req *req, struct clp_req_hdr *lpcb)
492{
493 switch (lpcb->cmd) {
494 case 0x0001: /* store logical-processor characteristics */
495 return clp_base_slpc(req, (void *) lpcb);
496 default:
497 return -EINVAL;
498 }
499}
500
501static int clp_pci_slpc(struct clp_req *req, struct clp_req_rsp_slpc_pci *lpcb)
502{
503 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
504
505 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
506 lpcb->response.hdr.len > limit)
507 return -EINVAL;
508 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
509}
510
511static int clp_pci_list(struct clp_req *req, struct clp_req_rsp_list_pci *lpcb)
512{
513 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
514
515 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
516 lpcb->response.hdr.len > limit)
517 return -EINVAL;
518 if (lpcb->request.reserved2 != 0)
519 return -EINVAL;
520 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
521}
522
523static int clp_pci_query(struct clp_req *req,
524 struct clp_req_rsp_query_pci *lpcb)
525{
526 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
527
528 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
529 lpcb->response.hdr.len > limit)
530 return -EINVAL;
531 if (lpcb->request.reserved2 != 0 || lpcb->request.reserved3 != 0)
532 return -EINVAL;
533 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
534}
535
536static int clp_pci_query_grp(struct clp_req *req,
537 struct clp_req_rsp_query_pci_grp *lpcb)
538{
539 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
540
541 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
542 lpcb->response.hdr.len > limit)
543 return -EINVAL;
544 if (lpcb->request.reserved2 != 0 || lpcb->request.reserved3 != 0 ||
545 lpcb->request.reserved4 != 0)
546 return -EINVAL;
547 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
548}
549
550static int clp_pci_command(struct clp_req *req, struct clp_req_hdr *lpcb)
551{
552 switch (lpcb->cmd) {
553 case 0x0001: /* store logical-processor characteristics */
554 return clp_pci_slpc(req, (void *) lpcb);
555 case 0x0002: /* list PCI functions */
556 return clp_pci_list(req, (void *) lpcb);
557 case 0x0003: /* query PCI function */
558 return clp_pci_query(req, (void *) lpcb);
559 case 0x0004: /* query PCI function group */
560 return clp_pci_query_grp(req, (void *) lpcb);
561 default:
562 return -EINVAL;
563 }
564}
565
566static int clp_normal_command(struct clp_req *req)
567{
568 struct clp_req_hdr *lpcb;
569 void __user *uptr;
570 int rc;
571
572 rc = -EINVAL;
573 if (req->lps != 0 && req->lps != 2)
574 goto out;
575
576 rc = -ENOMEM;
577 lpcb = clp_alloc_block(GFP_KERNEL);
578 if (!lpcb)
579 goto out;
580
581 rc = -EFAULT;
582 uptr = (void __force __user *)(unsigned long) req->data_p;
583 if (copy_from_user(lpcb, uptr, PAGE_SIZE) != 0)
584 goto out_free;
585
586 rc = -EINVAL;
587 if (lpcb->fmt != 0 || lpcb->reserved1 != 0 || lpcb->reserved2 != 0)
588 goto out_free;
589
590 switch (req->lps) {
591 case 0:
592 rc = clp_base_command(req, lpcb);
593 break;
594 case 2:
595 rc = clp_pci_command(req, lpcb);
596 break;
597 }
598 if (rc)
599 goto out_free;
600
601 rc = -EFAULT;
602 if (copy_to_user(uptr, lpcb, PAGE_SIZE) != 0)
603 goto out_free;
604
605 rc = 0;
606
607out_free:
608 clp_free_block(lpcb);
609out:
610 return rc;
611}
612
613static int clp_immediate_command(struct clp_req *req)
614{
615 void __user *uptr;
616 unsigned long ilp;
617 int exists;
618
619 if (req->cmd > 1 || clp_get_ilp(&ilp) != 0)
620 return -EINVAL;
621
622 uptr = (void __force __user *)(unsigned long) req->data_p;
623 if (req->cmd == 0) {
624 /* Command code 0: test for a specific processor */
625 exists = test_bit_inv(req->lps, &ilp);
626 return put_user(exists, (int __user *) uptr);
627 }
628 /* Command code 1: return bit mask of installed processors */
629 return put_user(ilp, (unsigned long __user *) uptr);
630}
631
632static long clp_misc_ioctl(struct file *filp, unsigned int cmd,
633 unsigned long arg)
634{
635 struct clp_req req;
636 void __user *argp;
637
638 if (cmd != CLP_SYNC)
639 return -EINVAL;
640
641 argp = is_compat_task() ? compat_ptr(arg) : (void __user *) arg;
642 if (copy_from_user(&req, argp, sizeof(req)))
643 return -EFAULT;
644 if (req.r != 0)
645 return -EINVAL;
646 return req.c ? clp_immediate_command(&req) : clp_normal_command(&req);
647}
648
649static int clp_misc_release(struct inode *inode, struct file *filp)
650{
651 return 0;
652}
653
654static const struct file_operations clp_misc_fops = {
655 .owner = THIS_MODULE,
656 .open = nonseekable_open,
657 .release = clp_misc_release,
658 .unlocked_ioctl = clp_misc_ioctl,
659 .compat_ioctl = clp_misc_ioctl,
660 .llseek = no_llseek,
661};
662
663static struct miscdevice clp_misc_device = {
664 .minor = MISC_DYNAMIC_MINOR,
665 .name = "clp",
666 .fops = &clp_misc_fops,
667};
668
669builtin_misc_device(clp_misc_device);