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1/* QLogic qede NIC Driver
2 * Copyright (c) 2015-2017 QLogic Corporation
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32#include <linux/module.h>
33#include <linux/pci.h>
34#include <linux/version.h>
35#include <linux/device.h>
36#include <linux/netdevice.h>
37#include <linux/etherdevice.h>
38#include <linux/skbuff.h>
39#include <linux/errno.h>
40#include <linux/list.h>
41#include <linux/string.h>
42#include <linux/dma-mapping.h>
43#include <linux/interrupt.h>
44#include <asm/byteorder.h>
45#include <asm/param.h>
46#include <linux/io.h>
47#include <linux/netdev_features.h>
48#include <linux/udp.h>
49#include <linux/tcp.h>
50#include <net/udp_tunnel.h>
51#include <linux/ip.h>
52#include <net/ipv6.h>
53#include <net/tcp.h>
54#include <linux/if_ether.h>
55#include <linux/if_vlan.h>
56#include <linux/pkt_sched.h>
57#include <linux/ethtool.h>
58#include <linux/in.h>
59#include <linux/random.h>
60#include <net/ip6_checksum.h>
61#include <linux/bitops.h>
62#include <linux/vmalloc.h>
63#include "qede.h"
64#include "qede_ptp.h"
65
66static char version[] =
67 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
68
69MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
70MODULE_LICENSE("GPL");
71MODULE_VERSION(DRV_MODULE_VERSION);
72
73static uint debug;
74module_param(debug, uint, 0);
75MODULE_PARM_DESC(debug, " Default debug msglevel");
76
77static const struct qed_eth_ops *qed_ops;
78
79#define CHIP_NUM_57980S_40 0x1634
80#define CHIP_NUM_57980S_10 0x1666
81#define CHIP_NUM_57980S_MF 0x1636
82#define CHIP_NUM_57980S_100 0x1644
83#define CHIP_NUM_57980S_50 0x1654
84#define CHIP_NUM_57980S_25 0x1656
85#define CHIP_NUM_57980S_IOV 0x1664
86#define CHIP_NUM_AH 0x8070
87#define CHIP_NUM_AH_IOV 0x8090
88
89#ifndef PCI_DEVICE_ID_NX2_57980E
90#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
91#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
92#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
93#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
94#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
95#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
96#define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
97#define PCI_DEVICE_ID_AH CHIP_NUM_AH
98#define PCI_DEVICE_ID_AH_IOV CHIP_NUM_AH_IOV
99
100#endif
101
102enum qede_pci_private {
103 QEDE_PRIVATE_PF,
104 QEDE_PRIVATE_VF
105};
106
107static const struct pci_device_id qede_pci_tbl[] = {
108 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
109 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
110 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
111 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
112 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
113 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
114#ifdef CONFIG_QED_SRIOV
115 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
116#endif
117 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH), QEDE_PRIVATE_PF},
118#ifdef CONFIG_QED_SRIOV
119 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH_IOV), QEDE_PRIVATE_VF},
120#endif
121 { 0 }
122};
123
124MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
125
126static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
127
128#define TX_TIMEOUT (5 * HZ)
129
130/* Utilize last protocol index for XDP */
131#define XDP_PI 11
132
133static void qede_remove(struct pci_dev *pdev);
134static void qede_shutdown(struct pci_dev *pdev);
135static void qede_link_update(void *dev, struct qed_link_output *link);
136static void qede_schedule_recovery_handler(void *dev);
137static void qede_recovery_handler(struct qede_dev *edev);
138static void qede_get_eth_tlv_data(void *edev, void *data);
139static void qede_get_generic_tlv_data(void *edev,
140 struct qed_generic_tlvs *data);
141
142#ifdef CONFIG_QED_SRIOV
143static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos,
144 __be16 vlan_proto)
145{
146 struct qede_dev *edev = netdev_priv(ndev);
147
148 if (vlan > 4095) {
149 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
150 return -EINVAL;
151 }
152
153 if (vlan_proto != htons(ETH_P_8021Q))
154 return -EPROTONOSUPPORT;
155
156 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
157 vlan, vf);
158
159 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
160}
161
162static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
163{
164 struct qede_dev *edev = netdev_priv(ndev);
165
166 DP_VERBOSE(edev, QED_MSG_IOV,
167 "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n",
168 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx);
169
170 if (!is_valid_ether_addr(mac)) {
171 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
172 return -EINVAL;
173 }
174
175 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
176}
177
178static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
179{
180 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
181 struct qed_dev_info *qed_info = &edev->dev_info.common;
182 struct qed_update_vport_params *vport_params;
183 int rc;
184
185 vport_params = vzalloc(sizeof(*vport_params));
186 if (!vport_params)
187 return -ENOMEM;
188 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
189
190 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
191
192 /* Enable/Disable Tx switching for PF */
193 if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
194 !qed_info->b_inter_pf_switch && qed_info->tx_switching) {
195 vport_params->vport_id = 0;
196 vport_params->update_tx_switching_flg = 1;
197 vport_params->tx_switching_flg = num_vfs_param ? 1 : 0;
198 edev->ops->vport_update(edev->cdev, vport_params);
199 }
200
201 vfree(vport_params);
202 return rc;
203}
204#endif
205
206static struct pci_driver qede_pci_driver = {
207 .name = "qede",
208 .id_table = qede_pci_tbl,
209 .probe = qede_probe,
210 .remove = qede_remove,
211 .shutdown = qede_shutdown,
212#ifdef CONFIG_QED_SRIOV
213 .sriov_configure = qede_sriov_configure,
214#endif
215};
216
217static struct qed_eth_cb_ops qede_ll_ops = {
218 {
219#ifdef CONFIG_RFS_ACCEL
220 .arfs_filter_op = qede_arfs_filter_op,
221#endif
222 .link_update = qede_link_update,
223 .schedule_recovery_handler = qede_schedule_recovery_handler,
224 .get_generic_tlv_data = qede_get_generic_tlv_data,
225 .get_protocol_tlv_data = qede_get_eth_tlv_data,
226 },
227 .force_mac = qede_force_mac,
228 .ports_update = qede_udp_ports_update,
229};
230
231static int qede_netdev_event(struct notifier_block *this, unsigned long event,
232 void *ptr)
233{
234 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
235 struct ethtool_drvinfo drvinfo;
236 struct qede_dev *edev;
237
238 if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR)
239 goto done;
240
241 /* Check whether this is a qede device */
242 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
243 goto done;
244
245 memset(&drvinfo, 0, sizeof(drvinfo));
246 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
247 if (strcmp(drvinfo.driver, "qede"))
248 goto done;
249 edev = netdev_priv(ndev);
250
251 switch (event) {
252 case NETDEV_CHANGENAME:
253 /* Notify qed of the name change */
254 if (!edev->ops || !edev->ops->common)
255 goto done;
256 edev->ops->common->set_name(edev->cdev, edev->ndev->name);
257 break;
258 case NETDEV_CHANGEADDR:
259 edev = netdev_priv(ndev);
260 qede_rdma_event_changeaddr(edev);
261 break;
262 }
263
264done:
265 return NOTIFY_DONE;
266}
267
268static struct notifier_block qede_netdev_notifier = {
269 .notifier_call = qede_netdev_event,
270};
271
272static
273int __init qede_init(void)
274{
275 int ret;
276
277 pr_info("qede_init: %s\n", version);
278
279 qed_ops = qed_get_eth_ops();
280 if (!qed_ops) {
281 pr_notice("Failed to get qed ethtool operations\n");
282 return -EINVAL;
283 }
284
285 /* Must register notifier before pci ops, since we might miss
286 * interface rename after pci probe and netdev registration.
287 */
288 ret = register_netdevice_notifier(&qede_netdev_notifier);
289 if (ret) {
290 pr_notice("Failed to register netdevice_notifier\n");
291 qed_put_eth_ops();
292 return -EINVAL;
293 }
294
295 ret = pci_register_driver(&qede_pci_driver);
296 if (ret) {
297 pr_notice("Failed to register driver\n");
298 unregister_netdevice_notifier(&qede_netdev_notifier);
299 qed_put_eth_ops();
300 return -EINVAL;
301 }
302
303 return 0;
304}
305
306static void __exit qede_cleanup(void)
307{
308 if (debug & QED_LOG_INFO_MASK)
309 pr_info("qede_cleanup called\n");
310
311 unregister_netdevice_notifier(&qede_netdev_notifier);
312 pci_unregister_driver(&qede_pci_driver);
313 qed_put_eth_ops();
314}
315
316module_init(qede_init);
317module_exit(qede_cleanup);
318
319static int qede_open(struct net_device *ndev);
320static int qede_close(struct net_device *ndev);
321
322void qede_fill_by_demand_stats(struct qede_dev *edev)
323{
324 struct qede_stats_common *p_common = &edev->stats.common;
325 struct qed_eth_stats stats;
326
327 edev->ops->get_vport_stats(edev->cdev, &stats);
328
329 p_common->no_buff_discards = stats.common.no_buff_discards;
330 p_common->packet_too_big_discard = stats.common.packet_too_big_discard;
331 p_common->ttl0_discard = stats.common.ttl0_discard;
332 p_common->rx_ucast_bytes = stats.common.rx_ucast_bytes;
333 p_common->rx_mcast_bytes = stats.common.rx_mcast_bytes;
334 p_common->rx_bcast_bytes = stats.common.rx_bcast_bytes;
335 p_common->rx_ucast_pkts = stats.common.rx_ucast_pkts;
336 p_common->rx_mcast_pkts = stats.common.rx_mcast_pkts;
337 p_common->rx_bcast_pkts = stats.common.rx_bcast_pkts;
338 p_common->mftag_filter_discards = stats.common.mftag_filter_discards;
339 p_common->mac_filter_discards = stats.common.mac_filter_discards;
340 p_common->gft_filter_drop = stats.common.gft_filter_drop;
341
342 p_common->tx_ucast_bytes = stats.common.tx_ucast_bytes;
343 p_common->tx_mcast_bytes = stats.common.tx_mcast_bytes;
344 p_common->tx_bcast_bytes = stats.common.tx_bcast_bytes;
345 p_common->tx_ucast_pkts = stats.common.tx_ucast_pkts;
346 p_common->tx_mcast_pkts = stats.common.tx_mcast_pkts;
347 p_common->tx_bcast_pkts = stats.common.tx_bcast_pkts;
348 p_common->tx_err_drop_pkts = stats.common.tx_err_drop_pkts;
349 p_common->coalesced_pkts = stats.common.tpa_coalesced_pkts;
350 p_common->coalesced_events = stats.common.tpa_coalesced_events;
351 p_common->coalesced_aborts_num = stats.common.tpa_aborts_num;
352 p_common->non_coalesced_pkts = stats.common.tpa_not_coalesced_pkts;
353 p_common->coalesced_bytes = stats.common.tpa_coalesced_bytes;
354
355 p_common->rx_64_byte_packets = stats.common.rx_64_byte_packets;
356 p_common->rx_65_to_127_byte_packets =
357 stats.common.rx_65_to_127_byte_packets;
358 p_common->rx_128_to_255_byte_packets =
359 stats.common.rx_128_to_255_byte_packets;
360 p_common->rx_256_to_511_byte_packets =
361 stats.common.rx_256_to_511_byte_packets;
362 p_common->rx_512_to_1023_byte_packets =
363 stats.common.rx_512_to_1023_byte_packets;
364 p_common->rx_1024_to_1518_byte_packets =
365 stats.common.rx_1024_to_1518_byte_packets;
366 p_common->rx_crc_errors = stats.common.rx_crc_errors;
367 p_common->rx_mac_crtl_frames = stats.common.rx_mac_crtl_frames;
368 p_common->rx_pause_frames = stats.common.rx_pause_frames;
369 p_common->rx_pfc_frames = stats.common.rx_pfc_frames;
370 p_common->rx_align_errors = stats.common.rx_align_errors;
371 p_common->rx_carrier_errors = stats.common.rx_carrier_errors;
372 p_common->rx_oversize_packets = stats.common.rx_oversize_packets;
373 p_common->rx_jabbers = stats.common.rx_jabbers;
374 p_common->rx_undersize_packets = stats.common.rx_undersize_packets;
375 p_common->rx_fragments = stats.common.rx_fragments;
376 p_common->tx_64_byte_packets = stats.common.tx_64_byte_packets;
377 p_common->tx_65_to_127_byte_packets =
378 stats.common.tx_65_to_127_byte_packets;
379 p_common->tx_128_to_255_byte_packets =
380 stats.common.tx_128_to_255_byte_packets;
381 p_common->tx_256_to_511_byte_packets =
382 stats.common.tx_256_to_511_byte_packets;
383 p_common->tx_512_to_1023_byte_packets =
384 stats.common.tx_512_to_1023_byte_packets;
385 p_common->tx_1024_to_1518_byte_packets =
386 stats.common.tx_1024_to_1518_byte_packets;
387 p_common->tx_pause_frames = stats.common.tx_pause_frames;
388 p_common->tx_pfc_frames = stats.common.tx_pfc_frames;
389 p_common->brb_truncates = stats.common.brb_truncates;
390 p_common->brb_discards = stats.common.brb_discards;
391 p_common->tx_mac_ctrl_frames = stats.common.tx_mac_ctrl_frames;
392 p_common->link_change_count = stats.common.link_change_count;
393 p_common->ptp_skip_txts = edev->ptp_skip_txts;
394
395 if (QEDE_IS_BB(edev)) {
396 struct qede_stats_bb *p_bb = &edev->stats.bb;
397
398 p_bb->rx_1519_to_1522_byte_packets =
399 stats.bb.rx_1519_to_1522_byte_packets;
400 p_bb->rx_1519_to_2047_byte_packets =
401 stats.bb.rx_1519_to_2047_byte_packets;
402 p_bb->rx_2048_to_4095_byte_packets =
403 stats.bb.rx_2048_to_4095_byte_packets;
404 p_bb->rx_4096_to_9216_byte_packets =
405 stats.bb.rx_4096_to_9216_byte_packets;
406 p_bb->rx_9217_to_16383_byte_packets =
407 stats.bb.rx_9217_to_16383_byte_packets;
408 p_bb->tx_1519_to_2047_byte_packets =
409 stats.bb.tx_1519_to_2047_byte_packets;
410 p_bb->tx_2048_to_4095_byte_packets =
411 stats.bb.tx_2048_to_4095_byte_packets;
412 p_bb->tx_4096_to_9216_byte_packets =
413 stats.bb.tx_4096_to_9216_byte_packets;
414 p_bb->tx_9217_to_16383_byte_packets =
415 stats.bb.tx_9217_to_16383_byte_packets;
416 p_bb->tx_lpi_entry_count = stats.bb.tx_lpi_entry_count;
417 p_bb->tx_total_collisions = stats.bb.tx_total_collisions;
418 } else {
419 struct qede_stats_ah *p_ah = &edev->stats.ah;
420
421 p_ah->rx_1519_to_max_byte_packets =
422 stats.ah.rx_1519_to_max_byte_packets;
423 p_ah->tx_1519_to_max_byte_packets =
424 stats.ah.tx_1519_to_max_byte_packets;
425 }
426}
427
428static void qede_get_stats64(struct net_device *dev,
429 struct rtnl_link_stats64 *stats)
430{
431 struct qede_dev *edev = netdev_priv(dev);
432 struct qede_stats_common *p_common;
433
434 qede_fill_by_demand_stats(edev);
435 p_common = &edev->stats.common;
436
437 stats->rx_packets = p_common->rx_ucast_pkts + p_common->rx_mcast_pkts +
438 p_common->rx_bcast_pkts;
439 stats->tx_packets = p_common->tx_ucast_pkts + p_common->tx_mcast_pkts +
440 p_common->tx_bcast_pkts;
441
442 stats->rx_bytes = p_common->rx_ucast_bytes + p_common->rx_mcast_bytes +
443 p_common->rx_bcast_bytes;
444 stats->tx_bytes = p_common->tx_ucast_bytes + p_common->tx_mcast_bytes +
445 p_common->tx_bcast_bytes;
446
447 stats->tx_errors = p_common->tx_err_drop_pkts;
448 stats->multicast = p_common->rx_mcast_pkts + p_common->rx_bcast_pkts;
449
450 stats->rx_fifo_errors = p_common->no_buff_discards;
451
452 if (QEDE_IS_BB(edev))
453 stats->collisions = edev->stats.bb.tx_total_collisions;
454 stats->rx_crc_errors = p_common->rx_crc_errors;
455 stats->rx_frame_errors = p_common->rx_align_errors;
456}
457
458#ifdef CONFIG_QED_SRIOV
459static int qede_get_vf_config(struct net_device *dev, int vfidx,
460 struct ifla_vf_info *ivi)
461{
462 struct qede_dev *edev = netdev_priv(dev);
463
464 if (!edev->ops)
465 return -EINVAL;
466
467 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
468}
469
470static int qede_set_vf_rate(struct net_device *dev, int vfidx,
471 int min_tx_rate, int max_tx_rate)
472{
473 struct qede_dev *edev = netdev_priv(dev);
474
475 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
476 max_tx_rate);
477}
478
479static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
480{
481 struct qede_dev *edev = netdev_priv(dev);
482
483 if (!edev->ops)
484 return -EINVAL;
485
486 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
487}
488
489static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
490 int link_state)
491{
492 struct qede_dev *edev = netdev_priv(dev);
493
494 if (!edev->ops)
495 return -EINVAL;
496
497 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
498}
499
500static int qede_set_vf_trust(struct net_device *dev, int vfidx, bool setting)
501{
502 struct qede_dev *edev = netdev_priv(dev);
503
504 if (!edev->ops)
505 return -EINVAL;
506
507 return edev->ops->iov->set_trust(edev->cdev, vfidx, setting);
508}
509#endif
510
511static int qede_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
512{
513 struct qede_dev *edev = netdev_priv(dev);
514
515 if (!netif_running(dev))
516 return -EAGAIN;
517
518 switch (cmd) {
519 case SIOCSHWTSTAMP:
520 return qede_ptp_hw_ts(edev, ifr);
521 default:
522 DP_VERBOSE(edev, QED_MSG_DEBUG,
523 "default IOCTL cmd 0x%x\n", cmd);
524 return -EOPNOTSUPP;
525 }
526
527 return 0;
528}
529
530static int qede_setup_tc(struct net_device *ndev, u8 num_tc)
531{
532 struct qede_dev *edev = netdev_priv(ndev);
533 int cos, count, offset;
534
535 if (num_tc > edev->dev_info.num_tc)
536 return -EINVAL;
537
538 netdev_reset_tc(ndev);
539 netdev_set_num_tc(ndev, num_tc);
540
541 for_each_cos_in_txq(edev, cos) {
542 count = QEDE_TSS_COUNT(edev);
543 offset = cos * QEDE_TSS_COUNT(edev);
544 netdev_set_tc_queue(ndev, cos, count, offset);
545 }
546
547 return 0;
548}
549
550static int
551qede_set_flower(struct qede_dev *edev, struct flow_cls_offload *f,
552 __be16 proto)
553{
554 switch (f->command) {
555 case FLOW_CLS_REPLACE:
556 return qede_add_tc_flower_fltr(edev, proto, f);
557 case FLOW_CLS_DESTROY:
558 return qede_delete_flow_filter(edev, f->cookie);
559 default:
560 return -EOPNOTSUPP;
561 }
562}
563
564static int qede_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
565 void *cb_priv)
566{
567 struct flow_cls_offload *f;
568 struct qede_dev *edev = cb_priv;
569
570 if (!tc_cls_can_offload_and_chain0(edev->ndev, type_data))
571 return -EOPNOTSUPP;
572
573 switch (type) {
574 case TC_SETUP_CLSFLOWER:
575 f = type_data;
576 return qede_set_flower(edev, f, f->common.protocol);
577 default:
578 return -EOPNOTSUPP;
579 }
580}
581
582static LIST_HEAD(qede_block_cb_list);
583
584static int
585qede_setup_tc_offload(struct net_device *dev, enum tc_setup_type type,
586 void *type_data)
587{
588 struct qede_dev *edev = netdev_priv(dev);
589 struct tc_mqprio_qopt *mqprio;
590
591 switch (type) {
592 case TC_SETUP_BLOCK:
593 return flow_block_cb_setup_simple(type_data,
594 &qede_block_cb_list,
595 qede_setup_tc_block_cb,
596 edev, edev, true);
597 case TC_SETUP_QDISC_MQPRIO:
598 mqprio = type_data;
599
600 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
601 return qede_setup_tc(dev, mqprio->num_tc);
602 default:
603 return -EOPNOTSUPP;
604 }
605}
606
607static const struct net_device_ops qede_netdev_ops = {
608 .ndo_open = qede_open,
609 .ndo_stop = qede_close,
610 .ndo_start_xmit = qede_start_xmit,
611 .ndo_select_queue = qede_select_queue,
612 .ndo_set_rx_mode = qede_set_rx_mode,
613 .ndo_set_mac_address = qede_set_mac_addr,
614 .ndo_validate_addr = eth_validate_addr,
615 .ndo_change_mtu = qede_change_mtu,
616 .ndo_do_ioctl = qede_ioctl,
617#ifdef CONFIG_QED_SRIOV
618 .ndo_set_vf_mac = qede_set_vf_mac,
619 .ndo_set_vf_vlan = qede_set_vf_vlan,
620 .ndo_set_vf_trust = qede_set_vf_trust,
621#endif
622 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
623 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
624 .ndo_fix_features = qede_fix_features,
625 .ndo_set_features = qede_set_features,
626 .ndo_get_stats64 = qede_get_stats64,
627#ifdef CONFIG_QED_SRIOV
628 .ndo_set_vf_link_state = qede_set_vf_link_state,
629 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
630 .ndo_get_vf_config = qede_get_vf_config,
631 .ndo_set_vf_rate = qede_set_vf_rate,
632#endif
633 .ndo_udp_tunnel_add = qede_udp_tunnel_add,
634 .ndo_udp_tunnel_del = qede_udp_tunnel_del,
635 .ndo_features_check = qede_features_check,
636 .ndo_bpf = qede_xdp,
637#ifdef CONFIG_RFS_ACCEL
638 .ndo_rx_flow_steer = qede_rx_flow_steer,
639#endif
640 .ndo_setup_tc = qede_setup_tc_offload,
641};
642
643static const struct net_device_ops qede_netdev_vf_ops = {
644 .ndo_open = qede_open,
645 .ndo_stop = qede_close,
646 .ndo_start_xmit = qede_start_xmit,
647 .ndo_select_queue = qede_select_queue,
648 .ndo_set_rx_mode = qede_set_rx_mode,
649 .ndo_set_mac_address = qede_set_mac_addr,
650 .ndo_validate_addr = eth_validate_addr,
651 .ndo_change_mtu = qede_change_mtu,
652 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
653 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
654 .ndo_fix_features = qede_fix_features,
655 .ndo_set_features = qede_set_features,
656 .ndo_get_stats64 = qede_get_stats64,
657 .ndo_udp_tunnel_add = qede_udp_tunnel_add,
658 .ndo_udp_tunnel_del = qede_udp_tunnel_del,
659 .ndo_features_check = qede_features_check,
660};
661
662static const struct net_device_ops qede_netdev_vf_xdp_ops = {
663 .ndo_open = qede_open,
664 .ndo_stop = qede_close,
665 .ndo_start_xmit = qede_start_xmit,
666 .ndo_select_queue = qede_select_queue,
667 .ndo_set_rx_mode = qede_set_rx_mode,
668 .ndo_set_mac_address = qede_set_mac_addr,
669 .ndo_validate_addr = eth_validate_addr,
670 .ndo_change_mtu = qede_change_mtu,
671 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
672 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
673 .ndo_fix_features = qede_fix_features,
674 .ndo_set_features = qede_set_features,
675 .ndo_get_stats64 = qede_get_stats64,
676 .ndo_udp_tunnel_add = qede_udp_tunnel_add,
677 .ndo_udp_tunnel_del = qede_udp_tunnel_del,
678 .ndo_features_check = qede_features_check,
679 .ndo_bpf = qede_xdp,
680};
681
682/* -------------------------------------------------------------------------
683 * START OF PROBE / REMOVE
684 * -------------------------------------------------------------------------
685 */
686
687static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
688 struct pci_dev *pdev,
689 struct qed_dev_eth_info *info,
690 u32 dp_module, u8 dp_level)
691{
692 struct net_device *ndev;
693 struct qede_dev *edev;
694
695 ndev = alloc_etherdev_mqs(sizeof(*edev),
696 info->num_queues * info->num_tc,
697 info->num_queues);
698 if (!ndev) {
699 pr_err("etherdev allocation failed\n");
700 return NULL;
701 }
702
703 edev = netdev_priv(ndev);
704 edev->ndev = ndev;
705 edev->cdev = cdev;
706 edev->pdev = pdev;
707 edev->dp_module = dp_module;
708 edev->dp_level = dp_level;
709 edev->ops = qed_ops;
710 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
711 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
712
713 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n",
714 info->num_queues, info->num_queues);
715
716 SET_NETDEV_DEV(ndev, &pdev->dev);
717
718 memset(&edev->stats, 0, sizeof(edev->stats));
719 memcpy(&edev->dev_info, info, sizeof(*info));
720
721 /* As ethtool doesn't have the ability to show WoL behavior as
722 * 'default', if device supports it declare it's enabled.
723 */
724 if (edev->dev_info.common.wol_support)
725 edev->wol_enabled = true;
726
727 INIT_LIST_HEAD(&edev->vlan_list);
728
729 return edev;
730}
731
732static void qede_init_ndev(struct qede_dev *edev)
733{
734 struct net_device *ndev = edev->ndev;
735 struct pci_dev *pdev = edev->pdev;
736 bool udp_tunnel_enable = false;
737 netdev_features_t hw_features;
738
739 pci_set_drvdata(pdev, ndev);
740
741 ndev->mem_start = edev->dev_info.common.pci_mem_start;
742 ndev->base_addr = ndev->mem_start;
743 ndev->mem_end = edev->dev_info.common.pci_mem_end;
744 ndev->irq = edev->dev_info.common.pci_irq;
745
746 ndev->watchdog_timeo = TX_TIMEOUT;
747
748 if (IS_VF(edev)) {
749 if (edev->dev_info.xdp_supported)
750 ndev->netdev_ops = &qede_netdev_vf_xdp_ops;
751 else
752 ndev->netdev_ops = &qede_netdev_vf_ops;
753 } else {
754 ndev->netdev_ops = &qede_netdev_ops;
755 }
756
757 qede_set_ethtool_ops(ndev);
758
759 ndev->priv_flags |= IFF_UNICAST_FLT;
760
761 /* user-changeble features */
762 hw_features = NETIF_F_GRO | NETIF_F_GRO_HW | NETIF_F_SG |
763 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
764 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_TC;
765
766 if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1)
767 hw_features |= NETIF_F_NTUPLE;
768
769 if (edev->dev_info.common.vxlan_enable ||
770 edev->dev_info.common.geneve_enable)
771 udp_tunnel_enable = true;
772
773 if (udp_tunnel_enable || edev->dev_info.common.gre_enable) {
774 hw_features |= NETIF_F_TSO_ECN;
775 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
776 NETIF_F_SG | NETIF_F_TSO |
777 NETIF_F_TSO_ECN | NETIF_F_TSO6 |
778 NETIF_F_RXCSUM;
779 }
780
781 if (udp_tunnel_enable) {
782 hw_features |= (NETIF_F_GSO_UDP_TUNNEL |
783 NETIF_F_GSO_UDP_TUNNEL_CSUM);
784 ndev->hw_enc_features |= (NETIF_F_GSO_UDP_TUNNEL |
785 NETIF_F_GSO_UDP_TUNNEL_CSUM);
786 }
787
788 if (edev->dev_info.common.gre_enable) {
789 hw_features |= (NETIF_F_GSO_GRE | NETIF_F_GSO_GRE_CSUM);
790 ndev->hw_enc_features |= (NETIF_F_GSO_GRE |
791 NETIF_F_GSO_GRE_CSUM);
792 }
793
794 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
795 NETIF_F_HIGHDMA;
796 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
797 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
798 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
799
800 ndev->hw_features = hw_features;
801
802 /* MTU range: 46 - 9600 */
803 ndev->min_mtu = ETH_ZLEN - ETH_HLEN;
804 ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE;
805
806 /* Set network device HW mac */
807 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
808
809 ndev->mtu = edev->dev_info.common.mtu;
810}
811
812/* This function converts from 32b param to two params of level and module
813 * Input 32b decoding:
814 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
815 * 'happy' flow, e.g. memory allocation failed.
816 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
817 * and provide important parameters.
818 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
819 * module. VERBOSE prints are for tracking the specific flow in low level.
820 *
821 * Notice that the level should be that of the lowest required logs.
822 */
823void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
824{
825 *p_dp_level = QED_LEVEL_NOTICE;
826 *p_dp_module = 0;
827
828 if (debug & QED_LOG_VERBOSE_MASK) {
829 *p_dp_level = QED_LEVEL_VERBOSE;
830 *p_dp_module = (debug & 0x3FFFFFFF);
831 } else if (debug & QED_LOG_INFO_MASK) {
832 *p_dp_level = QED_LEVEL_INFO;
833 } else if (debug & QED_LOG_NOTICE_MASK) {
834 *p_dp_level = QED_LEVEL_NOTICE;
835 }
836}
837
838static void qede_free_fp_array(struct qede_dev *edev)
839{
840 if (edev->fp_array) {
841 struct qede_fastpath *fp;
842 int i;
843
844 for_each_queue(i) {
845 fp = &edev->fp_array[i];
846
847 kfree(fp->sb_info);
848 /* Handle mem alloc failure case where qede_init_fp
849 * didn't register xdp_rxq_info yet.
850 * Implicit only (fp->type & QEDE_FASTPATH_RX)
851 */
852 if (fp->rxq && xdp_rxq_info_is_reg(&fp->rxq->xdp_rxq))
853 xdp_rxq_info_unreg(&fp->rxq->xdp_rxq);
854 kfree(fp->rxq);
855 kfree(fp->xdp_tx);
856 kfree(fp->txq);
857 }
858 kfree(edev->fp_array);
859 }
860
861 edev->num_queues = 0;
862 edev->fp_num_tx = 0;
863 edev->fp_num_rx = 0;
864}
865
866static int qede_alloc_fp_array(struct qede_dev *edev)
867{
868 u8 fp_combined, fp_rx = edev->fp_num_rx;
869 struct qede_fastpath *fp;
870 int i;
871
872 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev),
873 sizeof(*edev->fp_array), GFP_KERNEL);
874 if (!edev->fp_array) {
875 DP_NOTICE(edev, "fp array allocation failed\n");
876 goto err;
877 }
878
879 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx;
880
881 /* Allocate the FP elements for Rx queues followed by combined and then
882 * the Tx. This ordering should be maintained so that the respective
883 * queues (Rx or Tx) will be together in the fastpath array and the
884 * associated ids will be sequential.
885 */
886 for_each_queue(i) {
887 fp = &edev->fp_array[i];
888
889 fp->sb_info = kzalloc(sizeof(*fp->sb_info), GFP_KERNEL);
890 if (!fp->sb_info) {
891 DP_NOTICE(edev, "sb info struct allocation failed\n");
892 goto err;
893 }
894
895 if (fp_rx) {
896 fp->type = QEDE_FASTPATH_RX;
897 fp_rx--;
898 } else if (fp_combined) {
899 fp->type = QEDE_FASTPATH_COMBINED;
900 fp_combined--;
901 } else {
902 fp->type = QEDE_FASTPATH_TX;
903 }
904
905 if (fp->type & QEDE_FASTPATH_TX) {
906 fp->txq = kcalloc(edev->dev_info.num_tc,
907 sizeof(*fp->txq), GFP_KERNEL);
908 if (!fp->txq)
909 goto err;
910 }
911
912 if (fp->type & QEDE_FASTPATH_RX) {
913 fp->rxq = kzalloc(sizeof(*fp->rxq), GFP_KERNEL);
914 if (!fp->rxq)
915 goto err;
916
917 if (edev->xdp_prog) {
918 fp->xdp_tx = kzalloc(sizeof(*fp->xdp_tx),
919 GFP_KERNEL);
920 if (!fp->xdp_tx)
921 goto err;
922 fp->type |= QEDE_FASTPATH_XDP;
923 }
924 }
925 }
926
927 return 0;
928err:
929 qede_free_fp_array(edev);
930 return -ENOMEM;
931}
932
933/* The qede lock is used to protect driver state change and driver flows that
934 * are not reentrant.
935 */
936void __qede_lock(struct qede_dev *edev)
937{
938 mutex_lock(&edev->qede_lock);
939}
940
941void __qede_unlock(struct qede_dev *edev)
942{
943 mutex_unlock(&edev->qede_lock);
944}
945
946/* This version of the lock should be used when acquiring the RTNL lock is also
947 * needed in addition to the internal qede lock.
948 */
949static void qede_lock(struct qede_dev *edev)
950{
951 rtnl_lock();
952 __qede_lock(edev);
953}
954
955static void qede_unlock(struct qede_dev *edev)
956{
957 __qede_unlock(edev);
958 rtnl_unlock();
959}
960
961static void qede_sp_task(struct work_struct *work)
962{
963 struct qede_dev *edev = container_of(work, struct qede_dev,
964 sp_task.work);
965
966 /* The locking scheme depends on the specific flag:
967 * In case of QEDE_SP_RECOVERY, acquiring the RTNL lock is required to
968 * ensure that ongoing flows are ended and new ones are not started.
969 * In other cases - only the internal qede lock should be acquired.
970 */
971
972 if (test_and_clear_bit(QEDE_SP_RECOVERY, &edev->sp_flags)) {
973#ifdef CONFIG_QED_SRIOV
974 /* SRIOV must be disabled outside the lock to avoid a deadlock.
975 * The recovery of the active VFs is currently not supported.
976 */
977 qede_sriov_configure(edev->pdev, 0);
978#endif
979 qede_lock(edev);
980 qede_recovery_handler(edev);
981 qede_unlock(edev);
982 }
983
984 __qede_lock(edev);
985
986 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
987 if (edev->state == QEDE_STATE_OPEN)
988 qede_config_rx_mode(edev->ndev);
989
990#ifdef CONFIG_RFS_ACCEL
991 if (test_and_clear_bit(QEDE_SP_ARFS_CONFIG, &edev->sp_flags)) {
992 if (edev->state == QEDE_STATE_OPEN)
993 qede_process_arfs_filters(edev, false);
994 }
995#endif
996 __qede_unlock(edev);
997}
998
999static void qede_update_pf_params(struct qed_dev *cdev)
1000{
1001 struct qed_pf_params pf_params;
1002 u16 num_cons;
1003
1004 /* 64 rx + 64 tx + 64 XDP */
1005 memset(&pf_params, 0, sizeof(struct qed_pf_params));
1006
1007 /* 1 rx + 1 xdp + max tx cos */
1008 num_cons = QED_MIN_L2_CONS;
1009
1010 pf_params.eth_pf_params.num_cons = (MAX_SB_PER_PF_MIMD - 1) * num_cons;
1011
1012 /* Same for VFs - make sure they'll have sufficient connections
1013 * to support XDP Tx queues.
1014 */
1015 pf_params.eth_pf_params.num_vf_cons = 48;
1016
1017 pf_params.eth_pf_params.num_arfs_filters = QEDE_RFS_MAX_FLTR;
1018 qed_ops->common->update_pf_params(cdev, &pf_params);
1019}
1020
1021#define QEDE_FW_VER_STR_SIZE 80
1022
1023static void qede_log_probe(struct qede_dev *edev)
1024{
1025 struct qed_dev_info *p_dev_info = &edev->dev_info.common;
1026 u8 buf[QEDE_FW_VER_STR_SIZE];
1027 size_t left_size;
1028
1029 snprintf(buf, QEDE_FW_VER_STR_SIZE,
1030 "Storm FW %d.%d.%d.%d, Management FW %d.%d.%d.%d",
1031 p_dev_info->fw_major, p_dev_info->fw_minor, p_dev_info->fw_rev,
1032 p_dev_info->fw_eng,
1033 (p_dev_info->mfw_rev & QED_MFW_VERSION_3_MASK) >>
1034 QED_MFW_VERSION_3_OFFSET,
1035 (p_dev_info->mfw_rev & QED_MFW_VERSION_2_MASK) >>
1036 QED_MFW_VERSION_2_OFFSET,
1037 (p_dev_info->mfw_rev & QED_MFW_VERSION_1_MASK) >>
1038 QED_MFW_VERSION_1_OFFSET,
1039 (p_dev_info->mfw_rev & QED_MFW_VERSION_0_MASK) >>
1040 QED_MFW_VERSION_0_OFFSET);
1041
1042 left_size = QEDE_FW_VER_STR_SIZE - strlen(buf);
1043 if (p_dev_info->mbi_version && left_size)
1044 snprintf(buf + strlen(buf), left_size,
1045 " [MBI %d.%d.%d]",
1046 (p_dev_info->mbi_version & QED_MBI_VERSION_2_MASK) >>
1047 QED_MBI_VERSION_2_OFFSET,
1048 (p_dev_info->mbi_version & QED_MBI_VERSION_1_MASK) >>
1049 QED_MBI_VERSION_1_OFFSET,
1050 (p_dev_info->mbi_version & QED_MBI_VERSION_0_MASK) >>
1051 QED_MBI_VERSION_0_OFFSET);
1052
1053 pr_info("qede %02x:%02x.%02x: %s [%s]\n", edev->pdev->bus->number,
1054 PCI_SLOT(edev->pdev->devfn), PCI_FUNC(edev->pdev->devfn),
1055 buf, edev->ndev->name);
1056}
1057
1058enum qede_probe_mode {
1059 QEDE_PROBE_NORMAL,
1060 QEDE_PROBE_RECOVERY,
1061};
1062
1063static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
1064 bool is_vf, enum qede_probe_mode mode)
1065{
1066 struct qed_probe_params probe_params;
1067 struct qed_slowpath_params sp_params;
1068 struct qed_dev_eth_info dev_info;
1069 struct qede_dev *edev;
1070 struct qed_dev *cdev;
1071 int rc;
1072
1073 if (unlikely(dp_level & QED_LEVEL_INFO))
1074 pr_notice("Starting qede probe\n");
1075
1076 memset(&probe_params, 0, sizeof(probe_params));
1077 probe_params.protocol = QED_PROTOCOL_ETH;
1078 probe_params.dp_module = dp_module;
1079 probe_params.dp_level = dp_level;
1080 probe_params.is_vf = is_vf;
1081 probe_params.recov_in_prog = (mode == QEDE_PROBE_RECOVERY);
1082 cdev = qed_ops->common->probe(pdev, &probe_params);
1083 if (!cdev) {
1084 rc = -ENODEV;
1085 goto err0;
1086 }
1087
1088 qede_update_pf_params(cdev);
1089
1090 /* Start the Slowpath-process */
1091 memset(&sp_params, 0, sizeof(sp_params));
1092 sp_params.int_mode = QED_INT_MODE_MSIX;
1093 sp_params.drv_major = QEDE_MAJOR_VERSION;
1094 sp_params.drv_minor = QEDE_MINOR_VERSION;
1095 sp_params.drv_rev = QEDE_REVISION_VERSION;
1096 sp_params.drv_eng = QEDE_ENGINEERING_VERSION;
1097 strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
1098 rc = qed_ops->common->slowpath_start(cdev, &sp_params);
1099 if (rc) {
1100 pr_notice("Cannot start slowpath\n");
1101 goto err1;
1102 }
1103
1104 /* Learn information crucial for qede to progress */
1105 rc = qed_ops->fill_dev_info(cdev, &dev_info);
1106 if (rc)
1107 goto err2;
1108
1109 if (mode != QEDE_PROBE_RECOVERY) {
1110 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
1111 dp_level);
1112 if (!edev) {
1113 rc = -ENOMEM;
1114 goto err2;
1115 }
1116 } else {
1117 struct net_device *ndev = pci_get_drvdata(pdev);
1118
1119 edev = netdev_priv(ndev);
1120 edev->cdev = cdev;
1121 memset(&edev->stats, 0, sizeof(edev->stats));
1122 memcpy(&edev->dev_info, &dev_info, sizeof(dev_info));
1123 }
1124
1125 if (is_vf)
1126 set_bit(QEDE_FLAGS_IS_VF, &edev->flags);
1127
1128 qede_init_ndev(edev);
1129
1130 rc = qede_rdma_dev_add(edev, (mode == QEDE_PROBE_RECOVERY));
1131 if (rc)
1132 goto err3;
1133
1134 if (mode != QEDE_PROBE_RECOVERY) {
1135 /* Prepare the lock prior to the registration of the netdev,
1136 * as once it's registered we might reach flows requiring it
1137 * [it's even possible to reach a flow needing it directly
1138 * from there, although it's unlikely].
1139 */
1140 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
1141 mutex_init(&edev->qede_lock);
1142
1143 rc = register_netdev(edev->ndev);
1144 if (rc) {
1145 DP_NOTICE(edev, "Cannot register net-device\n");
1146 goto err4;
1147 }
1148 }
1149
1150 edev->ops->common->set_name(cdev, edev->ndev->name);
1151
1152 /* PTP not supported on VFs */
1153 if (!is_vf)
1154 qede_ptp_enable(edev, (mode == QEDE_PROBE_NORMAL));
1155
1156 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
1157
1158#ifdef CONFIG_DCB
1159 if (!IS_VF(edev))
1160 qede_set_dcbnl_ops(edev->ndev);
1161#endif
1162
1163 edev->rx_copybreak = QEDE_RX_HDR_SIZE;
1164
1165 qede_log_probe(edev);
1166 return 0;
1167
1168err4:
1169 qede_rdma_dev_remove(edev, (mode == QEDE_PROBE_RECOVERY));
1170err3:
1171 free_netdev(edev->ndev);
1172err2:
1173 qed_ops->common->slowpath_stop(cdev);
1174err1:
1175 qed_ops->common->remove(cdev);
1176err0:
1177 return rc;
1178}
1179
1180static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1181{
1182 bool is_vf = false;
1183 u32 dp_module = 0;
1184 u8 dp_level = 0;
1185
1186 switch ((enum qede_pci_private)id->driver_data) {
1187 case QEDE_PRIVATE_VF:
1188 if (debug & QED_LOG_VERBOSE_MASK)
1189 dev_err(&pdev->dev, "Probing a VF\n");
1190 is_vf = true;
1191 break;
1192 default:
1193 if (debug & QED_LOG_VERBOSE_MASK)
1194 dev_err(&pdev->dev, "Probing a PF\n");
1195 }
1196
1197 qede_config_debug(debug, &dp_module, &dp_level);
1198
1199 return __qede_probe(pdev, dp_module, dp_level, is_vf,
1200 QEDE_PROBE_NORMAL);
1201}
1202
1203enum qede_remove_mode {
1204 QEDE_REMOVE_NORMAL,
1205 QEDE_REMOVE_RECOVERY,
1206};
1207
1208static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
1209{
1210 struct net_device *ndev = pci_get_drvdata(pdev);
1211 struct qede_dev *edev;
1212 struct qed_dev *cdev;
1213
1214 if (!ndev) {
1215 dev_info(&pdev->dev, "Device has already been removed\n");
1216 return;
1217 }
1218
1219 edev = netdev_priv(ndev);
1220 cdev = edev->cdev;
1221
1222 DP_INFO(edev, "Starting qede_remove\n");
1223
1224 qede_rdma_dev_remove(edev, (mode == QEDE_REMOVE_RECOVERY));
1225
1226 if (mode != QEDE_REMOVE_RECOVERY) {
1227 unregister_netdev(ndev);
1228
1229 cancel_delayed_work_sync(&edev->sp_task);
1230
1231 edev->ops->common->set_power_state(cdev, PCI_D0);
1232
1233 pci_set_drvdata(pdev, NULL);
1234 }
1235
1236 qede_ptp_disable(edev);
1237
1238 /* Use global ops since we've freed edev */
1239 qed_ops->common->slowpath_stop(cdev);
1240 if (system_state == SYSTEM_POWER_OFF)
1241 return;
1242 qed_ops->common->remove(cdev);
1243
1244 /* Since this can happen out-of-sync with other flows,
1245 * don't release the netdevice until after slowpath stop
1246 * has been called to guarantee various other contexts
1247 * [e.g., QED register callbacks] won't break anything when
1248 * accessing the netdevice.
1249 */
1250 if (mode != QEDE_REMOVE_RECOVERY)
1251 free_netdev(ndev);
1252
1253 dev_info(&pdev->dev, "Ending qede_remove successfully\n");
1254}
1255
1256static void qede_remove(struct pci_dev *pdev)
1257{
1258 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
1259}
1260
1261static void qede_shutdown(struct pci_dev *pdev)
1262{
1263 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
1264}
1265
1266/* -------------------------------------------------------------------------
1267 * START OF LOAD / UNLOAD
1268 * -------------------------------------------------------------------------
1269 */
1270
1271static int qede_set_num_queues(struct qede_dev *edev)
1272{
1273 int rc;
1274 u16 rss_num;
1275
1276 /* Setup queues according to possible resources*/
1277 if (edev->req_queues)
1278 rss_num = edev->req_queues;
1279 else
1280 rss_num = netif_get_num_default_rss_queues() *
1281 edev->dev_info.common.num_hwfns;
1282
1283 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
1284
1285 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
1286 if (rc > 0) {
1287 /* Managed to request interrupts for our queues */
1288 edev->num_queues = rc;
1289 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
1290 QEDE_QUEUE_CNT(edev), rss_num);
1291 rc = 0;
1292 }
1293
1294 edev->fp_num_tx = edev->req_num_tx;
1295 edev->fp_num_rx = edev->req_num_rx;
1296
1297 return rc;
1298}
1299
1300static void qede_free_mem_sb(struct qede_dev *edev, struct qed_sb_info *sb_info,
1301 u16 sb_id)
1302{
1303 if (sb_info->sb_virt) {
1304 edev->ops->common->sb_release(edev->cdev, sb_info, sb_id,
1305 QED_SB_TYPE_L2_QUEUE);
1306 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
1307 (void *)sb_info->sb_virt, sb_info->sb_phys);
1308 memset(sb_info, 0, sizeof(*sb_info));
1309 }
1310}
1311
1312/* This function allocates fast-path status block memory */
1313static int qede_alloc_mem_sb(struct qede_dev *edev,
1314 struct qed_sb_info *sb_info, u16 sb_id)
1315{
1316 struct status_block_e4 *sb_virt;
1317 dma_addr_t sb_phys;
1318 int rc;
1319
1320 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
1321 sizeof(*sb_virt), &sb_phys, GFP_KERNEL);
1322 if (!sb_virt) {
1323 DP_ERR(edev, "Status block allocation failed\n");
1324 return -ENOMEM;
1325 }
1326
1327 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
1328 sb_virt, sb_phys, sb_id,
1329 QED_SB_TYPE_L2_QUEUE);
1330 if (rc) {
1331 DP_ERR(edev, "Status block initialization failed\n");
1332 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
1333 sb_virt, sb_phys);
1334 return rc;
1335 }
1336
1337 return 0;
1338}
1339
1340static void qede_free_rx_buffers(struct qede_dev *edev,
1341 struct qede_rx_queue *rxq)
1342{
1343 u16 i;
1344
1345 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
1346 struct sw_rx_data *rx_buf;
1347 struct page *data;
1348
1349 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
1350 data = rx_buf->data;
1351
1352 dma_unmap_page(&edev->pdev->dev,
1353 rx_buf->mapping, PAGE_SIZE, rxq->data_direction);
1354
1355 rx_buf->data = NULL;
1356 __free_page(data);
1357 }
1358}
1359
1360static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
1361{
1362 /* Free rx buffers */
1363 qede_free_rx_buffers(edev, rxq);
1364
1365 /* Free the parallel SW ring */
1366 kfree(rxq->sw_rx_ring);
1367
1368 /* Free the real RQ ring used by FW */
1369 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
1370 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
1371}
1372
1373static void qede_set_tpa_param(struct qede_rx_queue *rxq)
1374{
1375 int i;
1376
1377 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
1378 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
1379
1380 tpa_info->state = QEDE_AGG_STATE_NONE;
1381 }
1382}
1383
1384/* This function allocates all memory needed per Rx queue */
1385static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
1386{
1387 int i, rc, size;
1388
1389 rxq->num_rx_buffers = edev->q_num_rx_buffers;
1390
1391 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu;
1392
1393 rxq->rx_headroom = edev->xdp_prog ? XDP_PACKET_HEADROOM : NET_SKB_PAD;
1394 size = rxq->rx_headroom +
1395 SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
1396
1397 /* Make sure that the headroom and payload fit in a single page */
1398 if (rxq->rx_buf_size + size > PAGE_SIZE)
1399 rxq->rx_buf_size = PAGE_SIZE - size;
1400
1401 /* Segment size to spilt a page in multiple equal parts ,
1402 * unless XDP is used in which case we'd use the entire page.
1403 */
1404 if (!edev->xdp_prog) {
1405 size = size + rxq->rx_buf_size;
1406 rxq->rx_buf_seg_size = roundup_pow_of_two(size);
1407 } else {
1408 rxq->rx_buf_seg_size = PAGE_SIZE;
1409 }
1410
1411 /* Allocate the parallel driver ring for Rx buffers */
1412 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
1413 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
1414 if (!rxq->sw_rx_ring) {
1415 DP_ERR(edev, "Rx buffers ring allocation failed\n");
1416 rc = -ENOMEM;
1417 goto err;
1418 }
1419
1420 /* Allocate FW Rx ring */
1421 rc = edev->ops->common->chain_alloc(edev->cdev,
1422 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1423 QED_CHAIN_MODE_NEXT_PTR,
1424 QED_CHAIN_CNT_TYPE_U16,
1425 RX_RING_SIZE,
1426 sizeof(struct eth_rx_bd),
1427 &rxq->rx_bd_ring, NULL);
1428 if (rc)
1429 goto err;
1430
1431 /* Allocate FW completion ring */
1432 rc = edev->ops->common->chain_alloc(edev->cdev,
1433 QED_CHAIN_USE_TO_CONSUME,
1434 QED_CHAIN_MODE_PBL,
1435 QED_CHAIN_CNT_TYPE_U16,
1436 RX_RING_SIZE,
1437 sizeof(union eth_rx_cqe),
1438 &rxq->rx_comp_ring, NULL);
1439 if (rc)
1440 goto err;
1441
1442 /* Allocate buffers for the Rx ring */
1443 rxq->filled_buffers = 0;
1444 for (i = 0; i < rxq->num_rx_buffers; i++) {
1445 rc = qede_alloc_rx_buffer(rxq, false);
1446 if (rc) {
1447 DP_ERR(edev,
1448 "Rx buffers allocation failed at index %d\n", i);
1449 goto err;
1450 }
1451 }
1452
1453 if (!edev->gro_disable)
1454 qede_set_tpa_param(rxq);
1455err:
1456 return rc;
1457}
1458
1459static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
1460{
1461 /* Free the parallel SW ring */
1462 if (txq->is_xdp)
1463 kfree(txq->sw_tx_ring.xdp);
1464 else
1465 kfree(txq->sw_tx_ring.skbs);
1466
1467 /* Free the real RQ ring used by FW */
1468 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
1469}
1470
1471/* This function allocates all memory needed per Tx queue */
1472static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
1473{
1474 union eth_tx_bd_types *p_virt;
1475 int size, rc;
1476
1477 txq->num_tx_buffers = edev->q_num_tx_buffers;
1478
1479 /* Allocate the parallel driver ring for Tx buffers */
1480 if (txq->is_xdp) {
1481 size = sizeof(*txq->sw_tx_ring.xdp) * txq->num_tx_buffers;
1482 txq->sw_tx_ring.xdp = kzalloc(size, GFP_KERNEL);
1483 if (!txq->sw_tx_ring.xdp)
1484 goto err;
1485 } else {
1486 size = sizeof(*txq->sw_tx_ring.skbs) * txq->num_tx_buffers;
1487 txq->sw_tx_ring.skbs = kzalloc(size, GFP_KERNEL);
1488 if (!txq->sw_tx_ring.skbs)
1489 goto err;
1490 }
1491
1492 rc = edev->ops->common->chain_alloc(edev->cdev,
1493 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1494 QED_CHAIN_MODE_PBL,
1495 QED_CHAIN_CNT_TYPE_U16,
1496 txq->num_tx_buffers,
1497 sizeof(*p_virt),
1498 &txq->tx_pbl, NULL);
1499 if (rc)
1500 goto err;
1501
1502 return 0;
1503
1504err:
1505 qede_free_mem_txq(edev, txq);
1506 return -ENOMEM;
1507}
1508
1509/* This function frees all memory of a single fp */
1510static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
1511{
1512 qede_free_mem_sb(edev, fp->sb_info, fp->id);
1513
1514 if (fp->type & QEDE_FASTPATH_RX)
1515 qede_free_mem_rxq(edev, fp->rxq);
1516
1517 if (fp->type & QEDE_FASTPATH_XDP)
1518 qede_free_mem_txq(edev, fp->xdp_tx);
1519
1520 if (fp->type & QEDE_FASTPATH_TX) {
1521 int cos;
1522
1523 for_each_cos_in_txq(edev, cos)
1524 qede_free_mem_txq(edev, &fp->txq[cos]);
1525 }
1526}
1527
1528/* This function allocates all memory needed for a single fp (i.e. an entity
1529 * which contains status block, one rx queue and/or multiple per-TC tx queues.
1530 */
1531static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
1532{
1533 int rc = 0;
1534
1535 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id);
1536 if (rc)
1537 goto out;
1538
1539 if (fp->type & QEDE_FASTPATH_RX) {
1540 rc = qede_alloc_mem_rxq(edev, fp->rxq);
1541 if (rc)
1542 goto out;
1543 }
1544
1545 if (fp->type & QEDE_FASTPATH_XDP) {
1546 rc = qede_alloc_mem_txq(edev, fp->xdp_tx);
1547 if (rc)
1548 goto out;
1549 }
1550
1551 if (fp->type & QEDE_FASTPATH_TX) {
1552 int cos;
1553
1554 for_each_cos_in_txq(edev, cos) {
1555 rc = qede_alloc_mem_txq(edev, &fp->txq[cos]);
1556 if (rc)
1557 goto out;
1558 }
1559 }
1560
1561out:
1562 return rc;
1563}
1564
1565static void qede_free_mem_load(struct qede_dev *edev)
1566{
1567 int i;
1568
1569 for_each_queue(i) {
1570 struct qede_fastpath *fp = &edev->fp_array[i];
1571
1572 qede_free_mem_fp(edev, fp);
1573 }
1574}
1575
1576/* This function allocates all qede memory at NIC load. */
1577static int qede_alloc_mem_load(struct qede_dev *edev)
1578{
1579 int rc = 0, queue_id;
1580
1581 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) {
1582 struct qede_fastpath *fp = &edev->fp_array[queue_id];
1583
1584 rc = qede_alloc_mem_fp(edev, fp);
1585 if (rc) {
1586 DP_ERR(edev,
1587 "Failed to allocate memory for fastpath - rss id = %d\n",
1588 queue_id);
1589 qede_free_mem_load(edev);
1590 return rc;
1591 }
1592 }
1593
1594 return 0;
1595}
1596
1597static void qede_empty_tx_queue(struct qede_dev *edev,
1598 struct qede_tx_queue *txq)
1599{
1600 unsigned int pkts_compl = 0, bytes_compl = 0;
1601 struct netdev_queue *netdev_txq;
1602 int rc, len = 0;
1603
1604 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id);
1605
1606 while (qed_chain_get_cons_idx(&txq->tx_pbl) !=
1607 qed_chain_get_prod_idx(&txq->tx_pbl)) {
1608 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1609 "Freeing a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n",
1610 txq->index, qed_chain_get_cons_idx(&txq->tx_pbl),
1611 qed_chain_get_prod_idx(&txq->tx_pbl));
1612
1613 rc = qede_free_tx_pkt(edev, txq, &len);
1614 if (rc) {
1615 DP_NOTICE(edev,
1616 "Failed to free a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n",
1617 txq->index,
1618 qed_chain_get_cons_idx(&txq->tx_pbl),
1619 qed_chain_get_prod_idx(&txq->tx_pbl));
1620 break;
1621 }
1622
1623 bytes_compl += len;
1624 pkts_compl++;
1625 txq->sw_tx_cons++;
1626 }
1627
1628 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
1629}
1630
1631static void qede_empty_tx_queues(struct qede_dev *edev)
1632{
1633 int i;
1634
1635 for_each_queue(i)
1636 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
1637 int cos;
1638
1639 for_each_cos_in_txq(edev, cos) {
1640 struct qede_fastpath *fp;
1641
1642 fp = &edev->fp_array[i];
1643 qede_empty_tx_queue(edev,
1644 &fp->txq[cos]);
1645 }
1646 }
1647}
1648
1649/* This function inits fp content and resets the SB, RXQ and TXQ structures */
1650static void qede_init_fp(struct qede_dev *edev)
1651{
1652 int queue_id, rxq_index = 0, txq_index = 0;
1653 struct qede_fastpath *fp;
1654
1655 for_each_queue(queue_id) {
1656 fp = &edev->fp_array[queue_id];
1657
1658 fp->edev = edev;
1659 fp->id = queue_id;
1660
1661 if (fp->type & QEDE_FASTPATH_XDP) {
1662 fp->xdp_tx->index = QEDE_TXQ_IDX_TO_XDP(edev,
1663 rxq_index);
1664 fp->xdp_tx->is_xdp = 1;
1665 }
1666
1667 if (fp->type & QEDE_FASTPATH_RX) {
1668 fp->rxq->rxq_id = rxq_index++;
1669
1670 /* Determine how to map buffers for this queue */
1671 if (fp->type & QEDE_FASTPATH_XDP)
1672 fp->rxq->data_direction = DMA_BIDIRECTIONAL;
1673 else
1674 fp->rxq->data_direction = DMA_FROM_DEVICE;
1675 fp->rxq->dev = &edev->pdev->dev;
1676
1677 /* Driver have no error path from here */
1678 WARN_ON(xdp_rxq_info_reg(&fp->rxq->xdp_rxq, edev->ndev,
1679 fp->rxq->rxq_id) < 0);
1680 }
1681
1682 if (fp->type & QEDE_FASTPATH_TX) {
1683 int cos;
1684
1685 for_each_cos_in_txq(edev, cos) {
1686 struct qede_tx_queue *txq = &fp->txq[cos];
1687 u16 ndev_tx_id;
1688
1689 txq->cos = cos;
1690 txq->index = txq_index;
1691 ndev_tx_id = QEDE_TXQ_TO_NDEV_TXQ_ID(edev, txq);
1692 txq->ndev_txq_id = ndev_tx_id;
1693
1694 if (edev->dev_info.is_legacy)
1695 txq->is_legacy = 1;
1696 txq->dev = &edev->pdev->dev;
1697 }
1698
1699 txq_index++;
1700 }
1701
1702 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
1703 edev->ndev->name, queue_id);
1704 }
1705
1706 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO_HW);
1707}
1708
1709static int qede_set_real_num_queues(struct qede_dev *edev)
1710{
1711 int rc = 0;
1712
1713 rc = netif_set_real_num_tx_queues(edev->ndev,
1714 QEDE_TSS_COUNT(edev) *
1715 edev->dev_info.num_tc);
1716 if (rc) {
1717 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
1718 return rc;
1719 }
1720
1721 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev));
1722 if (rc) {
1723 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
1724 return rc;
1725 }
1726
1727 return 0;
1728}
1729
1730static void qede_napi_disable_remove(struct qede_dev *edev)
1731{
1732 int i;
1733
1734 for_each_queue(i) {
1735 napi_disable(&edev->fp_array[i].napi);
1736
1737 netif_napi_del(&edev->fp_array[i].napi);
1738 }
1739}
1740
1741static void qede_napi_add_enable(struct qede_dev *edev)
1742{
1743 int i;
1744
1745 /* Add NAPI objects */
1746 for_each_queue(i) {
1747 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
1748 qede_poll, NAPI_POLL_WEIGHT);
1749 napi_enable(&edev->fp_array[i].napi);
1750 }
1751}
1752
1753static void qede_sync_free_irqs(struct qede_dev *edev)
1754{
1755 int i;
1756
1757 for (i = 0; i < edev->int_info.used_cnt; i++) {
1758 if (edev->int_info.msix_cnt) {
1759 synchronize_irq(edev->int_info.msix[i].vector);
1760 free_irq(edev->int_info.msix[i].vector,
1761 &edev->fp_array[i]);
1762 } else {
1763 edev->ops->common->simd_handler_clean(edev->cdev, i);
1764 }
1765 }
1766
1767 edev->int_info.used_cnt = 0;
1768}
1769
1770static int qede_req_msix_irqs(struct qede_dev *edev)
1771{
1772 int i, rc;
1773
1774 /* Sanitize number of interrupts == number of prepared RSS queues */
1775 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) {
1776 DP_ERR(edev,
1777 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
1778 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt);
1779 return -EINVAL;
1780 }
1781
1782 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
1783#ifdef CONFIG_RFS_ACCEL
1784 struct qede_fastpath *fp = &edev->fp_array[i];
1785
1786 if (edev->ndev->rx_cpu_rmap && (fp->type & QEDE_FASTPATH_RX)) {
1787 rc = irq_cpu_rmap_add(edev->ndev->rx_cpu_rmap,
1788 edev->int_info.msix[i].vector);
1789 if (rc) {
1790 DP_ERR(edev, "Failed to add CPU rmap\n");
1791 qede_free_arfs(edev);
1792 }
1793 }
1794#endif
1795 rc = request_irq(edev->int_info.msix[i].vector,
1796 qede_msix_fp_int, 0, edev->fp_array[i].name,
1797 &edev->fp_array[i]);
1798 if (rc) {
1799 DP_ERR(edev, "Request fp %d irq failed\n", i);
1800 qede_sync_free_irqs(edev);
1801 return rc;
1802 }
1803 DP_VERBOSE(edev, NETIF_MSG_INTR,
1804 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
1805 edev->fp_array[i].name, i,
1806 &edev->fp_array[i]);
1807 edev->int_info.used_cnt++;
1808 }
1809
1810 return 0;
1811}
1812
1813static void qede_simd_fp_handler(void *cookie)
1814{
1815 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
1816
1817 napi_schedule_irqoff(&fp->napi);
1818}
1819
1820static int qede_setup_irqs(struct qede_dev *edev)
1821{
1822 int i, rc = 0;
1823
1824 /* Learn Interrupt configuration */
1825 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
1826 if (rc)
1827 return rc;
1828
1829 if (edev->int_info.msix_cnt) {
1830 rc = qede_req_msix_irqs(edev);
1831 if (rc)
1832 return rc;
1833 edev->ndev->irq = edev->int_info.msix[0].vector;
1834 } else {
1835 const struct qed_common_ops *ops;
1836
1837 /* qed should learn receive the RSS ids and callbacks */
1838 ops = edev->ops->common;
1839 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++)
1840 ops->simd_handler_config(edev->cdev,
1841 &edev->fp_array[i], i,
1842 qede_simd_fp_handler);
1843 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev);
1844 }
1845 return 0;
1846}
1847
1848static int qede_drain_txq(struct qede_dev *edev,
1849 struct qede_tx_queue *txq, bool allow_drain)
1850{
1851 int rc, cnt = 1000;
1852
1853 while (txq->sw_tx_cons != txq->sw_tx_prod) {
1854 if (!cnt) {
1855 if (allow_drain) {
1856 DP_NOTICE(edev,
1857 "Tx queue[%d] is stuck, requesting MCP to drain\n",
1858 txq->index);
1859 rc = edev->ops->common->drain(edev->cdev);
1860 if (rc)
1861 return rc;
1862 return qede_drain_txq(edev, txq, false);
1863 }
1864 DP_NOTICE(edev,
1865 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
1866 txq->index, txq->sw_tx_prod,
1867 txq->sw_tx_cons);
1868 return -ENODEV;
1869 }
1870 cnt--;
1871 usleep_range(1000, 2000);
1872 barrier();
1873 }
1874
1875 /* FW finished processing, wait for HW to transmit all tx packets */
1876 usleep_range(1000, 2000);
1877
1878 return 0;
1879}
1880
1881static int qede_stop_txq(struct qede_dev *edev,
1882 struct qede_tx_queue *txq, int rss_id)
1883{
1884 /* delete doorbell from doorbell recovery mechanism */
1885 edev->ops->common->db_recovery_del(edev->cdev, txq->doorbell_addr,
1886 &txq->tx_db);
1887
1888 return edev->ops->q_tx_stop(edev->cdev, rss_id, txq->handle);
1889}
1890
1891static int qede_stop_queues(struct qede_dev *edev)
1892{
1893 struct qed_update_vport_params *vport_update_params;
1894 struct qed_dev *cdev = edev->cdev;
1895 struct qede_fastpath *fp;
1896 int rc, i;
1897
1898 /* Disable the vport */
1899 vport_update_params = vzalloc(sizeof(*vport_update_params));
1900 if (!vport_update_params)
1901 return -ENOMEM;
1902
1903 vport_update_params->vport_id = 0;
1904 vport_update_params->update_vport_active_flg = 1;
1905 vport_update_params->vport_active_flg = 0;
1906 vport_update_params->update_rss_flg = 0;
1907
1908 rc = edev->ops->vport_update(cdev, vport_update_params);
1909 vfree(vport_update_params);
1910
1911 if (rc) {
1912 DP_ERR(edev, "Failed to update vport\n");
1913 return rc;
1914 }
1915
1916 /* Flush Tx queues. If needed, request drain from MCP */
1917 for_each_queue(i) {
1918 fp = &edev->fp_array[i];
1919
1920 if (fp->type & QEDE_FASTPATH_TX) {
1921 int cos;
1922
1923 for_each_cos_in_txq(edev, cos) {
1924 rc = qede_drain_txq(edev, &fp->txq[cos], true);
1925 if (rc)
1926 return rc;
1927 }
1928 }
1929
1930 if (fp->type & QEDE_FASTPATH_XDP) {
1931 rc = qede_drain_txq(edev, fp->xdp_tx, true);
1932 if (rc)
1933 return rc;
1934 }
1935 }
1936
1937 /* Stop all Queues in reverse order */
1938 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) {
1939 fp = &edev->fp_array[i];
1940
1941 /* Stop the Tx Queue(s) */
1942 if (fp->type & QEDE_FASTPATH_TX) {
1943 int cos;
1944
1945 for_each_cos_in_txq(edev, cos) {
1946 rc = qede_stop_txq(edev, &fp->txq[cos], i);
1947 if (rc)
1948 return rc;
1949 }
1950 }
1951
1952 /* Stop the Rx Queue */
1953 if (fp->type & QEDE_FASTPATH_RX) {
1954 rc = edev->ops->q_rx_stop(cdev, i, fp->rxq->handle);
1955 if (rc) {
1956 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
1957 return rc;
1958 }
1959 }
1960
1961 /* Stop the XDP forwarding queue */
1962 if (fp->type & QEDE_FASTPATH_XDP) {
1963 rc = qede_stop_txq(edev, fp->xdp_tx, i);
1964 if (rc)
1965 return rc;
1966
1967 bpf_prog_put(fp->rxq->xdp_prog);
1968 }
1969 }
1970
1971 /* Stop the vport */
1972 rc = edev->ops->vport_stop(cdev, 0);
1973 if (rc)
1974 DP_ERR(edev, "Failed to stop VPORT\n");
1975
1976 return rc;
1977}
1978
1979static int qede_start_txq(struct qede_dev *edev,
1980 struct qede_fastpath *fp,
1981 struct qede_tx_queue *txq, u8 rss_id, u16 sb_idx)
1982{
1983 dma_addr_t phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl);
1984 u32 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl);
1985 struct qed_queue_start_common_params params;
1986 struct qed_txq_start_ret_params ret_params;
1987 int rc;
1988
1989 memset(¶ms, 0, sizeof(params));
1990 memset(&ret_params, 0, sizeof(ret_params));
1991
1992 /* Let the XDP queue share the queue-zone with one of the regular txq.
1993 * We don't really care about its coalescing.
1994 */
1995 if (txq->is_xdp)
1996 params.queue_id = QEDE_TXQ_XDP_TO_IDX(edev, txq);
1997 else
1998 params.queue_id = txq->index;
1999
2000 params.p_sb = fp->sb_info;
2001 params.sb_idx = sb_idx;
2002 params.tc = txq->cos;
2003
2004 rc = edev->ops->q_tx_start(edev->cdev, rss_id, ¶ms, phys_table,
2005 page_cnt, &ret_params);
2006 if (rc) {
2007 DP_ERR(edev, "Start TXQ #%d failed %d\n", txq->index, rc);
2008 return rc;
2009 }
2010
2011 txq->doorbell_addr = ret_params.p_doorbell;
2012 txq->handle = ret_params.p_handle;
2013
2014 /* Determine the FW consumer address associated */
2015 txq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[sb_idx];
2016
2017 /* Prepare the doorbell parameters */
2018 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_DEST, DB_DEST_XCM);
2019 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
2020 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_VAL_SEL,
2021 DQ_XCM_ETH_TX_BD_PROD_CMD);
2022 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
2023
2024 /* register doorbell with doorbell recovery mechanism */
2025 rc = edev->ops->common->db_recovery_add(edev->cdev, txq->doorbell_addr,
2026 &txq->tx_db, DB_REC_WIDTH_32B,
2027 DB_REC_KERNEL);
2028
2029 return rc;
2030}
2031
2032static int qede_start_queues(struct qede_dev *edev, bool clear_stats)
2033{
2034 int vlan_removal_en = 1;
2035 struct qed_dev *cdev = edev->cdev;
2036 struct qed_dev_info *qed_info = &edev->dev_info.common;
2037 struct qed_update_vport_params *vport_update_params;
2038 struct qed_queue_start_common_params q_params;
2039 struct qed_start_vport_params start = {0};
2040 int rc, i;
2041
2042 if (!edev->num_queues) {
2043 DP_ERR(edev,
2044 "Cannot update V-VPORT as active as there are no Rx queues\n");
2045 return -EINVAL;
2046 }
2047
2048 vport_update_params = vzalloc(sizeof(*vport_update_params));
2049 if (!vport_update_params)
2050 return -ENOMEM;
2051
2052 start.handle_ptp_pkts = !!(edev->ptp);
2053 start.gro_enable = !edev->gro_disable;
2054 start.mtu = edev->ndev->mtu;
2055 start.vport_id = 0;
2056 start.drop_ttl0 = true;
2057 start.remove_inner_vlan = vlan_removal_en;
2058 start.clear_stats = clear_stats;
2059
2060 rc = edev->ops->vport_start(cdev, &start);
2061
2062 if (rc) {
2063 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
2064 goto out;
2065 }
2066
2067 DP_VERBOSE(edev, NETIF_MSG_IFUP,
2068 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
2069 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
2070
2071 for_each_queue(i) {
2072 struct qede_fastpath *fp = &edev->fp_array[i];
2073 dma_addr_t p_phys_table;
2074 u32 page_cnt;
2075
2076 if (fp->type & QEDE_FASTPATH_RX) {
2077 struct qed_rxq_start_ret_params ret_params;
2078 struct qede_rx_queue *rxq = fp->rxq;
2079 __le16 *val;
2080
2081 memset(&ret_params, 0, sizeof(ret_params));
2082 memset(&q_params, 0, sizeof(q_params));
2083 q_params.queue_id = rxq->rxq_id;
2084 q_params.vport_id = 0;
2085 q_params.p_sb = fp->sb_info;
2086 q_params.sb_idx = RX_PI;
2087
2088 p_phys_table =
2089 qed_chain_get_pbl_phys(&rxq->rx_comp_ring);
2090 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring);
2091
2092 rc = edev->ops->q_rx_start(cdev, i, &q_params,
2093 rxq->rx_buf_size,
2094 rxq->rx_bd_ring.p_phys_addr,
2095 p_phys_table,
2096 page_cnt, &ret_params);
2097 if (rc) {
2098 DP_ERR(edev, "Start RXQ #%d failed %d\n", i,
2099 rc);
2100 goto out;
2101 }
2102
2103 /* Use the return parameters */
2104 rxq->hw_rxq_prod_addr = ret_params.p_prod;
2105 rxq->handle = ret_params.p_handle;
2106
2107 val = &fp->sb_info->sb_virt->pi_array[RX_PI];
2108 rxq->hw_cons_ptr = val;
2109
2110 qede_update_rx_prod(edev, rxq);
2111 }
2112
2113 if (fp->type & QEDE_FASTPATH_XDP) {
2114 rc = qede_start_txq(edev, fp, fp->xdp_tx, i, XDP_PI);
2115 if (rc)
2116 goto out;
2117
2118 fp->rxq->xdp_prog = bpf_prog_add(edev->xdp_prog, 1);
2119 if (IS_ERR(fp->rxq->xdp_prog)) {
2120 rc = PTR_ERR(fp->rxq->xdp_prog);
2121 fp->rxq->xdp_prog = NULL;
2122 goto out;
2123 }
2124 }
2125
2126 if (fp->type & QEDE_FASTPATH_TX) {
2127 int cos;
2128
2129 for_each_cos_in_txq(edev, cos) {
2130 rc = qede_start_txq(edev, fp, &fp->txq[cos], i,
2131 TX_PI(cos));
2132 if (rc)
2133 goto out;
2134 }
2135 }
2136 }
2137
2138 /* Prepare and send the vport enable */
2139 vport_update_params->vport_id = start.vport_id;
2140 vport_update_params->update_vport_active_flg = 1;
2141 vport_update_params->vport_active_flg = 1;
2142
2143 if ((qed_info->b_inter_pf_switch || pci_num_vf(edev->pdev)) &&
2144 qed_info->tx_switching) {
2145 vport_update_params->update_tx_switching_flg = 1;
2146 vport_update_params->tx_switching_flg = 1;
2147 }
2148
2149 qede_fill_rss_params(edev, &vport_update_params->rss_params,
2150 &vport_update_params->update_rss_flg);
2151
2152 rc = edev->ops->vport_update(cdev, vport_update_params);
2153 if (rc)
2154 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
2155
2156out:
2157 vfree(vport_update_params);
2158 return rc;
2159}
2160
2161enum qede_unload_mode {
2162 QEDE_UNLOAD_NORMAL,
2163 QEDE_UNLOAD_RECOVERY,
2164};
2165
2166static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode,
2167 bool is_locked)
2168{
2169 struct qed_link_params link_params;
2170 int rc;
2171
2172 DP_INFO(edev, "Starting qede unload\n");
2173
2174 if (!is_locked)
2175 __qede_lock(edev);
2176
2177 clear_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags);
2178
2179 if (mode != QEDE_UNLOAD_RECOVERY)
2180 edev->state = QEDE_STATE_CLOSED;
2181
2182 qede_rdma_dev_event_close(edev);
2183
2184 /* Close OS Tx */
2185 netif_tx_disable(edev->ndev);
2186 netif_carrier_off(edev->ndev);
2187
2188 if (mode != QEDE_UNLOAD_RECOVERY) {
2189 /* Reset the link */
2190 memset(&link_params, 0, sizeof(link_params));
2191 link_params.link_up = false;
2192 edev->ops->common->set_link(edev->cdev, &link_params);
2193
2194 rc = qede_stop_queues(edev);
2195 if (rc) {
2196 qede_sync_free_irqs(edev);
2197 goto out;
2198 }
2199
2200 DP_INFO(edev, "Stopped Queues\n");
2201 }
2202
2203 qede_vlan_mark_nonconfigured(edev);
2204 edev->ops->fastpath_stop(edev->cdev);
2205
2206 if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1) {
2207 qede_poll_for_freeing_arfs_filters(edev);
2208 qede_free_arfs(edev);
2209 }
2210
2211 /* Release the interrupts */
2212 qede_sync_free_irqs(edev);
2213 edev->ops->common->set_fp_int(edev->cdev, 0);
2214
2215 qede_napi_disable_remove(edev);
2216
2217 if (mode == QEDE_UNLOAD_RECOVERY)
2218 qede_empty_tx_queues(edev);
2219
2220 qede_free_mem_load(edev);
2221 qede_free_fp_array(edev);
2222
2223out:
2224 if (!is_locked)
2225 __qede_unlock(edev);
2226
2227 if (mode != QEDE_UNLOAD_RECOVERY)
2228 DP_NOTICE(edev, "Link is down\n");
2229
2230 edev->ptp_skip_txts = 0;
2231
2232 DP_INFO(edev, "Ending qede unload\n");
2233}
2234
2235enum qede_load_mode {
2236 QEDE_LOAD_NORMAL,
2237 QEDE_LOAD_RELOAD,
2238 QEDE_LOAD_RECOVERY,
2239};
2240
2241static int qede_load(struct qede_dev *edev, enum qede_load_mode mode,
2242 bool is_locked)
2243{
2244 struct qed_link_params link_params;
2245 u8 num_tc;
2246 int rc;
2247
2248 DP_INFO(edev, "Starting qede load\n");
2249
2250 if (!is_locked)
2251 __qede_lock(edev);
2252
2253 rc = qede_set_num_queues(edev);
2254 if (rc)
2255 goto out;
2256
2257 rc = qede_alloc_fp_array(edev);
2258 if (rc)
2259 goto out;
2260
2261 qede_init_fp(edev);
2262
2263 rc = qede_alloc_mem_load(edev);
2264 if (rc)
2265 goto err1;
2266 DP_INFO(edev, "Allocated %d Rx, %d Tx queues\n",
2267 QEDE_RSS_COUNT(edev), QEDE_TSS_COUNT(edev));
2268
2269 rc = qede_set_real_num_queues(edev);
2270 if (rc)
2271 goto err2;
2272
2273 if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1) {
2274 rc = qede_alloc_arfs(edev);
2275 if (rc)
2276 DP_NOTICE(edev, "aRFS memory allocation failed\n");
2277 }
2278
2279 qede_napi_add_enable(edev);
2280 DP_INFO(edev, "Napi added and enabled\n");
2281
2282 rc = qede_setup_irqs(edev);
2283 if (rc)
2284 goto err3;
2285 DP_INFO(edev, "Setup IRQs succeeded\n");
2286
2287 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD);
2288 if (rc)
2289 goto err4;
2290 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
2291
2292 num_tc = netdev_get_num_tc(edev->ndev);
2293 num_tc = num_tc ? num_tc : edev->dev_info.num_tc;
2294 qede_setup_tc(edev->ndev, num_tc);
2295
2296 /* Program un-configured VLANs */
2297 qede_configure_vlan_filters(edev);
2298
2299 set_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags);
2300
2301 /* Ask for link-up using current configuration */
2302 memset(&link_params, 0, sizeof(link_params));
2303 link_params.link_up = true;
2304 edev->ops->common->set_link(edev->cdev, &link_params);
2305
2306 edev->state = QEDE_STATE_OPEN;
2307
2308 DP_INFO(edev, "Ending successfully qede load\n");
2309
2310 goto out;
2311err4:
2312 qede_sync_free_irqs(edev);
2313 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
2314err3:
2315 qede_napi_disable_remove(edev);
2316err2:
2317 qede_free_mem_load(edev);
2318err1:
2319 edev->ops->common->set_fp_int(edev->cdev, 0);
2320 qede_free_fp_array(edev);
2321 edev->num_queues = 0;
2322 edev->fp_num_tx = 0;
2323 edev->fp_num_rx = 0;
2324out:
2325 if (!is_locked)
2326 __qede_unlock(edev);
2327
2328 return rc;
2329}
2330
2331/* 'func' should be able to run between unload and reload assuming interface
2332 * is actually running, or afterwards in case it's currently DOWN.
2333 */
2334void qede_reload(struct qede_dev *edev,
2335 struct qede_reload_args *args, bool is_locked)
2336{
2337 if (!is_locked)
2338 __qede_lock(edev);
2339
2340 /* Since qede_lock is held, internal state wouldn't change even
2341 * if netdev state would start transitioning. Check whether current
2342 * internal configuration indicates device is up, then reload.
2343 */
2344 if (edev->state == QEDE_STATE_OPEN) {
2345 qede_unload(edev, QEDE_UNLOAD_NORMAL, true);
2346 if (args)
2347 args->func(edev, args);
2348 qede_load(edev, QEDE_LOAD_RELOAD, true);
2349
2350 /* Since no one is going to do it for us, re-configure */
2351 qede_config_rx_mode(edev->ndev);
2352 } else if (args) {
2353 args->func(edev, args);
2354 }
2355
2356 if (!is_locked)
2357 __qede_unlock(edev);
2358}
2359
2360/* called with rtnl_lock */
2361static int qede_open(struct net_device *ndev)
2362{
2363 struct qede_dev *edev = netdev_priv(ndev);
2364 int rc;
2365
2366 netif_carrier_off(ndev);
2367
2368 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
2369
2370 rc = qede_load(edev, QEDE_LOAD_NORMAL, false);
2371 if (rc)
2372 return rc;
2373
2374 udp_tunnel_get_rx_info(ndev);
2375
2376 edev->ops->common->update_drv_state(edev->cdev, true);
2377
2378 return 0;
2379}
2380
2381static int qede_close(struct net_device *ndev)
2382{
2383 struct qede_dev *edev = netdev_priv(ndev);
2384
2385 qede_unload(edev, QEDE_UNLOAD_NORMAL, false);
2386
2387 edev->ops->common->update_drv_state(edev->cdev, false);
2388
2389 return 0;
2390}
2391
2392static void qede_link_update(void *dev, struct qed_link_output *link)
2393{
2394 struct qede_dev *edev = dev;
2395
2396 if (!test_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags)) {
2397 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not ready\n");
2398 return;
2399 }
2400
2401 if (link->link_up) {
2402 if (!netif_carrier_ok(edev->ndev)) {
2403 DP_NOTICE(edev, "Link is up\n");
2404 netif_tx_start_all_queues(edev->ndev);
2405 netif_carrier_on(edev->ndev);
2406 qede_rdma_dev_event_open(edev);
2407 }
2408 } else {
2409 if (netif_carrier_ok(edev->ndev)) {
2410 DP_NOTICE(edev, "Link is down\n");
2411 netif_tx_disable(edev->ndev);
2412 netif_carrier_off(edev->ndev);
2413 qede_rdma_dev_event_close(edev);
2414 }
2415 }
2416}
2417
2418static void qede_schedule_recovery_handler(void *dev)
2419{
2420 struct qede_dev *edev = dev;
2421
2422 if (edev->state == QEDE_STATE_RECOVERY) {
2423 DP_NOTICE(edev,
2424 "Avoid scheduling a recovery handling since already in recovery state\n");
2425 return;
2426 }
2427
2428 set_bit(QEDE_SP_RECOVERY, &edev->sp_flags);
2429 schedule_delayed_work(&edev->sp_task, 0);
2430
2431 DP_INFO(edev, "Scheduled a recovery handler\n");
2432}
2433
2434static void qede_recovery_failed(struct qede_dev *edev)
2435{
2436 netdev_err(edev->ndev, "Recovery handling has failed. Power cycle is needed.\n");
2437
2438 netif_device_detach(edev->ndev);
2439
2440 if (edev->cdev)
2441 edev->ops->common->set_power_state(edev->cdev, PCI_D3hot);
2442}
2443
2444static void qede_recovery_handler(struct qede_dev *edev)
2445{
2446 u32 curr_state = edev->state;
2447 int rc;
2448
2449 DP_NOTICE(edev, "Starting a recovery process\n");
2450
2451 /* No need to acquire first the qede_lock since is done by qede_sp_task
2452 * before calling this function.
2453 */
2454 edev->state = QEDE_STATE_RECOVERY;
2455
2456 edev->ops->common->recovery_prolog(edev->cdev);
2457
2458 if (curr_state == QEDE_STATE_OPEN)
2459 qede_unload(edev, QEDE_UNLOAD_RECOVERY, true);
2460
2461 __qede_remove(edev->pdev, QEDE_REMOVE_RECOVERY);
2462
2463 rc = __qede_probe(edev->pdev, edev->dp_module, edev->dp_level,
2464 IS_VF(edev), QEDE_PROBE_RECOVERY);
2465 if (rc) {
2466 edev->cdev = NULL;
2467 goto err;
2468 }
2469
2470 if (curr_state == QEDE_STATE_OPEN) {
2471 rc = qede_load(edev, QEDE_LOAD_RECOVERY, true);
2472 if (rc)
2473 goto err;
2474
2475 qede_config_rx_mode(edev->ndev);
2476 udp_tunnel_get_rx_info(edev->ndev);
2477 }
2478
2479 edev->state = curr_state;
2480
2481 DP_NOTICE(edev, "Recovery handling is done\n");
2482
2483 return;
2484
2485err:
2486 qede_recovery_failed(edev);
2487}
2488
2489static bool qede_is_txq_full(struct qede_dev *edev, struct qede_tx_queue *txq)
2490{
2491 struct netdev_queue *netdev_txq;
2492
2493 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id);
2494 if (netif_xmit_stopped(netdev_txq))
2495 return true;
2496
2497 return false;
2498}
2499
2500static void qede_get_generic_tlv_data(void *dev, struct qed_generic_tlvs *data)
2501{
2502 struct qede_dev *edev = dev;
2503 struct netdev_hw_addr *ha;
2504 int i;
2505
2506 if (edev->ndev->features & NETIF_F_IP_CSUM)
2507 data->feat_flags |= QED_TLV_IP_CSUM;
2508 if (edev->ndev->features & NETIF_F_TSO)
2509 data->feat_flags |= QED_TLV_LSO;
2510
2511 ether_addr_copy(data->mac[0], edev->ndev->dev_addr);
2512 memset(data->mac[1], 0, ETH_ALEN);
2513 memset(data->mac[2], 0, ETH_ALEN);
2514 /* Copy the first two UC macs */
2515 netif_addr_lock_bh(edev->ndev);
2516 i = 1;
2517 netdev_for_each_uc_addr(ha, edev->ndev) {
2518 ether_addr_copy(data->mac[i++], ha->addr);
2519 if (i == QED_TLV_MAC_COUNT)
2520 break;
2521 }
2522
2523 netif_addr_unlock_bh(edev->ndev);
2524}
2525
2526static void qede_get_eth_tlv_data(void *dev, void *data)
2527{
2528 struct qed_mfw_tlv_eth *etlv = data;
2529 struct qede_dev *edev = dev;
2530 struct qede_fastpath *fp;
2531 int i;
2532
2533 etlv->lso_maxoff_size = 0XFFFF;
2534 etlv->lso_maxoff_size_set = true;
2535 etlv->lso_minseg_size = (u16)ETH_TX_LSO_WINDOW_MIN_LEN;
2536 etlv->lso_minseg_size_set = true;
2537 etlv->prom_mode = !!(edev->ndev->flags & IFF_PROMISC);
2538 etlv->prom_mode_set = true;
2539 etlv->tx_descr_size = QEDE_TSS_COUNT(edev);
2540 etlv->tx_descr_size_set = true;
2541 etlv->rx_descr_size = QEDE_RSS_COUNT(edev);
2542 etlv->rx_descr_size_set = true;
2543 etlv->iov_offload = QED_MFW_TLV_IOV_OFFLOAD_VEB;
2544 etlv->iov_offload_set = true;
2545
2546 /* Fill information regarding queues; Should be done under the qede
2547 * lock to guarantee those don't change beneath our feet.
2548 */
2549 etlv->txqs_empty = true;
2550 etlv->rxqs_empty = true;
2551 etlv->num_txqs_full = 0;
2552 etlv->num_rxqs_full = 0;
2553
2554 __qede_lock(edev);
2555 for_each_queue(i) {
2556 fp = &edev->fp_array[i];
2557 if (fp->type & QEDE_FASTPATH_TX) {
2558 struct qede_tx_queue *txq = QEDE_FP_TC0_TXQ(fp);
2559
2560 if (txq->sw_tx_cons != txq->sw_tx_prod)
2561 etlv->txqs_empty = false;
2562 if (qede_is_txq_full(edev, txq))
2563 etlv->num_txqs_full++;
2564 }
2565 if (fp->type & QEDE_FASTPATH_RX) {
2566 if (qede_has_rx_work(fp->rxq))
2567 etlv->rxqs_empty = false;
2568
2569 /* This one is a bit tricky; Firmware might stop
2570 * placing packets if ring is not yet full.
2571 * Give an approximation.
2572 */
2573 if (le16_to_cpu(*fp->rxq->hw_cons_ptr) -
2574 qed_chain_get_cons_idx(&fp->rxq->rx_comp_ring) >
2575 RX_RING_SIZE - 100)
2576 etlv->num_rxqs_full++;
2577 }
2578 }
2579 __qede_unlock(edev);
2580
2581 etlv->txqs_empty_set = true;
2582 etlv->rxqs_empty_set = true;
2583 etlv->num_txqs_full_set = true;
2584 etlv->num_rxqs_full_set = true;
2585}
1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2/* QLogic qede NIC Driver
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
5 */
6
7#include <linux/crash_dump.h>
8#include <linux/module.h>
9#include <linux/pci.h>
10#include <linux/device.h>
11#include <linux/netdevice.h>
12#include <linux/etherdevice.h>
13#include <linux/skbuff.h>
14#include <linux/errno.h>
15#include <linux/list.h>
16#include <linux/string.h>
17#include <linux/dma-mapping.h>
18#include <linux/interrupt.h>
19#include <asm/byteorder.h>
20#include <asm/param.h>
21#include <linux/io.h>
22#include <linux/netdev_features.h>
23#include <linux/udp.h>
24#include <linux/tcp.h>
25#include <net/udp_tunnel.h>
26#include <linux/ip.h>
27#include <net/ipv6.h>
28#include <net/tcp.h>
29#include <linux/if_ether.h>
30#include <linux/if_vlan.h>
31#include <linux/pkt_sched.h>
32#include <linux/ethtool.h>
33#include <linux/in.h>
34#include <linux/random.h>
35#include <net/ip6_checksum.h>
36#include <linux/bitops.h>
37#include <linux/vmalloc.h>
38#include <linux/aer.h>
39#include "qede.h"
40#include "qede_ptp.h"
41
42MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
43MODULE_LICENSE("GPL");
44
45static uint debug;
46module_param(debug, uint, 0);
47MODULE_PARM_DESC(debug, " Default debug msglevel");
48
49static const struct qed_eth_ops *qed_ops;
50
51#define CHIP_NUM_57980S_40 0x1634
52#define CHIP_NUM_57980S_10 0x1666
53#define CHIP_NUM_57980S_MF 0x1636
54#define CHIP_NUM_57980S_100 0x1644
55#define CHIP_NUM_57980S_50 0x1654
56#define CHIP_NUM_57980S_25 0x1656
57#define CHIP_NUM_57980S_IOV 0x1664
58#define CHIP_NUM_AH 0x8070
59#define CHIP_NUM_AH_IOV 0x8090
60
61#ifndef PCI_DEVICE_ID_NX2_57980E
62#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
63#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
64#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
65#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
66#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
67#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
68#define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
69#define PCI_DEVICE_ID_AH CHIP_NUM_AH
70#define PCI_DEVICE_ID_AH_IOV CHIP_NUM_AH_IOV
71
72#endif
73
74enum qede_pci_private {
75 QEDE_PRIVATE_PF,
76 QEDE_PRIVATE_VF
77};
78
79static const struct pci_device_id qede_pci_tbl[] = {
80 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
81 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
82 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
83 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
84 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
85 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
86#ifdef CONFIG_QED_SRIOV
87 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
88#endif
89 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH), QEDE_PRIVATE_PF},
90#ifdef CONFIG_QED_SRIOV
91 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH_IOV), QEDE_PRIVATE_VF},
92#endif
93 { 0 }
94};
95
96MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
97
98static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
99static pci_ers_result_t
100qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state);
101
102#define TX_TIMEOUT (5 * HZ)
103
104/* Utilize last protocol index for XDP */
105#define XDP_PI 11
106
107static void qede_remove(struct pci_dev *pdev);
108static void qede_shutdown(struct pci_dev *pdev);
109static void qede_link_update(void *dev, struct qed_link_output *link);
110static void qede_schedule_recovery_handler(void *dev);
111static void qede_recovery_handler(struct qede_dev *edev);
112static void qede_schedule_hw_err_handler(void *dev,
113 enum qed_hw_err_type err_type);
114static void qede_get_eth_tlv_data(void *edev, void *data);
115static void qede_get_generic_tlv_data(void *edev,
116 struct qed_generic_tlvs *data);
117static void qede_generic_hw_err_handler(struct qede_dev *edev);
118#ifdef CONFIG_QED_SRIOV
119static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos,
120 __be16 vlan_proto)
121{
122 struct qede_dev *edev = netdev_priv(ndev);
123
124 if (vlan > 4095) {
125 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
126 return -EINVAL;
127 }
128
129 if (vlan_proto != htons(ETH_P_8021Q))
130 return -EPROTONOSUPPORT;
131
132 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
133 vlan, vf);
134
135 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
136}
137
138static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
139{
140 struct qede_dev *edev = netdev_priv(ndev);
141
142 DP_VERBOSE(edev, QED_MSG_IOV, "Setting MAC %pM to VF [%d]\n", mac, vfidx);
143
144 if (!is_valid_ether_addr(mac)) {
145 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
146 return -EINVAL;
147 }
148
149 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
150}
151
152static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
153{
154 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
155 struct qed_dev_info *qed_info = &edev->dev_info.common;
156 struct qed_update_vport_params *vport_params;
157 int rc;
158
159 vport_params = vzalloc(sizeof(*vport_params));
160 if (!vport_params)
161 return -ENOMEM;
162 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
163
164 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
165
166 /* Enable/Disable Tx switching for PF */
167 if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
168 !qed_info->b_inter_pf_switch && qed_info->tx_switching) {
169 vport_params->vport_id = 0;
170 vport_params->update_tx_switching_flg = 1;
171 vport_params->tx_switching_flg = num_vfs_param ? 1 : 0;
172 edev->ops->vport_update(edev->cdev, vport_params);
173 }
174
175 vfree(vport_params);
176 return rc;
177}
178#endif
179
180static const struct pci_error_handlers qede_err_handler = {
181 .error_detected = qede_io_error_detected,
182};
183
184static struct pci_driver qede_pci_driver = {
185 .name = "qede",
186 .id_table = qede_pci_tbl,
187 .probe = qede_probe,
188 .remove = qede_remove,
189 .shutdown = qede_shutdown,
190#ifdef CONFIG_QED_SRIOV
191 .sriov_configure = qede_sriov_configure,
192#endif
193 .err_handler = &qede_err_handler,
194};
195
196static struct qed_eth_cb_ops qede_ll_ops = {
197 {
198#ifdef CONFIG_RFS_ACCEL
199 .arfs_filter_op = qede_arfs_filter_op,
200#endif
201 .link_update = qede_link_update,
202 .schedule_recovery_handler = qede_schedule_recovery_handler,
203 .schedule_hw_err_handler = qede_schedule_hw_err_handler,
204 .get_generic_tlv_data = qede_get_generic_tlv_data,
205 .get_protocol_tlv_data = qede_get_eth_tlv_data,
206 },
207 .force_mac = qede_force_mac,
208 .ports_update = qede_udp_ports_update,
209};
210
211static int qede_netdev_event(struct notifier_block *this, unsigned long event,
212 void *ptr)
213{
214 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
215 struct ethtool_drvinfo drvinfo;
216 struct qede_dev *edev;
217
218 if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR)
219 goto done;
220
221 /* Check whether this is a qede device */
222 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
223 goto done;
224
225 memset(&drvinfo, 0, sizeof(drvinfo));
226 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
227 if (strcmp(drvinfo.driver, "qede"))
228 goto done;
229 edev = netdev_priv(ndev);
230
231 switch (event) {
232 case NETDEV_CHANGENAME:
233 /* Notify qed of the name change */
234 if (!edev->ops || !edev->ops->common)
235 goto done;
236 edev->ops->common->set_name(edev->cdev, edev->ndev->name);
237 break;
238 case NETDEV_CHANGEADDR:
239 edev = netdev_priv(ndev);
240 qede_rdma_event_changeaddr(edev);
241 break;
242 }
243
244done:
245 return NOTIFY_DONE;
246}
247
248static struct notifier_block qede_netdev_notifier = {
249 .notifier_call = qede_netdev_event,
250};
251
252static
253int __init qede_init(void)
254{
255 int ret;
256
257 pr_info("qede init: QLogic FastLinQ 4xxxx Ethernet Driver qede\n");
258
259 qede_forced_speed_maps_init();
260
261 qed_ops = qed_get_eth_ops();
262 if (!qed_ops) {
263 pr_notice("Failed to get qed ethtool operations\n");
264 return -EINVAL;
265 }
266
267 /* Must register notifier before pci ops, since we might miss
268 * interface rename after pci probe and netdev registration.
269 */
270 ret = register_netdevice_notifier(&qede_netdev_notifier);
271 if (ret) {
272 pr_notice("Failed to register netdevice_notifier\n");
273 qed_put_eth_ops();
274 return -EINVAL;
275 }
276
277 ret = pci_register_driver(&qede_pci_driver);
278 if (ret) {
279 pr_notice("Failed to register driver\n");
280 unregister_netdevice_notifier(&qede_netdev_notifier);
281 qed_put_eth_ops();
282 return -EINVAL;
283 }
284
285 return 0;
286}
287
288static void __exit qede_cleanup(void)
289{
290 if (debug & QED_LOG_INFO_MASK)
291 pr_info("qede_cleanup called\n");
292
293 unregister_netdevice_notifier(&qede_netdev_notifier);
294 pci_unregister_driver(&qede_pci_driver);
295 qed_put_eth_ops();
296}
297
298module_init(qede_init);
299module_exit(qede_cleanup);
300
301static int qede_open(struct net_device *ndev);
302static int qede_close(struct net_device *ndev);
303
304void qede_fill_by_demand_stats(struct qede_dev *edev)
305{
306 struct qede_stats_common *p_common = &edev->stats.common;
307 struct qed_eth_stats stats;
308
309 edev->ops->get_vport_stats(edev->cdev, &stats);
310
311 p_common->no_buff_discards = stats.common.no_buff_discards;
312 p_common->packet_too_big_discard = stats.common.packet_too_big_discard;
313 p_common->ttl0_discard = stats.common.ttl0_discard;
314 p_common->rx_ucast_bytes = stats.common.rx_ucast_bytes;
315 p_common->rx_mcast_bytes = stats.common.rx_mcast_bytes;
316 p_common->rx_bcast_bytes = stats.common.rx_bcast_bytes;
317 p_common->rx_ucast_pkts = stats.common.rx_ucast_pkts;
318 p_common->rx_mcast_pkts = stats.common.rx_mcast_pkts;
319 p_common->rx_bcast_pkts = stats.common.rx_bcast_pkts;
320 p_common->mftag_filter_discards = stats.common.mftag_filter_discards;
321 p_common->mac_filter_discards = stats.common.mac_filter_discards;
322 p_common->gft_filter_drop = stats.common.gft_filter_drop;
323
324 p_common->tx_ucast_bytes = stats.common.tx_ucast_bytes;
325 p_common->tx_mcast_bytes = stats.common.tx_mcast_bytes;
326 p_common->tx_bcast_bytes = stats.common.tx_bcast_bytes;
327 p_common->tx_ucast_pkts = stats.common.tx_ucast_pkts;
328 p_common->tx_mcast_pkts = stats.common.tx_mcast_pkts;
329 p_common->tx_bcast_pkts = stats.common.tx_bcast_pkts;
330 p_common->tx_err_drop_pkts = stats.common.tx_err_drop_pkts;
331 p_common->coalesced_pkts = stats.common.tpa_coalesced_pkts;
332 p_common->coalesced_events = stats.common.tpa_coalesced_events;
333 p_common->coalesced_aborts_num = stats.common.tpa_aborts_num;
334 p_common->non_coalesced_pkts = stats.common.tpa_not_coalesced_pkts;
335 p_common->coalesced_bytes = stats.common.tpa_coalesced_bytes;
336
337 p_common->rx_64_byte_packets = stats.common.rx_64_byte_packets;
338 p_common->rx_65_to_127_byte_packets =
339 stats.common.rx_65_to_127_byte_packets;
340 p_common->rx_128_to_255_byte_packets =
341 stats.common.rx_128_to_255_byte_packets;
342 p_common->rx_256_to_511_byte_packets =
343 stats.common.rx_256_to_511_byte_packets;
344 p_common->rx_512_to_1023_byte_packets =
345 stats.common.rx_512_to_1023_byte_packets;
346 p_common->rx_1024_to_1518_byte_packets =
347 stats.common.rx_1024_to_1518_byte_packets;
348 p_common->rx_crc_errors = stats.common.rx_crc_errors;
349 p_common->rx_mac_crtl_frames = stats.common.rx_mac_crtl_frames;
350 p_common->rx_pause_frames = stats.common.rx_pause_frames;
351 p_common->rx_pfc_frames = stats.common.rx_pfc_frames;
352 p_common->rx_align_errors = stats.common.rx_align_errors;
353 p_common->rx_carrier_errors = stats.common.rx_carrier_errors;
354 p_common->rx_oversize_packets = stats.common.rx_oversize_packets;
355 p_common->rx_jabbers = stats.common.rx_jabbers;
356 p_common->rx_undersize_packets = stats.common.rx_undersize_packets;
357 p_common->rx_fragments = stats.common.rx_fragments;
358 p_common->tx_64_byte_packets = stats.common.tx_64_byte_packets;
359 p_common->tx_65_to_127_byte_packets =
360 stats.common.tx_65_to_127_byte_packets;
361 p_common->tx_128_to_255_byte_packets =
362 stats.common.tx_128_to_255_byte_packets;
363 p_common->tx_256_to_511_byte_packets =
364 stats.common.tx_256_to_511_byte_packets;
365 p_common->tx_512_to_1023_byte_packets =
366 stats.common.tx_512_to_1023_byte_packets;
367 p_common->tx_1024_to_1518_byte_packets =
368 stats.common.tx_1024_to_1518_byte_packets;
369 p_common->tx_pause_frames = stats.common.tx_pause_frames;
370 p_common->tx_pfc_frames = stats.common.tx_pfc_frames;
371 p_common->brb_truncates = stats.common.brb_truncates;
372 p_common->brb_discards = stats.common.brb_discards;
373 p_common->tx_mac_ctrl_frames = stats.common.tx_mac_ctrl_frames;
374 p_common->link_change_count = stats.common.link_change_count;
375 p_common->ptp_skip_txts = edev->ptp_skip_txts;
376
377 if (QEDE_IS_BB(edev)) {
378 struct qede_stats_bb *p_bb = &edev->stats.bb;
379
380 p_bb->rx_1519_to_1522_byte_packets =
381 stats.bb.rx_1519_to_1522_byte_packets;
382 p_bb->rx_1519_to_2047_byte_packets =
383 stats.bb.rx_1519_to_2047_byte_packets;
384 p_bb->rx_2048_to_4095_byte_packets =
385 stats.bb.rx_2048_to_4095_byte_packets;
386 p_bb->rx_4096_to_9216_byte_packets =
387 stats.bb.rx_4096_to_9216_byte_packets;
388 p_bb->rx_9217_to_16383_byte_packets =
389 stats.bb.rx_9217_to_16383_byte_packets;
390 p_bb->tx_1519_to_2047_byte_packets =
391 stats.bb.tx_1519_to_2047_byte_packets;
392 p_bb->tx_2048_to_4095_byte_packets =
393 stats.bb.tx_2048_to_4095_byte_packets;
394 p_bb->tx_4096_to_9216_byte_packets =
395 stats.bb.tx_4096_to_9216_byte_packets;
396 p_bb->tx_9217_to_16383_byte_packets =
397 stats.bb.tx_9217_to_16383_byte_packets;
398 p_bb->tx_lpi_entry_count = stats.bb.tx_lpi_entry_count;
399 p_bb->tx_total_collisions = stats.bb.tx_total_collisions;
400 } else {
401 struct qede_stats_ah *p_ah = &edev->stats.ah;
402
403 p_ah->rx_1519_to_max_byte_packets =
404 stats.ah.rx_1519_to_max_byte_packets;
405 p_ah->tx_1519_to_max_byte_packets =
406 stats.ah.tx_1519_to_max_byte_packets;
407 }
408}
409
410static void qede_get_stats64(struct net_device *dev,
411 struct rtnl_link_stats64 *stats)
412{
413 struct qede_dev *edev = netdev_priv(dev);
414 struct qede_stats_common *p_common;
415
416 qede_fill_by_demand_stats(edev);
417 p_common = &edev->stats.common;
418
419 stats->rx_packets = p_common->rx_ucast_pkts + p_common->rx_mcast_pkts +
420 p_common->rx_bcast_pkts;
421 stats->tx_packets = p_common->tx_ucast_pkts + p_common->tx_mcast_pkts +
422 p_common->tx_bcast_pkts;
423
424 stats->rx_bytes = p_common->rx_ucast_bytes + p_common->rx_mcast_bytes +
425 p_common->rx_bcast_bytes;
426 stats->tx_bytes = p_common->tx_ucast_bytes + p_common->tx_mcast_bytes +
427 p_common->tx_bcast_bytes;
428
429 stats->tx_errors = p_common->tx_err_drop_pkts;
430 stats->multicast = p_common->rx_mcast_pkts + p_common->rx_bcast_pkts;
431
432 stats->rx_fifo_errors = p_common->no_buff_discards;
433
434 if (QEDE_IS_BB(edev))
435 stats->collisions = edev->stats.bb.tx_total_collisions;
436 stats->rx_crc_errors = p_common->rx_crc_errors;
437 stats->rx_frame_errors = p_common->rx_align_errors;
438}
439
440#ifdef CONFIG_QED_SRIOV
441static int qede_get_vf_config(struct net_device *dev, int vfidx,
442 struct ifla_vf_info *ivi)
443{
444 struct qede_dev *edev = netdev_priv(dev);
445
446 if (!edev->ops)
447 return -EINVAL;
448
449 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
450}
451
452static int qede_set_vf_rate(struct net_device *dev, int vfidx,
453 int min_tx_rate, int max_tx_rate)
454{
455 struct qede_dev *edev = netdev_priv(dev);
456
457 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
458 max_tx_rate);
459}
460
461static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
462{
463 struct qede_dev *edev = netdev_priv(dev);
464
465 if (!edev->ops)
466 return -EINVAL;
467
468 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
469}
470
471static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
472 int link_state)
473{
474 struct qede_dev *edev = netdev_priv(dev);
475
476 if (!edev->ops)
477 return -EINVAL;
478
479 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
480}
481
482static int qede_set_vf_trust(struct net_device *dev, int vfidx, bool setting)
483{
484 struct qede_dev *edev = netdev_priv(dev);
485
486 if (!edev->ops)
487 return -EINVAL;
488
489 return edev->ops->iov->set_trust(edev->cdev, vfidx, setting);
490}
491#endif
492
493static int qede_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
494{
495 struct qede_dev *edev = netdev_priv(dev);
496
497 if (!netif_running(dev))
498 return -EAGAIN;
499
500 switch (cmd) {
501 case SIOCSHWTSTAMP:
502 return qede_ptp_hw_ts(edev, ifr);
503 default:
504 DP_VERBOSE(edev, QED_MSG_DEBUG,
505 "default IOCTL cmd 0x%x\n", cmd);
506 return -EOPNOTSUPP;
507 }
508
509 return 0;
510}
511
512static void qede_fp_sb_dump(struct qede_dev *edev, struct qede_fastpath *fp)
513{
514 char *p_sb = (char *)fp->sb_info->sb_virt;
515 u32 sb_size, i;
516
517 sb_size = sizeof(struct status_block);
518
519 for (i = 0; i < sb_size; i += 8)
520 DP_NOTICE(edev,
521 "%02hhX %02hhX %02hhX %02hhX %02hhX %02hhX %02hhX %02hhX\n",
522 p_sb[i], p_sb[i + 1], p_sb[i + 2], p_sb[i + 3],
523 p_sb[i + 4], p_sb[i + 5], p_sb[i + 6], p_sb[i + 7]);
524}
525
526static void
527qede_txq_fp_log_metadata(struct qede_dev *edev,
528 struct qede_fastpath *fp, struct qede_tx_queue *txq)
529{
530 struct qed_chain *p_chain = &txq->tx_pbl;
531
532 /* Dump txq/fp/sb ids etc. other metadata */
533 DP_NOTICE(edev,
534 "fpid 0x%x sbid 0x%x txqid [0x%x] ndev_qid [0x%x] cos [0x%x] p_chain %p cap %d size %d jiffies %lu HZ 0x%x\n",
535 fp->id, fp->sb_info->igu_sb_id, txq->index, txq->ndev_txq_id, txq->cos,
536 p_chain, p_chain->capacity, p_chain->size, jiffies, HZ);
537
538 /* Dump all the relevant prod/cons indexes */
539 DP_NOTICE(edev,
540 "hw cons %04x sw_tx_prod=0x%x, sw_tx_cons=0x%x, bd_prod 0x%x bd_cons 0x%x\n",
541 le16_to_cpu(*txq->hw_cons_ptr), txq->sw_tx_prod, txq->sw_tx_cons,
542 qed_chain_get_prod_idx(p_chain), qed_chain_get_cons_idx(p_chain));
543}
544
545static void
546qede_tx_log_print(struct qede_dev *edev, struct qede_fastpath *fp, struct qede_tx_queue *txq)
547{
548 struct qed_sb_info_dbg sb_dbg;
549 int rc;
550
551 /* sb info */
552 qede_fp_sb_dump(edev, fp);
553
554 memset(&sb_dbg, 0, sizeof(sb_dbg));
555 rc = edev->ops->common->get_sb_info(edev->cdev, fp->sb_info, (u16)fp->id, &sb_dbg);
556
557 DP_NOTICE(edev, "IGU: prod %08x cons %08x CAU Tx %04x\n",
558 sb_dbg.igu_prod, sb_dbg.igu_cons, sb_dbg.pi[TX_PI(txq->cos)]);
559
560 /* report to mfw */
561 edev->ops->common->mfw_report(edev->cdev,
562 "Txq[%d]: FW cons [host] %04x, SW cons %04x, SW prod %04x [Jiffies %lu]\n",
563 txq->index, le16_to_cpu(*txq->hw_cons_ptr),
564 qed_chain_get_cons_idx(&txq->tx_pbl),
565 qed_chain_get_prod_idx(&txq->tx_pbl), jiffies);
566 if (!rc)
567 edev->ops->common->mfw_report(edev->cdev,
568 "Txq[%d]: SB[0x%04x] - IGU: prod %08x cons %08x CAU Tx %04x\n",
569 txq->index, fp->sb_info->igu_sb_id,
570 sb_dbg.igu_prod, sb_dbg.igu_cons,
571 sb_dbg.pi[TX_PI(txq->cos)]);
572}
573
574static void qede_tx_timeout(struct net_device *dev, unsigned int txqueue)
575{
576 struct qede_dev *edev = netdev_priv(dev);
577 int i;
578
579 netif_carrier_off(dev);
580 DP_NOTICE(edev, "TX timeout on queue %u!\n", txqueue);
581
582 for_each_queue(i) {
583 struct qede_tx_queue *txq;
584 struct qede_fastpath *fp;
585 int cos;
586
587 fp = &edev->fp_array[i];
588 if (!(fp->type & QEDE_FASTPATH_TX))
589 continue;
590
591 for_each_cos_in_txq(edev, cos) {
592 txq = &fp->txq[cos];
593
594 /* Dump basic metadata for all queues */
595 qede_txq_fp_log_metadata(edev, fp, txq);
596
597 if (qed_chain_get_cons_idx(&txq->tx_pbl) !=
598 qed_chain_get_prod_idx(&txq->tx_pbl))
599 qede_tx_log_print(edev, fp, txq);
600 }
601 }
602
603 if (IS_VF(edev))
604 return;
605
606 if (test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) ||
607 edev->state == QEDE_STATE_RECOVERY) {
608 DP_INFO(edev,
609 "Avoid handling a Tx timeout while another HW error is being handled\n");
610 return;
611 }
612
613 set_bit(QEDE_ERR_GET_DBG_INFO, &edev->err_flags);
614 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags);
615 schedule_delayed_work(&edev->sp_task, 0);
616}
617
618static int qede_setup_tc(struct net_device *ndev, u8 num_tc)
619{
620 struct qede_dev *edev = netdev_priv(ndev);
621 int cos, count, offset;
622
623 if (num_tc > edev->dev_info.num_tc)
624 return -EINVAL;
625
626 netdev_reset_tc(ndev);
627 netdev_set_num_tc(ndev, num_tc);
628
629 for_each_cos_in_txq(edev, cos) {
630 count = QEDE_TSS_COUNT(edev);
631 offset = cos * QEDE_TSS_COUNT(edev);
632 netdev_set_tc_queue(ndev, cos, count, offset);
633 }
634
635 return 0;
636}
637
638static int
639qede_set_flower(struct qede_dev *edev, struct flow_cls_offload *f,
640 __be16 proto)
641{
642 switch (f->command) {
643 case FLOW_CLS_REPLACE:
644 return qede_add_tc_flower_fltr(edev, proto, f);
645 case FLOW_CLS_DESTROY:
646 return qede_delete_flow_filter(edev, f->cookie);
647 default:
648 return -EOPNOTSUPP;
649 }
650}
651
652static int qede_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
653 void *cb_priv)
654{
655 struct flow_cls_offload *f;
656 struct qede_dev *edev = cb_priv;
657
658 if (!tc_cls_can_offload_and_chain0(edev->ndev, type_data))
659 return -EOPNOTSUPP;
660
661 switch (type) {
662 case TC_SETUP_CLSFLOWER:
663 f = type_data;
664 return qede_set_flower(edev, f, f->common.protocol);
665 default:
666 return -EOPNOTSUPP;
667 }
668}
669
670static LIST_HEAD(qede_block_cb_list);
671
672static int
673qede_setup_tc_offload(struct net_device *dev, enum tc_setup_type type,
674 void *type_data)
675{
676 struct qede_dev *edev = netdev_priv(dev);
677 struct tc_mqprio_qopt *mqprio;
678
679 switch (type) {
680 case TC_SETUP_BLOCK:
681 return flow_block_cb_setup_simple(type_data,
682 &qede_block_cb_list,
683 qede_setup_tc_block_cb,
684 edev, edev, true);
685 case TC_SETUP_QDISC_MQPRIO:
686 mqprio = type_data;
687
688 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
689 return qede_setup_tc(dev, mqprio->num_tc);
690 default:
691 return -EOPNOTSUPP;
692 }
693}
694
695static const struct net_device_ops qede_netdev_ops = {
696 .ndo_open = qede_open,
697 .ndo_stop = qede_close,
698 .ndo_start_xmit = qede_start_xmit,
699 .ndo_select_queue = qede_select_queue,
700 .ndo_set_rx_mode = qede_set_rx_mode,
701 .ndo_set_mac_address = qede_set_mac_addr,
702 .ndo_validate_addr = eth_validate_addr,
703 .ndo_change_mtu = qede_change_mtu,
704 .ndo_eth_ioctl = qede_ioctl,
705 .ndo_tx_timeout = qede_tx_timeout,
706#ifdef CONFIG_QED_SRIOV
707 .ndo_set_vf_mac = qede_set_vf_mac,
708 .ndo_set_vf_vlan = qede_set_vf_vlan,
709 .ndo_set_vf_trust = qede_set_vf_trust,
710#endif
711 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
712 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
713 .ndo_fix_features = qede_fix_features,
714 .ndo_set_features = qede_set_features,
715 .ndo_get_stats64 = qede_get_stats64,
716#ifdef CONFIG_QED_SRIOV
717 .ndo_set_vf_link_state = qede_set_vf_link_state,
718 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
719 .ndo_get_vf_config = qede_get_vf_config,
720 .ndo_set_vf_rate = qede_set_vf_rate,
721#endif
722 .ndo_features_check = qede_features_check,
723 .ndo_bpf = qede_xdp,
724#ifdef CONFIG_RFS_ACCEL
725 .ndo_rx_flow_steer = qede_rx_flow_steer,
726#endif
727 .ndo_xdp_xmit = qede_xdp_transmit,
728 .ndo_setup_tc = qede_setup_tc_offload,
729};
730
731static const struct net_device_ops qede_netdev_vf_ops = {
732 .ndo_open = qede_open,
733 .ndo_stop = qede_close,
734 .ndo_start_xmit = qede_start_xmit,
735 .ndo_select_queue = qede_select_queue,
736 .ndo_set_rx_mode = qede_set_rx_mode,
737 .ndo_set_mac_address = qede_set_mac_addr,
738 .ndo_validate_addr = eth_validate_addr,
739 .ndo_change_mtu = qede_change_mtu,
740 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
741 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
742 .ndo_fix_features = qede_fix_features,
743 .ndo_set_features = qede_set_features,
744 .ndo_get_stats64 = qede_get_stats64,
745 .ndo_features_check = qede_features_check,
746};
747
748static const struct net_device_ops qede_netdev_vf_xdp_ops = {
749 .ndo_open = qede_open,
750 .ndo_stop = qede_close,
751 .ndo_start_xmit = qede_start_xmit,
752 .ndo_select_queue = qede_select_queue,
753 .ndo_set_rx_mode = qede_set_rx_mode,
754 .ndo_set_mac_address = qede_set_mac_addr,
755 .ndo_validate_addr = eth_validate_addr,
756 .ndo_change_mtu = qede_change_mtu,
757 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
758 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
759 .ndo_fix_features = qede_fix_features,
760 .ndo_set_features = qede_set_features,
761 .ndo_get_stats64 = qede_get_stats64,
762 .ndo_features_check = qede_features_check,
763 .ndo_bpf = qede_xdp,
764 .ndo_xdp_xmit = qede_xdp_transmit,
765};
766
767/* -------------------------------------------------------------------------
768 * START OF PROBE / REMOVE
769 * -------------------------------------------------------------------------
770 */
771
772static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
773 struct pci_dev *pdev,
774 struct qed_dev_eth_info *info,
775 u32 dp_module, u8 dp_level)
776{
777 struct net_device *ndev;
778 struct qede_dev *edev;
779
780 ndev = alloc_etherdev_mqs(sizeof(*edev),
781 info->num_queues * info->num_tc,
782 info->num_queues);
783 if (!ndev) {
784 pr_err("etherdev allocation failed\n");
785 return NULL;
786 }
787
788 edev = netdev_priv(ndev);
789 edev->ndev = ndev;
790 edev->cdev = cdev;
791 edev->pdev = pdev;
792 edev->dp_module = dp_module;
793 edev->dp_level = dp_level;
794 edev->ops = qed_ops;
795
796 if (is_kdump_kernel()) {
797 edev->q_num_rx_buffers = NUM_RX_BDS_KDUMP_MIN;
798 edev->q_num_tx_buffers = NUM_TX_BDS_KDUMP_MIN;
799 } else {
800 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
801 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
802 }
803
804 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n",
805 info->num_queues, info->num_queues);
806
807 SET_NETDEV_DEV(ndev, &pdev->dev);
808
809 memset(&edev->stats, 0, sizeof(edev->stats));
810 memcpy(&edev->dev_info, info, sizeof(*info));
811
812 /* As ethtool doesn't have the ability to show WoL behavior as
813 * 'default', if device supports it declare it's enabled.
814 */
815 if (edev->dev_info.common.wol_support)
816 edev->wol_enabled = true;
817
818 INIT_LIST_HEAD(&edev->vlan_list);
819
820 return edev;
821}
822
823static void qede_init_ndev(struct qede_dev *edev)
824{
825 struct net_device *ndev = edev->ndev;
826 struct pci_dev *pdev = edev->pdev;
827 bool udp_tunnel_enable = false;
828 netdev_features_t hw_features;
829
830 pci_set_drvdata(pdev, ndev);
831
832 ndev->mem_start = edev->dev_info.common.pci_mem_start;
833 ndev->base_addr = ndev->mem_start;
834 ndev->mem_end = edev->dev_info.common.pci_mem_end;
835 ndev->irq = edev->dev_info.common.pci_irq;
836
837 ndev->watchdog_timeo = TX_TIMEOUT;
838
839 if (IS_VF(edev)) {
840 if (edev->dev_info.xdp_supported)
841 ndev->netdev_ops = &qede_netdev_vf_xdp_ops;
842 else
843 ndev->netdev_ops = &qede_netdev_vf_ops;
844 } else {
845 ndev->netdev_ops = &qede_netdev_ops;
846 }
847
848 qede_set_ethtool_ops(ndev);
849
850 ndev->priv_flags |= IFF_UNICAST_FLT;
851
852 /* user-changeble features */
853 hw_features = NETIF_F_GRO | NETIF_F_GRO_HW | NETIF_F_SG |
854 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
855 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_TC;
856
857 if (edev->dev_info.common.b_arfs_capable)
858 hw_features |= NETIF_F_NTUPLE;
859
860 if (edev->dev_info.common.vxlan_enable ||
861 edev->dev_info.common.geneve_enable)
862 udp_tunnel_enable = true;
863
864 if (udp_tunnel_enable || edev->dev_info.common.gre_enable) {
865 hw_features |= NETIF_F_TSO_ECN;
866 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
867 NETIF_F_SG | NETIF_F_TSO |
868 NETIF_F_TSO_ECN | NETIF_F_TSO6 |
869 NETIF_F_RXCSUM;
870 }
871
872 if (udp_tunnel_enable) {
873 hw_features |= (NETIF_F_GSO_UDP_TUNNEL |
874 NETIF_F_GSO_UDP_TUNNEL_CSUM);
875 ndev->hw_enc_features |= (NETIF_F_GSO_UDP_TUNNEL |
876 NETIF_F_GSO_UDP_TUNNEL_CSUM);
877
878 qede_set_udp_tunnels(edev);
879 }
880
881 if (edev->dev_info.common.gre_enable) {
882 hw_features |= (NETIF_F_GSO_GRE | NETIF_F_GSO_GRE_CSUM);
883 ndev->hw_enc_features |= (NETIF_F_GSO_GRE |
884 NETIF_F_GSO_GRE_CSUM);
885 }
886
887 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
888 NETIF_F_HIGHDMA;
889 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
890 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
891 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
892
893 ndev->hw_features = hw_features;
894
895 /* MTU range: 46 - 9600 */
896 ndev->min_mtu = ETH_ZLEN - ETH_HLEN;
897 ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE;
898
899 /* Set network device HW mac */
900 eth_hw_addr_set(edev->ndev, edev->dev_info.common.hw_mac);
901
902 ndev->mtu = edev->dev_info.common.mtu;
903}
904
905/* This function converts from 32b param to two params of level and module
906 * Input 32b decoding:
907 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
908 * 'happy' flow, e.g. memory allocation failed.
909 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
910 * and provide important parameters.
911 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
912 * module. VERBOSE prints are for tracking the specific flow in low level.
913 *
914 * Notice that the level should be that of the lowest required logs.
915 */
916void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
917{
918 *p_dp_level = QED_LEVEL_NOTICE;
919 *p_dp_module = 0;
920
921 if (debug & QED_LOG_VERBOSE_MASK) {
922 *p_dp_level = QED_LEVEL_VERBOSE;
923 *p_dp_module = (debug & 0x3FFFFFFF);
924 } else if (debug & QED_LOG_INFO_MASK) {
925 *p_dp_level = QED_LEVEL_INFO;
926 } else if (debug & QED_LOG_NOTICE_MASK) {
927 *p_dp_level = QED_LEVEL_NOTICE;
928 }
929}
930
931static void qede_free_fp_array(struct qede_dev *edev)
932{
933 if (edev->fp_array) {
934 struct qede_fastpath *fp;
935 int i;
936
937 for_each_queue(i) {
938 fp = &edev->fp_array[i];
939
940 kfree(fp->sb_info);
941 /* Handle mem alloc failure case where qede_init_fp
942 * didn't register xdp_rxq_info yet.
943 * Implicit only (fp->type & QEDE_FASTPATH_RX)
944 */
945 if (fp->rxq && xdp_rxq_info_is_reg(&fp->rxq->xdp_rxq))
946 xdp_rxq_info_unreg(&fp->rxq->xdp_rxq);
947 kfree(fp->rxq);
948 kfree(fp->xdp_tx);
949 kfree(fp->txq);
950 }
951 kfree(edev->fp_array);
952 }
953
954 edev->num_queues = 0;
955 edev->fp_num_tx = 0;
956 edev->fp_num_rx = 0;
957}
958
959static int qede_alloc_fp_array(struct qede_dev *edev)
960{
961 u8 fp_combined, fp_rx = edev->fp_num_rx;
962 struct qede_fastpath *fp;
963 void *mem;
964 int i;
965
966 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev),
967 sizeof(*edev->fp_array), GFP_KERNEL);
968 if (!edev->fp_array) {
969 DP_NOTICE(edev, "fp array allocation failed\n");
970 goto err;
971 }
972
973 mem = krealloc(edev->coal_entry, QEDE_QUEUE_CNT(edev) *
974 sizeof(*edev->coal_entry), GFP_KERNEL);
975 if (!mem) {
976 DP_ERR(edev, "coalesce entry allocation failed\n");
977 kfree(edev->coal_entry);
978 goto err;
979 }
980 edev->coal_entry = mem;
981
982 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx;
983
984 /* Allocate the FP elements for Rx queues followed by combined and then
985 * the Tx. This ordering should be maintained so that the respective
986 * queues (Rx or Tx) will be together in the fastpath array and the
987 * associated ids will be sequential.
988 */
989 for_each_queue(i) {
990 fp = &edev->fp_array[i];
991
992 fp->sb_info = kzalloc(sizeof(*fp->sb_info), GFP_KERNEL);
993 if (!fp->sb_info) {
994 DP_NOTICE(edev, "sb info struct allocation failed\n");
995 goto err;
996 }
997
998 if (fp_rx) {
999 fp->type = QEDE_FASTPATH_RX;
1000 fp_rx--;
1001 } else if (fp_combined) {
1002 fp->type = QEDE_FASTPATH_COMBINED;
1003 fp_combined--;
1004 } else {
1005 fp->type = QEDE_FASTPATH_TX;
1006 }
1007
1008 if (fp->type & QEDE_FASTPATH_TX) {
1009 fp->txq = kcalloc(edev->dev_info.num_tc,
1010 sizeof(*fp->txq), GFP_KERNEL);
1011 if (!fp->txq)
1012 goto err;
1013 }
1014
1015 if (fp->type & QEDE_FASTPATH_RX) {
1016 fp->rxq = kzalloc(sizeof(*fp->rxq), GFP_KERNEL);
1017 if (!fp->rxq)
1018 goto err;
1019
1020 if (edev->xdp_prog) {
1021 fp->xdp_tx = kzalloc(sizeof(*fp->xdp_tx),
1022 GFP_KERNEL);
1023 if (!fp->xdp_tx)
1024 goto err;
1025 fp->type |= QEDE_FASTPATH_XDP;
1026 }
1027 }
1028 }
1029
1030 return 0;
1031err:
1032 qede_free_fp_array(edev);
1033 return -ENOMEM;
1034}
1035
1036/* The qede lock is used to protect driver state change and driver flows that
1037 * are not reentrant.
1038 */
1039void __qede_lock(struct qede_dev *edev)
1040{
1041 mutex_lock(&edev->qede_lock);
1042}
1043
1044void __qede_unlock(struct qede_dev *edev)
1045{
1046 mutex_unlock(&edev->qede_lock);
1047}
1048
1049/* This version of the lock should be used when acquiring the RTNL lock is also
1050 * needed in addition to the internal qede lock.
1051 */
1052static void qede_lock(struct qede_dev *edev)
1053{
1054 rtnl_lock();
1055 __qede_lock(edev);
1056}
1057
1058static void qede_unlock(struct qede_dev *edev)
1059{
1060 __qede_unlock(edev);
1061 rtnl_unlock();
1062}
1063
1064static void qede_sp_task(struct work_struct *work)
1065{
1066 struct qede_dev *edev = container_of(work, struct qede_dev,
1067 sp_task.work);
1068
1069 /* Disable execution of this deferred work once
1070 * qede removal is in progress, this stop any future
1071 * scheduling of sp_task.
1072 */
1073 if (test_bit(QEDE_SP_DISABLE, &edev->sp_flags))
1074 return;
1075
1076 /* The locking scheme depends on the specific flag:
1077 * In case of QEDE_SP_RECOVERY, acquiring the RTNL lock is required to
1078 * ensure that ongoing flows are ended and new ones are not started.
1079 * In other cases - only the internal qede lock should be acquired.
1080 */
1081
1082 if (test_and_clear_bit(QEDE_SP_RECOVERY, &edev->sp_flags)) {
1083#ifdef CONFIG_QED_SRIOV
1084 /* SRIOV must be disabled outside the lock to avoid a deadlock.
1085 * The recovery of the active VFs is currently not supported.
1086 */
1087 if (pci_num_vf(edev->pdev))
1088 qede_sriov_configure(edev->pdev, 0);
1089#endif
1090 qede_lock(edev);
1091 qede_recovery_handler(edev);
1092 qede_unlock(edev);
1093 }
1094
1095 __qede_lock(edev);
1096
1097 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
1098 if (edev->state == QEDE_STATE_OPEN)
1099 qede_config_rx_mode(edev->ndev);
1100
1101#ifdef CONFIG_RFS_ACCEL
1102 if (test_and_clear_bit(QEDE_SP_ARFS_CONFIG, &edev->sp_flags)) {
1103 if (edev->state == QEDE_STATE_OPEN)
1104 qede_process_arfs_filters(edev, false);
1105 }
1106#endif
1107 if (test_and_clear_bit(QEDE_SP_HW_ERR, &edev->sp_flags))
1108 qede_generic_hw_err_handler(edev);
1109 __qede_unlock(edev);
1110
1111 if (test_and_clear_bit(QEDE_SP_AER, &edev->sp_flags)) {
1112#ifdef CONFIG_QED_SRIOV
1113 /* SRIOV must be disabled outside the lock to avoid a deadlock.
1114 * The recovery of the active VFs is currently not supported.
1115 */
1116 if (pci_num_vf(edev->pdev))
1117 qede_sriov_configure(edev->pdev, 0);
1118#endif
1119 edev->ops->common->recovery_process(edev->cdev);
1120 }
1121}
1122
1123static void qede_update_pf_params(struct qed_dev *cdev)
1124{
1125 struct qed_pf_params pf_params;
1126 u16 num_cons;
1127
1128 /* 64 rx + 64 tx + 64 XDP */
1129 memset(&pf_params, 0, sizeof(struct qed_pf_params));
1130
1131 /* 1 rx + 1 xdp + max tx cos */
1132 num_cons = QED_MIN_L2_CONS;
1133
1134 pf_params.eth_pf_params.num_cons = (MAX_SB_PER_PF_MIMD - 1) * num_cons;
1135
1136 /* Same for VFs - make sure they'll have sufficient connections
1137 * to support XDP Tx queues.
1138 */
1139 pf_params.eth_pf_params.num_vf_cons = 48;
1140
1141 pf_params.eth_pf_params.num_arfs_filters = QEDE_RFS_MAX_FLTR;
1142 qed_ops->common->update_pf_params(cdev, &pf_params);
1143}
1144
1145#define QEDE_FW_VER_STR_SIZE 80
1146
1147static void qede_log_probe(struct qede_dev *edev)
1148{
1149 struct qed_dev_info *p_dev_info = &edev->dev_info.common;
1150 u8 buf[QEDE_FW_VER_STR_SIZE];
1151 size_t left_size;
1152
1153 snprintf(buf, QEDE_FW_VER_STR_SIZE,
1154 "Storm FW %d.%d.%d.%d, Management FW %d.%d.%d.%d",
1155 p_dev_info->fw_major, p_dev_info->fw_minor, p_dev_info->fw_rev,
1156 p_dev_info->fw_eng,
1157 (p_dev_info->mfw_rev & QED_MFW_VERSION_3_MASK) >>
1158 QED_MFW_VERSION_3_OFFSET,
1159 (p_dev_info->mfw_rev & QED_MFW_VERSION_2_MASK) >>
1160 QED_MFW_VERSION_2_OFFSET,
1161 (p_dev_info->mfw_rev & QED_MFW_VERSION_1_MASK) >>
1162 QED_MFW_VERSION_1_OFFSET,
1163 (p_dev_info->mfw_rev & QED_MFW_VERSION_0_MASK) >>
1164 QED_MFW_VERSION_0_OFFSET);
1165
1166 left_size = QEDE_FW_VER_STR_SIZE - strlen(buf);
1167 if (p_dev_info->mbi_version && left_size)
1168 snprintf(buf + strlen(buf), left_size,
1169 " [MBI %d.%d.%d]",
1170 (p_dev_info->mbi_version & QED_MBI_VERSION_2_MASK) >>
1171 QED_MBI_VERSION_2_OFFSET,
1172 (p_dev_info->mbi_version & QED_MBI_VERSION_1_MASK) >>
1173 QED_MBI_VERSION_1_OFFSET,
1174 (p_dev_info->mbi_version & QED_MBI_VERSION_0_MASK) >>
1175 QED_MBI_VERSION_0_OFFSET);
1176
1177 pr_info("qede %02x:%02x.%02x: %s [%s]\n", edev->pdev->bus->number,
1178 PCI_SLOT(edev->pdev->devfn), PCI_FUNC(edev->pdev->devfn),
1179 buf, edev->ndev->name);
1180}
1181
1182enum qede_probe_mode {
1183 QEDE_PROBE_NORMAL,
1184 QEDE_PROBE_RECOVERY,
1185};
1186
1187static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
1188 bool is_vf, enum qede_probe_mode mode)
1189{
1190 struct qed_probe_params probe_params;
1191 struct qed_slowpath_params sp_params;
1192 struct qed_dev_eth_info dev_info;
1193 struct qede_dev *edev;
1194 struct qed_dev *cdev;
1195 int rc;
1196
1197 if (unlikely(dp_level & QED_LEVEL_INFO))
1198 pr_notice("Starting qede probe\n");
1199
1200 memset(&probe_params, 0, sizeof(probe_params));
1201 probe_params.protocol = QED_PROTOCOL_ETH;
1202 probe_params.dp_module = dp_module;
1203 probe_params.dp_level = dp_level;
1204 probe_params.is_vf = is_vf;
1205 probe_params.recov_in_prog = (mode == QEDE_PROBE_RECOVERY);
1206 cdev = qed_ops->common->probe(pdev, &probe_params);
1207 if (!cdev) {
1208 rc = -ENODEV;
1209 goto err0;
1210 }
1211
1212 qede_update_pf_params(cdev);
1213
1214 /* Start the Slowpath-process */
1215 memset(&sp_params, 0, sizeof(sp_params));
1216 sp_params.int_mode = QED_INT_MODE_MSIX;
1217 strscpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
1218 rc = qed_ops->common->slowpath_start(cdev, &sp_params);
1219 if (rc) {
1220 pr_notice("Cannot start slowpath\n");
1221 goto err1;
1222 }
1223
1224 /* Learn information crucial for qede to progress */
1225 rc = qed_ops->fill_dev_info(cdev, &dev_info);
1226 if (rc)
1227 goto err2;
1228
1229 if (mode != QEDE_PROBE_RECOVERY) {
1230 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
1231 dp_level);
1232 if (!edev) {
1233 rc = -ENOMEM;
1234 goto err2;
1235 }
1236
1237 edev->devlink = qed_ops->common->devlink_register(cdev);
1238 if (IS_ERR(edev->devlink)) {
1239 DP_NOTICE(edev, "Cannot register devlink\n");
1240 rc = PTR_ERR(edev->devlink);
1241 edev->devlink = NULL;
1242 goto err3;
1243 }
1244 } else {
1245 struct net_device *ndev = pci_get_drvdata(pdev);
1246 struct qed_devlink *qdl;
1247
1248 edev = netdev_priv(ndev);
1249 qdl = devlink_priv(edev->devlink);
1250 qdl->cdev = cdev;
1251 edev->cdev = cdev;
1252 memset(&edev->stats, 0, sizeof(edev->stats));
1253 memcpy(&edev->dev_info, &dev_info, sizeof(dev_info));
1254 }
1255
1256 if (is_vf)
1257 set_bit(QEDE_FLAGS_IS_VF, &edev->flags);
1258
1259 qede_init_ndev(edev);
1260
1261 rc = qede_rdma_dev_add(edev, (mode == QEDE_PROBE_RECOVERY));
1262 if (rc)
1263 goto err3;
1264
1265 if (mode != QEDE_PROBE_RECOVERY) {
1266 /* Prepare the lock prior to the registration of the netdev,
1267 * as once it's registered we might reach flows requiring it
1268 * [it's even possible to reach a flow needing it directly
1269 * from there, although it's unlikely].
1270 */
1271 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
1272 mutex_init(&edev->qede_lock);
1273
1274 rc = register_netdev(edev->ndev);
1275 if (rc) {
1276 DP_NOTICE(edev, "Cannot register net-device\n");
1277 goto err4;
1278 }
1279 }
1280
1281 edev->ops->common->set_name(cdev, edev->ndev->name);
1282
1283 /* PTP not supported on VFs */
1284 if (!is_vf)
1285 qede_ptp_enable(edev);
1286
1287 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
1288
1289#ifdef CONFIG_DCB
1290 if (!IS_VF(edev))
1291 qede_set_dcbnl_ops(edev->ndev);
1292#endif
1293
1294 edev->rx_copybreak = QEDE_RX_HDR_SIZE;
1295
1296 qede_log_probe(edev);
1297 return 0;
1298
1299err4:
1300 qede_rdma_dev_remove(edev, (mode == QEDE_PROBE_RECOVERY));
1301err3:
1302 if (mode != QEDE_PROBE_RECOVERY)
1303 free_netdev(edev->ndev);
1304 else
1305 edev->cdev = NULL;
1306err2:
1307 qed_ops->common->slowpath_stop(cdev);
1308err1:
1309 qed_ops->common->remove(cdev);
1310err0:
1311 return rc;
1312}
1313
1314static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1315{
1316 bool is_vf = false;
1317 u32 dp_module = 0;
1318 u8 dp_level = 0;
1319
1320 switch ((enum qede_pci_private)id->driver_data) {
1321 case QEDE_PRIVATE_VF:
1322 if (debug & QED_LOG_VERBOSE_MASK)
1323 dev_err(&pdev->dev, "Probing a VF\n");
1324 is_vf = true;
1325 break;
1326 default:
1327 if (debug & QED_LOG_VERBOSE_MASK)
1328 dev_err(&pdev->dev, "Probing a PF\n");
1329 }
1330
1331 qede_config_debug(debug, &dp_module, &dp_level);
1332
1333 return __qede_probe(pdev, dp_module, dp_level, is_vf,
1334 QEDE_PROBE_NORMAL);
1335}
1336
1337enum qede_remove_mode {
1338 QEDE_REMOVE_NORMAL,
1339 QEDE_REMOVE_RECOVERY,
1340};
1341
1342static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
1343{
1344 struct net_device *ndev = pci_get_drvdata(pdev);
1345 struct qede_dev *edev;
1346 struct qed_dev *cdev;
1347
1348 if (!ndev) {
1349 dev_info(&pdev->dev, "Device has already been removed\n");
1350 return;
1351 }
1352
1353 edev = netdev_priv(ndev);
1354 cdev = edev->cdev;
1355
1356 DP_INFO(edev, "Starting qede_remove\n");
1357
1358 qede_rdma_dev_remove(edev, (mode == QEDE_REMOVE_RECOVERY));
1359
1360 if (mode != QEDE_REMOVE_RECOVERY) {
1361 set_bit(QEDE_SP_DISABLE, &edev->sp_flags);
1362 unregister_netdev(ndev);
1363
1364 cancel_delayed_work_sync(&edev->sp_task);
1365
1366 edev->ops->common->set_power_state(cdev, PCI_D0);
1367
1368 pci_set_drvdata(pdev, NULL);
1369 }
1370
1371 qede_ptp_disable(edev);
1372
1373 /* Use global ops since we've freed edev */
1374 qed_ops->common->slowpath_stop(cdev);
1375 if (system_state == SYSTEM_POWER_OFF)
1376 return;
1377
1378 if (mode != QEDE_REMOVE_RECOVERY && edev->devlink) {
1379 qed_ops->common->devlink_unregister(edev->devlink);
1380 edev->devlink = NULL;
1381 }
1382 qed_ops->common->remove(cdev);
1383 edev->cdev = NULL;
1384
1385 /* Since this can happen out-of-sync with other flows,
1386 * don't release the netdevice until after slowpath stop
1387 * has been called to guarantee various other contexts
1388 * [e.g., QED register callbacks] won't break anything when
1389 * accessing the netdevice.
1390 */
1391 if (mode != QEDE_REMOVE_RECOVERY) {
1392 kfree(edev->coal_entry);
1393 free_netdev(ndev);
1394 }
1395
1396 dev_info(&pdev->dev, "Ending qede_remove successfully\n");
1397}
1398
1399static void qede_remove(struct pci_dev *pdev)
1400{
1401 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
1402}
1403
1404static void qede_shutdown(struct pci_dev *pdev)
1405{
1406 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
1407}
1408
1409/* -------------------------------------------------------------------------
1410 * START OF LOAD / UNLOAD
1411 * -------------------------------------------------------------------------
1412 */
1413
1414static int qede_set_num_queues(struct qede_dev *edev)
1415{
1416 int rc;
1417 u16 rss_num;
1418
1419 /* Setup queues according to possible resources*/
1420 if (edev->req_queues)
1421 rss_num = edev->req_queues;
1422 else
1423 rss_num = netif_get_num_default_rss_queues() *
1424 edev->dev_info.common.num_hwfns;
1425
1426 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
1427
1428 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
1429 if (rc > 0) {
1430 /* Managed to request interrupts for our queues */
1431 edev->num_queues = rc;
1432 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
1433 QEDE_QUEUE_CNT(edev), rss_num);
1434 rc = 0;
1435 }
1436
1437 edev->fp_num_tx = edev->req_num_tx;
1438 edev->fp_num_rx = edev->req_num_rx;
1439
1440 return rc;
1441}
1442
1443static void qede_free_mem_sb(struct qede_dev *edev, struct qed_sb_info *sb_info,
1444 u16 sb_id)
1445{
1446 if (sb_info->sb_virt) {
1447 edev->ops->common->sb_release(edev->cdev, sb_info, sb_id,
1448 QED_SB_TYPE_L2_QUEUE);
1449 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
1450 (void *)sb_info->sb_virt, sb_info->sb_phys);
1451 memset(sb_info, 0, sizeof(*sb_info));
1452 }
1453}
1454
1455/* This function allocates fast-path status block memory */
1456static int qede_alloc_mem_sb(struct qede_dev *edev,
1457 struct qed_sb_info *sb_info, u16 sb_id)
1458{
1459 struct status_block *sb_virt;
1460 dma_addr_t sb_phys;
1461 int rc;
1462
1463 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
1464 sizeof(*sb_virt), &sb_phys, GFP_KERNEL);
1465 if (!sb_virt) {
1466 DP_ERR(edev, "Status block allocation failed\n");
1467 return -ENOMEM;
1468 }
1469
1470 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
1471 sb_virt, sb_phys, sb_id,
1472 QED_SB_TYPE_L2_QUEUE);
1473 if (rc) {
1474 DP_ERR(edev, "Status block initialization failed\n");
1475 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
1476 sb_virt, sb_phys);
1477 return rc;
1478 }
1479
1480 return 0;
1481}
1482
1483static void qede_free_rx_buffers(struct qede_dev *edev,
1484 struct qede_rx_queue *rxq)
1485{
1486 u16 i;
1487
1488 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
1489 struct sw_rx_data *rx_buf;
1490 struct page *data;
1491
1492 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
1493 data = rx_buf->data;
1494
1495 dma_unmap_page(&edev->pdev->dev,
1496 rx_buf->mapping, PAGE_SIZE, rxq->data_direction);
1497
1498 rx_buf->data = NULL;
1499 __free_page(data);
1500 }
1501}
1502
1503static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
1504{
1505 /* Free rx buffers */
1506 qede_free_rx_buffers(edev, rxq);
1507
1508 /* Free the parallel SW ring */
1509 kfree(rxq->sw_rx_ring);
1510
1511 /* Free the real RQ ring used by FW */
1512 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
1513 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
1514}
1515
1516static void qede_set_tpa_param(struct qede_rx_queue *rxq)
1517{
1518 int i;
1519
1520 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
1521 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
1522
1523 tpa_info->state = QEDE_AGG_STATE_NONE;
1524 }
1525}
1526
1527/* This function allocates all memory needed per Rx queue */
1528static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
1529{
1530 struct qed_chain_init_params params = {
1531 .cnt_type = QED_CHAIN_CNT_TYPE_U16,
1532 .num_elems = RX_RING_SIZE,
1533 };
1534 struct qed_dev *cdev = edev->cdev;
1535 int i, rc, size;
1536
1537 rxq->num_rx_buffers = edev->q_num_rx_buffers;
1538
1539 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu;
1540
1541 rxq->rx_headroom = edev->xdp_prog ? XDP_PACKET_HEADROOM : NET_SKB_PAD;
1542 size = rxq->rx_headroom +
1543 SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
1544
1545 /* Make sure that the headroom and payload fit in a single page */
1546 if (rxq->rx_buf_size + size > PAGE_SIZE)
1547 rxq->rx_buf_size = PAGE_SIZE - size;
1548
1549 /* Segment size to split a page in multiple equal parts,
1550 * unless XDP is used in which case we'd use the entire page.
1551 */
1552 if (!edev->xdp_prog) {
1553 size = size + rxq->rx_buf_size;
1554 rxq->rx_buf_seg_size = roundup_pow_of_two(size);
1555 } else {
1556 rxq->rx_buf_seg_size = PAGE_SIZE;
1557 edev->ndev->features &= ~NETIF_F_GRO_HW;
1558 }
1559
1560 /* Allocate the parallel driver ring for Rx buffers */
1561 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
1562 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
1563 if (!rxq->sw_rx_ring) {
1564 DP_ERR(edev, "Rx buffers ring allocation failed\n");
1565 rc = -ENOMEM;
1566 goto err;
1567 }
1568
1569 /* Allocate FW Rx ring */
1570 params.mode = QED_CHAIN_MODE_NEXT_PTR;
1571 params.intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE;
1572 params.elem_size = sizeof(struct eth_rx_bd);
1573
1574 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_bd_ring, ¶ms);
1575 if (rc)
1576 goto err;
1577
1578 /* Allocate FW completion ring */
1579 params.mode = QED_CHAIN_MODE_PBL;
1580 params.intended_use = QED_CHAIN_USE_TO_CONSUME;
1581 params.elem_size = sizeof(union eth_rx_cqe);
1582
1583 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_comp_ring, ¶ms);
1584 if (rc)
1585 goto err;
1586
1587 /* Allocate buffers for the Rx ring */
1588 rxq->filled_buffers = 0;
1589 for (i = 0; i < rxq->num_rx_buffers; i++) {
1590 rc = qede_alloc_rx_buffer(rxq, false);
1591 if (rc) {
1592 DP_ERR(edev,
1593 "Rx buffers allocation failed at index %d\n", i);
1594 goto err;
1595 }
1596 }
1597
1598 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO_HW);
1599 if (!edev->gro_disable)
1600 qede_set_tpa_param(rxq);
1601err:
1602 return rc;
1603}
1604
1605static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
1606{
1607 /* Free the parallel SW ring */
1608 if (txq->is_xdp)
1609 kfree(txq->sw_tx_ring.xdp);
1610 else
1611 kfree(txq->sw_tx_ring.skbs);
1612
1613 /* Free the real RQ ring used by FW */
1614 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
1615}
1616
1617/* This function allocates all memory needed per Tx queue */
1618static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
1619{
1620 struct qed_chain_init_params params = {
1621 .mode = QED_CHAIN_MODE_PBL,
1622 .intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1623 .cnt_type = QED_CHAIN_CNT_TYPE_U16,
1624 .num_elems = edev->q_num_tx_buffers,
1625 .elem_size = sizeof(union eth_tx_bd_types),
1626 };
1627 int size, rc;
1628
1629 txq->num_tx_buffers = edev->q_num_tx_buffers;
1630
1631 /* Allocate the parallel driver ring for Tx buffers */
1632 if (txq->is_xdp) {
1633 size = sizeof(*txq->sw_tx_ring.xdp) * txq->num_tx_buffers;
1634 txq->sw_tx_ring.xdp = kzalloc(size, GFP_KERNEL);
1635 if (!txq->sw_tx_ring.xdp)
1636 goto err;
1637 } else {
1638 size = sizeof(*txq->sw_tx_ring.skbs) * txq->num_tx_buffers;
1639 txq->sw_tx_ring.skbs = kzalloc(size, GFP_KERNEL);
1640 if (!txq->sw_tx_ring.skbs)
1641 goto err;
1642 }
1643
1644 rc = edev->ops->common->chain_alloc(edev->cdev, &txq->tx_pbl, ¶ms);
1645 if (rc)
1646 goto err;
1647
1648 return 0;
1649
1650err:
1651 qede_free_mem_txq(edev, txq);
1652 return -ENOMEM;
1653}
1654
1655/* This function frees all memory of a single fp */
1656static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
1657{
1658 qede_free_mem_sb(edev, fp->sb_info, fp->id);
1659
1660 if (fp->type & QEDE_FASTPATH_RX)
1661 qede_free_mem_rxq(edev, fp->rxq);
1662
1663 if (fp->type & QEDE_FASTPATH_XDP)
1664 qede_free_mem_txq(edev, fp->xdp_tx);
1665
1666 if (fp->type & QEDE_FASTPATH_TX) {
1667 int cos;
1668
1669 for_each_cos_in_txq(edev, cos)
1670 qede_free_mem_txq(edev, &fp->txq[cos]);
1671 }
1672}
1673
1674/* This function allocates all memory needed for a single fp (i.e. an entity
1675 * which contains status block, one rx queue and/or multiple per-TC tx queues.
1676 */
1677static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
1678{
1679 int rc = 0;
1680
1681 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id);
1682 if (rc)
1683 goto out;
1684
1685 if (fp->type & QEDE_FASTPATH_RX) {
1686 rc = qede_alloc_mem_rxq(edev, fp->rxq);
1687 if (rc)
1688 goto out;
1689 }
1690
1691 if (fp->type & QEDE_FASTPATH_XDP) {
1692 rc = qede_alloc_mem_txq(edev, fp->xdp_tx);
1693 if (rc)
1694 goto out;
1695 }
1696
1697 if (fp->type & QEDE_FASTPATH_TX) {
1698 int cos;
1699
1700 for_each_cos_in_txq(edev, cos) {
1701 rc = qede_alloc_mem_txq(edev, &fp->txq[cos]);
1702 if (rc)
1703 goto out;
1704 }
1705 }
1706
1707out:
1708 return rc;
1709}
1710
1711static void qede_free_mem_load(struct qede_dev *edev)
1712{
1713 int i;
1714
1715 for_each_queue(i) {
1716 struct qede_fastpath *fp = &edev->fp_array[i];
1717
1718 qede_free_mem_fp(edev, fp);
1719 }
1720}
1721
1722/* This function allocates all qede memory at NIC load. */
1723static int qede_alloc_mem_load(struct qede_dev *edev)
1724{
1725 int rc = 0, queue_id;
1726
1727 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) {
1728 struct qede_fastpath *fp = &edev->fp_array[queue_id];
1729
1730 rc = qede_alloc_mem_fp(edev, fp);
1731 if (rc) {
1732 DP_ERR(edev,
1733 "Failed to allocate memory for fastpath - rss id = %d\n",
1734 queue_id);
1735 qede_free_mem_load(edev);
1736 return rc;
1737 }
1738 }
1739
1740 return 0;
1741}
1742
1743static void qede_empty_tx_queue(struct qede_dev *edev,
1744 struct qede_tx_queue *txq)
1745{
1746 unsigned int pkts_compl = 0, bytes_compl = 0;
1747 struct netdev_queue *netdev_txq;
1748 int rc, len = 0;
1749
1750 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id);
1751
1752 while (qed_chain_get_cons_idx(&txq->tx_pbl) !=
1753 qed_chain_get_prod_idx(&txq->tx_pbl)) {
1754 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1755 "Freeing a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n",
1756 txq->index, qed_chain_get_cons_idx(&txq->tx_pbl),
1757 qed_chain_get_prod_idx(&txq->tx_pbl));
1758
1759 rc = qede_free_tx_pkt(edev, txq, &len);
1760 if (rc) {
1761 DP_NOTICE(edev,
1762 "Failed to free a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n",
1763 txq->index,
1764 qed_chain_get_cons_idx(&txq->tx_pbl),
1765 qed_chain_get_prod_idx(&txq->tx_pbl));
1766 break;
1767 }
1768
1769 bytes_compl += len;
1770 pkts_compl++;
1771 txq->sw_tx_cons++;
1772 }
1773
1774 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
1775}
1776
1777static void qede_empty_tx_queues(struct qede_dev *edev)
1778{
1779 int i;
1780
1781 for_each_queue(i)
1782 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
1783 int cos;
1784
1785 for_each_cos_in_txq(edev, cos) {
1786 struct qede_fastpath *fp;
1787
1788 fp = &edev->fp_array[i];
1789 qede_empty_tx_queue(edev,
1790 &fp->txq[cos]);
1791 }
1792 }
1793}
1794
1795/* This function inits fp content and resets the SB, RXQ and TXQ structures */
1796static void qede_init_fp(struct qede_dev *edev)
1797{
1798 int queue_id, rxq_index = 0, txq_index = 0;
1799 struct qede_fastpath *fp;
1800 bool init_xdp = false;
1801
1802 for_each_queue(queue_id) {
1803 fp = &edev->fp_array[queue_id];
1804
1805 fp->edev = edev;
1806 fp->id = queue_id;
1807
1808 if (fp->type & QEDE_FASTPATH_XDP) {
1809 fp->xdp_tx->index = QEDE_TXQ_IDX_TO_XDP(edev,
1810 rxq_index);
1811 fp->xdp_tx->is_xdp = 1;
1812
1813 spin_lock_init(&fp->xdp_tx->xdp_tx_lock);
1814 init_xdp = true;
1815 }
1816
1817 if (fp->type & QEDE_FASTPATH_RX) {
1818 fp->rxq->rxq_id = rxq_index++;
1819
1820 /* Determine how to map buffers for this queue */
1821 if (fp->type & QEDE_FASTPATH_XDP)
1822 fp->rxq->data_direction = DMA_BIDIRECTIONAL;
1823 else
1824 fp->rxq->data_direction = DMA_FROM_DEVICE;
1825 fp->rxq->dev = &edev->pdev->dev;
1826
1827 /* Driver have no error path from here */
1828 WARN_ON(xdp_rxq_info_reg(&fp->rxq->xdp_rxq, edev->ndev,
1829 fp->rxq->rxq_id, 0) < 0);
1830
1831 if (xdp_rxq_info_reg_mem_model(&fp->rxq->xdp_rxq,
1832 MEM_TYPE_PAGE_ORDER0,
1833 NULL)) {
1834 DP_NOTICE(edev,
1835 "Failed to register XDP memory model\n");
1836 }
1837 }
1838
1839 if (fp->type & QEDE_FASTPATH_TX) {
1840 int cos;
1841
1842 for_each_cos_in_txq(edev, cos) {
1843 struct qede_tx_queue *txq = &fp->txq[cos];
1844 u16 ndev_tx_id;
1845
1846 txq->cos = cos;
1847 txq->index = txq_index;
1848 ndev_tx_id = QEDE_TXQ_TO_NDEV_TXQ_ID(edev, txq);
1849 txq->ndev_txq_id = ndev_tx_id;
1850
1851 if (edev->dev_info.is_legacy)
1852 txq->is_legacy = true;
1853 txq->dev = &edev->pdev->dev;
1854 }
1855
1856 txq_index++;
1857 }
1858
1859 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
1860 edev->ndev->name, queue_id);
1861 }
1862
1863 if (init_xdp) {
1864 edev->total_xdp_queues = QEDE_RSS_COUNT(edev);
1865 DP_INFO(edev, "Total XDP queues: %u\n", edev->total_xdp_queues);
1866 }
1867}
1868
1869static int qede_set_real_num_queues(struct qede_dev *edev)
1870{
1871 int rc = 0;
1872
1873 rc = netif_set_real_num_tx_queues(edev->ndev,
1874 QEDE_TSS_COUNT(edev) *
1875 edev->dev_info.num_tc);
1876 if (rc) {
1877 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
1878 return rc;
1879 }
1880
1881 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev));
1882 if (rc) {
1883 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
1884 return rc;
1885 }
1886
1887 return 0;
1888}
1889
1890static void qede_napi_disable_remove(struct qede_dev *edev)
1891{
1892 int i;
1893
1894 for_each_queue(i) {
1895 napi_disable(&edev->fp_array[i].napi);
1896
1897 netif_napi_del(&edev->fp_array[i].napi);
1898 }
1899}
1900
1901static void qede_napi_add_enable(struct qede_dev *edev)
1902{
1903 int i;
1904
1905 /* Add NAPI objects */
1906 for_each_queue(i) {
1907 netif_napi_add(edev->ndev, &edev->fp_array[i].napi, qede_poll);
1908 napi_enable(&edev->fp_array[i].napi);
1909 }
1910}
1911
1912static void qede_sync_free_irqs(struct qede_dev *edev)
1913{
1914 int i;
1915
1916 for (i = 0; i < edev->int_info.used_cnt; i++) {
1917 if (edev->int_info.msix_cnt) {
1918 free_irq(edev->int_info.msix[i].vector,
1919 &edev->fp_array[i]);
1920 } else {
1921 edev->ops->common->simd_handler_clean(edev->cdev, i);
1922 }
1923 }
1924
1925 edev->int_info.used_cnt = 0;
1926 edev->int_info.msix_cnt = 0;
1927}
1928
1929static int qede_req_msix_irqs(struct qede_dev *edev)
1930{
1931 int i, rc;
1932
1933 /* Sanitize number of interrupts == number of prepared RSS queues */
1934 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) {
1935 DP_ERR(edev,
1936 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
1937 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt);
1938 return -EINVAL;
1939 }
1940
1941 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
1942#ifdef CONFIG_RFS_ACCEL
1943 struct qede_fastpath *fp = &edev->fp_array[i];
1944
1945 if (edev->ndev->rx_cpu_rmap && (fp->type & QEDE_FASTPATH_RX)) {
1946 rc = irq_cpu_rmap_add(edev->ndev->rx_cpu_rmap,
1947 edev->int_info.msix[i].vector);
1948 if (rc) {
1949 DP_ERR(edev, "Failed to add CPU rmap\n");
1950 qede_free_arfs(edev);
1951 }
1952 }
1953#endif
1954 rc = request_irq(edev->int_info.msix[i].vector,
1955 qede_msix_fp_int, 0, edev->fp_array[i].name,
1956 &edev->fp_array[i]);
1957 if (rc) {
1958 DP_ERR(edev, "Request fp %d irq failed\n", i);
1959#ifdef CONFIG_RFS_ACCEL
1960 if (edev->ndev->rx_cpu_rmap)
1961 free_irq_cpu_rmap(edev->ndev->rx_cpu_rmap);
1962
1963 edev->ndev->rx_cpu_rmap = NULL;
1964#endif
1965 qede_sync_free_irqs(edev);
1966 return rc;
1967 }
1968 DP_VERBOSE(edev, NETIF_MSG_INTR,
1969 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
1970 edev->fp_array[i].name, i,
1971 &edev->fp_array[i]);
1972 edev->int_info.used_cnt++;
1973 }
1974
1975 return 0;
1976}
1977
1978static void qede_simd_fp_handler(void *cookie)
1979{
1980 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
1981
1982 napi_schedule_irqoff(&fp->napi);
1983}
1984
1985static int qede_setup_irqs(struct qede_dev *edev)
1986{
1987 int i, rc = 0;
1988
1989 /* Learn Interrupt configuration */
1990 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
1991 if (rc)
1992 return rc;
1993
1994 if (edev->int_info.msix_cnt) {
1995 rc = qede_req_msix_irqs(edev);
1996 if (rc)
1997 return rc;
1998 edev->ndev->irq = edev->int_info.msix[0].vector;
1999 } else {
2000 const struct qed_common_ops *ops;
2001
2002 /* qed should learn receive the RSS ids and callbacks */
2003 ops = edev->ops->common;
2004 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++)
2005 ops->simd_handler_config(edev->cdev,
2006 &edev->fp_array[i], i,
2007 qede_simd_fp_handler);
2008 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev);
2009 }
2010 return 0;
2011}
2012
2013static int qede_drain_txq(struct qede_dev *edev,
2014 struct qede_tx_queue *txq, bool allow_drain)
2015{
2016 int rc, cnt = 1000;
2017
2018 while (txq->sw_tx_cons != txq->sw_tx_prod) {
2019 if (!cnt) {
2020 if (allow_drain) {
2021 DP_NOTICE(edev,
2022 "Tx queue[%d] is stuck, requesting MCP to drain\n",
2023 txq->index);
2024 rc = edev->ops->common->drain(edev->cdev);
2025 if (rc)
2026 return rc;
2027 return qede_drain_txq(edev, txq, false);
2028 }
2029 DP_NOTICE(edev,
2030 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
2031 txq->index, txq->sw_tx_prod,
2032 txq->sw_tx_cons);
2033 return -ENODEV;
2034 }
2035 cnt--;
2036 usleep_range(1000, 2000);
2037 barrier();
2038 }
2039
2040 /* FW finished processing, wait for HW to transmit all tx packets */
2041 usleep_range(1000, 2000);
2042
2043 return 0;
2044}
2045
2046static int qede_stop_txq(struct qede_dev *edev,
2047 struct qede_tx_queue *txq, int rss_id)
2048{
2049 /* delete doorbell from doorbell recovery mechanism */
2050 edev->ops->common->db_recovery_del(edev->cdev, txq->doorbell_addr,
2051 &txq->tx_db);
2052
2053 return edev->ops->q_tx_stop(edev->cdev, rss_id, txq->handle);
2054}
2055
2056static int qede_stop_queues(struct qede_dev *edev)
2057{
2058 struct qed_update_vport_params *vport_update_params;
2059 struct qed_dev *cdev = edev->cdev;
2060 struct qede_fastpath *fp;
2061 int rc, i;
2062
2063 /* Disable the vport */
2064 vport_update_params = vzalloc(sizeof(*vport_update_params));
2065 if (!vport_update_params)
2066 return -ENOMEM;
2067
2068 vport_update_params->vport_id = 0;
2069 vport_update_params->update_vport_active_flg = 1;
2070 vport_update_params->vport_active_flg = 0;
2071 vport_update_params->update_rss_flg = 0;
2072
2073 rc = edev->ops->vport_update(cdev, vport_update_params);
2074 vfree(vport_update_params);
2075
2076 if (rc) {
2077 DP_ERR(edev, "Failed to update vport\n");
2078 return rc;
2079 }
2080
2081 /* Flush Tx queues. If needed, request drain from MCP */
2082 for_each_queue(i) {
2083 fp = &edev->fp_array[i];
2084
2085 if (fp->type & QEDE_FASTPATH_TX) {
2086 int cos;
2087
2088 for_each_cos_in_txq(edev, cos) {
2089 rc = qede_drain_txq(edev, &fp->txq[cos], true);
2090 if (rc)
2091 return rc;
2092 }
2093 }
2094
2095 if (fp->type & QEDE_FASTPATH_XDP) {
2096 rc = qede_drain_txq(edev, fp->xdp_tx, true);
2097 if (rc)
2098 return rc;
2099 }
2100 }
2101
2102 /* Stop all Queues in reverse order */
2103 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) {
2104 fp = &edev->fp_array[i];
2105
2106 /* Stop the Tx Queue(s) */
2107 if (fp->type & QEDE_FASTPATH_TX) {
2108 int cos;
2109
2110 for_each_cos_in_txq(edev, cos) {
2111 rc = qede_stop_txq(edev, &fp->txq[cos], i);
2112 if (rc)
2113 return rc;
2114 }
2115 }
2116
2117 /* Stop the Rx Queue */
2118 if (fp->type & QEDE_FASTPATH_RX) {
2119 rc = edev->ops->q_rx_stop(cdev, i, fp->rxq->handle);
2120 if (rc) {
2121 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
2122 return rc;
2123 }
2124 }
2125
2126 /* Stop the XDP forwarding queue */
2127 if (fp->type & QEDE_FASTPATH_XDP) {
2128 rc = qede_stop_txq(edev, fp->xdp_tx, i);
2129 if (rc)
2130 return rc;
2131
2132 bpf_prog_put(fp->rxq->xdp_prog);
2133 }
2134 }
2135
2136 /* Stop the vport */
2137 rc = edev->ops->vport_stop(cdev, 0);
2138 if (rc)
2139 DP_ERR(edev, "Failed to stop VPORT\n");
2140
2141 return rc;
2142}
2143
2144static int qede_start_txq(struct qede_dev *edev,
2145 struct qede_fastpath *fp,
2146 struct qede_tx_queue *txq, u8 rss_id, u16 sb_idx)
2147{
2148 dma_addr_t phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl);
2149 u32 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl);
2150 struct qed_queue_start_common_params params;
2151 struct qed_txq_start_ret_params ret_params;
2152 int rc;
2153
2154 memset(¶ms, 0, sizeof(params));
2155 memset(&ret_params, 0, sizeof(ret_params));
2156
2157 /* Let the XDP queue share the queue-zone with one of the regular txq.
2158 * We don't really care about its coalescing.
2159 */
2160 if (txq->is_xdp)
2161 params.queue_id = QEDE_TXQ_XDP_TO_IDX(edev, txq);
2162 else
2163 params.queue_id = txq->index;
2164
2165 params.p_sb = fp->sb_info;
2166 params.sb_idx = sb_idx;
2167 params.tc = txq->cos;
2168
2169 rc = edev->ops->q_tx_start(edev->cdev, rss_id, ¶ms, phys_table,
2170 page_cnt, &ret_params);
2171 if (rc) {
2172 DP_ERR(edev, "Start TXQ #%d failed %d\n", txq->index, rc);
2173 return rc;
2174 }
2175
2176 txq->doorbell_addr = ret_params.p_doorbell;
2177 txq->handle = ret_params.p_handle;
2178
2179 /* Determine the FW consumer address associated */
2180 txq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[sb_idx];
2181
2182 /* Prepare the doorbell parameters */
2183 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_DEST, DB_DEST_XCM);
2184 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
2185 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_VAL_SEL,
2186 DQ_XCM_ETH_TX_BD_PROD_CMD);
2187 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
2188
2189 /* register doorbell with doorbell recovery mechanism */
2190 rc = edev->ops->common->db_recovery_add(edev->cdev, txq->doorbell_addr,
2191 &txq->tx_db, DB_REC_WIDTH_32B,
2192 DB_REC_KERNEL);
2193
2194 return rc;
2195}
2196
2197static int qede_start_queues(struct qede_dev *edev, bool clear_stats)
2198{
2199 int vlan_removal_en = 1;
2200 struct qed_dev *cdev = edev->cdev;
2201 struct qed_dev_info *qed_info = &edev->dev_info.common;
2202 struct qed_update_vport_params *vport_update_params;
2203 struct qed_queue_start_common_params q_params;
2204 struct qed_start_vport_params start = {0};
2205 int rc, i;
2206
2207 if (!edev->num_queues) {
2208 DP_ERR(edev,
2209 "Cannot update V-VPORT as active as there are no Rx queues\n");
2210 return -EINVAL;
2211 }
2212
2213 vport_update_params = vzalloc(sizeof(*vport_update_params));
2214 if (!vport_update_params)
2215 return -ENOMEM;
2216
2217 start.handle_ptp_pkts = !!(edev->ptp);
2218 start.gro_enable = !edev->gro_disable;
2219 start.mtu = edev->ndev->mtu;
2220 start.vport_id = 0;
2221 start.drop_ttl0 = true;
2222 start.remove_inner_vlan = vlan_removal_en;
2223 start.clear_stats = clear_stats;
2224
2225 rc = edev->ops->vport_start(cdev, &start);
2226
2227 if (rc) {
2228 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
2229 goto out;
2230 }
2231
2232 DP_VERBOSE(edev, NETIF_MSG_IFUP,
2233 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
2234 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
2235
2236 for_each_queue(i) {
2237 struct qede_fastpath *fp = &edev->fp_array[i];
2238 dma_addr_t p_phys_table;
2239 u32 page_cnt;
2240
2241 if (fp->type & QEDE_FASTPATH_RX) {
2242 struct qed_rxq_start_ret_params ret_params;
2243 struct qede_rx_queue *rxq = fp->rxq;
2244 __le16 *val;
2245
2246 memset(&ret_params, 0, sizeof(ret_params));
2247 memset(&q_params, 0, sizeof(q_params));
2248 q_params.queue_id = rxq->rxq_id;
2249 q_params.vport_id = 0;
2250 q_params.p_sb = fp->sb_info;
2251 q_params.sb_idx = RX_PI;
2252
2253 p_phys_table =
2254 qed_chain_get_pbl_phys(&rxq->rx_comp_ring);
2255 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring);
2256
2257 rc = edev->ops->q_rx_start(cdev, i, &q_params,
2258 rxq->rx_buf_size,
2259 rxq->rx_bd_ring.p_phys_addr,
2260 p_phys_table,
2261 page_cnt, &ret_params);
2262 if (rc) {
2263 DP_ERR(edev, "Start RXQ #%d failed %d\n", i,
2264 rc);
2265 goto out;
2266 }
2267
2268 /* Use the return parameters */
2269 rxq->hw_rxq_prod_addr = ret_params.p_prod;
2270 rxq->handle = ret_params.p_handle;
2271
2272 val = &fp->sb_info->sb_virt->pi_array[RX_PI];
2273 rxq->hw_cons_ptr = val;
2274
2275 qede_update_rx_prod(edev, rxq);
2276 }
2277
2278 if (fp->type & QEDE_FASTPATH_XDP) {
2279 rc = qede_start_txq(edev, fp, fp->xdp_tx, i, XDP_PI);
2280 if (rc)
2281 goto out;
2282
2283 bpf_prog_add(edev->xdp_prog, 1);
2284 fp->rxq->xdp_prog = edev->xdp_prog;
2285 }
2286
2287 if (fp->type & QEDE_FASTPATH_TX) {
2288 int cos;
2289
2290 for_each_cos_in_txq(edev, cos) {
2291 rc = qede_start_txq(edev, fp, &fp->txq[cos], i,
2292 TX_PI(cos));
2293 if (rc)
2294 goto out;
2295 }
2296 }
2297 }
2298
2299 /* Prepare and send the vport enable */
2300 vport_update_params->vport_id = start.vport_id;
2301 vport_update_params->update_vport_active_flg = 1;
2302 vport_update_params->vport_active_flg = 1;
2303
2304 if ((qed_info->b_inter_pf_switch || pci_num_vf(edev->pdev)) &&
2305 qed_info->tx_switching) {
2306 vport_update_params->update_tx_switching_flg = 1;
2307 vport_update_params->tx_switching_flg = 1;
2308 }
2309
2310 qede_fill_rss_params(edev, &vport_update_params->rss_params,
2311 &vport_update_params->update_rss_flg);
2312
2313 rc = edev->ops->vport_update(cdev, vport_update_params);
2314 if (rc)
2315 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
2316
2317out:
2318 vfree(vport_update_params);
2319 return rc;
2320}
2321
2322enum qede_unload_mode {
2323 QEDE_UNLOAD_NORMAL,
2324 QEDE_UNLOAD_RECOVERY,
2325};
2326
2327static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode,
2328 bool is_locked)
2329{
2330 struct qed_link_params link_params;
2331 int rc;
2332
2333 DP_INFO(edev, "Starting qede unload\n");
2334
2335 if (!is_locked)
2336 __qede_lock(edev);
2337
2338 clear_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags);
2339
2340 if (mode != QEDE_UNLOAD_RECOVERY)
2341 edev->state = QEDE_STATE_CLOSED;
2342
2343 qede_rdma_dev_event_close(edev);
2344
2345 /* Close OS Tx */
2346 netif_tx_disable(edev->ndev);
2347 netif_carrier_off(edev->ndev);
2348
2349 if (mode != QEDE_UNLOAD_RECOVERY) {
2350 /* Reset the link */
2351 memset(&link_params, 0, sizeof(link_params));
2352 link_params.link_up = false;
2353 edev->ops->common->set_link(edev->cdev, &link_params);
2354
2355 rc = qede_stop_queues(edev);
2356 if (rc) {
2357#ifdef CONFIG_RFS_ACCEL
2358 if (edev->dev_info.common.b_arfs_capable) {
2359 qede_poll_for_freeing_arfs_filters(edev);
2360 if (edev->ndev->rx_cpu_rmap)
2361 free_irq_cpu_rmap(edev->ndev->rx_cpu_rmap);
2362
2363 edev->ndev->rx_cpu_rmap = NULL;
2364 }
2365#endif
2366 qede_sync_free_irqs(edev);
2367 goto out;
2368 }
2369
2370 DP_INFO(edev, "Stopped Queues\n");
2371 }
2372
2373 qede_vlan_mark_nonconfigured(edev);
2374 edev->ops->fastpath_stop(edev->cdev);
2375
2376 if (edev->dev_info.common.b_arfs_capable) {
2377 qede_poll_for_freeing_arfs_filters(edev);
2378 qede_free_arfs(edev);
2379 }
2380
2381 /* Release the interrupts */
2382 qede_sync_free_irqs(edev);
2383 edev->ops->common->set_fp_int(edev->cdev, 0);
2384
2385 qede_napi_disable_remove(edev);
2386
2387 if (mode == QEDE_UNLOAD_RECOVERY)
2388 qede_empty_tx_queues(edev);
2389
2390 qede_free_mem_load(edev);
2391 qede_free_fp_array(edev);
2392
2393out:
2394 if (!is_locked)
2395 __qede_unlock(edev);
2396
2397 if (mode != QEDE_UNLOAD_RECOVERY)
2398 DP_NOTICE(edev, "Link is down\n");
2399
2400 edev->ptp_skip_txts = 0;
2401
2402 DP_INFO(edev, "Ending qede unload\n");
2403}
2404
2405enum qede_load_mode {
2406 QEDE_LOAD_NORMAL,
2407 QEDE_LOAD_RELOAD,
2408 QEDE_LOAD_RECOVERY,
2409};
2410
2411static int qede_load(struct qede_dev *edev, enum qede_load_mode mode,
2412 bool is_locked)
2413{
2414 struct qed_link_params link_params;
2415 struct ethtool_coalesce coal = {};
2416 u8 num_tc;
2417 int rc, i;
2418
2419 DP_INFO(edev, "Starting qede load\n");
2420
2421 if (!is_locked)
2422 __qede_lock(edev);
2423
2424 rc = qede_set_num_queues(edev);
2425 if (rc)
2426 goto out;
2427
2428 rc = qede_alloc_fp_array(edev);
2429 if (rc)
2430 goto out;
2431
2432 qede_init_fp(edev);
2433
2434 rc = qede_alloc_mem_load(edev);
2435 if (rc)
2436 goto err1;
2437 DP_INFO(edev, "Allocated %d Rx, %d Tx queues\n",
2438 QEDE_RSS_COUNT(edev), QEDE_TSS_COUNT(edev));
2439
2440 rc = qede_set_real_num_queues(edev);
2441 if (rc)
2442 goto err2;
2443
2444 if (qede_alloc_arfs(edev)) {
2445 edev->ndev->features &= ~NETIF_F_NTUPLE;
2446 edev->dev_info.common.b_arfs_capable = false;
2447 }
2448
2449 qede_napi_add_enable(edev);
2450 DP_INFO(edev, "Napi added and enabled\n");
2451
2452 rc = qede_setup_irqs(edev);
2453 if (rc)
2454 goto err3;
2455 DP_INFO(edev, "Setup IRQs succeeded\n");
2456
2457 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD);
2458 if (rc)
2459 goto err4;
2460 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
2461
2462 num_tc = netdev_get_num_tc(edev->ndev);
2463 num_tc = num_tc ? num_tc : edev->dev_info.num_tc;
2464 qede_setup_tc(edev->ndev, num_tc);
2465
2466 /* Program un-configured VLANs */
2467 qede_configure_vlan_filters(edev);
2468
2469 set_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags);
2470
2471 /* Ask for link-up using current configuration */
2472 memset(&link_params, 0, sizeof(link_params));
2473 link_params.link_up = true;
2474 edev->ops->common->set_link(edev->cdev, &link_params);
2475
2476 edev->state = QEDE_STATE_OPEN;
2477
2478 coal.rx_coalesce_usecs = QED_DEFAULT_RX_USECS;
2479 coal.tx_coalesce_usecs = QED_DEFAULT_TX_USECS;
2480
2481 for_each_queue(i) {
2482 if (edev->coal_entry[i].isvalid) {
2483 coal.rx_coalesce_usecs = edev->coal_entry[i].rxc;
2484 coal.tx_coalesce_usecs = edev->coal_entry[i].txc;
2485 }
2486 __qede_unlock(edev);
2487 qede_set_per_coalesce(edev->ndev, i, &coal);
2488 __qede_lock(edev);
2489 }
2490 DP_INFO(edev, "Ending successfully qede load\n");
2491
2492 goto out;
2493err4:
2494 qede_sync_free_irqs(edev);
2495err3:
2496 qede_napi_disable_remove(edev);
2497err2:
2498 qede_free_mem_load(edev);
2499err1:
2500 edev->ops->common->set_fp_int(edev->cdev, 0);
2501 qede_free_fp_array(edev);
2502 edev->num_queues = 0;
2503 edev->fp_num_tx = 0;
2504 edev->fp_num_rx = 0;
2505out:
2506 if (!is_locked)
2507 __qede_unlock(edev);
2508
2509 return rc;
2510}
2511
2512/* 'func' should be able to run between unload and reload assuming interface
2513 * is actually running, or afterwards in case it's currently DOWN.
2514 */
2515void qede_reload(struct qede_dev *edev,
2516 struct qede_reload_args *args, bool is_locked)
2517{
2518 if (!is_locked)
2519 __qede_lock(edev);
2520
2521 /* Since qede_lock is held, internal state wouldn't change even
2522 * if netdev state would start transitioning. Check whether current
2523 * internal configuration indicates device is up, then reload.
2524 */
2525 if (edev->state == QEDE_STATE_OPEN) {
2526 qede_unload(edev, QEDE_UNLOAD_NORMAL, true);
2527 if (args)
2528 args->func(edev, args);
2529 qede_load(edev, QEDE_LOAD_RELOAD, true);
2530
2531 /* Since no one is going to do it for us, re-configure */
2532 qede_config_rx_mode(edev->ndev);
2533 } else if (args) {
2534 args->func(edev, args);
2535 }
2536
2537 if (!is_locked)
2538 __qede_unlock(edev);
2539}
2540
2541/* called with rtnl_lock */
2542static int qede_open(struct net_device *ndev)
2543{
2544 struct qede_dev *edev = netdev_priv(ndev);
2545 int rc;
2546
2547 netif_carrier_off(ndev);
2548
2549 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
2550
2551 rc = qede_load(edev, QEDE_LOAD_NORMAL, false);
2552 if (rc)
2553 return rc;
2554
2555 udp_tunnel_nic_reset_ntf(ndev);
2556
2557 edev->ops->common->update_drv_state(edev->cdev, true);
2558
2559 return 0;
2560}
2561
2562static int qede_close(struct net_device *ndev)
2563{
2564 struct qede_dev *edev = netdev_priv(ndev);
2565
2566 qede_unload(edev, QEDE_UNLOAD_NORMAL, false);
2567
2568 if (edev->cdev)
2569 edev->ops->common->update_drv_state(edev->cdev, false);
2570
2571 return 0;
2572}
2573
2574static void qede_link_update(void *dev, struct qed_link_output *link)
2575{
2576 struct qede_dev *edev = dev;
2577
2578 if (!test_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags)) {
2579 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not ready\n");
2580 return;
2581 }
2582
2583 if (link->link_up) {
2584 if (!netif_carrier_ok(edev->ndev)) {
2585 DP_NOTICE(edev, "Link is up\n");
2586 netif_tx_start_all_queues(edev->ndev);
2587 netif_carrier_on(edev->ndev);
2588 qede_rdma_dev_event_open(edev);
2589 }
2590 } else {
2591 if (netif_carrier_ok(edev->ndev)) {
2592 DP_NOTICE(edev, "Link is down\n");
2593 netif_tx_disable(edev->ndev);
2594 netif_carrier_off(edev->ndev);
2595 qede_rdma_dev_event_close(edev);
2596 }
2597 }
2598}
2599
2600static void qede_schedule_recovery_handler(void *dev)
2601{
2602 struct qede_dev *edev = dev;
2603
2604 if (edev->state == QEDE_STATE_RECOVERY) {
2605 DP_NOTICE(edev,
2606 "Avoid scheduling a recovery handling since already in recovery state\n");
2607 return;
2608 }
2609
2610 set_bit(QEDE_SP_RECOVERY, &edev->sp_flags);
2611 schedule_delayed_work(&edev->sp_task, 0);
2612
2613 DP_INFO(edev, "Scheduled a recovery handler\n");
2614}
2615
2616static void qede_recovery_failed(struct qede_dev *edev)
2617{
2618 netdev_err(edev->ndev, "Recovery handling has failed. Power cycle is needed.\n");
2619
2620 netif_device_detach(edev->ndev);
2621
2622 if (edev->cdev)
2623 edev->ops->common->set_power_state(edev->cdev, PCI_D3hot);
2624}
2625
2626static void qede_recovery_handler(struct qede_dev *edev)
2627{
2628 u32 curr_state = edev->state;
2629 int rc;
2630
2631 DP_NOTICE(edev, "Starting a recovery process\n");
2632
2633 /* No need to acquire first the qede_lock since is done by qede_sp_task
2634 * before calling this function.
2635 */
2636 edev->state = QEDE_STATE_RECOVERY;
2637
2638 edev->ops->common->recovery_prolog(edev->cdev);
2639
2640 if (curr_state == QEDE_STATE_OPEN)
2641 qede_unload(edev, QEDE_UNLOAD_RECOVERY, true);
2642
2643 __qede_remove(edev->pdev, QEDE_REMOVE_RECOVERY);
2644
2645 rc = __qede_probe(edev->pdev, edev->dp_module, edev->dp_level,
2646 IS_VF(edev), QEDE_PROBE_RECOVERY);
2647 if (rc) {
2648 edev->cdev = NULL;
2649 goto err;
2650 }
2651
2652 if (curr_state == QEDE_STATE_OPEN) {
2653 rc = qede_load(edev, QEDE_LOAD_RECOVERY, true);
2654 if (rc)
2655 goto err;
2656
2657 qede_config_rx_mode(edev->ndev);
2658 udp_tunnel_nic_reset_ntf(edev->ndev);
2659 }
2660
2661 edev->state = curr_state;
2662
2663 DP_NOTICE(edev, "Recovery handling is done\n");
2664
2665 return;
2666
2667err:
2668 qede_recovery_failed(edev);
2669}
2670
2671static void qede_atomic_hw_err_handler(struct qede_dev *edev)
2672{
2673 struct qed_dev *cdev = edev->cdev;
2674
2675 DP_NOTICE(edev,
2676 "Generic non-sleepable HW error handling started - err_flags 0x%lx\n",
2677 edev->err_flags);
2678
2679 /* Get a call trace of the flow that led to the error */
2680 WARN_ON(test_bit(QEDE_ERR_WARN, &edev->err_flags));
2681
2682 /* Prevent HW attentions from being reasserted */
2683 if (test_bit(QEDE_ERR_ATTN_CLR_EN, &edev->err_flags))
2684 edev->ops->common->attn_clr_enable(cdev, true);
2685
2686 DP_NOTICE(edev, "Generic non-sleepable HW error handling is done\n");
2687}
2688
2689static void qede_generic_hw_err_handler(struct qede_dev *edev)
2690{
2691 DP_NOTICE(edev,
2692 "Generic sleepable HW error handling started - err_flags 0x%lx\n",
2693 edev->err_flags);
2694
2695 if (edev->devlink) {
2696 DP_NOTICE(edev, "Reporting fatal error to devlink\n");
2697 edev->ops->common->report_fatal_error(edev->devlink, edev->last_err_type);
2698 }
2699
2700 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags);
2701
2702 DP_NOTICE(edev, "Generic sleepable HW error handling is done\n");
2703}
2704
2705static void qede_set_hw_err_flags(struct qede_dev *edev,
2706 enum qed_hw_err_type err_type)
2707{
2708 unsigned long err_flags = 0;
2709
2710 switch (err_type) {
2711 case QED_HW_ERR_DMAE_FAIL:
2712 set_bit(QEDE_ERR_WARN, &err_flags);
2713 fallthrough;
2714 case QED_HW_ERR_MFW_RESP_FAIL:
2715 case QED_HW_ERR_HW_ATTN:
2716 case QED_HW_ERR_RAMROD_FAIL:
2717 case QED_HW_ERR_FW_ASSERT:
2718 set_bit(QEDE_ERR_ATTN_CLR_EN, &err_flags);
2719 set_bit(QEDE_ERR_GET_DBG_INFO, &err_flags);
2720 /* make this error as recoverable and start recovery*/
2721 set_bit(QEDE_ERR_IS_RECOVERABLE, &err_flags);
2722 break;
2723
2724 default:
2725 DP_NOTICE(edev, "Unexpected HW error [%d]\n", err_type);
2726 break;
2727 }
2728
2729 edev->err_flags |= err_flags;
2730}
2731
2732static void qede_schedule_hw_err_handler(void *dev,
2733 enum qed_hw_err_type err_type)
2734{
2735 struct qede_dev *edev = dev;
2736
2737 /* Fan failure cannot be masked by handling of another HW error or by a
2738 * concurrent recovery process.
2739 */
2740 if ((test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) ||
2741 edev->state == QEDE_STATE_RECOVERY) &&
2742 err_type != QED_HW_ERR_FAN_FAIL) {
2743 DP_INFO(edev,
2744 "Avoid scheduling an error handling while another HW error is being handled\n");
2745 return;
2746 }
2747
2748 if (err_type >= QED_HW_ERR_LAST) {
2749 DP_NOTICE(edev, "Unknown HW error [%d]\n", err_type);
2750 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags);
2751 return;
2752 }
2753
2754 edev->last_err_type = err_type;
2755 qede_set_hw_err_flags(edev, err_type);
2756 qede_atomic_hw_err_handler(edev);
2757 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags);
2758 schedule_delayed_work(&edev->sp_task, 0);
2759
2760 DP_INFO(edev, "Scheduled a error handler [err_type %d]\n", err_type);
2761}
2762
2763static bool qede_is_txq_full(struct qede_dev *edev, struct qede_tx_queue *txq)
2764{
2765 struct netdev_queue *netdev_txq;
2766
2767 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id);
2768 if (netif_xmit_stopped(netdev_txq))
2769 return true;
2770
2771 return false;
2772}
2773
2774static void qede_get_generic_tlv_data(void *dev, struct qed_generic_tlvs *data)
2775{
2776 struct qede_dev *edev = dev;
2777 struct netdev_hw_addr *ha;
2778 int i;
2779
2780 if (edev->ndev->features & NETIF_F_IP_CSUM)
2781 data->feat_flags |= QED_TLV_IP_CSUM;
2782 if (edev->ndev->features & NETIF_F_TSO)
2783 data->feat_flags |= QED_TLV_LSO;
2784
2785 ether_addr_copy(data->mac[0], edev->ndev->dev_addr);
2786 eth_zero_addr(data->mac[1]);
2787 eth_zero_addr(data->mac[2]);
2788 /* Copy the first two UC macs */
2789 netif_addr_lock_bh(edev->ndev);
2790 i = 1;
2791 netdev_for_each_uc_addr(ha, edev->ndev) {
2792 ether_addr_copy(data->mac[i++], ha->addr);
2793 if (i == QED_TLV_MAC_COUNT)
2794 break;
2795 }
2796
2797 netif_addr_unlock_bh(edev->ndev);
2798}
2799
2800static void qede_get_eth_tlv_data(void *dev, void *data)
2801{
2802 struct qed_mfw_tlv_eth *etlv = data;
2803 struct qede_dev *edev = dev;
2804 struct qede_fastpath *fp;
2805 int i;
2806
2807 etlv->lso_maxoff_size = 0XFFFF;
2808 etlv->lso_maxoff_size_set = true;
2809 etlv->lso_minseg_size = (u16)ETH_TX_LSO_WINDOW_MIN_LEN;
2810 etlv->lso_minseg_size_set = true;
2811 etlv->prom_mode = !!(edev->ndev->flags & IFF_PROMISC);
2812 etlv->prom_mode_set = true;
2813 etlv->tx_descr_size = QEDE_TSS_COUNT(edev);
2814 etlv->tx_descr_size_set = true;
2815 etlv->rx_descr_size = QEDE_RSS_COUNT(edev);
2816 etlv->rx_descr_size_set = true;
2817 etlv->iov_offload = QED_MFW_TLV_IOV_OFFLOAD_VEB;
2818 etlv->iov_offload_set = true;
2819
2820 /* Fill information regarding queues; Should be done under the qede
2821 * lock to guarantee those don't change beneath our feet.
2822 */
2823 etlv->txqs_empty = true;
2824 etlv->rxqs_empty = true;
2825 etlv->num_txqs_full = 0;
2826 etlv->num_rxqs_full = 0;
2827
2828 __qede_lock(edev);
2829 for_each_queue(i) {
2830 fp = &edev->fp_array[i];
2831 if (fp->type & QEDE_FASTPATH_TX) {
2832 struct qede_tx_queue *txq = QEDE_FP_TC0_TXQ(fp);
2833
2834 if (txq->sw_tx_cons != txq->sw_tx_prod)
2835 etlv->txqs_empty = false;
2836 if (qede_is_txq_full(edev, txq))
2837 etlv->num_txqs_full++;
2838 }
2839 if (fp->type & QEDE_FASTPATH_RX) {
2840 if (qede_has_rx_work(fp->rxq))
2841 etlv->rxqs_empty = false;
2842
2843 /* This one is a bit tricky; Firmware might stop
2844 * placing packets if ring is not yet full.
2845 * Give an approximation.
2846 */
2847 if (le16_to_cpu(*fp->rxq->hw_cons_ptr) -
2848 qed_chain_get_cons_idx(&fp->rxq->rx_comp_ring) >
2849 RX_RING_SIZE - 100)
2850 etlv->num_rxqs_full++;
2851 }
2852 }
2853 __qede_unlock(edev);
2854
2855 etlv->txqs_empty_set = true;
2856 etlv->rxqs_empty_set = true;
2857 etlv->num_txqs_full_set = true;
2858 etlv->num_rxqs_full_set = true;
2859}
2860
2861/**
2862 * qede_io_error_detected(): Called when PCI error is detected
2863 *
2864 * @pdev: Pointer to PCI device
2865 * @state: The current pci connection state
2866 *
2867 *Return: pci_ers_result_t.
2868 *
2869 * This function is called after a PCI bus error affecting
2870 * this device has been detected.
2871 */
2872static pci_ers_result_t
2873qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
2874{
2875 struct net_device *dev = pci_get_drvdata(pdev);
2876 struct qede_dev *edev = netdev_priv(dev);
2877
2878 if (!edev)
2879 return PCI_ERS_RESULT_NONE;
2880
2881 DP_NOTICE(edev, "IO error detected [%d]\n", state);
2882
2883 __qede_lock(edev);
2884 if (edev->state == QEDE_STATE_RECOVERY) {
2885 DP_NOTICE(edev, "Device already in the recovery state\n");
2886 __qede_unlock(edev);
2887 return PCI_ERS_RESULT_NONE;
2888 }
2889
2890 /* PF handles the recovery of its VFs */
2891 if (IS_VF(edev)) {
2892 DP_VERBOSE(edev, QED_MSG_IOV,
2893 "VF recovery is handled by its PF\n");
2894 __qede_unlock(edev);
2895 return PCI_ERS_RESULT_RECOVERED;
2896 }
2897
2898 /* Close OS Tx */
2899 netif_tx_disable(edev->ndev);
2900 netif_carrier_off(edev->ndev);
2901
2902 set_bit(QEDE_SP_AER, &edev->sp_flags);
2903 schedule_delayed_work(&edev->sp_task, 0);
2904
2905 __qede_unlock(edev);
2906
2907 return PCI_ERS_RESULT_CAN_RECOVER;
2908}