1/* SPDX-License-Identifier: GPL-2.0 */
 2/* Copyright(c) 2013 - 2018 Intel Corporation. */
 3
 4#ifndef _I40E_DIAG_H_
 5#define _I40E_DIAG_H_
 6
 7#include "i40e_type.h"
 8
 9enum i40e_lb_mode {
10	I40E_LB_MODE_NONE       = 0x0,
11	I40E_LB_MODE_PHY_LOCAL  = I40E_AQ_LB_PHY_LOCAL,
12	I40E_LB_MODE_PHY_REMOTE = I40E_AQ_LB_PHY_REMOTE,
13	I40E_LB_MODE_MAC_LOCAL  = I40E_AQ_LB_MAC_LOCAL,
14};
15
16struct i40e_diag_reg_test_info {
17	u32 offset;	/* the base register */
18	u32 mask;	/* bits that can be tested */
19	u32 elements;	/* number of elements if array */
20	u32 stride;	/* bytes between each element */
21};
22
23extern struct i40e_diag_reg_test_info i40e_reg_list[];
24
25i40e_status i40e_diag_reg_test(struct i40e_hw *hw);
26i40e_status i40e_diag_eeprom_test(struct i40e_hw *hw);
27
28#endif /* _I40E_DIAG_H_ */

 1/* SPDX-License-Identifier: GPL-2.0 */
 2/* Copyright(c) 2013 - 2018 Intel Corporation. */
 3
 4#ifndef _I40E_DIAG_H_
 5#define _I40E_DIAG_H_
 6
 7#include "i40e_type.h"
 8
 9enum i40e_lb_mode {
10	I40E_LB_MODE_NONE       = 0x0,
11	I40E_LB_MODE_PHY_LOCAL  = I40E_AQ_LB_PHY_LOCAL,
12	I40E_LB_MODE_PHY_REMOTE = I40E_AQ_LB_PHY_REMOTE,
13	I40E_LB_MODE_MAC_LOCAL  = I40E_AQ_LB_MAC_LOCAL,
14};
15
16struct i40e_diag_reg_test_info {
17	u32 offset;	/* the base register */
18	u32 mask;	/* bits that can be tested */
19	u32 elements;	/* number of elements if array */
20	u32 stride;	/* bytes between each element */
21};
22
23extern struct i40e_diag_reg_test_info i40e_reg_list[];
24
25i40e_status i40e_diag_reg_test(struct i40e_hw *hw);
26i40e_status i40e_diag_eeprom_test(struct i40e_hw *hw);
27
28#endif /* _I40E_DIAG_H_ */