1/* SPDX-License-Identifier: GPL-2.0-or-later */
 2/*
 3 *	include/asm-mips/dec/kn230.h
 4 *
 5 *	DECsystem 5100 (MIPSmate or KN230) definitions.
 6 *
 7 *	Copyright (C) 2002, 2003  Maciej W. Rozycki
 8 */
 9#ifndef __ASM_MIPS_DEC_KN230_H
10#define __ASM_MIPS_DEC_KN230_H
11
12/*
13 * CPU interrupt bits.
14 */
15#define KN230_CPU_INR_HALT	6	/* HALT button */
16#define KN230_CPU_INR_BUS	5	/* memory, I/O bus read/write errors */
17#define KN230_CPU_INR_RTC	4	/* DS1287 RTC */
18#define KN230_CPU_INR_SII	3	/* SII (DC7061) SCSI */
19#define KN230_CPU_INR_LANCE	3	/* LANCE (Am7990) Ethernet */
20#define KN230_CPU_INR_DZ11	2	/* DZ11 (DC7085) serial */
21
22#endif /* __ASM_MIPS_DEC_KN230_H */

 1/* SPDX-License-Identifier: GPL-2.0-or-later */
 2/*
 3 *	include/asm-mips/dec/kn230.h
 4 *
 5 *	DECsystem 5100 (MIPSmate or KN230) definitions.
 6 *
 7 *	Copyright (C) 2002, 2003  Maciej W. Rozycki
 8 */
 9#ifndef __ASM_MIPS_DEC_KN230_H
10#define __ASM_MIPS_DEC_KN230_H
11
12/*
13 * CPU interrupt bits.
14 */
15#define KN230_CPU_INR_HALT	6	/* HALT button */
16#define KN230_CPU_INR_BUS	5	/* memory, I/O bus read/write errors */
17#define KN230_CPU_INR_RTC	4	/* DS1287 RTC */
18#define KN230_CPU_INR_SII	3	/* SII (DC7061) SCSI */
19#define KN230_CPU_INR_LANCE	3	/* LANCE (Am7990) Ethernet */
20#define KN230_CPU_INR_DZ11	2	/* DZ11 (DC7085) serial */
21
22#endif /* __ASM_MIPS_DEC_KN230_H */