1/* SPDX-License-Identifier: GPL-2.0-or-later */
 2/*
 3 *	include/asm-mips/dec/ioasic.h
 4 *
 5 *	DEC I/O ASIC access operations.
 6 *
 7 *	Copyright (C) 2000, 2002, 2003  Maciej W. Rozycki
 8 */
 9
10#ifndef __ASM_DEC_IOASIC_H
11#define __ASM_DEC_IOASIC_H
12
13#include <linux/spinlock.h>
14#include <linux/types.h>
15
16extern spinlock_t ioasic_ssr_lock;
17
18extern volatile u32 *ioasic_base;
19
20static inline void ioasic_write(unsigned int reg, u32 v)
21{
22	ioasic_base[reg / 4] = v;
23}
24
25static inline u32 ioasic_read(unsigned int reg)
26{
27	return ioasic_base[reg / 4];
28}
29
30extern void init_ioasic_irqs(int base);
31
32extern int dec_ioasic_clocksource_init(void);
33
34#endif /* __ASM_DEC_IOASIC_H */

 1/* SPDX-License-Identifier: GPL-2.0-or-later */
 2/*
 3 *	include/asm-mips/dec/ioasic.h
 4 *
 5 *	DEC I/O ASIC access operations.
 6 *
 7 *	Copyright (C) 2000, 2002, 2003  Maciej W. Rozycki
 8 */
 9
10#ifndef __ASM_DEC_IOASIC_H
11#define __ASM_DEC_IOASIC_H
12
13#include <linux/spinlock.h>
14#include <linux/types.h>
15
16extern spinlock_t ioasic_ssr_lock;
17
18extern volatile u32 *ioasic_base;
19
20static inline void ioasic_write(unsigned int reg, u32 v)
21{
22	ioasic_base[reg / 4] = v;
23}
24
25static inline u32 ioasic_read(unsigned int reg)
26{
27	return ioasic_base[reg / 4];
28}
29
30extern void init_ioasic_irqs(int base);
31
32extern int dec_ioasic_clocksource_init(void);
33
34#endif /* __ASM_DEC_IOASIC_H */