1============
 2I2C Protocol
 3============
 4
 5This document describes the i2c protocol. Or will, when it is finished :-)
 
 6
 7Key to symbols
 8==============
 9
10=============== =============================================================
11S     (1 bit) : Start bit
12P     (1 bit) : Stop bit
13Rd/Wr (1 bit) : Read/Write bit. Rd equals 1, Wr equals 0.
14A, NA (1 bit) : Accept and reverse accept bit.
15Addr  (7 bits): I2C 7 bit address. Note that this can be expanded as usual to
16                get a 10 bit I2C address.
17Comm  (8 bits): Command byte, a data byte which often selects a register on
18                the device.
19Data  (8 bits): A plain data byte. Sometimes, I write DataLow, DataHigh
20                for 16 bit data.
21Count (8 bits): A data byte containing the length of a block operation.
22
23[..]:           Data sent by I2C device, as opposed to data sent by the
24                host adapter.
25=============== =============================================================
26
27
28Simple send transaction
29=======================
30
31This corresponds to i2c_master_send::
32
33  S Addr Wr [A] Data [A] Data [A] ... [A] Data [A] P
34
35
36Simple receive transaction
37==========================
38
39This corresponds to i2c_master_recv::
40
41  S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
42
43
44Combined transactions
45=====================
46
47This corresponds to i2c_transfer
48
49They are just like the above transactions, but instead of a stop bit P
50a start bit S is sent and the transaction continues. An example of
51a byte read, followed by a byte write::
52
53  S Addr Rd [A] [Data] NA S Addr Wr [A] Data [A] P
54
55
56Modified transactions
57=====================
58
59The following modifications to the I2C protocol can also be generated by
60setting these flags for i2c messages. With the exception of I2C_M_NOSTART, they
61are usually only needed to work around device issues:
62
63I2C_M_IGNORE_NAK:
64    Normally message is interrupted immediately if there is [NA] from the
65    client. Setting this flag treats any [NA] as [A], and all of
66    message is sent.
67    These messages may still fail to SCL lo->hi timeout.
68
69I2C_M_NO_RD_ACK:
70    In a read message, master A/NA bit is skipped.
71
72I2C_M_NOSTART:
73    In a combined transaction, no 'S Addr Wr/Rd [A]' is generated at some
74    point. For example, setting I2C_M_NOSTART on the second partial message
75    generates something like::
76
77      S Addr Rd [A] [Data] NA Data [A] P
78
79    If you set the I2C_M_NOSTART variable for the first partial message,
80    we do not generate Addr, but we do generate the startbit S. This will
81    probably confuse all other clients on your bus, so don't try this.
 
82
83    This is often used to gather transmits from multiple data buffers in
84    system memory into something that appears as a single transfer to the
85    I2C device but may also be used between direction changes by some
86    rare devices.
87
88I2C_M_REV_DIR_ADDR:
89    This toggles the Rd/Wr flag. That is, if you want to do a write, but
90    need to emit an Rd instead of a Wr, or vice versa, you set this
91    flag. For example::
92
93      S Addr Rd [A] Data [A] Data [A] ... [A] Data [A] P
94
95I2C_M_STOP:
96    Force a stop condition (P) after the message. Some I2C related protocols
97    like SCCB require that. Normally, you really don't want to get interrupted
98    between the messages of one transfer.

 1================
 2The I2C Protocol
 3================
 4
 5This document is an overview of the basic I2C transactions and the kernel
 6APIs to perform them.
 7
 8Key to symbols
 9==============
10
11=============== =============================================================
12S               Start condition
13P               Stop condition
14Rd/Wr (1 bit)   Read/Write bit. Rd equals 1, Wr equals 0.
15A, NA (1 bit)   Acknowledge (ACK) and Not Acknowledge (NACK) bit
16Addr  (7 bits)  I2C 7 bit address. Note that this can be expanded to
17                get a 10 bit I2C address.
18Data  (8 bits)  A plain data byte.
 
 
 
 
19
20[..]            Data sent by I2C device, as opposed to data sent by the
21                host adapter.
22=============== =============================================================
23
24
25Simple send transaction
26=======================
27
28Implemented by i2c_master_send()::
29
30  S Addr Wr [A] Data [A] Data [A] ... [A] Data [A] P
31
32
33Simple receive transaction
34==========================
35
36Implemented by i2c_master_recv()::
37
38  S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
39
40
41Combined transactions
42=====================
43
44Implemented by i2c_transfer().
45
46They are just like the above transactions, but instead of a stop
47condition P a start condition S is sent and the transaction continues.
48An example of a byte read, followed by a byte write::
49
50  S Addr Rd [A] [Data] NA S Addr Wr [A] Data [A] P
51
52
53Modified transactions
54=====================
55
56The following modifications to the I2C protocol can also be generated by
57setting these flags for I2C messages. With the exception of I2C_M_NOSTART, they
58are usually only needed to work around device issues:
59
60I2C_M_IGNORE_NAK:
61    Normally message is interrupted immediately if there is [NA] from the
62    client. Setting this flag treats any [NA] as [A], and all of
63    message is sent.
64    These messages may still fail to SCL lo->hi timeout.
65
66I2C_M_NO_RD_ACK:
67    In a read message, master A/NA bit is skipped.
68
69I2C_M_NOSTART:
70    In a combined transaction, no 'S Addr Wr/Rd [A]' is generated at some
71    point. For example, setting I2C_M_NOSTART on the second partial message
72    generates something like::
73
74      S Addr Rd [A] [Data] NA Data [A] P
75
76    If you set the I2C_M_NOSTART variable for the first partial message,
77    we do not generate Addr, but we do generate the start condition S.
78    This will probably confuse all other clients on your bus, so don't
79    try this.
80
81    This is often used to gather transmits from multiple data buffers in
82    system memory into something that appears as a single transfer to the
83    I2C device but may also be used between direction changes by some
84    rare devices.
85
86I2C_M_REV_DIR_ADDR:
87    This toggles the Rd/Wr flag. That is, if you want to do a write, but
88    need to emit an Rd instead of a Wr, or vice versa, you set this
89    flag. For example::
90
91      S Addr Rd [A] Data [A] Data [A] ... [A] Data [A] P
92
93I2C_M_STOP:
94    Force a stop condition (P) after the message. Some I2C related protocols
95    like SCCB require that. Normally, you really don't want to get interrupted
96    between the messages of one transfer.