1Mediatek hifsys controller
 2============================
 3
 4The Mediatek hifsys controller provides various clocks and reset
 5outputs to the system.
 6
 7Required Properties:
 8
 9- compatible: Should be:
10	- "mediatek,mt2701-hifsys", "syscon"
11	- "mediatek,mt7622-hifsys", "syscon"
12	- "mediatek,mt7623-hifsys", "mediatek,mt2701-hifsys", "syscon"
13- #clock-cells: Must be 1
14
15The hifsys controller uses the common clk binding from
16Documentation/devicetree/bindings/clock/clock-bindings.txt
17The available clocks are defined in dt-bindings/clock/mt*-clk.h.
18
19Example:
20
21hifsys: clock-controller@1a000000 {
22	compatible = "mediatek,mt2701-hifsys", "syscon";
23	reg = <0 0x1a000000 0 0x1000>;
24	#clock-cells = <1>;
25	#reset-cells = <1>;
26};

 1Mediatek hifsys controller
 2============================
 3
 4The Mediatek hifsys controller provides various clocks and reset
 5outputs to the system.
 6
 7Required Properties:
 8
 9- compatible: Should be:
10	- "mediatek,mt2701-hifsys", "syscon"
11	- "mediatek,mt7622-hifsys", "syscon"
12	- "mediatek,mt7623-hifsys", "mediatek,mt2701-hifsys", "syscon"
13- #clock-cells: Must be 1
14
15The hifsys controller uses the common clk binding from
16Documentation/devicetree/bindings/clock/clock-bindings.txt
17The available clocks are defined in dt-bindings/clock/mt*-clk.h.
18
19Example:
20
21hifsys: clock-controller@1a000000 {
22	compatible = "mediatek,mt2701-hifsys", "syscon";
23	reg = <0 0x1a000000 0 0x1000>;
24	#clock-cells = <1>;
25	#reset-cells = <1>;
26};