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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * card-als4000.c - driver for Avance Logic ALS4000 based soundcards.
4 * Copyright (C) 2000 by Bart Hartgers <bart@etpmod.phys.tue.nl>,
5 * Jaroslav Kysela <perex@perex.cz>
6 * Copyright (C) 2002, 2008 by Andreas Mohr <hw7oshyuv3001@sneakemail.com>
7 *
8 * Framework borrowed from Massimo Piccioni's card-als100.c.
9 *
10 * NOTES
11 *
12 * Since Avance does not provide any meaningful documentation, and I
13 * bought an ALS4000 based soundcard, I was forced to base this driver
14 * on reverse engineering.
15 *
16 * Note: this is no longer true (thank you!):
17 * pretty verbose chip docu (ALS4000a.PDF) can be found on the ALSA web site.
18 * Page numbers stated anywhere below with the "SPECS_PAGE:" tag
19 * refer to: ALS4000a.PDF specs Ver 1.0, May 28th, 1998.
20 *
21 * The ALS4000 seems to be the PCI-cousin of the ALS100. It contains an
22 * ALS100-like SB DSP/mixer, an OPL3 synth, a MPU401 and a gameport
23 * interface. These subsystems can be mapped into ISA io-port space,
24 * using the PCI-interface. In addition, the PCI-bit provides DMA and IRQ
25 * services to the subsystems.
26 *
27 * While ALS4000 is very similar to a SoundBlaster, the differences in
28 * DMA and capturing require more changes to the SoundBlaster than
29 * desirable, so I made this separate driver.
30 *
31 * The ALS4000 can do real full duplex playback/capture.
32 *
33 * FMDAC:
34 * - 0x4f -> port 0x14
35 * - port 0x15 |= 1
36 *
37 * Enable/disable 3D sound:
38 * - 0x50 -> port 0x14
39 * - change bit 6 (0x40) of port 0x15
40 *
41 * Set QSound:
42 * - 0xdb -> port 0x14
43 * - set port 0x15:
44 * 0x3e (mode 3), 0x3c (mode 2), 0x3a (mode 1), 0x38 (mode 0)
45 *
46 * Set KSound:
47 * - value -> some port 0x0c0d
48 *
49 * ToDo:
50 * - by default, don't enable legacy game and use PCI game I/O
51 * - power management? (card can do voice wakeup according to datasheet!!)
52 */
53
54#include <linux/io.h>
55#include <linux/init.h>
56#include <linux/pci.h>
57#include <linux/gameport.h>
58#include <linux/module.h>
59#include <linux/dma-mapping.h>
60#include <sound/core.h>
61#include <sound/pcm.h>
62#include <sound/rawmidi.h>
63#include <sound/mpu401.h>
64#include <sound/opl3.h>
65#include <sound/sb.h>
66#include <sound/initval.h>
67
68MODULE_AUTHOR("Bart Hartgers <bart@etpmod.phys.tue.nl>, Andreas Mohr");
69MODULE_DESCRIPTION("Avance Logic ALS4000");
70MODULE_LICENSE("GPL");
71MODULE_SUPPORTED_DEVICE("{{Avance Logic,ALS4000}}");
72
73#if IS_REACHABLE(CONFIG_GAMEPORT)
74#define SUPPORT_JOYSTICK 1
75#endif
76
77static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
78static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
79static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
80#ifdef SUPPORT_JOYSTICK
81static int joystick_port[SNDRV_CARDS];
82#endif
83
84module_param_array(index, int, NULL, 0444);
85MODULE_PARM_DESC(index, "Index value for ALS4000 soundcard.");
86module_param_array(id, charp, NULL, 0444);
87MODULE_PARM_DESC(id, "ID string for ALS4000 soundcard.");
88module_param_array(enable, bool, NULL, 0444);
89MODULE_PARM_DESC(enable, "Enable ALS4000 soundcard.");
90#ifdef SUPPORT_JOYSTICK
91module_param_hw_array(joystick_port, int, ioport, NULL, 0444);
92MODULE_PARM_DESC(joystick_port, "Joystick port address for ALS4000 soundcard. (0 = disabled)");
93#endif
94
95struct snd_card_als4000 {
96 /* most frequent access first */
97 unsigned long iobase;
98 struct pci_dev *pci;
99 struct snd_sb *chip;
100#ifdef SUPPORT_JOYSTICK
101 struct gameport *gameport;
102#endif
103};
104
105static const struct pci_device_id snd_als4000_ids[] = {
106 { 0x4005, 0x4000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* ALS4000 */
107 { 0, }
108};
109
110MODULE_DEVICE_TABLE(pci, snd_als4000_ids);
111
112enum als4k_iobase_t {
113 /* IOx: B == Byte, W = Word, D = DWord; SPECS_PAGE: 37 */
114 ALS4K_IOD_00_AC97_ACCESS = 0x00,
115 ALS4K_IOW_04_AC97_READ = 0x04,
116 ALS4K_IOB_06_AC97_STATUS = 0x06,
117 ALS4K_IOB_07_IRQSTATUS = 0x07,
118 ALS4K_IOD_08_GCR_DATA = 0x08,
119 ALS4K_IOB_0C_GCR_INDEX = 0x0c,
120 ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU = 0x0e,
121 ALS4K_IOB_10_ADLIB_ADDR0 = 0x10,
122 ALS4K_IOB_11_ADLIB_ADDR1 = 0x11,
123 ALS4K_IOB_12_ADLIB_ADDR2 = 0x12,
124 ALS4K_IOB_13_ADLIB_ADDR3 = 0x13,
125 ALS4K_IOB_14_MIXER_INDEX = 0x14,
126 ALS4K_IOB_15_MIXER_DATA = 0x15,
127 ALS4K_IOB_16_ESP_RESET = 0x16,
128 ALS4K_IOB_16_ACK_FOR_CR1E = 0x16, /* 2nd function */
129 ALS4K_IOB_18_OPL_ADDR0 = 0x18,
130 ALS4K_IOB_19_OPL_ADDR1 = 0x19,
131 ALS4K_IOB_1A_ESP_RD_DATA = 0x1a,
132 ALS4K_IOB_1C_ESP_CMD_DATA = 0x1c,
133 ALS4K_IOB_1C_ESP_WR_STATUS = 0x1c, /* 2nd function */
134 ALS4K_IOB_1E_ESP_RD_STATUS8 = 0x1e,
135 ALS4K_IOB_1F_ESP_RD_STATUS16 = 0x1f,
136 ALS4K_IOB_20_ESP_GAMEPORT_200 = 0x20,
137 ALS4K_IOB_21_ESP_GAMEPORT_201 = 0x21,
138 ALS4K_IOB_30_MIDI_DATA = 0x30,
139 ALS4K_IOB_31_MIDI_STATUS = 0x31,
140 ALS4K_IOB_31_MIDI_COMMAND = 0x31, /* 2nd function */
141};
142
143enum als4k_iobase_0e_t {
144 ALS4K_IOB_0E_MPU_IRQ = 0x10,
145 ALS4K_IOB_0E_CR1E_IRQ = 0x40,
146 ALS4K_IOB_0E_SB_DMA_IRQ = 0x80,
147};
148
149enum als4k_gcr_t { /* all registers 32bit wide; SPECS_PAGE: 38 to 42 */
150 ALS4K_GCR8C_MISC_CTRL = 0x8c,
151 ALS4K_GCR90_TEST_MODE_REG = 0x90,
152 ALS4K_GCR91_DMA0_ADDR = 0x91,
153 ALS4K_GCR92_DMA0_MODE_COUNT = 0x92,
154 ALS4K_GCR93_DMA1_ADDR = 0x93,
155 ALS4K_GCR94_DMA1_MODE_COUNT = 0x94,
156 ALS4K_GCR95_DMA3_ADDR = 0x95,
157 ALS4K_GCR96_DMA3_MODE_COUNT = 0x96,
158 ALS4K_GCR99_DMA_EMULATION_CTRL = 0x99,
159 ALS4K_GCRA0_FIFO1_CURRENT_ADDR = 0xa0,
160 ALS4K_GCRA1_FIFO1_STATUS_BYTECOUNT = 0xa1,
161 ALS4K_GCRA2_FIFO2_PCIADDR = 0xa2,
162 ALS4K_GCRA3_FIFO2_COUNT = 0xa3,
163 ALS4K_GCRA4_FIFO2_CURRENT_ADDR = 0xa4,
164 ALS4K_GCRA5_FIFO1_STATUS_BYTECOUNT = 0xa5,
165 ALS4K_GCRA6_PM_CTRL = 0xa6,
166 ALS4K_GCRA7_PCI_ACCESS_STORAGE = 0xa7,
167 ALS4K_GCRA8_LEGACY_CFG1 = 0xa8,
168 ALS4K_GCRA9_LEGACY_CFG2 = 0xa9,
169 ALS4K_GCRFF_DUMMY_SCRATCH = 0xff,
170};
171
172enum als4k_gcr8c_t {
173 ALS4K_GCR8C_IRQ_MASK_CTRL_ENABLE = 0x8000,
174 ALS4K_GCR8C_CHIP_REV_MASK = 0xf0000
175};
176
177static inline void snd_als4k_iobase_writeb(unsigned long iobase,
178 enum als4k_iobase_t reg,
179 u8 val)
180{
181 outb(val, iobase + reg);
182}
183
184static inline void snd_als4k_iobase_writel(unsigned long iobase,
185 enum als4k_iobase_t reg,
186 u32 val)
187{
188 outl(val, iobase + reg);
189}
190
191static inline u8 snd_als4k_iobase_readb(unsigned long iobase,
192 enum als4k_iobase_t reg)
193{
194 return inb(iobase + reg);
195}
196
197static inline u32 snd_als4k_iobase_readl(unsigned long iobase,
198 enum als4k_iobase_t reg)
199{
200 return inl(iobase + reg);
201}
202
203static inline void snd_als4k_gcr_write_addr(unsigned long iobase,
204 enum als4k_gcr_t reg,
205 u32 val)
206{
207 snd_als4k_iobase_writeb(iobase, ALS4K_IOB_0C_GCR_INDEX, reg);
208 snd_als4k_iobase_writel(iobase, ALS4K_IOD_08_GCR_DATA, val);
209}
210
211static inline void snd_als4k_gcr_write(struct snd_sb *sb,
212 enum als4k_gcr_t reg,
213 u32 val)
214{
215 snd_als4k_gcr_write_addr(sb->alt_port, reg, val);
216}
217
218static inline u32 snd_als4k_gcr_read_addr(unsigned long iobase,
219 enum als4k_gcr_t reg)
220{
221 /* SPECS_PAGE: 37/38 */
222 snd_als4k_iobase_writeb(iobase, ALS4K_IOB_0C_GCR_INDEX, reg);
223 return snd_als4k_iobase_readl(iobase, ALS4K_IOD_08_GCR_DATA);
224}
225
226static inline u32 snd_als4k_gcr_read(struct snd_sb *sb, enum als4k_gcr_t reg)
227{
228 return snd_als4k_gcr_read_addr(sb->alt_port, reg);
229}
230
231enum als4k_cr_t { /* all registers 8bit wide; SPECS_PAGE: 20 to 23 */
232 ALS4K_CR0_SB_CONFIG = 0x00,
233 ALS4K_CR2_MISC_CONTROL = 0x02,
234 ALS4K_CR3_CONFIGURATION = 0x03,
235 ALS4K_CR17_FIFO_STATUS = 0x17,
236 ALS4K_CR18_ESP_MAJOR_VERSION = 0x18,
237 ALS4K_CR19_ESP_MINOR_VERSION = 0x19,
238 ALS4K_CR1A_MPU401_UART_MODE_CONTROL = 0x1a,
239 ALS4K_CR1C_FIFO2_BLOCK_LENGTH_LO = 0x1c,
240 ALS4K_CR1D_FIFO2_BLOCK_LENGTH_HI = 0x1d,
241 ALS4K_CR1E_FIFO2_CONTROL = 0x1e, /* secondary PCM FIFO (recording) */
242 ALS4K_CR3A_MISC_CONTROL = 0x3a,
243 ALS4K_CR3B_CRC32_BYTE0 = 0x3b, /* for testing, activate via CR3A */
244 ALS4K_CR3C_CRC32_BYTE1 = 0x3c,
245 ALS4K_CR3D_CRC32_BYTE2 = 0x3d,
246 ALS4K_CR3E_CRC32_BYTE3 = 0x3e,
247};
248
249enum als4k_cr0_t {
250 ALS4K_CR0_DMA_CONTIN_MODE_CTRL = 0x02, /* IRQ/FIFO controlled for 0/1 */
251 ALS4K_CR0_DMA_90H_MODE_CTRL = 0x04, /* IRQ/FIFO controlled for 0/1 */
252 ALS4K_CR0_MX80_81_REG_WRITE_ENABLE = 0x80,
253};
254
255static inline void snd_als4_cr_write(struct snd_sb *chip,
256 enum als4k_cr_t reg,
257 u8 data)
258{
259 /* Control Register is reg | 0xc0 (bit 7, 6 set) on sbmixer_index
260 * NOTE: assumes chip->mixer_lock to be locked externally already!
261 * SPECS_PAGE: 6 */
262 snd_sbmixer_write(chip, reg | 0xc0, data);
263}
264
265static inline u8 snd_als4_cr_read(struct snd_sb *chip,
266 enum als4k_cr_t reg)
267{
268 /* NOTE: assumes chip->mixer_lock to be locked externally already! */
269 return snd_sbmixer_read(chip, reg | 0xc0);
270}
271
272
273
274static void snd_als4000_set_rate(struct snd_sb *chip, unsigned int rate)
275{
276 if (!(chip->mode & SB_RATE_LOCK)) {
277 snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_OUT);
278 snd_sbdsp_command(chip, rate>>8);
279 snd_sbdsp_command(chip, rate);
280 }
281}
282
283static inline void snd_als4000_set_capture_dma(struct snd_sb *chip,
284 dma_addr_t addr, unsigned size)
285{
286 /* SPECS_PAGE: 40 */
287 snd_als4k_gcr_write(chip, ALS4K_GCRA2_FIFO2_PCIADDR, addr);
288 snd_als4k_gcr_write(chip, ALS4K_GCRA3_FIFO2_COUNT, (size-1));
289}
290
291static inline void snd_als4000_set_playback_dma(struct snd_sb *chip,
292 dma_addr_t addr,
293 unsigned size)
294{
295 /* SPECS_PAGE: 38 */
296 snd_als4k_gcr_write(chip, ALS4K_GCR91_DMA0_ADDR, addr);
297 snd_als4k_gcr_write(chip, ALS4K_GCR92_DMA0_MODE_COUNT,
298 (size-1)|0x180000);
299}
300
301#define ALS4000_FORMAT_SIGNED (1<<0)
302#define ALS4000_FORMAT_16BIT (1<<1)
303#define ALS4000_FORMAT_STEREO (1<<2)
304
305static int snd_als4000_get_format(struct snd_pcm_runtime *runtime)
306{
307 int result;
308
309 result = 0;
310 if (snd_pcm_format_signed(runtime->format))
311 result |= ALS4000_FORMAT_SIGNED;
312 if (snd_pcm_format_physical_width(runtime->format) == 16)
313 result |= ALS4000_FORMAT_16BIT;
314 if (runtime->channels > 1)
315 result |= ALS4000_FORMAT_STEREO;
316 return result;
317}
318
319/* structure for setting up playback */
320static const struct {
321 unsigned char dsp_cmd, dma_on, dma_off, format;
322} playback_cmd_vals[]={
323/* ALS4000_FORMAT_U8_MONO */
324{ SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_UNS_MONO },
325/* ALS4000_FORMAT_S8_MONO */
326{ SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_SIGN_MONO },
327/* ALS4000_FORMAT_U16L_MONO */
328{ SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_UNS_MONO },
329/* ALS4000_FORMAT_S16L_MONO */
330{ SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_SIGN_MONO },
331/* ALS4000_FORMAT_U8_STEREO */
332{ SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_UNS_STEREO },
333/* ALS4000_FORMAT_S8_STEREO */
334{ SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_SIGN_STEREO },
335/* ALS4000_FORMAT_U16L_STEREO */
336{ SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_UNS_STEREO },
337/* ALS4000_FORMAT_S16L_STEREO */
338{ SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_SIGN_STEREO },
339};
340#define playback_cmd(chip) (playback_cmd_vals[(chip)->playback_format])
341
342/* structure for setting up capture */
343enum { CMD_WIDTH8=0x04, CMD_SIGNED=0x10, CMD_MONO=0x80, CMD_STEREO=0xA0 };
344static const unsigned char capture_cmd_vals[]=
345{
346CMD_WIDTH8|CMD_MONO, /* ALS4000_FORMAT_U8_MONO */
347CMD_WIDTH8|CMD_SIGNED|CMD_MONO, /* ALS4000_FORMAT_S8_MONO */
348CMD_MONO, /* ALS4000_FORMAT_U16L_MONO */
349CMD_SIGNED|CMD_MONO, /* ALS4000_FORMAT_S16L_MONO */
350CMD_WIDTH8|CMD_STEREO, /* ALS4000_FORMAT_U8_STEREO */
351CMD_WIDTH8|CMD_SIGNED|CMD_STEREO, /* ALS4000_FORMAT_S8_STEREO */
352CMD_STEREO, /* ALS4000_FORMAT_U16L_STEREO */
353CMD_SIGNED|CMD_STEREO, /* ALS4000_FORMAT_S16L_STEREO */
354};
355#define capture_cmd(chip) (capture_cmd_vals[(chip)->capture_format])
356
357static int snd_als4000_hw_params(struct snd_pcm_substream *substream,
358 struct snd_pcm_hw_params *hw_params)
359{
360 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
361}
362
363static int snd_als4000_hw_free(struct snd_pcm_substream *substream)
364{
365 snd_pcm_lib_free_pages(substream);
366 return 0;
367}
368
369static int snd_als4000_capture_prepare(struct snd_pcm_substream *substream)
370{
371 struct snd_sb *chip = snd_pcm_substream_chip(substream);
372 struct snd_pcm_runtime *runtime = substream->runtime;
373 unsigned long size;
374 unsigned count;
375
376 chip->capture_format = snd_als4000_get_format(runtime);
377
378 size = snd_pcm_lib_buffer_bytes(substream);
379 count = snd_pcm_lib_period_bytes(substream);
380
381 if (chip->capture_format & ALS4000_FORMAT_16BIT)
382 count >>= 1;
383 count--;
384
385 spin_lock_irq(&chip->reg_lock);
386 snd_als4000_set_rate(chip, runtime->rate);
387 snd_als4000_set_capture_dma(chip, runtime->dma_addr, size);
388 spin_unlock_irq(&chip->reg_lock);
389 spin_lock_irq(&chip->mixer_lock);
390 snd_als4_cr_write(chip, ALS4K_CR1C_FIFO2_BLOCK_LENGTH_LO, count & 0xff);
391 snd_als4_cr_write(chip, ALS4K_CR1D_FIFO2_BLOCK_LENGTH_HI, count >> 8);
392 spin_unlock_irq(&chip->mixer_lock);
393 return 0;
394}
395
396static int snd_als4000_playback_prepare(struct snd_pcm_substream *substream)
397{
398 struct snd_sb *chip = snd_pcm_substream_chip(substream);
399 struct snd_pcm_runtime *runtime = substream->runtime;
400 unsigned long size;
401 unsigned count;
402
403 chip->playback_format = snd_als4000_get_format(runtime);
404
405 size = snd_pcm_lib_buffer_bytes(substream);
406 count = snd_pcm_lib_period_bytes(substream);
407
408 if (chip->playback_format & ALS4000_FORMAT_16BIT)
409 count >>= 1;
410 count--;
411
412 /* FIXME: from second playback on, there's a lot more clicks and pops
413 * involved here than on first playback. Fiddling with
414 * tons of different settings didn't help (DMA, speaker on/off,
415 * reordering, ...). Something seems to get enabled on playback
416 * that I haven't found out how to disable again, which then causes
417 * the switching pops to reach the speakers the next time here. */
418 spin_lock_irq(&chip->reg_lock);
419 snd_als4000_set_rate(chip, runtime->rate);
420 snd_als4000_set_playback_dma(chip, runtime->dma_addr, size);
421
422 /* SPEAKER_ON not needed, since dma_on seems to also enable speaker */
423 /* snd_sbdsp_command(chip, SB_DSP_SPEAKER_ON); */
424 snd_sbdsp_command(chip, playback_cmd(chip).dsp_cmd);
425 snd_sbdsp_command(chip, playback_cmd(chip).format);
426 snd_sbdsp_command(chip, count & 0xff);
427 snd_sbdsp_command(chip, count >> 8);
428 snd_sbdsp_command(chip, playback_cmd(chip).dma_off);
429 spin_unlock_irq(&chip->reg_lock);
430
431 return 0;
432}
433
434static int snd_als4000_capture_trigger(struct snd_pcm_substream *substream, int cmd)
435{
436 struct snd_sb *chip = snd_pcm_substream_chip(substream);
437 int result = 0;
438
439 /* FIXME race condition in here!!!
440 chip->mode non-atomic update gets consistently protected
441 by reg_lock always, _except_ for this place!!
442 Probably need to take reg_lock as outer (or inner??) lock, too.
443 (or serialize both lock operations? probably not, though... - racy?)
444 */
445 spin_lock(&chip->mixer_lock);
446 switch (cmd) {
447 case SNDRV_PCM_TRIGGER_START:
448 case SNDRV_PCM_TRIGGER_RESUME:
449 chip->mode |= SB_RATE_LOCK_CAPTURE;
450 snd_als4_cr_write(chip, ALS4K_CR1E_FIFO2_CONTROL,
451 capture_cmd(chip));
452 break;
453 case SNDRV_PCM_TRIGGER_STOP:
454 case SNDRV_PCM_TRIGGER_SUSPEND:
455 chip->mode &= ~SB_RATE_LOCK_CAPTURE;
456 snd_als4_cr_write(chip, ALS4K_CR1E_FIFO2_CONTROL,
457 capture_cmd(chip));
458 break;
459 default:
460 result = -EINVAL;
461 break;
462 }
463 spin_unlock(&chip->mixer_lock);
464 return result;
465}
466
467static int snd_als4000_playback_trigger(struct snd_pcm_substream *substream, int cmd)
468{
469 struct snd_sb *chip = snd_pcm_substream_chip(substream);
470 int result = 0;
471
472 spin_lock(&chip->reg_lock);
473 switch (cmd) {
474 case SNDRV_PCM_TRIGGER_START:
475 case SNDRV_PCM_TRIGGER_RESUME:
476 chip->mode |= SB_RATE_LOCK_PLAYBACK;
477 snd_sbdsp_command(chip, playback_cmd(chip).dma_on);
478 break;
479 case SNDRV_PCM_TRIGGER_STOP:
480 case SNDRV_PCM_TRIGGER_SUSPEND:
481 snd_sbdsp_command(chip, playback_cmd(chip).dma_off);
482 chip->mode &= ~SB_RATE_LOCK_PLAYBACK;
483 break;
484 default:
485 result = -EINVAL;
486 break;
487 }
488 spin_unlock(&chip->reg_lock);
489 return result;
490}
491
492static snd_pcm_uframes_t snd_als4000_capture_pointer(struct snd_pcm_substream *substream)
493{
494 struct snd_sb *chip = snd_pcm_substream_chip(substream);
495 unsigned int result;
496
497 spin_lock(&chip->reg_lock);
498 result = snd_als4k_gcr_read(chip, ALS4K_GCRA4_FIFO2_CURRENT_ADDR);
499 spin_unlock(&chip->reg_lock);
500 result &= 0xffff;
501 return bytes_to_frames( substream->runtime, result );
502}
503
504static snd_pcm_uframes_t snd_als4000_playback_pointer(struct snd_pcm_substream *substream)
505{
506 struct snd_sb *chip = snd_pcm_substream_chip(substream);
507 unsigned result;
508
509 spin_lock(&chip->reg_lock);
510 result = snd_als4k_gcr_read(chip, ALS4K_GCRA0_FIFO1_CURRENT_ADDR);
511 spin_unlock(&chip->reg_lock);
512 result &= 0xffff;
513 return bytes_to_frames( substream->runtime, result );
514}
515
516/* FIXME: this IRQ routine doesn't really support IRQ sharing (we always
517 * return IRQ_HANDLED no matter whether we actually had an IRQ flag or not).
518 * ALS4000a.PDF writes that while ACKing IRQ in PCI block will *not* ACK
519 * the IRQ in the SB core, ACKing IRQ in SB block *will* ACK the PCI IRQ
520 * register (alt_port + ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU). Probably something
521 * could be optimized here to query/write one register only...
522 * And even if both registers need to be queried, then there's still the
523 * question of whether it's actually correct to ACK PCI IRQ before reading
524 * SB IRQ like we do now, since ALS4000a.PDF mentions that PCI IRQ will *clear*
525 * SB IRQ status.
526 * (hmm, SPECS_PAGE: 38 mentions it the other way around!)
527 * And do we *really* need the lock here for *reading* SB_DSP4_IRQSTATUS??
528 * */
529static irqreturn_t snd_als4000_interrupt(int irq, void *dev_id)
530{
531 struct snd_sb *chip = dev_id;
532 unsigned pci_irqstatus;
533 unsigned sb_irqstatus;
534
535 /* find out which bit of the ALS4000 PCI block produced the interrupt,
536 SPECS_PAGE: 38, 5 */
537 pci_irqstatus = snd_als4k_iobase_readb(chip->alt_port,
538 ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU);
539 if ((pci_irqstatus & ALS4K_IOB_0E_SB_DMA_IRQ)
540 && (chip->playback_substream)) /* playback */
541 snd_pcm_period_elapsed(chip->playback_substream);
542 if ((pci_irqstatus & ALS4K_IOB_0E_CR1E_IRQ)
543 && (chip->capture_substream)) /* capturing */
544 snd_pcm_period_elapsed(chip->capture_substream);
545 if ((pci_irqstatus & ALS4K_IOB_0E_MPU_IRQ)
546 && (chip->rmidi)) /* MPU401 interrupt */
547 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
548 /* ACK the PCI block IRQ */
549 snd_als4k_iobase_writeb(chip->alt_port,
550 ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU, pci_irqstatus);
551
552 spin_lock(&chip->mixer_lock);
553 /* SPECS_PAGE: 20 */
554 sb_irqstatus = snd_sbmixer_read(chip, SB_DSP4_IRQSTATUS);
555 spin_unlock(&chip->mixer_lock);
556
557 if (sb_irqstatus & SB_IRQTYPE_8BIT)
558 snd_sb_ack_8bit(chip);
559 if (sb_irqstatus & SB_IRQTYPE_16BIT)
560 snd_sb_ack_16bit(chip);
561 if (sb_irqstatus & SB_IRQTYPE_MPUIN)
562 inb(chip->mpu_port);
563 if (sb_irqstatus & ALS4K_IRQTYPE_CR1E_DMA)
564 snd_als4k_iobase_readb(chip->alt_port,
565 ALS4K_IOB_16_ACK_FOR_CR1E);
566
567 /* dev_dbg(chip->card->dev, "als4000: irq 0x%04x 0x%04x\n",
568 pci_irqstatus, sb_irqstatus); */
569
570 /* only ack the things we actually handled above */
571 return IRQ_RETVAL(
572 (pci_irqstatus & (ALS4K_IOB_0E_SB_DMA_IRQ|ALS4K_IOB_0E_CR1E_IRQ|
573 ALS4K_IOB_0E_MPU_IRQ))
574 || (sb_irqstatus & (SB_IRQTYPE_8BIT|SB_IRQTYPE_16BIT|
575 SB_IRQTYPE_MPUIN|ALS4K_IRQTYPE_CR1E_DMA))
576 );
577}
578
579/*****************************************************************/
580
581static const struct snd_pcm_hardware snd_als4000_playback =
582{
583 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
584 SNDRV_PCM_INFO_MMAP_VALID),
585 .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
586 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE, /* formats */
587 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
588 .rate_min = 4000,
589 .rate_max = 48000,
590 .channels_min = 1,
591 .channels_max = 2,
592 .buffer_bytes_max = 65536,
593 .period_bytes_min = 64,
594 .period_bytes_max = 65536,
595 .periods_min = 1,
596 .periods_max = 1024,
597 .fifo_size = 0
598};
599
600static const struct snd_pcm_hardware snd_als4000_capture =
601{
602 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
603 SNDRV_PCM_INFO_MMAP_VALID),
604 .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
605 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE, /* formats */
606 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
607 .rate_min = 4000,
608 .rate_max = 48000,
609 .channels_min = 1,
610 .channels_max = 2,
611 .buffer_bytes_max = 65536,
612 .period_bytes_min = 64,
613 .period_bytes_max = 65536,
614 .periods_min = 1,
615 .periods_max = 1024,
616 .fifo_size = 0
617};
618
619/*****************************************************************/
620
621static int snd_als4000_playback_open(struct snd_pcm_substream *substream)
622{
623 struct snd_sb *chip = snd_pcm_substream_chip(substream);
624 struct snd_pcm_runtime *runtime = substream->runtime;
625
626 chip->playback_substream = substream;
627 runtime->hw = snd_als4000_playback;
628 return 0;
629}
630
631static int snd_als4000_playback_close(struct snd_pcm_substream *substream)
632{
633 struct snd_sb *chip = snd_pcm_substream_chip(substream);
634
635 chip->playback_substream = NULL;
636 snd_pcm_lib_free_pages(substream);
637 return 0;
638}
639
640static int snd_als4000_capture_open(struct snd_pcm_substream *substream)
641{
642 struct snd_sb *chip = snd_pcm_substream_chip(substream);
643 struct snd_pcm_runtime *runtime = substream->runtime;
644
645 chip->capture_substream = substream;
646 runtime->hw = snd_als4000_capture;
647 return 0;
648}
649
650static int snd_als4000_capture_close(struct snd_pcm_substream *substream)
651{
652 struct snd_sb *chip = snd_pcm_substream_chip(substream);
653
654 chip->capture_substream = NULL;
655 snd_pcm_lib_free_pages(substream);
656 return 0;
657}
658
659/******************************************************************/
660
661static const struct snd_pcm_ops snd_als4000_playback_ops = {
662 .open = snd_als4000_playback_open,
663 .close = snd_als4000_playback_close,
664 .ioctl = snd_pcm_lib_ioctl,
665 .hw_params = snd_als4000_hw_params,
666 .hw_free = snd_als4000_hw_free,
667 .prepare = snd_als4000_playback_prepare,
668 .trigger = snd_als4000_playback_trigger,
669 .pointer = snd_als4000_playback_pointer
670};
671
672static const struct snd_pcm_ops snd_als4000_capture_ops = {
673 .open = snd_als4000_capture_open,
674 .close = snd_als4000_capture_close,
675 .ioctl = snd_pcm_lib_ioctl,
676 .hw_params = snd_als4000_hw_params,
677 .hw_free = snd_als4000_hw_free,
678 .prepare = snd_als4000_capture_prepare,
679 .trigger = snd_als4000_capture_trigger,
680 .pointer = snd_als4000_capture_pointer
681};
682
683static int snd_als4000_pcm(struct snd_sb *chip, int device)
684{
685 struct snd_pcm *pcm;
686 int err;
687
688 err = snd_pcm_new(chip->card, "ALS4000 DSP", device, 1, 1, &pcm);
689 if (err < 0)
690 return err;
691 pcm->private_data = chip;
692 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
693 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_als4000_playback_ops);
694 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_als4000_capture_ops);
695
696 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
697 64*1024, 64*1024);
698
699 chip->pcm = pcm;
700
701 return 0;
702}
703
704/******************************************************************/
705
706static void snd_als4000_set_addr(unsigned long iobase,
707 unsigned int sb_io,
708 unsigned int mpu_io,
709 unsigned int opl_io,
710 unsigned int game_io)
711{
712 u32 cfg1 = 0;
713 u32 cfg2 = 0;
714
715 if (mpu_io > 0)
716 cfg2 |= (mpu_io | 1) << 16;
717 if (sb_io > 0)
718 cfg2 |= (sb_io | 1);
719 if (game_io > 0)
720 cfg1 |= (game_io | 1) << 16;
721 if (opl_io > 0)
722 cfg1 |= (opl_io | 1);
723 snd_als4k_gcr_write_addr(iobase, ALS4K_GCRA8_LEGACY_CFG1, cfg1);
724 snd_als4k_gcr_write_addr(iobase, ALS4K_GCRA9_LEGACY_CFG2, cfg2);
725}
726
727static void snd_als4000_configure(struct snd_sb *chip)
728{
729 u8 tmp;
730 int i;
731
732 /* do some more configuration */
733 spin_lock_irq(&chip->mixer_lock);
734 tmp = snd_als4_cr_read(chip, ALS4K_CR0_SB_CONFIG);
735 snd_als4_cr_write(chip, ALS4K_CR0_SB_CONFIG,
736 tmp|ALS4K_CR0_MX80_81_REG_WRITE_ENABLE);
737 /* always select DMA channel 0, since we do not actually use DMA
738 * SPECS_PAGE: 19/20 */
739 snd_sbmixer_write(chip, SB_DSP4_DMASETUP, SB_DMASETUP_DMA0);
740 snd_als4_cr_write(chip, ALS4K_CR0_SB_CONFIG,
741 tmp & ~ALS4K_CR0_MX80_81_REG_WRITE_ENABLE);
742 spin_unlock_irq(&chip->mixer_lock);
743
744 spin_lock_irq(&chip->reg_lock);
745 /* enable interrupts */
746 snd_als4k_gcr_write(chip, ALS4K_GCR8C_MISC_CTRL,
747 ALS4K_GCR8C_IRQ_MASK_CTRL_ENABLE);
748
749 /* SPECS_PAGE: 39 */
750 for (i = ALS4K_GCR91_DMA0_ADDR; i <= ALS4K_GCR96_DMA3_MODE_COUNT; ++i)
751 snd_als4k_gcr_write(chip, i, 0);
752 /* enable burst mode to prevent dropouts during high PCI bus usage */
753 snd_als4k_gcr_write(chip, ALS4K_GCR99_DMA_EMULATION_CTRL,
754 (snd_als4k_gcr_read(chip, ALS4K_GCR99_DMA_EMULATION_CTRL) & ~0x07) | 0x04);
755 spin_unlock_irq(&chip->reg_lock);
756}
757
758#ifdef SUPPORT_JOYSTICK
759static int snd_als4000_create_gameport(struct snd_card_als4000 *acard, int dev)
760{
761 struct gameport *gp;
762 struct resource *r;
763 int io_port;
764
765 if (joystick_port[dev] == 0)
766 return -ENODEV;
767
768 if (joystick_port[dev] == 1) { /* auto-detect */
769 for (io_port = 0x200; io_port <= 0x218; io_port += 8) {
770 r = request_region(io_port, 8, "ALS4000 gameport");
771 if (r)
772 break;
773 }
774 } else {
775 io_port = joystick_port[dev];
776 r = request_region(io_port, 8, "ALS4000 gameport");
777 }
778
779 if (!r) {
780 dev_warn(&acard->pci->dev, "cannot reserve joystick ports\n");
781 return -EBUSY;
782 }
783
784 acard->gameport = gp = gameport_allocate_port();
785 if (!gp) {
786 dev_err(&acard->pci->dev, "cannot allocate memory for gameport\n");
787 release_and_free_resource(r);
788 return -ENOMEM;
789 }
790
791 gameport_set_name(gp, "ALS4000 Gameport");
792 gameport_set_phys(gp, "pci%s/gameport0", pci_name(acard->pci));
793 gameport_set_dev_parent(gp, &acard->pci->dev);
794 gp->io = io_port;
795 gameport_set_port_data(gp, r);
796
797 /* Enable legacy joystick port */
798 snd_als4000_set_addr(acard->iobase, 0, 0, 0, 1);
799
800 gameport_register_port(acard->gameport);
801
802 return 0;
803}
804
805static void snd_als4000_free_gameport(struct snd_card_als4000 *acard)
806{
807 if (acard->gameport) {
808 struct resource *r = gameport_get_port_data(acard->gameport);
809
810 gameport_unregister_port(acard->gameport);
811 acard->gameport = NULL;
812
813 /* disable joystick */
814 snd_als4000_set_addr(acard->iobase, 0, 0, 0, 0);
815
816 release_and_free_resource(r);
817 }
818}
819#else
820static inline int snd_als4000_create_gameport(struct snd_card_als4000 *acard, int dev) { return -ENOSYS; }
821static inline void snd_als4000_free_gameport(struct snd_card_als4000 *acard) { }
822#endif
823
824static void snd_card_als4000_free( struct snd_card *card )
825{
826 struct snd_card_als4000 *acard = card->private_data;
827
828 /* make sure that interrupts are disabled */
829 snd_als4k_gcr_write_addr(acard->iobase, ALS4K_GCR8C_MISC_CTRL, 0);
830 /* free resources */
831 snd_als4000_free_gameport(acard);
832 pci_release_regions(acard->pci);
833 pci_disable_device(acard->pci);
834}
835
836static int snd_card_als4000_probe(struct pci_dev *pci,
837 const struct pci_device_id *pci_id)
838{
839 static int dev;
840 struct snd_card *card;
841 struct snd_card_als4000 *acard;
842 unsigned long iobase;
843 struct snd_sb *chip;
844 struct snd_opl3 *opl3;
845 unsigned short word;
846 int err;
847
848 if (dev >= SNDRV_CARDS)
849 return -ENODEV;
850 if (!enable[dev]) {
851 dev++;
852 return -ENOENT;
853 }
854
855 /* enable PCI device */
856 if ((err = pci_enable_device(pci)) < 0) {
857 return err;
858 }
859 /* check, if we can restrict PCI DMA transfers to 24 bits */
860 if (dma_set_mask(&pci->dev, DMA_BIT_MASK(24)) < 0 ||
861 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(24)) < 0) {
862 dev_err(&pci->dev, "architecture does not support 24bit PCI busmaster DMA\n");
863 pci_disable_device(pci);
864 return -ENXIO;
865 }
866
867 if ((err = pci_request_regions(pci, "ALS4000")) < 0) {
868 pci_disable_device(pci);
869 return err;
870 }
871 iobase = pci_resource_start(pci, 0);
872
873 pci_read_config_word(pci, PCI_COMMAND, &word);
874 pci_write_config_word(pci, PCI_COMMAND, word | PCI_COMMAND_IO);
875 pci_set_master(pci);
876
877 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
878 sizeof(*acard) /* private_data: acard */,
879 &card);
880 if (err < 0) {
881 pci_release_regions(pci);
882 pci_disable_device(pci);
883 return err;
884 }
885
886 acard = card->private_data;
887 acard->pci = pci;
888 acard->iobase = iobase;
889 card->private_free = snd_card_als4000_free;
890
891 /* disable all legacy ISA stuff */
892 snd_als4000_set_addr(acard->iobase, 0, 0, 0, 0);
893
894 if ((err = snd_sbdsp_create(card,
895 iobase + ALS4K_IOB_10_ADLIB_ADDR0,
896 pci->irq,
897 /* internally registered as IRQF_SHARED in case of ALS4000 SB */
898 snd_als4000_interrupt,
899 -1,
900 -1,
901 SB_HW_ALS4000,
902 &chip)) < 0) {
903 goto out_err;
904 }
905 acard->chip = chip;
906
907 chip->pci = pci;
908 chip->alt_port = iobase;
909
910 snd_als4000_configure(chip);
911
912 strcpy(card->driver, "ALS4000");
913 strcpy(card->shortname, "Avance Logic ALS4000");
914 sprintf(card->longname, "%s at 0x%lx, irq %i",
915 card->shortname, chip->alt_port, chip->irq);
916
917 if ((err = snd_mpu401_uart_new( card, 0, MPU401_HW_ALS4000,
918 iobase + ALS4K_IOB_30_MIDI_DATA,
919 MPU401_INFO_INTEGRATED |
920 MPU401_INFO_IRQ_HOOK,
921 -1, &chip->rmidi)) < 0) {
922 dev_err(&pci->dev, "no MPU-401 device at 0x%lx?\n",
923 iobase + ALS4K_IOB_30_MIDI_DATA);
924 goto out_err;
925 }
926 /* FIXME: ALS4000 has interesting MPU401 configuration features
927 * at ALS4K_CR1A_MPU401_UART_MODE_CONTROL
928 * (pass-thru / UART switching, fast MIDI clock, etc.),
929 * however there doesn't seem to be an ALSA API for this...
930 * SPECS_PAGE: 21 */
931
932 if ((err = snd_als4000_pcm(chip, 0)) < 0) {
933 goto out_err;
934 }
935 if ((err = snd_sbmixer_new(chip)) < 0) {
936 goto out_err;
937 }
938
939 if (snd_opl3_create(card,
940 iobase + ALS4K_IOB_10_ADLIB_ADDR0,
941 iobase + ALS4K_IOB_12_ADLIB_ADDR2,
942 OPL3_HW_AUTO, 1, &opl3) < 0) {
943 dev_err(&pci->dev, "no OPL device at 0x%lx-0x%lx?\n",
944 iobase + ALS4K_IOB_10_ADLIB_ADDR0,
945 iobase + ALS4K_IOB_12_ADLIB_ADDR2);
946 } else {
947 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
948 goto out_err;
949 }
950 }
951
952 snd_als4000_create_gameport(acard, dev);
953
954 if ((err = snd_card_register(card)) < 0) {
955 goto out_err;
956 }
957 pci_set_drvdata(pci, card);
958 dev++;
959 err = 0;
960 goto out;
961
962out_err:
963 snd_card_free(card);
964
965out:
966 return err;
967}
968
969static void snd_card_als4000_remove(struct pci_dev *pci)
970{
971 snd_card_free(pci_get_drvdata(pci));
972}
973
974#ifdef CONFIG_PM_SLEEP
975static int snd_als4000_suspend(struct device *dev)
976{
977 struct snd_card *card = dev_get_drvdata(dev);
978 struct snd_card_als4000 *acard = card->private_data;
979 struct snd_sb *chip = acard->chip;
980
981 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
982
983 snd_sbmixer_suspend(chip);
984 return 0;
985}
986
987static int snd_als4000_resume(struct device *dev)
988{
989 struct snd_card *card = dev_get_drvdata(dev);
990 struct snd_card_als4000 *acard = card->private_data;
991 struct snd_sb *chip = acard->chip;
992
993 snd_als4000_configure(chip);
994 snd_sbdsp_reset(chip);
995 snd_sbmixer_resume(chip);
996
997#ifdef SUPPORT_JOYSTICK
998 if (acard->gameport)
999 snd_als4000_set_addr(acard->iobase, 0, 0, 0, 1);
1000#endif
1001
1002 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1003 return 0;
1004}
1005
1006static SIMPLE_DEV_PM_OPS(snd_als4000_pm, snd_als4000_suspend, snd_als4000_resume);
1007#define SND_ALS4000_PM_OPS &snd_als4000_pm
1008#else
1009#define SND_ALS4000_PM_OPS NULL
1010#endif /* CONFIG_PM_SLEEP */
1011
1012static struct pci_driver als4000_driver = {
1013 .name = KBUILD_MODNAME,
1014 .id_table = snd_als4000_ids,
1015 .probe = snd_card_als4000_probe,
1016 .remove = snd_card_als4000_remove,
1017 .driver = {
1018 .pm = SND_ALS4000_PM_OPS,
1019 },
1020};
1021
1022module_pci_driver(als4000_driver);
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * card-als4000.c - driver for Avance Logic ALS4000 based soundcards.
4 * Copyright (C) 2000 by Bart Hartgers <bart@etpmod.phys.tue.nl>,
5 * Jaroslav Kysela <perex@perex.cz>
6 * Copyright (C) 2002, 2008 by Andreas Mohr <hw7oshyuv3001@sneakemail.com>
7 *
8 * Framework borrowed from Massimo Piccioni's card-als100.c.
9 *
10 * NOTES
11 *
12 * Since Avance does not provide any meaningful documentation, and I
13 * bought an ALS4000 based soundcard, I was forced to base this driver
14 * on reverse engineering.
15 *
16 * Note: this is no longer true (thank you!):
17 * pretty verbose chip docu (ALS4000a.PDF) can be found on the ALSA web site.
18 * Page numbers stated anywhere below with the "SPECS_PAGE:" tag
19 * refer to: ALS4000a.PDF specs Ver 1.0, May 28th, 1998.
20 *
21 * The ALS4000 seems to be the PCI-cousin of the ALS100. It contains an
22 * ALS100-like SB DSP/mixer, an OPL3 synth, a MPU401 and a gameport
23 * interface. These subsystems can be mapped into ISA io-port space,
24 * using the PCI-interface. In addition, the PCI-bit provides DMA and IRQ
25 * services to the subsystems.
26 *
27 * While ALS4000 is very similar to a SoundBlaster, the differences in
28 * DMA and capturing require more changes to the SoundBlaster than
29 * desirable, so I made this separate driver.
30 *
31 * The ALS4000 can do real full duplex playback/capture.
32 *
33 * FMDAC:
34 * - 0x4f -> port 0x14
35 * - port 0x15 |= 1
36 *
37 * Enable/disable 3D sound:
38 * - 0x50 -> port 0x14
39 * - change bit 6 (0x40) of port 0x15
40 *
41 * Set QSound:
42 * - 0xdb -> port 0x14
43 * - set port 0x15:
44 * 0x3e (mode 3), 0x3c (mode 2), 0x3a (mode 1), 0x38 (mode 0)
45 *
46 * Set KSound:
47 * - value -> some port 0x0c0d
48 *
49 * ToDo:
50 * - by default, don't enable legacy game and use PCI game I/O
51 * - power management? (card can do voice wakeup according to datasheet!!)
52 */
53
54#include <linux/io.h>
55#include <linux/init.h>
56#include <linux/pci.h>
57#include <linux/gameport.h>
58#include <linux/module.h>
59#include <linux/dma-mapping.h>
60#include <sound/core.h>
61#include <sound/pcm.h>
62#include <sound/rawmidi.h>
63#include <sound/mpu401.h>
64#include <sound/opl3.h>
65#include <sound/sb.h>
66#include <sound/initval.h>
67
68MODULE_AUTHOR("Bart Hartgers <bart@etpmod.phys.tue.nl>, Andreas Mohr");
69MODULE_DESCRIPTION("Avance Logic ALS4000");
70MODULE_LICENSE("GPL");
71
72#if IS_REACHABLE(CONFIG_GAMEPORT)
73#define SUPPORT_JOYSTICK 1
74#endif
75
76static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
77static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
78static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
79#ifdef SUPPORT_JOYSTICK
80static int joystick_port[SNDRV_CARDS];
81#endif
82
83module_param_array(index, int, NULL, 0444);
84MODULE_PARM_DESC(index, "Index value for ALS4000 soundcard.");
85module_param_array(id, charp, NULL, 0444);
86MODULE_PARM_DESC(id, "ID string for ALS4000 soundcard.");
87module_param_array(enable, bool, NULL, 0444);
88MODULE_PARM_DESC(enable, "Enable ALS4000 soundcard.");
89#ifdef SUPPORT_JOYSTICK
90module_param_hw_array(joystick_port, int, ioport, NULL, 0444);
91MODULE_PARM_DESC(joystick_port, "Joystick port address for ALS4000 soundcard. (0 = disabled)");
92#endif
93
94struct snd_card_als4000 {
95 /* most frequent access first */
96 unsigned long iobase;
97 struct pci_dev *pci;
98 struct snd_sb *chip;
99#ifdef SUPPORT_JOYSTICK
100 struct gameport *gameport;
101#endif
102};
103
104static const struct pci_device_id snd_als4000_ids[] = {
105 { 0x4005, 0x4000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* ALS4000 */
106 { 0, }
107};
108
109MODULE_DEVICE_TABLE(pci, snd_als4000_ids);
110
111enum als4k_iobase_t {
112 /* IOx: B == Byte, W = Word, D = DWord; SPECS_PAGE: 37 */
113 ALS4K_IOD_00_AC97_ACCESS = 0x00,
114 ALS4K_IOW_04_AC97_READ = 0x04,
115 ALS4K_IOB_06_AC97_STATUS = 0x06,
116 ALS4K_IOB_07_IRQSTATUS = 0x07,
117 ALS4K_IOD_08_GCR_DATA = 0x08,
118 ALS4K_IOB_0C_GCR_INDEX = 0x0c,
119 ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU = 0x0e,
120 ALS4K_IOB_10_ADLIB_ADDR0 = 0x10,
121 ALS4K_IOB_11_ADLIB_ADDR1 = 0x11,
122 ALS4K_IOB_12_ADLIB_ADDR2 = 0x12,
123 ALS4K_IOB_13_ADLIB_ADDR3 = 0x13,
124 ALS4K_IOB_14_MIXER_INDEX = 0x14,
125 ALS4K_IOB_15_MIXER_DATA = 0x15,
126 ALS4K_IOB_16_ESP_RESET = 0x16,
127 ALS4K_IOB_16_ACK_FOR_CR1E = 0x16, /* 2nd function */
128 ALS4K_IOB_18_OPL_ADDR0 = 0x18,
129 ALS4K_IOB_19_OPL_ADDR1 = 0x19,
130 ALS4K_IOB_1A_ESP_RD_DATA = 0x1a,
131 ALS4K_IOB_1C_ESP_CMD_DATA = 0x1c,
132 ALS4K_IOB_1C_ESP_WR_STATUS = 0x1c, /* 2nd function */
133 ALS4K_IOB_1E_ESP_RD_STATUS8 = 0x1e,
134 ALS4K_IOB_1F_ESP_RD_STATUS16 = 0x1f,
135 ALS4K_IOB_20_ESP_GAMEPORT_200 = 0x20,
136 ALS4K_IOB_21_ESP_GAMEPORT_201 = 0x21,
137 ALS4K_IOB_30_MIDI_DATA = 0x30,
138 ALS4K_IOB_31_MIDI_STATUS = 0x31,
139 ALS4K_IOB_31_MIDI_COMMAND = 0x31, /* 2nd function */
140};
141
142enum als4k_iobase_0e_t {
143 ALS4K_IOB_0E_MPU_IRQ = 0x10,
144 ALS4K_IOB_0E_CR1E_IRQ = 0x40,
145 ALS4K_IOB_0E_SB_DMA_IRQ = 0x80,
146};
147
148enum als4k_gcr_t { /* all registers 32bit wide; SPECS_PAGE: 38 to 42 */
149 ALS4K_GCR8C_MISC_CTRL = 0x8c,
150 ALS4K_GCR90_TEST_MODE_REG = 0x90,
151 ALS4K_GCR91_DMA0_ADDR = 0x91,
152 ALS4K_GCR92_DMA0_MODE_COUNT = 0x92,
153 ALS4K_GCR93_DMA1_ADDR = 0x93,
154 ALS4K_GCR94_DMA1_MODE_COUNT = 0x94,
155 ALS4K_GCR95_DMA3_ADDR = 0x95,
156 ALS4K_GCR96_DMA3_MODE_COUNT = 0x96,
157 ALS4K_GCR99_DMA_EMULATION_CTRL = 0x99,
158 ALS4K_GCRA0_FIFO1_CURRENT_ADDR = 0xa0,
159 ALS4K_GCRA1_FIFO1_STATUS_BYTECOUNT = 0xa1,
160 ALS4K_GCRA2_FIFO2_PCIADDR = 0xa2,
161 ALS4K_GCRA3_FIFO2_COUNT = 0xa3,
162 ALS4K_GCRA4_FIFO2_CURRENT_ADDR = 0xa4,
163 ALS4K_GCRA5_FIFO1_STATUS_BYTECOUNT = 0xa5,
164 ALS4K_GCRA6_PM_CTRL = 0xa6,
165 ALS4K_GCRA7_PCI_ACCESS_STORAGE = 0xa7,
166 ALS4K_GCRA8_LEGACY_CFG1 = 0xa8,
167 ALS4K_GCRA9_LEGACY_CFG2 = 0xa9,
168 ALS4K_GCRFF_DUMMY_SCRATCH = 0xff,
169};
170
171enum als4k_gcr8c_t {
172 ALS4K_GCR8C_IRQ_MASK_CTRL_ENABLE = 0x8000,
173 ALS4K_GCR8C_CHIP_REV_MASK = 0xf0000
174};
175
176static inline void snd_als4k_iobase_writeb(unsigned long iobase,
177 enum als4k_iobase_t reg,
178 u8 val)
179{
180 outb(val, iobase + reg);
181}
182
183static inline void snd_als4k_iobase_writel(unsigned long iobase,
184 enum als4k_iobase_t reg,
185 u32 val)
186{
187 outl(val, iobase + reg);
188}
189
190static inline u8 snd_als4k_iobase_readb(unsigned long iobase,
191 enum als4k_iobase_t reg)
192{
193 return inb(iobase + reg);
194}
195
196static inline u32 snd_als4k_iobase_readl(unsigned long iobase,
197 enum als4k_iobase_t reg)
198{
199 return inl(iobase + reg);
200}
201
202static inline void snd_als4k_gcr_write_addr(unsigned long iobase,
203 enum als4k_gcr_t reg,
204 u32 val)
205{
206 snd_als4k_iobase_writeb(iobase, ALS4K_IOB_0C_GCR_INDEX, reg);
207 snd_als4k_iobase_writel(iobase, ALS4K_IOD_08_GCR_DATA, val);
208}
209
210static inline void snd_als4k_gcr_write(struct snd_sb *sb,
211 enum als4k_gcr_t reg,
212 u32 val)
213{
214 snd_als4k_gcr_write_addr(sb->alt_port, reg, val);
215}
216
217static inline u32 snd_als4k_gcr_read_addr(unsigned long iobase,
218 enum als4k_gcr_t reg)
219{
220 /* SPECS_PAGE: 37/38 */
221 snd_als4k_iobase_writeb(iobase, ALS4K_IOB_0C_GCR_INDEX, reg);
222 return snd_als4k_iobase_readl(iobase, ALS4K_IOD_08_GCR_DATA);
223}
224
225static inline u32 snd_als4k_gcr_read(struct snd_sb *sb, enum als4k_gcr_t reg)
226{
227 return snd_als4k_gcr_read_addr(sb->alt_port, reg);
228}
229
230enum als4k_cr_t { /* all registers 8bit wide; SPECS_PAGE: 20 to 23 */
231 ALS4K_CR0_SB_CONFIG = 0x00,
232 ALS4K_CR2_MISC_CONTROL = 0x02,
233 ALS4K_CR3_CONFIGURATION = 0x03,
234 ALS4K_CR17_FIFO_STATUS = 0x17,
235 ALS4K_CR18_ESP_MAJOR_VERSION = 0x18,
236 ALS4K_CR19_ESP_MINOR_VERSION = 0x19,
237 ALS4K_CR1A_MPU401_UART_MODE_CONTROL = 0x1a,
238 ALS4K_CR1C_FIFO2_BLOCK_LENGTH_LO = 0x1c,
239 ALS4K_CR1D_FIFO2_BLOCK_LENGTH_HI = 0x1d,
240 ALS4K_CR1E_FIFO2_CONTROL = 0x1e, /* secondary PCM FIFO (recording) */
241 ALS4K_CR3A_MISC_CONTROL = 0x3a,
242 ALS4K_CR3B_CRC32_BYTE0 = 0x3b, /* for testing, activate via CR3A */
243 ALS4K_CR3C_CRC32_BYTE1 = 0x3c,
244 ALS4K_CR3D_CRC32_BYTE2 = 0x3d,
245 ALS4K_CR3E_CRC32_BYTE3 = 0x3e,
246};
247
248enum als4k_cr0_t {
249 ALS4K_CR0_DMA_CONTIN_MODE_CTRL = 0x02, /* IRQ/FIFO controlled for 0/1 */
250 ALS4K_CR0_DMA_90H_MODE_CTRL = 0x04, /* IRQ/FIFO controlled for 0/1 */
251 ALS4K_CR0_MX80_81_REG_WRITE_ENABLE = 0x80,
252};
253
254static inline void snd_als4_cr_write(struct snd_sb *chip,
255 enum als4k_cr_t reg,
256 u8 data)
257{
258 /* Control Register is reg | 0xc0 (bit 7, 6 set) on sbmixer_index
259 * NOTE: assumes chip->mixer_lock to be locked externally already!
260 * SPECS_PAGE: 6 */
261 snd_sbmixer_write(chip, reg | 0xc0, data);
262}
263
264static inline u8 snd_als4_cr_read(struct snd_sb *chip,
265 enum als4k_cr_t reg)
266{
267 /* NOTE: assumes chip->mixer_lock to be locked externally already! */
268 return snd_sbmixer_read(chip, reg | 0xc0);
269}
270
271
272
273static void snd_als4000_set_rate(struct snd_sb *chip, unsigned int rate)
274{
275 if (!(chip->mode & SB_RATE_LOCK)) {
276 snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_OUT);
277 snd_sbdsp_command(chip, rate>>8);
278 snd_sbdsp_command(chip, rate);
279 }
280}
281
282static inline void snd_als4000_set_capture_dma(struct snd_sb *chip,
283 dma_addr_t addr, unsigned size)
284{
285 /* SPECS_PAGE: 40 */
286 snd_als4k_gcr_write(chip, ALS4K_GCRA2_FIFO2_PCIADDR, addr);
287 snd_als4k_gcr_write(chip, ALS4K_GCRA3_FIFO2_COUNT, (size-1));
288}
289
290static inline void snd_als4000_set_playback_dma(struct snd_sb *chip,
291 dma_addr_t addr,
292 unsigned size)
293{
294 /* SPECS_PAGE: 38 */
295 snd_als4k_gcr_write(chip, ALS4K_GCR91_DMA0_ADDR, addr);
296 snd_als4k_gcr_write(chip, ALS4K_GCR92_DMA0_MODE_COUNT,
297 (size-1)|0x180000);
298}
299
300#define ALS4000_FORMAT_SIGNED (1<<0)
301#define ALS4000_FORMAT_16BIT (1<<1)
302#define ALS4000_FORMAT_STEREO (1<<2)
303
304static int snd_als4000_get_format(struct snd_pcm_runtime *runtime)
305{
306 int result;
307
308 result = 0;
309 if (snd_pcm_format_signed(runtime->format))
310 result |= ALS4000_FORMAT_SIGNED;
311 if (snd_pcm_format_physical_width(runtime->format) == 16)
312 result |= ALS4000_FORMAT_16BIT;
313 if (runtime->channels > 1)
314 result |= ALS4000_FORMAT_STEREO;
315 return result;
316}
317
318/* structure for setting up playback */
319static const struct {
320 unsigned char dsp_cmd, dma_on, dma_off, format;
321} playback_cmd_vals[]={
322/* ALS4000_FORMAT_U8_MONO */
323{ SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_UNS_MONO },
324/* ALS4000_FORMAT_S8_MONO */
325{ SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_SIGN_MONO },
326/* ALS4000_FORMAT_U16L_MONO */
327{ SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_UNS_MONO },
328/* ALS4000_FORMAT_S16L_MONO */
329{ SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_SIGN_MONO },
330/* ALS4000_FORMAT_U8_STEREO */
331{ SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_UNS_STEREO },
332/* ALS4000_FORMAT_S8_STEREO */
333{ SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_SIGN_STEREO },
334/* ALS4000_FORMAT_U16L_STEREO */
335{ SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_UNS_STEREO },
336/* ALS4000_FORMAT_S16L_STEREO */
337{ SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_SIGN_STEREO },
338};
339#define playback_cmd(chip) (playback_cmd_vals[(chip)->playback_format])
340
341/* structure for setting up capture */
342enum { CMD_WIDTH8=0x04, CMD_SIGNED=0x10, CMD_MONO=0x80, CMD_STEREO=0xA0 };
343static const unsigned char capture_cmd_vals[]=
344{
345CMD_WIDTH8|CMD_MONO, /* ALS4000_FORMAT_U8_MONO */
346CMD_WIDTH8|CMD_SIGNED|CMD_MONO, /* ALS4000_FORMAT_S8_MONO */
347CMD_MONO, /* ALS4000_FORMAT_U16L_MONO */
348CMD_SIGNED|CMD_MONO, /* ALS4000_FORMAT_S16L_MONO */
349CMD_WIDTH8|CMD_STEREO, /* ALS4000_FORMAT_U8_STEREO */
350CMD_WIDTH8|CMD_SIGNED|CMD_STEREO, /* ALS4000_FORMAT_S8_STEREO */
351CMD_STEREO, /* ALS4000_FORMAT_U16L_STEREO */
352CMD_SIGNED|CMD_STEREO, /* ALS4000_FORMAT_S16L_STEREO */
353};
354#define capture_cmd(chip) (capture_cmd_vals[(chip)->capture_format])
355
356static int snd_als4000_capture_prepare(struct snd_pcm_substream *substream)
357{
358 struct snd_sb *chip = snd_pcm_substream_chip(substream);
359 struct snd_pcm_runtime *runtime = substream->runtime;
360 unsigned long size;
361 unsigned count;
362
363 chip->capture_format = snd_als4000_get_format(runtime);
364
365 size = snd_pcm_lib_buffer_bytes(substream);
366 count = snd_pcm_lib_period_bytes(substream);
367
368 if (chip->capture_format & ALS4000_FORMAT_16BIT)
369 count >>= 1;
370 count--;
371
372 spin_lock_irq(&chip->reg_lock);
373 snd_als4000_set_rate(chip, runtime->rate);
374 snd_als4000_set_capture_dma(chip, runtime->dma_addr, size);
375 spin_unlock_irq(&chip->reg_lock);
376 spin_lock_irq(&chip->mixer_lock);
377 snd_als4_cr_write(chip, ALS4K_CR1C_FIFO2_BLOCK_LENGTH_LO, count & 0xff);
378 snd_als4_cr_write(chip, ALS4K_CR1D_FIFO2_BLOCK_LENGTH_HI, count >> 8);
379 spin_unlock_irq(&chip->mixer_lock);
380 return 0;
381}
382
383static int snd_als4000_playback_prepare(struct snd_pcm_substream *substream)
384{
385 struct snd_sb *chip = snd_pcm_substream_chip(substream);
386 struct snd_pcm_runtime *runtime = substream->runtime;
387 unsigned long size;
388 unsigned count;
389
390 chip->playback_format = snd_als4000_get_format(runtime);
391
392 size = snd_pcm_lib_buffer_bytes(substream);
393 count = snd_pcm_lib_period_bytes(substream);
394
395 if (chip->playback_format & ALS4000_FORMAT_16BIT)
396 count >>= 1;
397 count--;
398
399 /* FIXME: from second playback on, there's a lot more clicks and pops
400 * involved here than on first playback. Fiddling with
401 * tons of different settings didn't help (DMA, speaker on/off,
402 * reordering, ...). Something seems to get enabled on playback
403 * that I haven't found out how to disable again, which then causes
404 * the switching pops to reach the speakers the next time here. */
405 spin_lock_irq(&chip->reg_lock);
406 snd_als4000_set_rate(chip, runtime->rate);
407 snd_als4000_set_playback_dma(chip, runtime->dma_addr, size);
408
409 /* SPEAKER_ON not needed, since dma_on seems to also enable speaker */
410 /* snd_sbdsp_command(chip, SB_DSP_SPEAKER_ON); */
411 snd_sbdsp_command(chip, playback_cmd(chip).dsp_cmd);
412 snd_sbdsp_command(chip, playback_cmd(chip).format);
413 snd_sbdsp_command(chip, count & 0xff);
414 snd_sbdsp_command(chip, count >> 8);
415 snd_sbdsp_command(chip, playback_cmd(chip).dma_off);
416 spin_unlock_irq(&chip->reg_lock);
417
418 return 0;
419}
420
421static int snd_als4000_capture_trigger(struct snd_pcm_substream *substream, int cmd)
422{
423 struct snd_sb *chip = snd_pcm_substream_chip(substream);
424 int result = 0;
425
426 /* FIXME race condition in here!!!
427 chip->mode non-atomic update gets consistently protected
428 by reg_lock always, _except_ for this place!!
429 Probably need to take reg_lock as outer (or inner??) lock, too.
430 (or serialize both lock operations? probably not, though... - racy?)
431 */
432 spin_lock(&chip->mixer_lock);
433 switch (cmd) {
434 case SNDRV_PCM_TRIGGER_START:
435 case SNDRV_PCM_TRIGGER_RESUME:
436 chip->mode |= SB_RATE_LOCK_CAPTURE;
437 snd_als4_cr_write(chip, ALS4K_CR1E_FIFO2_CONTROL,
438 capture_cmd(chip));
439 break;
440 case SNDRV_PCM_TRIGGER_STOP:
441 case SNDRV_PCM_TRIGGER_SUSPEND:
442 chip->mode &= ~SB_RATE_LOCK_CAPTURE;
443 snd_als4_cr_write(chip, ALS4K_CR1E_FIFO2_CONTROL,
444 capture_cmd(chip));
445 break;
446 default:
447 result = -EINVAL;
448 break;
449 }
450 spin_unlock(&chip->mixer_lock);
451 return result;
452}
453
454static int snd_als4000_playback_trigger(struct snd_pcm_substream *substream, int cmd)
455{
456 struct snd_sb *chip = snd_pcm_substream_chip(substream);
457 int result = 0;
458
459 spin_lock(&chip->reg_lock);
460 switch (cmd) {
461 case SNDRV_PCM_TRIGGER_START:
462 case SNDRV_PCM_TRIGGER_RESUME:
463 chip->mode |= SB_RATE_LOCK_PLAYBACK;
464 snd_sbdsp_command(chip, playback_cmd(chip).dma_on);
465 break;
466 case SNDRV_PCM_TRIGGER_STOP:
467 case SNDRV_PCM_TRIGGER_SUSPEND:
468 snd_sbdsp_command(chip, playback_cmd(chip).dma_off);
469 chip->mode &= ~SB_RATE_LOCK_PLAYBACK;
470 break;
471 default:
472 result = -EINVAL;
473 break;
474 }
475 spin_unlock(&chip->reg_lock);
476 return result;
477}
478
479static snd_pcm_uframes_t snd_als4000_capture_pointer(struct snd_pcm_substream *substream)
480{
481 struct snd_sb *chip = snd_pcm_substream_chip(substream);
482 unsigned int result;
483
484 spin_lock(&chip->reg_lock);
485 result = snd_als4k_gcr_read(chip, ALS4K_GCRA4_FIFO2_CURRENT_ADDR);
486 spin_unlock(&chip->reg_lock);
487 result &= 0xffff;
488 return bytes_to_frames( substream->runtime, result );
489}
490
491static snd_pcm_uframes_t snd_als4000_playback_pointer(struct snd_pcm_substream *substream)
492{
493 struct snd_sb *chip = snd_pcm_substream_chip(substream);
494 unsigned result;
495
496 spin_lock(&chip->reg_lock);
497 result = snd_als4k_gcr_read(chip, ALS4K_GCRA0_FIFO1_CURRENT_ADDR);
498 spin_unlock(&chip->reg_lock);
499 result &= 0xffff;
500 return bytes_to_frames( substream->runtime, result );
501}
502
503/* FIXME: this IRQ routine doesn't really support IRQ sharing (we always
504 * return IRQ_HANDLED no matter whether we actually had an IRQ flag or not).
505 * ALS4000a.PDF writes that while ACKing IRQ in PCI block will *not* ACK
506 * the IRQ in the SB core, ACKing IRQ in SB block *will* ACK the PCI IRQ
507 * register (alt_port + ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU). Probably something
508 * could be optimized here to query/write one register only...
509 * And even if both registers need to be queried, then there's still the
510 * question of whether it's actually correct to ACK PCI IRQ before reading
511 * SB IRQ like we do now, since ALS4000a.PDF mentions that PCI IRQ will *clear*
512 * SB IRQ status.
513 * (hmm, SPECS_PAGE: 38 mentions it the other way around!)
514 * And do we *really* need the lock here for *reading* SB_DSP4_IRQSTATUS??
515 * */
516static irqreturn_t snd_als4000_interrupt(int irq, void *dev_id)
517{
518 struct snd_sb *chip = dev_id;
519 unsigned pci_irqstatus;
520 unsigned sb_irqstatus;
521
522 /* find out which bit of the ALS4000 PCI block produced the interrupt,
523 SPECS_PAGE: 38, 5 */
524 pci_irqstatus = snd_als4k_iobase_readb(chip->alt_port,
525 ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU);
526 if ((pci_irqstatus & ALS4K_IOB_0E_SB_DMA_IRQ)
527 && (chip->playback_substream)) /* playback */
528 snd_pcm_period_elapsed(chip->playback_substream);
529 if ((pci_irqstatus & ALS4K_IOB_0E_CR1E_IRQ)
530 && (chip->capture_substream)) /* capturing */
531 snd_pcm_period_elapsed(chip->capture_substream);
532 if ((pci_irqstatus & ALS4K_IOB_0E_MPU_IRQ)
533 && (chip->rmidi)) /* MPU401 interrupt */
534 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
535 /* ACK the PCI block IRQ */
536 snd_als4k_iobase_writeb(chip->alt_port,
537 ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU, pci_irqstatus);
538
539 spin_lock(&chip->mixer_lock);
540 /* SPECS_PAGE: 20 */
541 sb_irqstatus = snd_sbmixer_read(chip, SB_DSP4_IRQSTATUS);
542 spin_unlock(&chip->mixer_lock);
543
544 if (sb_irqstatus & SB_IRQTYPE_8BIT)
545 snd_sb_ack_8bit(chip);
546 if (sb_irqstatus & SB_IRQTYPE_16BIT)
547 snd_sb_ack_16bit(chip);
548 if (sb_irqstatus & SB_IRQTYPE_MPUIN)
549 inb(chip->mpu_port);
550 if (sb_irqstatus & ALS4K_IRQTYPE_CR1E_DMA)
551 snd_als4k_iobase_readb(chip->alt_port,
552 ALS4K_IOB_16_ACK_FOR_CR1E);
553
554 /* dev_dbg(chip->card->dev, "als4000: irq 0x%04x 0x%04x\n",
555 pci_irqstatus, sb_irqstatus); */
556
557 /* only ack the things we actually handled above */
558 return IRQ_RETVAL(
559 (pci_irqstatus & (ALS4K_IOB_0E_SB_DMA_IRQ|ALS4K_IOB_0E_CR1E_IRQ|
560 ALS4K_IOB_0E_MPU_IRQ))
561 || (sb_irqstatus & (SB_IRQTYPE_8BIT|SB_IRQTYPE_16BIT|
562 SB_IRQTYPE_MPUIN|ALS4K_IRQTYPE_CR1E_DMA))
563 );
564}
565
566/*****************************************************************/
567
568static const struct snd_pcm_hardware snd_als4000_playback =
569{
570 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
571 SNDRV_PCM_INFO_MMAP_VALID),
572 .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
573 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE, /* formats */
574 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
575 .rate_min = 4000,
576 .rate_max = 48000,
577 .channels_min = 1,
578 .channels_max = 2,
579 .buffer_bytes_max = 65536,
580 .period_bytes_min = 64,
581 .period_bytes_max = 65536,
582 .periods_min = 1,
583 .periods_max = 1024,
584 .fifo_size = 0
585};
586
587static const struct snd_pcm_hardware snd_als4000_capture =
588{
589 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
590 SNDRV_PCM_INFO_MMAP_VALID),
591 .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
592 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE, /* formats */
593 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
594 .rate_min = 4000,
595 .rate_max = 48000,
596 .channels_min = 1,
597 .channels_max = 2,
598 .buffer_bytes_max = 65536,
599 .period_bytes_min = 64,
600 .period_bytes_max = 65536,
601 .periods_min = 1,
602 .periods_max = 1024,
603 .fifo_size = 0
604};
605
606/*****************************************************************/
607
608static int snd_als4000_playback_open(struct snd_pcm_substream *substream)
609{
610 struct snd_sb *chip = snd_pcm_substream_chip(substream);
611 struct snd_pcm_runtime *runtime = substream->runtime;
612
613 chip->playback_substream = substream;
614 runtime->hw = snd_als4000_playback;
615 return 0;
616}
617
618static int snd_als4000_playback_close(struct snd_pcm_substream *substream)
619{
620 struct snd_sb *chip = snd_pcm_substream_chip(substream);
621
622 chip->playback_substream = NULL;
623 return 0;
624}
625
626static int snd_als4000_capture_open(struct snd_pcm_substream *substream)
627{
628 struct snd_sb *chip = snd_pcm_substream_chip(substream);
629 struct snd_pcm_runtime *runtime = substream->runtime;
630
631 chip->capture_substream = substream;
632 runtime->hw = snd_als4000_capture;
633 return 0;
634}
635
636static int snd_als4000_capture_close(struct snd_pcm_substream *substream)
637{
638 struct snd_sb *chip = snd_pcm_substream_chip(substream);
639
640 chip->capture_substream = NULL;
641 return 0;
642}
643
644/******************************************************************/
645
646static const struct snd_pcm_ops snd_als4000_playback_ops = {
647 .open = snd_als4000_playback_open,
648 .close = snd_als4000_playback_close,
649 .prepare = snd_als4000_playback_prepare,
650 .trigger = snd_als4000_playback_trigger,
651 .pointer = snd_als4000_playback_pointer
652};
653
654static const struct snd_pcm_ops snd_als4000_capture_ops = {
655 .open = snd_als4000_capture_open,
656 .close = snd_als4000_capture_close,
657 .prepare = snd_als4000_capture_prepare,
658 .trigger = snd_als4000_capture_trigger,
659 .pointer = snd_als4000_capture_pointer
660};
661
662static int snd_als4000_pcm(struct snd_sb *chip, int device)
663{
664 struct snd_pcm *pcm;
665 int err;
666
667 err = snd_pcm_new(chip->card, "ALS4000 DSP", device, 1, 1, &pcm);
668 if (err < 0)
669 return err;
670 pcm->private_data = chip;
671 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
672 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_als4000_playback_ops);
673 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_als4000_capture_ops);
674
675 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
676 &chip->pci->dev, 64*1024, 64*1024);
677
678 chip->pcm = pcm;
679
680 return 0;
681}
682
683/******************************************************************/
684
685static void snd_als4000_set_addr(unsigned long iobase,
686 unsigned int sb_io,
687 unsigned int mpu_io,
688 unsigned int opl_io,
689 unsigned int game_io)
690{
691 u32 cfg1 = 0;
692 u32 cfg2 = 0;
693
694 if (mpu_io > 0)
695 cfg2 |= (mpu_io | 1) << 16;
696 if (sb_io > 0)
697 cfg2 |= (sb_io | 1);
698 if (game_io > 0)
699 cfg1 |= (game_io | 1) << 16;
700 if (opl_io > 0)
701 cfg1 |= (opl_io | 1);
702 snd_als4k_gcr_write_addr(iobase, ALS4K_GCRA8_LEGACY_CFG1, cfg1);
703 snd_als4k_gcr_write_addr(iobase, ALS4K_GCRA9_LEGACY_CFG2, cfg2);
704}
705
706static void snd_als4000_configure(struct snd_sb *chip)
707{
708 u8 tmp;
709 int i;
710
711 /* do some more configuration */
712 spin_lock_irq(&chip->mixer_lock);
713 tmp = snd_als4_cr_read(chip, ALS4K_CR0_SB_CONFIG);
714 snd_als4_cr_write(chip, ALS4K_CR0_SB_CONFIG,
715 tmp|ALS4K_CR0_MX80_81_REG_WRITE_ENABLE);
716 /* always select DMA channel 0, since we do not actually use DMA
717 * SPECS_PAGE: 19/20 */
718 snd_sbmixer_write(chip, SB_DSP4_DMASETUP, SB_DMASETUP_DMA0);
719 snd_als4_cr_write(chip, ALS4K_CR0_SB_CONFIG,
720 tmp & ~ALS4K_CR0_MX80_81_REG_WRITE_ENABLE);
721 spin_unlock_irq(&chip->mixer_lock);
722
723 spin_lock_irq(&chip->reg_lock);
724 /* enable interrupts */
725 snd_als4k_gcr_write(chip, ALS4K_GCR8C_MISC_CTRL,
726 ALS4K_GCR8C_IRQ_MASK_CTRL_ENABLE);
727
728 /* SPECS_PAGE: 39 */
729 for (i = ALS4K_GCR91_DMA0_ADDR; i <= ALS4K_GCR96_DMA3_MODE_COUNT; ++i)
730 snd_als4k_gcr_write(chip, i, 0);
731 /* enable burst mode to prevent dropouts during high PCI bus usage */
732 snd_als4k_gcr_write(chip, ALS4K_GCR99_DMA_EMULATION_CTRL,
733 (snd_als4k_gcr_read(chip, ALS4K_GCR99_DMA_EMULATION_CTRL) & ~0x07) | 0x04);
734 spin_unlock_irq(&chip->reg_lock);
735}
736
737#ifdef SUPPORT_JOYSTICK
738static int snd_als4000_create_gameport(struct snd_card_als4000 *acard, int dev)
739{
740 struct gameport *gp;
741 struct resource *r;
742 int io_port;
743
744 if (joystick_port[dev] == 0)
745 return -ENODEV;
746
747 if (joystick_port[dev] == 1) { /* auto-detect */
748 for (io_port = 0x200; io_port <= 0x218; io_port += 8) {
749 r = devm_request_region(&acard->pci->dev, io_port, 8,
750 "ALS4000 gameport");
751 if (r)
752 break;
753 }
754 } else {
755 io_port = joystick_port[dev];
756 r = devm_request_region(&acard->pci->dev, io_port, 8,
757 "ALS4000 gameport");
758 }
759
760 if (!r) {
761 dev_warn(&acard->pci->dev, "cannot reserve joystick ports\n");
762 return -EBUSY;
763 }
764
765 acard->gameport = gp = gameport_allocate_port();
766 if (!gp) {
767 dev_err(&acard->pci->dev, "cannot allocate memory for gameport\n");
768 return -ENOMEM;
769 }
770
771 gameport_set_name(gp, "ALS4000 Gameport");
772 gameport_set_phys(gp, "pci%s/gameport0", pci_name(acard->pci));
773 gameport_set_dev_parent(gp, &acard->pci->dev);
774 gp->io = io_port;
775
776 /* Enable legacy joystick port */
777 snd_als4000_set_addr(acard->iobase, 0, 0, 0, 1);
778
779 gameport_register_port(acard->gameport);
780
781 return 0;
782}
783
784static void snd_als4000_free_gameport(struct snd_card_als4000 *acard)
785{
786 if (acard->gameport) {
787 gameport_unregister_port(acard->gameport);
788 acard->gameport = NULL;
789
790 /* disable joystick */
791 snd_als4000_set_addr(acard->iobase, 0, 0, 0, 0);
792 }
793}
794#else
795static inline int snd_als4000_create_gameport(struct snd_card_als4000 *acard, int dev) { return -ENOSYS; }
796static inline void snd_als4000_free_gameport(struct snd_card_als4000 *acard) { }
797#endif
798
799static void snd_card_als4000_free( struct snd_card *card )
800{
801 struct snd_card_als4000 *acard = card->private_data;
802
803 /* make sure that interrupts are disabled */
804 snd_als4k_gcr_write_addr(acard->iobase, ALS4K_GCR8C_MISC_CTRL, 0);
805 /* free resources */
806 snd_als4000_free_gameport(acard);
807}
808
809static int __snd_card_als4000_probe(struct pci_dev *pci,
810 const struct pci_device_id *pci_id)
811{
812 static int dev;
813 struct snd_card *card;
814 struct snd_card_als4000 *acard;
815 unsigned long iobase;
816 struct snd_sb *chip;
817 struct snd_opl3 *opl3;
818 unsigned short word;
819 int err;
820
821 if (dev >= SNDRV_CARDS)
822 return -ENODEV;
823 if (!enable[dev]) {
824 dev++;
825 return -ENOENT;
826 }
827
828 /* enable PCI device */
829 err = pcim_enable_device(pci);
830 if (err < 0)
831 return err;
832
833 /* check, if we can restrict PCI DMA transfers to 24 bits */
834 if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(24))) {
835 dev_err(&pci->dev, "architecture does not support 24bit PCI busmaster DMA\n");
836 return -ENXIO;
837 }
838
839 err = pci_request_regions(pci, "ALS4000");
840 if (err < 0)
841 return err;
842 iobase = pci_resource_start(pci, 0);
843
844 pci_read_config_word(pci, PCI_COMMAND, &word);
845 pci_write_config_word(pci, PCI_COMMAND, word | PCI_COMMAND_IO);
846 pci_set_master(pci);
847
848 err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
849 sizeof(*acard) /* private_data: acard */,
850 &card);
851 if (err < 0)
852 return err;
853
854 acard = card->private_data;
855 acard->pci = pci;
856 acard->iobase = iobase;
857 card->private_free = snd_card_als4000_free;
858
859 /* disable all legacy ISA stuff */
860 snd_als4000_set_addr(acard->iobase, 0, 0, 0, 0);
861
862 err = snd_sbdsp_create(card,
863 iobase + ALS4K_IOB_10_ADLIB_ADDR0,
864 pci->irq,
865 /* internally registered as IRQF_SHARED in case of ALS4000 SB */
866 snd_als4000_interrupt,
867 -1,
868 -1,
869 SB_HW_ALS4000,
870 &chip);
871 if (err < 0)
872 return err;
873 acard->chip = chip;
874
875 chip->pci = pci;
876 chip->alt_port = iobase;
877
878 snd_als4000_configure(chip);
879
880 strcpy(card->driver, "ALS4000");
881 strcpy(card->shortname, "Avance Logic ALS4000");
882 sprintf(card->longname, "%s at 0x%lx, irq %i",
883 card->shortname, chip->alt_port, chip->irq);
884
885 err = snd_mpu401_uart_new(card, 0, MPU401_HW_ALS4000,
886 iobase + ALS4K_IOB_30_MIDI_DATA,
887 MPU401_INFO_INTEGRATED |
888 MPU401_INFO_IRQ_HOOK,
889 -1, &chip->rmidi);
890 if (err < 0) {
891 dev_err(&pci->dev, "no MPU-401 device at 0x%lx?\n",
892 iobase + ALS4K_IOB_30_MIDI_DATA);
893 return err;
894 }
895 /* FIXME: ALS4000 has interesting MPU401 configuration features
896 * at ALS4K_CR1A_MPU401_UART_MODE_CONTROL
897 * (pass-thru / UART switching, fast MIDI clock, etc.),
898 * however there doesn't seem to be an ALSA API for this...
899 * SPECS_PAGE: 21 */
900
901 err = snd_als4000_pcm(chip, 0);
902 if (err < 0)
903 return err;
904
905 err = snd_sbmixer_new(chip);
906 if (err < 0)
907 return err;
908
909 if (snd_opl3_create(card,
910 iobase + ALS4K_IOB_10_ADLIB_ADDR0,
911 iobase + ALS4K_IOB_12_ADLIB_ADDR2,
912 OPL3_HW_AUTO, 1, &opl3) < 0) {
913 dev_err(&pci->dev, "no OPL device at 0x%lx-0x%lx?\n",
914 iobase + ALS4K_IOB_10_ADLIB_ADDR0,
915 iobase + ALS4K_IOB_12_ADLIB_ADDR2);
916 } else {
917 err = snd_opl3_hwdep_new(opl3, 0, 1, NULL);
918 if (err < 0)
919 return err;
920 }
921
922 snd_als4000_create_gameport(acard, dev);
923
924 err = snd_card_register(card);
925 if (err < 0)
926 return err;
927
928 pci_set_drvdata(pci, card);
929 dev++;
930 return 0;
931}
932
933static int snd_card_als4000_probe(struct pci_dev *pci,
934 const struct pci_device_id *pci_id)
935{
936 return snd_card_free_on_error(&pci->dev, __snd_card_als4000_probe(pci, pci_id));
937}
938
939static int snd_als4000_suspend(struct device *dev)
940{
941 struct snd_card *card = dev_get_drvdata(dev);
942 struct snd_card_als4000 *acard = card->private_data;
943 struct snd_sb *chip = acard->chip;
944
945 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
946
947 snd_sbmixer_suspend(chip);
948 return 0;
949}
950
951static int snd_als4000_resume(struct device *dev)
952{
953 struct snd_card *card = dev_get_drvdata(dev);
954 struct snd_card_als4000 *acard = card->private_data;
955 struct snd_sb *chip = acard->chip;
956
957 snd_als4000_configure(chip);
958 snd_sbdsp_reset(chip);
959 snd_sbmixer_resume(chip);
960
961#ifdef SUPPORT_JOYSTICK
962 if (acard->gameport)
963 snd_als4000_set_addr(acard->iobase, 0, 0, 0, 1);
964#endif
965
966 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
967 return 0;
968}
969
970static DEFINE_SIMPLE_DEV_PM_OPS(snd_als4000_pm, snd_als4000_suspend, snd_als4000_resume);
971
972static struct pci_driver als4000_driver = {
973 .name = KBUILD_MODNAME,
974 .id_table = snd_als4000_ids,
975 .probe = snd_card_als4000_probe,
976 .driver = {
977 .pm = &snd_als4000_pm,
978 },
979};
980
981module_pci_driver(als4000_driver);