1/* SPDX-License-Identifier: MIT */
 2/*
 3 * Copyright © 2022 Intel Corporation
 4 */
 5
 6#ifndef _XE_GUC_PC_H_
 7#define _XE_GUC_PC_H_
 8
 9#include <linux/types.h>
10
11struct xe_guc_pc;
12enum slpc_gucrc_mode;
13
14int xe_guc_pc_init(struct xe_guc_pc *pc);
15int xe_guc_pc_start(struct xe_guc_pc *pc);
16int xe_guc_pc_stop(struct xe_guc_pc *pc);
17int xe_guc_pc_gucrc_disable(struct xe_guc_pc *pc);
18int xe_guc_pc_override_gucrc_mode(struct xe_guc_pc *pc, enum slpc_gucrc_mode mode);
19int xe_guc_pc_unset_gucrc_mode(struct xe_guc_pc *pc);
20
21u32 xe_guc_pc_get_act_freq(struct xe_guc_pc *pc);
22int xe_guc_pc_get_cur_freq(struct xe_guc_pc *pc, u32 *freq);
23u32 xe_guc_pc_get_rp0_freq(struct xe_guc_pc *pc);
24u32 xe_guc_pc_get_rpe_freq(struct xe_guc_pc *pc);
25u32 xe_guc_pc_get_rpn_freq(struct xe_guc_pc *pc);
26int xe_guc_pc_get_min_freq(struct xe_guc_pc *pc, u32 *freq);
27int xe_guc_pc_set_min_freq(struct xe_guc_pc *pc, u32 freq);
28int xe_guc_pc_get_max_freq(struct xe_guc_pc *pc, u32 *freq);
29int xe_guc_pc_set_max_freq(struct xe_guc_pc *pc, u32 freq);
30
31enum xe_gt_idle_state xe_guc_pc_c_status(struct xe_guc_pc *pc);
32u64 xe_guc_pc_rc6_residency(struct xe_guc_pc *pc);
33u64 xe_guc_pc_mc6_residency(struct xe_guc_pc *pc);
34void xe_guc_pc_init_early(struct xe_guc_pc *pc);
35int xe_guc_pc_restore_stashed_freq(struct xe_guc_pc *pc);
36void xe_guc_pc_raise_unslice(struct xe_guc_pc *pc);
37
38#endif /* _XE_GUC_PC_H_ */