1/* SPDX-License-Identifier: GPL-2.0+ */
  2/*
  3 * rcar_du_drv.h  --  R-Car Display Unit DRM driver
  4 *
  5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
  6 *
  7 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
  8 */
  9
 10#ifndef __RCAR_DU_DRV_H__
 11#define __RCAR_DU_DRV_H__
 12
 13#include <linux/kernel.h>
 14#include <linux/wait.h>
 15
 16#include "rcar_du_crtc.h"
 17#include "rcar_du_group.h"
 18#include "rcar_du_vsp.h"
 19
 20struct clk;
 21struct device;
 22struct drm_device;
 23struct drm_property;
 24struct rcar_du_device;
 25struct rcar_du_encoder;
 26
 27#define RCAR_DU_FEATURE_CRTC_IRQ_CLOCK	BIT(0)	/* Per-CRTC IRQ and clock */
 28#define RCAR_DU_FEATURE_VSP1_SOURCE	BIT(1)	/* Has inputs from VSP1 */
 29#define RCAR_DU_FEATURE_INTERLACED	BIT(2)	/* HW supports interlaced */
 30#define RCAR_DU_FEATURE_TVM_SYNC	BIT(3)	/* Has TV switch/sync modes */
 31
 32#define RCAR_DU_QUIRK_ALIGN_128B	BIT(0)	/* Align pitches to 128 bytes */
 33
 34/*
 35 * struct rcar_du_output_routing - Output routing specification
 36 * @possible_crtcs: bitmask of possible CRTCs for the output
 37 * @port: device tree port number corresponding to this output route
 38 *
 39 * The DU has 5 possible outputs (DPAD0/1, LVDS0/1, TCON). Output routing data
 40 * specify the valid SoC outputs, which CRTCs can drive the output, and the type
 41 * of in-SoC encoder for the output.
 42 */
 43struct rcar_du_output_routing {
 44	unsigned int possible_crtcs;
 45	unsigned int port;
 46};
 47
 48/*
 49 * struct rcar_du_device_info - DU model-specific information
 50 * @gen: device generation (2 or 3)
 51 * @features: device features (RCAR_DU_FEATURE_*)
 52 * @quirks: device quirks (RCAR_DU_QUIRK_*)
 53 * @channels_mask: bit mask of available DU channels
 54 * @routes: array of CRTC to output routes, indexed by output (RCAR_DU_OUTPUT_*)
 55 * @num_lvds: number of internal LVDS encoders
 56 * @dpll_mask: bit mask of DU channels equipped with a DPLL
 57 * @lvds_clk_mask: bitmask of channels that can use the LVDS clock as dot clock
 58 */
 59struct rcar_du_device_info {
 60	unsigned int gen;
 61	unsigned int features;
 62	unsigned int quirks;
 63	unsigned int channels_mask;
 64	struct rcar_du_output_routing routes[RCAR_DU_OUTPUT_MAX];
 65	unsigned int num_lvds;
 66	unsigned int dpll_mask;
 67	unsigned int lvds_clk_mask;
 68};
 69
 70#define RCAR_DU_MAX_CRTCS		4
 71#define RCAR_DU_MAX_GROUPS		DIV_ROUND_UP(RCAR_DU_MAX_CRTCS, 2)
 72#define RCAR_DU_MAX_VSPS		4
 73
 74struct rcar_du_device {
 75	struct device *dev;
 76	const struct rcar_du_device_info *info;
 77
 78	void __iomem *mmio;
 79
 80	struct drm_device *ddev;
 81
 82	struct rcar_du_crtc crtcs[RCAR_DU_MAX_CRTCS];
 83	unsigned int num_crtcs;
 84
 85	struct rcar_du_encoder *encoders[RCAR_DU_OUTPUT_MAX];
 86
 87	struct rcar_du_group groups[RCAR_DU_MAX_GROUPS];
 88	struct rcar_du_vsp vsps[RCAR_DU_MAX_VSPS];
 89
 90	struct {
 91		struct drm_property *colorkey;
 92	} props;
 93
 94	unsigned int dpad0_source;
 95	unsigned int dpad1_source;
 96	unsigned int vspd1_sink;
 97};
 98
 99static inline bool rcar_du_has(struct rcar_du_device *rcdu,
100			       unsigned int feature)
101{
102	return rcdu->info->features & feature;
103}
104
105static inline bool rcar_du_needs(struct rcar_du_device *rcdu,
106				 unsigned int quirk)
107{
108	return rcdu->info->quirks & quirk;
109}
110
111static inline u32 rcar_du_read(struct rcar_du_device *rcdu, u32 reg)
112{
113	return ioread32(rcdu->mmio + reg);
114}
115
116static inline void rcar_du_write(struct rcar_du_device *rcdu, u32 reg, u32 data)
117{
118	iowrite32(data, rcdu->mmio + reg);
119}
120
121#endif /* __RCAR_DU_DRV_H__ */