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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (C) 2022 Marek Vasut <marex@denx.de>
4 *
5 * This code is based on drivers/gpu/drm/mxsfb/mxsfb*
6 */
7
8#include <linux/clk.h>
9#include <linux/dma-mapping.h>
10#include <linux/io.h>
11#include <linux/module.h>
12#include <linux/of.h>
13#include <linux/of_graph.h>
14#include <linux/platform_device.h>
15#include <linux/pm_runtime.h>
16
17#include <drm/drm_atomic_helper.h>
18#include <drm/drm_bridge.h>
19#include <drm/drm_client_setup.h>
20#include <drm/drm_drv.h>
21#include <drm/drm_encoder.h>
22#include <drm/drm_fbdev_dma.h>
23#include <drm/drm_gem_dma_helper.h>
24#include <drm/drm_gem_framebuffer_helper.h>
25#include <drm/drm_mode_config.h>
26#include <drm/drm_module.h>
27#include <drm/drm_of.h>
28#include <drm/drm_probe_helper.h>
29#include <drm/drm_vblank.h>
30
31#include "lcdif_drv.h"
32#include "lcdif_regs.h"
33
34static const struct drm_mode_config_funcs lcdif_mode_config_funcs = {
35 .fb_create = drm_gem_fb_create,
36 .atomic_check = drm_atomic_helper_check,
37 .atomic_commit = drm_atomic_helper_commit,
38};
39
40static const struct drm_mode_config_helper_funcs lcdif_mode_config_helpers = {
41 .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
42};
43
44static const struct drm_encoder_funcs lcdif_encoder_funcs = {
45 .destroy = drm_encoder_cleanup,
46};
47
48static int lcdif_attach_bridge(struct lcdif_drm_private *lcdif)
49{
50 struct device *dev = lcdif->drm->dev;
51 struct device_node *ep;
52 struct drm_bridge *bridge;
53 int ret;
54
55 for_each_endpoint_of_node(dev->of_node, ep) {
56 struct device_node *remote;
57 struct of_endpoint of_ep;
58 struct drm_encoder *encoder;
59
60 remote = of_graph_get_remote_port_parent(ep);
61 if (!of_device_is_available(remote)) {
62 of_node_put(remote);
63 continue;
64 }
65 of_node_put(remote);
66
67 ret = of_graph_parse_endpoint(ep, &of_ep);
68 if (ret < 0) {
69 dev_err(dev, "Failed to parse endpoint %pOF\n", ep);
70 of_node_put(ep);
71 return ret;
72 }
73
74 bridge = devm_drm_of_get_bridge(dev, dev->of_node, 0, of_ep.id);
75 if (IS_ERR(bridge)) {
76 of_node_put(ep);
77 return dev_err_probe(dev, PTR_ERR(bridge),
78 "Failed to get bridge for endpoint%u\n",
79 of_ep.id);
80 }
81
82 encoder = devm_kzalloc(dev, sizeof(*encoder), GFP_KERNEL);
83 if (!encoder) {
84 dev_err(dev, "Failed to allocate encoder for endpoint%u\n",
85 of_ep.id);
86 of_node_put(ep);
87 return -ENOMEM;
88 }
89
90 encoder->possible_crtcs = drm_crtc_mask(&lcdif->crtc);
91 ret = drm_encoder_init(lcdif->drm, encoder, &lcdif_encoder_funcs,
92 DRM_MODE_ENCODER_NONE, NULL);
93 if (ret) {
94 dev_err(dev, "Failed to initialize encoder for endpoint%u: %d\n",
95 of_ep.id, ret);
96 of_node_put(ep);
97 return ret;
98 }
99
100 ret = drm_bridge_attach(encoder, bridge, NULL, 0);
101 if (ret) {
102 of_node_put(ep);
103 return dev_err_probe(dev, ret,
104 "Failed to attach bridge for endpoint%u\n",
105 of_ep.id);
106 }
107 }
108
109 return 0;
110}
111
112static irqreturn_t lcdif_irq_handler(int irq, void *data)
113{
114 struct drm_device *drm = data;
115 struct lcdif_drm_private *lcdif = drm->dev_private;
116 u32 reg, stat;
117
118 stat = readl(lcdif->base + LCDC_V8_INT_STATUS_D0);
119 if (!stat)
120 return IRQ_NONE;
121
122 if (stat & INT_STATUS_D0_VS_BLANK) {
123 reg = readl(lcdif->base + LCDC_V8_CTRLDESCL0_5);
124 if (!(reg & CTRLDESCL0_5_SHADOW_LOAD_EN))
125 drm_crtc_handle_vblank(&lcdif->crtc);
126 }
127
128 writel(stat, lcdif->base + LCDC_V8_INT_STATUS_D0);
129
130 return IRQ_HANDLED;
131}
132
133static int lcdif_load(struct drm_device *drm)
134{
135 struct platform_device *pdev = to_platform_device(drm->dev);
136 struct lcdif_drm_private *lcdif;
137 struct resource *res;
138 int ret;
139
140 lcdif = devm_kzalloc(&pdev->dev, sizeof(*lcdif), GFP_KERNEL);
141 if (!lcdif)
142 return -ENOMEM;
143
144 lcdif->drm = drm;
145 drm->dev_private = lcdif;
146
147 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
148 lcdif->base = devm_ioremap_resource(drm->dev, res);
149 if (IS_ERR(lcdif->base))
150 return PTR_ERR(lcdif->base);
151
152 lcdif->clk = devm_clk_get(drm->dev, "pix");
153 if (IS_ERR(lcdif->clk))
154 return PTR_ERR(lcdif->clk);
155
156 lcdif->clk_axi = devm_clk_get(drm->dev, "axi");
157 if (IS_ERR(lcdif->clk_axi))
158 return PTR_ERR(lcdif->clk_axi);
159
160 lcdif->clk_disp_axi = devm_clk_get(drm->dev, "disp_axi");
161 if (IS_ERR(lcdif->clk_disp_axi))
162 return PTR_ERR(lcdif->clk_disp_axi);
163
164 platform_set_drvdata(pdev, drm);
165
166 ret = dma_set_mask_and_coherent(drm->dev, DMA_BIT_MASK(36));
167 if (ret)
168 return ret;
169
170 /* Modeset init */
171 ret = drmm_mode_config_init(drm);
172 if (ret) {
173 dev_err(drm->dev, "Failed to initialize mode config\n");
174 return ret;
175 }
176
177 ret = lcdif_kms_init(lcdif);
178 if (ret < 0) {
179 dev_err(drm->dev, "Failed to initialize KMS pipeline\n");
180 return ret;
181 }
182
183 ret = drm_vblank_init(drm, drm->mode_config.num_crtc);
184 if (ret < 0) {
185 dev_err(drm->dev, "Failed to initialise vblank\n");
186 return ret;
187 }
188
189 /* Start with vertical blanking interrupt reporting disabled. */
190 drm_crtc_vblank_off(&lcdif->crtc);
191
192 ret = lcdif_attach_bridge(lcdif);
193 if (ret)
194 return dev_err_probe(drm->dev, ret, "Cannot connect bridge\n");
195
196 drm->mode_config.min_width = LCDIF_MIN_XRES;
197 drm->mode_config.min_height = LCDIF_MIN_YRES;
198 drm->mode_config.max_width = LCDIF_MAX_XRES;
199 drm->mode_config.max_height = LCDIF_MAX_YRES;
200 drm->mode_config.funcs = &lcdif_mode_config_funcs;
201 drm->mode_config.helper_private = &lcdif_mode_config_helpers;
202
203 drm_mode_config_reset(drm);
204
205 ret = platform_get_irq(pdev, 0);
206 if (ret < 0)
207 return ret;
208 lcdif->irq = ret;
209
210 ret = devm_request_irq(drm->dev, lcdif->irq, lcdif_irq_handler, 0,
211 drm->driver->name, drm);
212 if (ret < 0) {
213 dev_err(drm->dev, "Failed to install IRQ handler\n");
214 return ret;
215 }
216
217 drm_kms_helper_poll_init(drm);
218
219 drm_helper_hpd_irq_event(drm);
220
221 pm_runtime_enable(drm->dev);
222
223 return 0;
224}
225
226static void lcdif_unload(struct drm_device *drm)
227{
228 struct lcdif_drm_private *lcdif = drm->dev_private;
229
230 pm_runtime_get_sync(drm->dev);
231
232 drm_crtc_vblank_off(&lcdif->crtc);
233
234 drm_kms_helper_poll_fini(drm);
235
236 pm_runtime_put_sync(drm->dev);
237 pm_runtime_disable(drm->dev);
238
239 drm->dev_private = NULL;
240}
241
242DEFINE_DRM_GEM_DMA_FOPS(fops);
243
244static const struct drm_driver lcdif_driver = {
245 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
246 DRM_GEM_DMA_DRIVER_OPS,
247 DRM_FBDEV_DMA_DRIVER_OPS,
248 .fops = &fops,
249 .name = "imx-lcdif",
250 .desc = "i.MX LCDIF Controller DRM",
251 .date = "20220417",
252 .major = 1,
253 .minor = 0,
254};
255
256static const struct of_device_id lcdif_dt_ids[] = {
257 { .compatible = "fsl,imx8mp-lcdif" },
258 { .compatible = "fsl,imx93-lcdif" },
259 { /* sentinel */ }
260};
261MODULE_DEVICE_TABLE(of, lcdif_dt_ids);
262
263static int lcdif_probe(struct platform_device *pdev)
264{
265 struct drm_device *drm;
266 int ret;
267
268 drm = drm_dev_alloc(&lcdif_driver, &pdev->dev);
269 if (IS_ERR(drm))
270 return PTR_ERR(drm);
271
272 ret = lcdif_load(drm);
273 if (ret)
274 goto err_free;
275
276 ret = drm_dev_register(drm, 0);
277 if (ret)
278 goto err_unload;
279
280 drm_client_setup(drm, NULL);
281
282 return 0;
283
284err_unload:
285 lcdif_unload(drm);
286err_free:
287 drm_dev_put(drm);
288
289 return ret;
290}
291
292static void lcdif_remove(struct platform_device *pdev)
293{
294 struct drm_device *drm = platform_get_drvdata(pdev);
295
296 drm_dev_unregister(drm);
297 drm_atomic_helper_shutdown(drm);
298 lcdif_unload(drm);
299 drm_dev_put(drm);
300}
301
302static void lcdif_shutdown(struct platform_device *pdev)
303{
304 struct drm_device *drm = platform_get_drvdata(pdev);
305
306 drm_atomic_helper_shutdown(drm);
307}
308
309static int __maybe_unused lcdif_rpm_suspend(struct device *dev)
310{
311 struct drm_device *drm = dev_get_drvdata(dev);
312 struct lcdif_drm_private *lcdif = drm->dev_private;
313
314 /* These clock supply the DISPLAY CLOCK Domain */
315 clk_disable_unprepare(lcdif->clk);
316 /* These clock supply the System Bus, AXI, Write Path, LFIFO */
317 clk_disable_unprepare(lcdif->clk_disp_axi);
318 /* These clock supply the Control Bus, APB, APBH Ctrl Registers */
319 clk_disable_unprepare(lcdif->clk_axi);
320
321 return 0;
322}
323
324static int __maybe_unused lcdif_rpm_resume(struct device *dev)
325{
326 struct drm_device *drm = dev_get_drvdata(dev);
327 struct lcdif_drm_private *lcdif = drm->dev_private;
328
329 /* These clock supply the Control Bus, APB, APBH Ctrl Registers */
330 clk_prepare_enable(lcdif->clk_axi);
331 /* These clock supply the System Bus, AXI, Write Path, LFIFO */
332 clk_prepare_enable(lcdif->clk_disp_axi);
333 /* These clock supply the DISPLAY CLOCK Domain */
334 clk_prepare_enable(lcdif->clk);
335
336 return 0;
337}
338
339static int __maybe_unused lcdif_suspend(struct device *dev)
340{
341 struct drm_device *drm = dev_get_drvdata(dev);
342 int ret;
343
344 ret = drm_mode_config_helper_suspend(drm);
345 if (ret)
346 return ret;
347
348 if (pm_runtime_suspended(dev))
349 return 0;
350
351 return lcdif_rpm_suspend(dev);
352}
353
354static int __maybe_unused lcdif_resume(struct device *dev)
355{
356 struct drm_device *drm = dev_get_drvdata(dev);
357
358 if (!pm_runtime_suspended(dev))
359 lcdif_rpm_resume(dev);
360
361 return drm_mode_config_helper_resume(drm);
362}
363
364static const struct dev_pm_ops lcdif_pm_ops = {
365 SET_SYSTEM_SLEEP_PM_OPS(lcdif_suspend, lcdif_resume)
366 SET_RUNTIME_PM_OPS(lcdif_rpm_suspend, lcdif_rpm_resume, NULL)
367};
368
369static struct platform_driver lcdif_platform_driver = {
370 .probe = lcdif_probe,
371 .remove = lcdif_remove,
372 .shutdown = lcdif_shutdown,
373 .driver = {
374 .name = "imx-lcdif",
375 .of_match_table = lcdif_dt_ids,
376 .pm = &lcdif_pm_ops,
377 },
378};
379
380drm_module_platform_driver(lcdif_platform_driver);
381
382MODULE_AUTHOR("Marek Vasut <marex@denx.de>");
383MODULE_DESCRIPTION("Freescale LCDIF DRM/KMS driver");
384MODULE_LICENSE("GPL");