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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * MGA Millennium (MGA2064W) functions
4 * MGA Mystique (MGA1064SG) functions
5 *
6 * Copyright 1996 The XFree86 Project, Inc.
7 *
8 * Authors
9 * Dirk Hohndel
10 * hohndel@XFree86.Org
11 * David Dawes
12 * dawes@XFree86.Org
13 * Contributors:
14 * Guy DESBIEF, Aix-en-provence, France
15 * g.desbief@aix.pacwan.net
16 * MGA1064SG Mystique register file
17 */
18
19
20#ifndef _MGA_REG_H_
21#define _MGA_REG_H_
22
23#define MGAREG_DWGCTL 0x1c00
24#define MGAREG_MACCESS 0x1c04
25/* the following is a mystique only register */
26#define MGAREG_MCTLWTST 0x1c08
27#define MGAREG_ZORG 0x1c0c
28
29#define MGAREG_PAT0 0x1c10
30#define MGAREG_PAT1 0x1c14
31#define MGAREG_PLNWT 0x1c1c
32
33#define MGAREG_BCOL 0x1c20
34#define MGAREG_FCOL 0x1c24
35
36#define MGAREG_SRC0 0x1c30
37#define MGAREG_SRC1 0x1c34
38#define MGAREG_SRC2 0x1c38
39#define MGAREG_SRC3 0x1c3c
40
41#define MGAREG_XYSTRT 0x1c40
42#define MGAREG_XYEND 0x1c44
43
44#define MGAREG_SHIFT 0x1c50
45/* the following is a mystique only register */
46#define MGAREG_DMAPAD 0x1c54
47#define MGAREG_SGN 0x1c58
48#define MGAREG_LEN 0x1c5c
49
50#define MGAREG_AR0 0x1c60
51#define MGAREG_AR1 0x1c64
52#define MGAREG_AR2 0x1c68
53#define MGAREG_AR3 0x1c6c
54#define MGAREG_AR4 0x1c70
55#define MGAREG_AR5 0x1c74
56#define MGAREG_AR6 0x1c78
57
58#define MGAREG_CXBNDRY 0x1c80
59#define MGAREG_FXBNDRY 0x1c84
60#define MGAREG_YDSTLEN 0x1c88
61#define MGAREG_PITCH 0x1c8c
62
63#define MGAREG_YDST 0x1c90
64#define MGAREG_YDSTORG 0x1c94
65#define MGAREG_YTOP 0x1c98
66#define MGAREG_YBOT 0x1c9c
67
68#define MGAREG_CXLEFT 0x1ca0
69#define MGAREG_CXRIGHT 0x1ca4
70#define MGAREG_FXLEFT 0x1ca8
71#define MGAREG_FXRIGHT 0x1cac
72
73#define MGAREG_XDST 0x1cb0
74
75#define MGAREG_DR0 0x1cc0
76#define MGAREG_DR1 0x1cc4
77#define MGAREG_DR2 0x1cc8
78#define MGAREG_DR3 0x1ccc
79
80#define MGAREG_DR4 0x1cd0
81#define MGAREG_DR5 0x1cd4
82#define MGAREG_DR6 0x1cd8
83#define MGAREG_DR7 0x1cdc
84
85#define MGAREG_DR8 0x1ce0
86#define MGAREG_DR9 0x1ce4
87#define MGAREG_DR10 0x1ce8
88#define MGAREG_DR11 0x1cec
89
90#define MGAREG_DR12 0x1cf0
91#define MGAREG_DR13 0x1cf4
92#define MGAREG_DR14 0x1cf8
93#define MGAREG_DR15 0x1cfc
94
95#define MGAREG_SRCORG 0x2cb4
96#define MGAREG_DSTORG 0x2cb8
97
98/* add or or this to one of the previous "power registers" to start
99 the drawing engine */
100
101#define MGAREG_EXEC 0x0100
102
103#define MGAREG_FIFOSTATUS 0x1e10
104#define MGAREG_Status 0x1e14
105#define MGAREG_CACHEFLUSH 0x1fff
106#define MGAREG_ICLEAR 0x1e18
107#define MGAREG_IEN 0x1e1c
108
109#define MGAREG_VCOUNT 0x1e20
110
111#define MGAREG_Reset 0x1e40
112
113#define MGAREG_OPMODE 0x1e54
114
115/* Warp Registers */
116#define MGAREG_WIADDR 0x1dc0
117#define MGAREG_WIADDR2 0x1dd8
118#define MGAREG_WGETMSB 0x1dc8
119#define MGAREG_WVRTXSZ 0x1dcc
120#define MGAREG_WACCEPTSEQ 0x1dd4
121#define MGAREG_WMISC 0x1e70
122
123#define MGAREG_MEMCTL 0x2e08
124
125/* OPMODE register additives */
126
127#define MGAOPM_DMA_GENERAL (0x00 << 2)
128#define MGAOPM_DMA_BLIT (0x01 << 2)
129#define MGAOPM_DMA_VECTOR (0x10 << 2)
130
131/* MACCESS register additives */
132#define MGAMAC_PW8 0x00
133#define MGAMAC_PW16 0x01
134#define MGAMAC_PW24 0x03 /* not a typo */
135#define MGAMAC_PW32 0x02 /* not a typo */
136#define MGAMAC_BYPASS332 0x10000000
137#define MGAMAC_NODITHER 0x40000000
138#define MGAMAC_DIT555 0x80000000
139
140/* DWGCTL register additives */
141
142/* Lines */
143
144#define MGADWG_LINE_OPEN 0x00
145#define MGADWG_AUTOLINE_OPEN 0x01
146#define MGADWG_LINE_CLOSE 0x02
147#define MGADWG_AUTOLINE_CLOSE 0x03
148
149/* Trapezoids */
150#define MGADWG_TRAP 0x04
151#define MGADWG_TEXTURE_TRAP 0x06
152
153/* BitBlts */
154
155#define MGADWG_BITBLT 0x08
156#define MGADWG_FBITBLT 0x0c
157#define MGADWG_ILOAD 0x09
158#define MGADWG_ILOAD_SCALE 0x0d
159#define MGADWG_ILOAD_FILTER 0x0f
160#define MGADWG_ILOAD_HIQH 0x07
161#define MGADWG_ILOAD_HIQHV 0x0e
162#define MGADWG_IDUMP 0x0a
163
164/* atype access to WRAM */
165
166#define MGADWG_RPL ( 0x00 << 4 )
167#define MGADWG_RSTR ( 0x01 << 4 )
168#define MGADWG_ZI ( 0x03 << 4 )
169#define MGADWG_BLK ( 0x04 << 4 )
170#define MGADWG_I ( 0x07 << 4 )
171
172/* specifies whether bit blits are linear or xy */
173#define MGADWG_LINEAR ( 0x01 << 7 )
174
175/* z drawing mode. use MGADWG_NOZCMP for always */
176
177#define MGADWG_NOZCMP ( 0x00 << 8 )
178#define MGADWG_ZE ( 0x02 << 8 )
179#define MGADWG_ZNE ( 0x03 << 8 )
180#define MGADWG_ZLT ( 0x04 << 8 )
181#define MGADWG_ZLTE ( 0x05 << 8 )
182#define MGADWG_GT ( 0x06 << 8 )
183#define MGADWG_GTE ( 0x07 << 8 )
184
185/* use this to force colour expansion circuitry to do its stuff */
186
187#define MGADWG_SOLID ( 0x01 << 11 )
188
189/* ar register at zero */
190
191#define MGADWG_ARZERO ( 0x01 << 12 )
192
193#define MGADWG_SGNZERO ( 0x01 << 13 )
194
195#define MGADWG_SHIFTZERO ( 0x01 << 14 )
196
197/* See table on 4-43 for bop ALU operations */
198
199/* See table on 4-44 for translucidity masks */
200
201#define MGADWG_BMONOLEF ( 0x00 << 25 )
202#define MGADWG_BMONOWF ( 0x04 << 25 )
203#define MGADWG_BPLAN ( 0x01 << 25 )
204
205/* note that if bfcol is specified and you're doing a bitblt, it causes
206 a fbitblt to be performed, so check that you obey the fbitblt rules */
207
208#define MGADWG_BFCOL ( 0x02 << 25 )
209#define MGADWG_BUYUV ( 0x0e << 25 )
210#define MGADWG_BU32BGR ( 0x03 << 25 )
211#define MGADWG_BU32RGB ( 0x07 << 25 )
212#define MGADWG_BU24BGR ( 0x0b << 25 )
213#define MGADWG_BU24RGB ( 0x0f << 25 )
214
215#define MGADWG_PATTERN ( 0x01 << 29 )
216#define MGADWG_TRANSC ( 0x01 << 30 )
217#define MGAREG_MISC_WRITE 0x3c2
218#define MGAREG_MISC_READ 0x3cc
219#define MGAREG_MEM_MISC_WRITE 0x1fc2
220#define MGAREG_MEM_MISC_READ 0x1fcc
221
222#define MGAREG_MISC_IOADSEL (0x1 << 0)
223#define MGAREG_MISC_RAMMAPEN (0x1 << 1)
224#define MGAREG_MISC_CLK_SEL_VGA25 (0x0 << 2)
225#define MGAREG_MISC_CLK_SEL_VGA28 (0x1 << 2)
226#define MGAREG_MISC_CLK_SEL_MGA_PIX (0x2 << 2)
227#define MGAREG_MISC_CLK_SEL_MGA_MSK (0x3 << 2)
228#define MGAREG_MISC_VIDEO_DIS (0x1 << 4)
229#define MGAREG_MISC_HIGH_PG_SEL (0x1 << 5)
230
231/* MMIO VGA registers */
232#define MGAREG_SEQ_INDEX 0x1fc4
233#define MGAREG_SEQ_DATA 0x1fc5
234#define MGAREG_CRTC_INDEX 0x1fd4
235#define MGAREG_CRTC_DATA 0x1fd5
236#define MGAREG_CRTCEXT_INDEX 0x1fde
237#define MGAREG_CRTCEXT_DATA 0x1fdf
238
239/* Cursor X and Y position */
240#define MGA_CURPOSXL 0x3c0c
241#define MGA_CURPOSXH 0x3c0d
242#define MGA_CURPOSYL 0x3c0e
243#define MGA_CURPOSYH 0x3c0f
244
245/* MGA bits for registers PCI_OPTION_REG */
246#define MGA1064_OPT_SYS_CLK_PCI ( 0x00 << 0 )
247#define MGA1064_OPT_SYS_CLK_PLL ( 0x01 << 0 )
248#define MGA1064_OPT_SYS_CLK_EXT ( 0x02 << 0 )
249#define MGA1064_OPT_SYS_CLK_MSK ( 0x03 << 0 )
250
251#define MGA1064_OPT_SYS_CLK_DIS ( 0x01 << 2 )
252#define MGA1064_OPT_G_CLK_DIV_1 ( 0x01 << 3 )
253#define MGA1064_OPT_M_CLK_DIV_1 ( 0x01 << 4 )
254
255#define MGA1064_OPT_SYS_PLL_PDN ( 0x01 << 5 )
256#define MGA1064_OPT_VGA_ION ( 0x01 << 8 )
257
258/* MGA registers in PCI config space */
259#define PCI_MGA_INDEX 0x44
260#define PCI_MGA_DATA 0x48
261#define PCI_MGA_OPTION 0x40
262#define PCI_MGA_OPTION2 0x50
263#define PCI_MGA_OPTION3 0x54
264
265#define RAMDAC_OFFSET 0x3c00
266
267/* TVP3026 direct registers */
268
269#define TVP3026_INDEX 0x00
270#define TVP3026_WADR_PAL 0x00
271#define TVP3026_COL_PAL 0x01
272#define TVP3026_PIX_RD_MSK 0x02
273#define TVP3026_RADR_PAL 0x03
274#define TVP3026_CUR_COL_ADDR 0x04
275#define TVP3026_CUR_COL_DATA 0x05
276#define TVP3026_DATA 0x0a
277#define TVP3026_CUR_RAM 0x0b
278#define TVP3026_CUR_XLOW 0x0c
279#define TVP3026_CUR_XHI 0x0d
280#define TVP3026_CUR_YLOW 0x0e
281#define TVP3026_CUR_YHI 0x0f
282
283/* TVP3026 indirect registers */
284
285#define TVP3026_SILICON_REV 0x01
286#define TVP3026_CURSOR_CTL 0x06
287#define TVP3026_LATCH_CTL 0x0f
288#define TVP3026_TRUE_COLOR_CTL 0x18
289#define TVP3026_MUX_CTL 0x19
290#define TVP3026_CLK_SEL 0x1a
291#define TVP3026_PAL_PAGE 0x1c
292#define TVP3026_GEN_CTL 0x1d
293#define TVP3026_MISC_CTL 0x1e
294#define TVP3026_GEN_IO_CTL 0x2a
295#define TVP3026_GEN_IO_DATA 0x2b
296#define TVP3026_PLL_ADDR 0x2c
297#define TVP3026_PIX_CLK_DATA 0x2d
298#define TVP3026_MEM_CLK_DATA 0x2e
299#define TVP3026_LOAD_CLK_DATA 0x2f
300#define TVP3026_KEY_RED_LOW 0x32
301#define TVP3026_KEY_RED_HI 0x33
302#define TVP3026_KEY_GREEN_LOW 0x34
303#define TVP3026_KEY_GREEN_HI 0x35
304#define TVP3026_KEY_BLUE_LOW 0x36
305#define TVP3026_KEY_BLUE_HI 0x37
306#define TVP3026_KEY_CTL 0x38
307#define TVP3026_MCLK_CTL 0x39
308#define TVP3026_SENSE_TEST 0x3a
309#define TVP3026_TEST_DATA 0x3b
310#define TVP3026_CRC_LSB 0x3c
311#define TVP3026_CRC_MSB 0x3d
312#define TVP3026_CRC_CTL 0x3e
313#define TVP3026_ID 0x3f
314#define TVP3026_RESET 0xff
315
316
317/* MGA1064 DAC Register file */
318/* MGA1064 direct registers */
319
320#define MGA1064_INDEX 0x00
321#define MGA1064_WADR_PAL 0x00
322#define MGA1064_SPAREREG 0x00
323#define MGA1064_COL_PAL 0x01
324#define MGA1064_PIX_RD_MSK 0x02
325#define MGA1064_RADR_PAL 0x03
326#define MGA1064_DATA 0x0a
327
328#define MGA1064_CUR_XLOW 0x0c
329#define MGA1064_CUR_XHI 0x0d
330#define MGA1064_CUR_YLOW 0x0e
331#define MGA1064_CUR_YHI 0x0f
332
333/* MGA1064 indirect registers */
334#define MGA1064_DVI_PIPE_CTL 0x03
335#define MGA1064_CURSOR_BASE_ADR_LOW 0x04
336#define MGA1064_CURSOR_BASE_ADR_HI 0x05
337#define MGA1064_CURSOR_CTL 0x06
338#define MGA1064_CURSOR_COL0_RED 0x08
339#define MGA1064_CURSOR_COL0_GREEN 0x09
340#define MGA1064_CURSOR_COL0_BLUE 0x0a
341
342#define MGA1064_CURSOR_COL1_RED 0x0c
343#define MGA1064_CURSOR_COL1_GREEN 0x0d
344#define MGA1064_CURSOR_COL1_BLUE 0x0e
345
346#define MGA1064_CURSOR_COL2_RED 0x010
347#define MGA1064_CURSOR_COL2_GREEN 0x011
348#define MGA1064_CURSOR_COL2_BLUE 0x012
349
350#define MGA1064_VREF_CTL 0x018
351
352#define MGA1064_MUL_CTL 0x19
353#define MGA1064_MUL_CTL_8bits 0x0
354#define MGA1064_MUL_CTL_15bits 0x01
355#define MGA1064_MUL_CTL_16bits 0x02
356#define MGA1064_MUL_CTL_24bits 0x03
357#define MGA1064_MUL_CTL_32bits 0x04
358#define MGA1064_MUL_CTL_2G8V16bits 0x05
359#define MGA1064_MUL_CTL_G16V16bits 0x06
360#define MGA1064_MUL_CTL_32_24bits 0x07
361
362#define MGA1064_PIX_CLK_CTL 0x1a
363#define MGA1064_PIX_CLK_CTL_CLK_DIS ( 0x01 << 2 )
364#define MGA1064_PIX_CLK_CTL_CLK_POW_DOWN ( 0x01 << 3 )
365#define MGA1064_PIX_CLK_CTL_SEL_PCI ( 0x00 << 0 )
366#define MGA1064_PIX_CLK_CTL_SEL_PLL ( 0x01 << 0 )
367#define MGA1064_PIX_CLK_CTL_SEL_EXT ( 0x02 << 0 )
368#define MGA1064_PIX_CLK_CTL_SEL_MSK ( 0x03 << 0 )
369
370#define MGA1064_GEN_CTL 0x1d
371#define MGA1064_GEN_CTL_SYNC_ON_GREEN_DIS (0x01 << 5)
372#define MGA1064_MISC_CTL 0x1e
373#define MGA1064_MISC_CTL_DAC_EN ( 0x01 << 0 )
374#define MGA1064_MISC_CTL_VGA ( 0x01 << 1 )
375#define MGA1064_MISC_CTL_DIS_CON ( 0x03 << 1 )
376#define MGA1064_MISC_CTL_MAFC ( 0x02 << 1 )
377#define MGA1064_MISC_CTL_VGA8 ( 0x01 << 3 )
378#define MGA1064_MISC_CTL_DAC_RAM_CS ( 0x01 << 4 )
379
380#define MGA1064_GEN_IO_CTL2 0x29
381#define MGA1064_GEN_IO_CTL 0x2a
382#define MGA1064_GEN_IO_DATA 0x2b
383#define MGA1064_SYS_PLL_M 0x2c
384#define MGA1064_SYS_PLL_N 0x2d
385#define MGA1064_SYS_PLL_P 0x2e
386#define MGA1064_SYS_PLL_STAT 0x2f
387
388#define MGA1064_REMHEADCTL 0x30
389#define MGA1064_REMHEADCTL_CLKDIS ( 0x01 << 0 )
390#define MGA1064_REMHEADCTL_CLKSL_OFF ( 0x00 << 1 )
391#define MGA1064_REMHEADCTL_CLKSL_PLL ( 0x01 << 1 )
392#define MGA1064_REMHEADCTL_CLKSL_PCI ( 0x02 << 1 )
393#define MGA1064_REMHEADCTL_CLKSL_MSK ( 0x03 << 1 )
394
395#define MGA1064_REMHEADCTL2 0x31
396
397#define MGA1064_ZOOM_CTL 0x38
398#define MGA1064_SENSE_TST 0x3a
399
400#define MGA1064_CRC_LSB 0x3c
401#define MGA1064_CRC_MSB 0x3d
402#define MGA1064_CRC_CTL 0x3e
403#define MGA1064_COL_KEY_MSK_LSB 0x40
404#define MGA1064_COL_KEY_MSK_MSB 0x41
405#define MGA1064_COL_KEY_LSB 0x42
406#define MGA1064_COL_KEY_MSB 0x43
407#define MGA1064_PIX_PLLA_M 0x44
408#define MGA1064_PIX_PLLA_N 0x45
409#define MGA1064_PIX_PLLA_P 0x46
410#define MGA1064_PIX_PLLB_M 0x48
411#define MGA1064_PIX_PLLB_N 0x49
412#define MGA1064_PIX_PLLB_P 0x4a
413#define MGA1064_PIX_PLLC_M 0x4c
414#define MGA1064_PIX_PLLC_N 0x4d
415#define MGA1064_PIX_PLLC_P 0x4e
416
417#define MGA1064_PIX_PLL_STAT 0x4f
418
419/*Added for G450 dual head*/
420
421#define MGA1064_VID_PLL_STAT 0x8c
422#define MGA1064_VID_PLL_P 0x8D
423#define MGA1064_VID_PLL_M 0x8E
424#define MGA1064_VID_PLL_N 0x8F
425
426/* Modified PLL for G200 Winbond (G200WB) */
427#define MGA1064_WB_PIX_PLLC_M 0xb7
428#define MGA1064_WB_PIX_PLLC_N 0xb6
429#define MGA1064_WB_PIX_PLLC_P 0xb8
430
431/* Modified PLL for G200 Maxim (G200EV) */
432#define MGA1064_EV_PIX_PLLC_M 0xb6
433#define MGA1064_EV_PIX_PLLC_N 0xb7
434#define MGA1064_EV_PIX_PLLC_P 0xb8
435
436/* Modified PLL for G200 EH */
437#define MGA1064_EH_PIX_PLLC_M 0xb6
438#define MGA1064_EH_PIX_PLLC_N 0xb7
439#define MGA1064_EH_PIX_PLLC_P 0xb8
440
441/* Modified PLL for G200 Maxim (G200ER) */
442#define MGA1064_ER_PIX_PLLC_M 0xb7
443#define MGA1064_ER_PIX_PLLC_N 0xb6
444#define MGA1064_ER_PIX_PLLC_P 0xb8
445
446#define MGA1064_DISP_CTL 0x8a
447#define MGA1064_DISP_CTL_DAC1OUTSEL_MASK 0x01
448#define MGA1064_DISP_CTL_DAC1OUTSEL_DIS 0x00
449#define MGA1064_DISP_CTL_DAC1OUTSEL_EN 0x01
450#define MGA1064_DISP_CTL_DAC2OUTSEL_MASK (0x03 << 2)
451#define MGA1064_DISP_CTL_DAC2OUTSEL_DIS 0x00
452#define MGA1064_DISP_CTL_DAC2OUTSEL_CRTC1 (0x01 << 2)
453#define MGA1064_DISP_CTL_DAC2OUTSEL_CRTC2 (0x02 << 2)
454#define MGA1064_DISP_CTL_DAC2OUTSEL_TVE (0x03 << 2)
455#define MGA1064_DISP_CTL_PANOUTSEL_MASK (0x03 << 5)
456#define MGA1064_DISP_CTL_PANOUTSEL_DIS 0x00
457#define MGA1064_DISP_CTL_PANOUTSEL_CRTC1 (0x01 << 5)
458#define MGA1064_DISP_CTL_PANOUTSEL_CRTC2RGB (0x02 << 5)
459#define MGA1064_DISP_CTL_PANOUTSEL_CRTC2656 (0x03 << 5)
460
461#define MGA1064_SYNC_CTL 0x8b
462
463#define MGA1064_PWR_CTL 0xa0
464#define MGA1064_PWR_CTL_DAC2_EN (0x01 << 0)
465#define MGA1064_PWR_CTL_VID_PLL_EN (0x01 << 1)
466#define MGA1064_PWR_CTL_PANEL_EN (0x01 << 2)
467#define MGA1064_PWR_CTL_RFIFO_EN (0x01 << 3)
468#define MGA1064_PWR_CTL_CFIFO_EN (0x01 << 4)
469
470#define MGA1064_PAN_CTL 0xa2
471
472/* Using crtc2 */
473#define MGAREG2_C2CTL 0x10
474#define MGAREG2_C2HPARAM 0x14
475#define MGAREG2_C2HSYNC 0x18
476#define MGAREG2_C2VPARAM 0x1c
477#define MGAREG2_C2VSYNC 0x20
478#define MGAREG2_C2STARTADD0 0x28
479
480#define MGAREG2_C2OFFSET 0x40
481#define MGAREG2_C2DATACTL 0x4c
482
483#define MGAREG_C2CTL 0x3c10
484#define MGAREG_C2CTL_C2_EN 0x01
485
486#define MGAREG_C2_HIPRILVL_M (0x07 << 4)
487#define MGAREG_C2_MAXHIPRI_M (0x07 << 8)
488
489#define MGAREG_C2CTL_PIXCLKSEL_MASK (0x03 << 1)
490#define MGAREG_C2CTL_PIXCLKSELH_MASK (0x01 << 14)
491#define MGAREG_C2CTL_PIXCLKSEL_PCICLK 0x00
492#define MGAREG_C2CTL_PIXCLKSEL_VDOCLK (0x01 << 1)
493#define MGAREG_C2CTL_PIXCLKSEL_PIXELPLL (0x02 << 1)
494#define MGAREG_C2CTL_PIXCLKSEL_VIDEOPLL (0x03 << 1)
495#define MGAREG_C2CTL_PIXCLKSEL_VDCLK (0x01 << 14)
496
497#define MGAREG_C2CTL_PIXCLKSEL_CRISTAL (0x01 << 1) | (0x01 << 14)
498#define MGAREG_C2CTL_PIXCLKSEL_SYSTEMPLL (0x02 << 1) | (0x01 << 14)
499
500#define MGAREG_C2CTL_PIXCLKDIS_MASK (0x01 << 3)
501#define MGAREG_C2CTL_PIXCLKDIS_DISABLE (0x01 << 3)
502
503#define MGAREG_C2CTL_CRTCDACSEL_MASK (0x01 << 20)
504#define MGAREG_C2CTL_CRTCDACSEL_CRTC1 0x00
505#define MGAREG_C2CTL_CRTCDACSEL_CRTC2 (0x01 << 20)
506
507#define MGAREG_C2HPARAM 0x3c14
508#define MGAREG_C2HSYNC 0x3c18
509#define MGAREG_C2VPARAM 0x3c1c
510#define MGAREG_C2VSYNC 0x3c20
511#define MGAREG_C2STARTADD0 0x3c28
512
513#define MGAREG_C2OFFSET 0x3c40
514#define MGAREG_C2DATACTL 0x3c4c
515
516/* video register */
517
518#define MGAREG_BESA1C3ORG 0x3d60
519#define MGAREG_BESA1CORG 0x3d10
520#define MGAREG_BESA1ORG 0x3d00
521#define MGAREG_BESCTL 0x3d20
522#define MGAREG_BESGLOBCTL 0x3dc0
523#define MGAREG_BESHCOORD 0x3d28
524#define MGAREG_BESHISCAL 0x3d30
525#define MGAREG_BESHSRCEND 0x3d3c
526#define MGAREG_BESHSRCLST 0x3d50
527#define MGAREG_BESHSRCST 0x3d38
528#define MGAREG_BESLUMACTL 0x3d40
529#define MGAREG_BESPITCH 0x3d24
530#define MGAREG_BESV1SRCLST 0x3d54
531#define MGAREG_BESV1WGHT 0x3d48
532#define MGAREG_BESVCOORD 0x3d2c
533#define MGAREG_BESVISCAL 0x3d34
534
535/* texture engine registers */
536
537#define MGAREG_TMR0 0x2c00
538#define MGAREG_TMR1 0x2c04
539#define MGAREG_TMR2 0x2c08
540#define MGAREG_TMR3 0x2c0c
541#define MGAREG_TMR4 0x2c10
542#define MGAREG_TMR5 0x2c14
543#define MGAREG_TMR6 0x2c18
544#define MGAREG_TMR7 0x2c1c
545#define MGAREG_TMR8 0x2c20
546#define MGAREG_TEXORG 0x2c24
547#define MGAREG_TEXWIDTH 0x2c28
548#define MGAREG_TEXHEIGHT 0x2c2c
549#define MGAREG_TEXCTL 0x2c30
550# define MGA_TW4 (0x00000000)
551# define MGA_TW8 (0x00000001)
552# define MGA_TW15 (0x00000002)
553# define MGA_TW16 (0x00000003)
554# define MGA_TW12 (0x00000004)
555# define MGA_TW32 (0x00000006)
556# define MGA_TW8A (0x00000007)
557# define MGA_TW8AL (0x00000008)
558# define MGA_TW422 (0x0000000A)
559# define MGA_TW422UYVY (0x0000000B)
560# define MGA_PITCHLIN (0x00000100)
561# define MGA_NOPERSPECTIVE (0x00200000)
562# define MGA_TAKEY (0x02000000)
563# define MGA_TAMASK (0x04000000)
564# define MGA_CLAMPUV (0x18000000)
565# define MGA_TEXMODULATE (0x20000000)
566#define MGAREG_TEXCTL2 0x2c3c
567# define MGA_G400_TC2_MAGIC (0x00008000)
568# define MGA_TC2_DECALBLEND (0x00000001)
569# define MGA_TC2_IDECAL (0x00000002)
570# define MGA_TC2_DECALDIS (0x00000004)
571# define MGA_TC2_CKSTRANSDIS (0x00000010)
572# define MGA_TC2_BORDEREN (0x00000020)
573# define MGA_TC2_SPECEN (0x00000040)
574# define MGA_TC2_DUALTEX (0x00000080)
575# define MGA_TC2_TABLEFOG (0x00000100)
576# define MGA_TC2_BUMPMAP (0x00000200)
577# define MGA_TC2_SELECT_TMU1 (0x80000000)
578#define MGAREG_TEXTRANS 0x2c34
579#define MGAREG_TEXTRANSHIGH 0x2c38
580#define MGAREG_TEXFILTER 0x2c58
581# define MGA_MIN_NRST (0x00000000)
582# define MGA_MIN_BILIN (0x00000002)
583# define MGA_MIN_ANISO (0x0000000D)
584# define MGA_MAG_NRST (0x00000000)
585# define MGA_MAG_BILIN (0x00000020)
586# define MGA_FILTERALPHA (0x00100000)
587#define MGAREG_ALPHASTART 0x2c70
588#define MGAREG_ALPHAXINC 0x2c74
589#define MGAREG_ALPHAYINC 0x2c78
590#define MGAREG_ALPHACTRL 0x2c7c
591# define MGA_SRC_ZERO (0x00000000)
592# define MGA_SRC_ONE (0x00000001)
593# define MGA_SRC_DST_COLOR (0x00000002)
594# define MGA_SRC_ONE_MINUS_DST_COLOR (0x00000003)
595# define MGA_SRC_ALPHA (0x00000004)
596# define MGA_SRC_ONE_MINUS_SRC_ALPHA (0x00000005)
597# define MGA_SRC_DST_ALPHA (0x00000006)
598# define MGA_SRC_ONE_MINUS_DST_ALPHA (0x00000007)
599# define MGA_SRC_SRC_ALPHA_SATURATE (0x00000008)
600# define MGA_SRC_BLEND_MASK (0x0000000f)
601# define MGA_DST_ZERO (0x00000000)
602# define MGA_DST_ONE (0x00000010)
603# define MGA_DST_SRC_COLOR (0x00000020)
604# define MGA_DST_ONE_MINUS_SRC_COLOR (0x00000030)
605# define MGA_DST_SRC_ALPHA (0x00000040)
606# define MGA_DST_ONE_MINUS_SRC_ALPHA (0x00000050)
607# define MGA_DST_DST_ALPHA (0x00000060)
608# define MGA_DST_ONE_MINUS_DST_ALPHA (0x00000070)
609# define MGA_DST_BLEND_MASK (0x00000070)
610# define MGA_ALPHACHANNEL (0x00000100)
611# define MGA_VIDEOALPHA (0x00000200)
612# define MGA_DIFFUSEDALPHA (0x01000000)
613# define MGA_MODULATEDALPHA (0x02000000)
614#define MGAREG_TDUALSTAGE0 (0x2CF8)
615#define MGAREG_TDUALSTAGE1 (0x2CFC)
616# define MGA_TDS_COLOR_ARG2_DIFFUSE (0x00000000)
617# define MGA_TDS_COLOR_ARG2_SPECULAR (0x00000001)
618# define MGA_TDS_COLOR_ARG2_FCOL (0x00000002)
619# define MGA_TDS_COLOR_ARG2_PREVSTAGE (0x00000003)
620# define MGA_TDS_COLOR_ALPHA_DIFFUSE (0x00000000)
621# define MGA_TDS_COLOR_ALPHA_FCOL (0x00000004)
622# define MGA_TDS_COLOR_ALPHA_CURRTEX (0x00000008)
623# define MGA_TDS_COLOR_ALPHA_PREVTEX (0x0000000c)
624# define MGA_TDS_COLOR_ALPHA_PREVSTAGE (0x00000010)
625# define MGA_TDS_COLOR_ARG1_REPLICATEALPHA (0x00000020)
626# define MGA_TDS_COLOR_ARG1_INV (0x00000040)
627# define MGA_TDS_COLOR_ARG2_REPLICATEALPHA (0x00000080)
628# define MGA_TDS_COLOR_ARG2_INV (0x00000100)
629# define MGA_TDS_COLOR_ALPHA1INV (0x00000200)
630# define MGA_TDS_COLOR_ALPHA2INV (0x00000400)
631# define MGA_TDS_COLOR_ARG1MUL_ALPHA1 (0x00000800)
632# define MGA_TDS_COLOR_ARG2MUL_ALPHA2 (0x00001000)
633# define MGA_TDS_COLOR_ARG1ADD_MULOUT (0x00002000)
634# define MGA_TDS_COLOR_ARG2ADD_MULOUT (0x00004000)
635# define MGA_TDS_COLOR_MODBRIGHT_2X (0x00008000)
636# define MGA_TDS_COLOR_MODBRIGHT_4X (0x00010000)
637# define MGA_TDS_COLOR_ADD_SUB (0x00000000)
638# define MGA_TDS_COLOR_ADD_ADD (0x00020000)
639# define MGA_TDS_COLOR_ADD2X (0x00040000)
640# define MGA_TDS_COLOR_ADDBIAS (0x00080000)
641# define MGA_TDS_COLOR_BLEND (0x00100000)
642# define MGA_TDS_COLOR_SEL_ARG1 (0x00000000)
643# define MGA_TDS_COLOR_SEL_ARG2 (0x00200000)
644# define MGA_TDS_COLOR_SEL_ADD (0x00400000)
645# define MGA_TDS_COLOR_SEL_MUL (0x00600000)
646# define MGA_TDS_ALPHA_ARG1_INV (0x00800000)
647# define MGA_TDS_ALPHA_ARG2_DIFFUSE (0x00000000)
648# define MGA_TDS_ALPHA_ARG2_FCOL (0x01000000)
649# define MGA_TDS_ALPHA_ARG2_PREVTEX (0x02000000)
650# define MGA_TDS_ALPHA_ARG2_PREVSTAGE (0x03000000)
651# define MGA_TDS_ALPHA_ARG2_INV (0x04000000)
652# define MGA_TDS_ALPHA_ADD (0x08000000)
653# define MGA_TDS_ALPHA_ADDBIAS (0x10000000)
654# define MGA_TDS_ALPHA_ADD2X (0x20000000)
655# define MGA_TDS_ALPHA_SEL_ARG1 (0x00000000)
656# define MGA_TDS_ALPHA_SEL_ARG2 (0x40000000)
657# define MGA_TDS_ALPHA_SEL_ADD (0x80000000)
658# define MGA_TDS_ALPHA_SEL_MUL (0xc0000000)
659
660#define MGAREG_DWGSYNC 0x2c4c
661
662#define MGAREG_AGP_PLL 0x1e4c
663#define MGA_AGP2XPLL_ENABLE 0x1
664#define MGA_AGP2XPLL_DISABLE 0x0
665
666#endif
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * MGA Millennium (MGA2064W) functions
4 * MGA Mystique (MGA1064SG) functions
5 *
6 * Copyright 1996 The XFree86 Project, Inc.
7 *
8 * Authors
9 * Dirk Hohndel
10 * hohndel@XFree86.Org
11 * David Dawes
12 * dawes@XFree86.Org
13 * Contributors:
14 * Guy DESBIEF, Aix-en-provence, France
15 * g.desbief@aix.pacwan.net
16 * MGA1064SG Mystique register file
17 */
18
19#ifndef _MGA_REG_H_
20#define _MGA_REG_H_
21
22#include <linux/bits.h>
23
24#define MGAREG_DWGCTL 0x1c00
25#define MGAREG_MACCESS 0x1c04
26/* the following is a mystique only register */
27#define MGAREG_MCTLWTST 0x1c08
28#define MGAREG_ZORG 0x1c0c
29
30#define MGAREG_PAT0 0x1c10
31#define MGAREG_PAT1 0x1c14
32#define MGAREG_PLNWT 0x1c1c
33
34#define MGAREG_BCOL 0x1c20
35#define MGAREG_FCOL 0x1c24
36
37#define MGAREG_SRC0 0x1c30
38#define MGAREG_SRC1 0x1c34
39#define MGAREG_SRC2 0x1c38
40#define MGAREG_SRC3 0x1c3c
41
42#define MGAREG_XYSTRT 0x1c40
43#define MGAREG_XYEND 0x1c44
44
45#define MGAREG_SHIFT 0x1c50
46/* the following is a mystique only register */
47#define MGAREG_DMAPAD 0x1c54
48#define MGAREG_SGN 0x1c58
49#define MGAREG_LEN 0x1c5c
50
51#define MGAREG_AR0 0x1c60
52#define MGAREG_AR1 0x1c64
53#define MGAREG_AR2 0x1c68
54#define MGAREG_AR3 0x1c6c
55#define MGAREG_AR4 0x1c70
56#define MGAREG_AR5 0x1c74
57#define MGAREG_AR6 0x1c78
58
59#define MGAREG_CXBNDRY 0x1c80
60#define MGAREG_FXBNDRY 0x1c84
61#define MGAREG_YDSTLEN 0x1c88
62#define MGAREG_PITCH 0x1c8c
63
64#define MGAREG_YDST 0x1c90
65#define MGAREG_YDSTORG 0x1c94
66#define MGAREG_YTOP 0x1c98
67#define MGAREG_YBOT 0x1c9c
68
69#define MGAREG_CXLEFT 0x1ca0
70#define MGAREG_CXRIGHT 0x1ca4
71#define MGAREG_FXLEFT 0x1ca8
72#define MGAREG_FXRIGHT 0x1cac
73
74#define MGAREG_XDST 0x1cb0
75
76#define MGAREG_DR0 0x1cc0
77#define MGAREG_DR1 0x1cc4
78#define MGAREG_DR2 0x1cc8
79#define MGAREG_DR3 0x1ccc
80
81#define MGAREG_DR4 0x1cd0
82#define MGAREG_DR5 0x1cd4
83#define MGAREG_DR6 0x1cd8
84#define MGAREG_DR7 0x1cdc
85
86#define MGAREG_DR8 0x1ce0
87#define MGAREG_DR9 0x1ce4
88#define MGAREG_DR10 0x1ce8
89#define MGAREG_DR11 0x1cec
90
91#define MGAREG_DR12 0x1cf0
92#define MGAREG_DR13 0x1cf4
93#define MGAREG_DR14 0x1cf8
94#define MGAREG_DR15 0x1cfc
95
96#define MGAREG_SRCORG 0x2cb4
97#define MGAREG_DSTORG 0x2cb8
98
99/* add or this to one of the previous "power registers" to start
100 the drawing engine */
101
102#define MGAREG_EXEC 0x0100
103
104#define MGAREG_FIFOSTATUS 0x1e10
105
106#define MGAREG_STATUS 0x1e14
107#define MGAREG_STATUS_VLINEPEN BIT(5)
108
109#define MGAREG_CACHEFLUSH 0x1fff
110
111#define MGAREG_ICLEAR 0x1e18
112#define MGAREG_ICLEAR_VLINEICLR BIT(5)
113
114#define MGAREG_IEN 0x1e1c
115#define MGAREG_IEN_VLINEIEN BIT(5)
116
117#define MGAREG_VCOUNT 0x1e20
118
119#define MGAREG_Reset 0x1e40
120
121#define MGAREG_OPMODE 0x1e54
122
123/* Warp Registers */
124#define MGAREG_WIADDR 0x1dc0
125#define MGAREG_WIADDR2 0x1dd8
126#define MGAREG_WGETMSB 0x1dc8
127#define MGAREG_WVRTXSZ 0x1dcc
128#define MGAREG_WACCEPTSEQ 0x1dd4
129#define MGAREG_WMISC 0x1e70
130
131#define MGAREG_MEMCTL 0x2e08
132
133/* OPMODE register additives */
134
135#define MGAOPM_DMA_GENERAL (0x00 << 2)
136#define MGAOPM_DMA_BLIT (0x01 << 2)
137#define MGAOPM_DMA_VECTOR (0x10 << 2)
138
139/* MACCESS register additives */
140#define MGAMAC_PW8 0x00
141#define MGAMAC_PW16 0x01
142#define MGAMAC_PW24 0x03 /* not a typo */
143#define MGAMAC_PW32 0x02 /* not a typo */
144#define MGAMAC_BYPASS332 0x10000000
145#define MGAMAC_NODITHER 0x40000000
146#define MGAMAC_DIT555 0x80000000
147
148/* DWGCTL register additives */
149
150/* Lines */
151
152#define MGADWG_LINE_OPEN 0x00
153#define MGADWG_AUTOLINE_OPEN 0x01
154#define MGADWG_LINE_CLOSE 0x02
155#define MGADWG_AUTOLINE_CLOSE 0x03
156
157/* Trapezoids */
158#define MGADWG_TRAP 0x04
159#define MGADWG_TEXTURE_TRAP 0x06
160
161/* BitBlts */
162
163#define MGADWG_BITBLT 0x08
164#define MGADWG_FBITBLT 0x0c
165#define MGADWG_ILOAD 0x09
166#define MGADWG_ILOAD_SCALE 0x0d
167#define MGADWG_ILOAD_FILTER 0x0f
168#define MGADWG_ILOAD_HIQH 0x07
169#define MGADWG_ILOAD_HIQHV 0x0e
170#define MGADWG_IDUMP 0x0a
171
172/* atype access to WRAM */
173
174#define MGADWG_RPL ( 0x00 << 4 )
175#define MGADWG_RSTR ( 0x01 << 4 )
176#define MGADWG_ZI ( 0x03 << 4 )
177#define MGADWG_BLK ( 0x04 << 4 )
178#define MGADWG_I ( 0x07 << 4 )
179
180/* specifies whether bit blits are linear or xy */
181#define MGADWG_LINEAR ( 0x01 << 7 )
182
183/* z drawing mode. use MGADWG_NOZCMP for always */
184
185#define MGADWG_NOZCMP ( 0x00 << 8 )
186#define MGADWG_ZE ( 0x02 << 8 )
187#define MGADWG_ZNE ( 0x03 << 8 )
188#define MGADWG_ZLT ( 0x04 << 8 )
189#define MGADWG_ZLTE ( 0x05 << 8 )
190#define MGADWG_GT ( 0x06 << 8 )
191#define MGADWG_GTE ( 0x07 << 8 )
192
193/* use this to force colour expansion circuitry to do its stuff */
194
195#define MGADWG_SOLID ( 0x01 << 11 )
196
197/* ar register at zero */
198
199#define MGADWG_ARZERO ( 0x01 << 12 )
200
201#define MGADWG_SGNZERO ( 0x01 << 13 )
202
203#define MGADWG_SHIFTZERO ( 0x01 << 14 )
204
205/* See table on 4-43 for bop ALU operations */
206
207/* See table on 4-44 for translucidity masks */
208
209#define MGADWG_BMONOLEF ( 0x00 << 25 )
210#define MGADWG_BMONOWF ( 0x04 << 25 )
211#define MGADWG_BPLAN ( 0x01 << 25 )
212
213/* note that if bfcol is specified and you're doing a bitblt, it causes
214 a fbitblt to be performed, so check that you obey the fbitblt rules */
215
216#define MGADWG_BFCOL ( 0x02 << 25 )
217#define MGADWG_BUYUV ( 0x0e << 25 )
218#define MGADWG_BU32BGR ( 0x03 << 25 )
219#define MGADWG_BU32RGB ( 0x07 << 25 )
220#define MGADWG_BU24BGR ( 0x0b << 25 )
221#define MGADWG_BU24RGB ( 0x0f << 25 )
222
223#define MGADWG_PATTERN ( 0x01 << 29 )
224#define MGADWG_TRANSC ( 0x01 << 30 )
225#define MGAREG_MISC_WRITE 0x3c2
226#define MGAREG_MISC_READ 0x3cc
227#define MGAREG_MEM_MISC_WRITE 0x1fc2
228#define MGAREG_MEM_MISC_READ 0x1fcc
229
230#define MGAREG_MISC_IOADSEL (0x1 << 0)
231#define MGAREG_MISC_RAMMAPEN (0x1 << 1)
232#define MGAREG_MISC_CLKSEL_MASK GENMASK(3, 2)
233#define MGAREG_MISC_CLKSEL_VGA25 (0x0 << 2)
234#define MGAREG_MISC_CLKSEL_VGA28 (0x1 << 2)
235#define MGAREG_MISC_CLKSEL_MGA (0x3 << 2)
236#define MGAREG_MISC_VIDEO_DIS (0x1 << 4)
237#define MGAREG_MISC_HIGH_PG_SEL (0x1 << 5)
238#define MGAREG_MISC_HSYNCPOL BIT(6)
239#define MGAREG_MISC_VSYNCPOL BIT(7)
240
241/* MMIO VGA registers */
242#define MGAREG_SEQ_INDEX 0x1fc4
243#define MGAREG_SEQ_DATA 0x1fc5
244
245#define MGAREG_SEQ0_ASYNCRST BIT(0)
246#define MGAREG_SEQ0_SYNCRST BIT(1)
247
248#define MGAREG_SEQ1_SCROFF BIT(5)
249
250#define MGAREG_CRTC_INDEX 0x1fd4
251#define MGAREG_CRTC_DATA 0x1fd5
252
253#define MGAREG_CRTC11_VINTCLR BIT(4)
254#define MGAREG_CRTC11_VINTEN BIT(5)
255#define MGAREG_CRTC11_CRTCPROTECT BIT(7)
256
257#define MGAREG_CRTCEXT_INDEX 0x1fde
258#define MGAREG_CRTCEXT_DATA 0x1fdf
259
260#define MGAREG_CRTCEXT0_OFFSET_MASK GENMASK(5, 4)
261
262#define MGAREG_CRTCEXT1_VRSTEN BIT(7)
263#define MGAREG_CRTCEXT1_VSYNCOFF BIT(5)
264#define MGAREG_CRTCEXT1_HSYNCOFF BIT(4)
265#define MGAREG_CRTCEXT1_HRSTEN BIT(3)
266
267#define MGAREG_CRTCEXT3_MGAMODE BIT(7)
268
269/* Cursor X and Y position */
270#define MGA_CURPOSXL 0x3c0c
271#define MGA_CURPOSXH 0x3c0d
272#define MGA_CURPOSYL 0x3c0e
273#define MGA_CURPOSYH 0x3c0f
274
275/* MGA bits for registers PCI_OPTION_REG */
276#define MGA1064_OPT_SYS_CLK_PCI ( 0x00 << 0 )
277#define MGA1064_OPT_SYS_CLK_PLL ( 0x01 << 0 )
278#define MGA1064_OPT_SYS_CLK_EXT ( 0x02 << 0 )
279#define MGA1064_OPT_SYS_CLK_MSK ( 0x03 << 0 )
280
281#define MGA1064_OPT_SYS_CLK_DIS ( 0x01 << 2 )
282#define MGA1064_OPT_G_CLK_DIV_1 ( 0x01 << 3 )
283#define MGA1064_OPT_M_CLK_DIV_1 ( 0x01 << 4 )
284
285#define MGA1064_OPT_SYS_PLL_PDN ( 0x01 << 5 )
286#define MGA1064_OPT_VGA_ION ( 0x01 << 8 )
287
288/* MGA registers in PCI config space */
289#define PCI_MGA_INDEX 0x44
290#define PCI_MGA_DATA 0x48
291#define PCI_MGA_OPTION 0x40
292#define PCI_MGA_OPTION2 0x50
293#define PCI_MGA_OPTION3 0x54
294
295#define PCI_MGA_OPTION_HARDPWMSK BIT(14)
296
297#define RAMDAC_OFFSET 0x3c00
298
299/* TVP3026 direct registers */
300
301#define TVP3026_INDEX 0x00
302#define TVP3026_WADR_PAL 0x00
303#define TVP3026_COL_PAL 0x01
304#define TVP3026_PIX_RD_MSK 0x02
305#define TVP3026_RADR_PAL 0x03
306#define TVP3026_CUR_COL_ADDR 0x04
307#define TVP3026_CUR_COL_DATA 0x05
308#define TVP3026_DATA 0x0a
309#define TVP3026_CUR_RAM 0x0b
310#define TVP3026_CUR_XLOW 0x0c
311#define TVP3026_CUR_XHI 0x0d
312#define TVP3026_CUR_YLOW 0x0e
313#define TVP3026_CUR_YHI 0x0f
314
315/* TVP3026 indirect registers */
316
317#define TVP3026_SILICON_REV 0x01
318#define TVP3026_CURSOR_CTL 0x06
319#define TVP3026_LATCH_CTL 0x0f
320#define TVP3026_TRUE_COLOR_CTL 0x18
321#define TVP3026_MUX_CTL 0x19
322#define TVP3026_CLK_SEL 0x1a
323#define TVP3026_PAL_PAGE 0x1c
324#define TVP3026_GEN_CTL 0x1d
325#define TVP3026_MISC_CTL 0x1e
326#define TVP3026_GEN_IO_CTL 0x2a
327#define TVP3026_GEN_IO_DATA 0x2b
328#define TVP3026_PLL_ADDR 0x2c
329#define TVP3026_PIX_CLK_DATA 0x2d
330#define TVP3026_MEM_CLK_DATA 0x2e
331#define TVP3026_LOAD_CLK_DATA 0x2f
332#define TVP3026_KEY_RED_LOW 0x32
333#define TVP3026_KEY_RED_HI 0x33
334#define TVP3026_KEY_GREEN_LOW 0x34
335#define TVP3026_KEY_GREEN_HI 0x35
336#define TVP3026_KEY_BLUE_LOW 0x36
337#define TVP3026_KEY_BLUE_HI 0x37
338#define TVP3026_KEY_CTL 0x38
339#define TVP3026_MCLK_CTL 0x39
340#define TVP3026_SENSE_TEST 0x3a
341#define TVP3026_TEST_DATA 0x3b
342#define TVP3026_CRC_LSB 0x3c
343#define TVP3026_CRC_MSB 0x3d
344#define TVP3026_CRC_CTL 0x3e
345#define TVP3026_ID 0x3f
346#define TVP3026_RESET 0xff
347
348
349/* MGA1064 DAC Register file */
350/* MGA1064 direct registers */
351
352#define MGA1064_INDEX 0x00
353#define MGA1064_WADR_PAL 0x00
354#define MGA1064_SPAREREG 0x00
355#define MGA1064_COL_PAL 0x01
356#define MGA1064_PIX_RD_MSK 0x02
357#define MGA1064_RADR_PAL 0x03
358#define MGA1064_DATA 0x0a
359
360#define MGA1064_CUR_XLOW 0x0c
361#define MGA1064_CUR_XHI 0x0d
362#define MGA1064_CUR_YLOW 0x0e
363#define MGA1064_CUR_YHI 0x0f
364
365/* MGA1064 indirect registers */
366#define MGA1064_DVI_PIPE_CTL 0x03
367#define MGA1064_CURSOR_BASE_ADR_LOW 0x04
368#define MGA1064_CURSOR_BASE_ADR_HI 0x05
369#define MGA1064_CURSOR_CTL 0x06
370#define MGA1064_CURSOR_COL0_RED 0x08
371#define MGA1064_CURSOR_COL0_GREEN 0x09
372#define MGA1064_CURSOR_COL0_BLUE 0x0a
373
374#define MGA1064_CURSOR_COL1_RED 0x0c
375#define MGA1064_CURSOR_COL1_GREEN 0x0d
376#define MGA1064_CURSOR_COL1_BLUE 0x0e
377
378#define MGA1064_CURSOR_COL2_RED 0x010
379#define MGA1064_CURSOR_COL2_GREEN 0x011
380#define MGA1064_CURSOR_COL2_BLUE 0x012
381
382#define MGA1064_VREF_CTL 0x018
383
384#define MGA1064_MUL_CTL 0x19
385#define MGA1064_MUL_CTL_8bits 0x0
386#define MGA1064_MUL_CTL_15bits 0x01
387#define MGA1064_MUL_CTL_16bits 0x02
388#define MGA1064_MUL_CTL_24bits 0x03
389#define MGA1064_MUL_CTL_32bits 0x04
390#define MGA1064_MUL_CTL_2G8V16bits 0x05
391#define MGA1064_MUL_CTL_G16V16bits 0x06
392#define MGA1064_MUL_CTL_32_24bits 0x07
393
394#define MGA1064_PIX_CLK_CTL 0x1a
395#define MGA1064_PIX_CLK_CTL_CLK_DIS ( 0x01 << 2 )
396#define MGA1064_PIX_CLK_CTL_CLK_POW_DOWN ( 0x01 << 3 )
397#define MGA1064_PIX_CLK_CTL_SEL_PCI ( 0x00 << 0 )
398#define MGA1064_PIX_CLK_CTL_SEL_PLL ( 0x01 << 0 )
399#define MGA1064_PIX_CLK_CTL_SEL_EXT ( 0x02 << 0 )
400#define MGA1064_PIX_CLK_CTL_SEL_MSK ( 0x03 << 0 )
401
402#define MGA1064_GEN_CTL 0x1d
403#define MGA1064_GEN_CTL_SYNC_ON_GREEN_DIS (0x01 << 5)
404#define MGA1064_MISC_CTL 0x1e
405#define MGA1064_MISC_CTL_DAC_EN ( 0x01 << 0 )
406#define MGA1064_MISC_CTL_VGA ( 0x01 << 1 )
407#define MGA1064_MISC_CTL_DIS_CON ( 0x03 << 1 )
408#define MGA1064_MISC_CTL_MAFC ( 0x02 << 1 )
409#define MGA1064_MISC_CTL_VGA8 ( 0x01 << 3 )
410#define MGA1064_MISC_CTL_DAC_RAM_CS ( 0x01 << 4 )
411
412#define MGA1064_GEN_IO_CTL2 0x29
413#define MGA1064_GEN_IO_CTL 0x2a
414#define MGA1064_GEN_IO_DATA 0x2b
415#define MGA1064_SYS_PLL_M 0x2c
416#define MGA1064_SYS_PLL_N 0x2d
417#define MGA1064_SYS_PLL_P 0x2e
418#define MGA1064_SYS_PLL_STAT 0x2f
419
420#define MGA1064_REMHEADCTL 0x30
421#define MGA1064_REMHEADCTL_CLKDIS ( 0x01 << 0 )
422#define MGA1064_REMHEADCTL_CLKSL_OFF ( 0x00 << 1 )
423#define MGA1064_REMHEADCTL_CLKSL_PLL ( 0x01 << 1 )
424#define MGA1064_REMHEADCTL_CLKSL_PCI ( 0x02 << 1 )
425#define MGA1064_REMHEADCTL_CLKSL_MSK ( 0x03 << 1 )
426
427#define MGA1064_REMHEADCTL2 0x31
428
429#define MGA1064_ZOOM_CTL 0x38
430#define MGA1064_SENSE_TST 0x3a
431
432#define MGA1064_CRC_LSB 0x3c
433#define MGA1064_CRC_MSB 0x3d
434#define MGA1064_CRC_CTL 0x3e
435#define MGA1064_COL_KEY_MSK_LSB 0x40
436#define MGA1064_COL_KEY_MSK_MSB 0x41
437#define MGA1064_COL_KEY_LSB 0x42
438#define MGA1064_COL_KEY_MSB 0x43
439#define MGA1064_PIX_PLLA_M 0x44
440#define MGA1064_PIX_PLLA_N 0x45
441#define MGA1064_PIX_PLLA_P 0x46
442#define MGA1064_PIX_PLLB_M 0x48
443#define MGA1064_PIX_PLLB_N 0x49
444#define MGA1064_PIX_PLLB_P 0x4a
445#define MGA1064_PIX_PLLC_M 0x4c
446#define MGA1064_PIX_PLLC_N 0x4d
447#define MGA1064_PIX_PLLC_P 0x4e
448
449#define MGA1064_PIX_PLL_STAT 0x4f
450
451/*Added for G450 dual head*/
452
453#define MGA1064_VID_PLL_STAT 0x8c
454#define MGA1064_VID_PLL_P 0x8D
455#define MGA1064_VID_PLL_M 0x8E
456#define MGA1064_VID_PLL_N 0x8F
457
458/* Modified PLL for G200 Winbond (G200WB) */
459#define MGA1064_WB_PIX_PLLC_M 0xb7
460#define MGA1064_WB_PIX_PLLC_N 0xb6
461#define MGA1064_WB_PIX_PLLC_P 0xb8
462
463/* Modified PLL for G200 Maxim (G200EV) */
464#define MGA1064_EV_PIX_PLLC_M 0xb6
465#define MGA1064_EV_PIX_PLLC_N 0xb7
466#define MGA1064_EV_PIX_PLLC_P 0xb8
467
468/* Modified PLL for G200 EH */
469#define MGA1064_EH_PIX_PLLC_M 0xb6
470#define MGA1064_EH_PIX_PLLC_N 0xb7
471#define MGA1064_EH_PIX_PLLC_P 0xb8
472
473/* Modified PLL for G200 Maxim (G200ER) */
474#define MGA1064_ER_PIX_PLLC_M 0xb7
475#define MGA1064_ER_PIX_PLLC_N 0xb6
476#define MGA1064_ER_PIX_PLLC_P 0xb8
477
478#define MGA1064_DISP_CTL 0x8a
479#define MGA1064_DISP_CTL_DAC1OUTSEL_MASK 0x01
480#define MGA1064_DISP_CTL_DAC1OUTSEL_DIS 0x00
481#define MGA1064_DISP_CTL_DAC1OUTSEL_EN 0x01
482#define MGA1064_DISP_CTL_DAC2OUTSEL_MASK (0x03 << 2)
483#define MGA1064_DISP_CTL_DAC2OUTSEL_DIS 0x00
484#define MGA1064_DISP_CTL_DAC2OUTSEL_CRTC1 (0x01 << 2)
485#define MGA1064_DISP_CTL_DAC2OUTSEL_CRTC2 (0x02 << 2)
486#define MGA1064_DISP_CTL_DAC2OUTSEL_TVE (0x03 << 2)
487#define MGA1064_DISP_CTL_PANOUTSEL_MASK (0x03 << 5)
488#define MGA1064_DISP_CTL_PANOUTSEL_DIS 0x00
489#define MGA1064_DISP_CTL_PANOUTSEL_CRTC1 (0x01 << 5)
490#define MGA1064_DISP_CTL_PANOUTSEL_CRTC2RGB (0x02 << 5)
491#define MGA1064_DISP_CTL_PANOUTSEL_CRTC2656 (0x03 << 5)
492
493#define MGA1064_SYNC_CTL 0x8b
494
495#define MGA1064_PWR_CTL 0xa0
496#define MGA1064_PWR_CTL_DAC2_EN (0x01 << 0)
497#define MGA1064_PWR_CTL_VID_PLL_EN (0x01 << 1)
498#define MGA1064_PWR_CTL_PANEL_EN (0x01 << 2)
499#define MGA1064_PWR_CTL_RFIFO_EN (0x01 << 3)
500#define MGA1064_PWR_CTL_CFIFO_EN (0x01 << 4)
501
502#define MGA1064_PAN_CTL 0xa2
503
504/* Using crtc2 */
505#define MGAREG2_C2CTL 0x10
506#define MGAREG2_C2HPARAM 0x14
507#define MGAREG2_C2HSYNC 0x18
508#define MGAREG2_C2VPARAM 0x1c
509#define MGAREG2_C2VSYNC 0x20
510#define MGAREG2_C2STARTADD0 0x28
511
512#define MGAREG2_C2OFFSET 0x40
513#define MGAREG2_C2DATACTL 0x4c
514
515#define MGAREG_C2CTL 0x3c10
516#define MGAREG_C2CTL_C2_EN 0x01
517
518#define MGAREG_C2_HIPRILVL_M (0x07 << 4)
519#define MGAREG_C2_MAXHIPRI_M (0x07 << 8)
520
521#define MGAREG_C2CTL_PIXCLKSEL_MASK (0x03 << 1)
522#define MGAREG_C2CTL_PIXCLKSELH_MASK (0x01 << 14)
523#define MGAREG_C2CTL_PIXCLKSEL_PCICLK 0x00
524#define MGAREG_C2CTL_PIXCLKSEL_VDOCLK (0x01 << 1)
525#define MGAREG_C2CTL_PIXCLKSEL_PIXELPLL (0x02 << 1)
526#define MGAREG_C2CTL_PIXCLKSEL_VIDEOPLL (0x03 << 1)
527#define MGAREG_C2CTL_PIXCLKSEL_VDCLK (0x01 << 14)
528
529#define MGAREG_C2CTL_PIXCLKSEL_CRISTAL (0x01 << 1) | (0x01 << 14)
530#define MGAREG_C2CTL_PIXCLKSEL_SYSTEMPLL (0x02 << 1) | (0x01 << 14)
531
532#define MGAREG_C2CTL_PIXCLKDIS_MASK (0x01 << 3)
533#define MGAREG_C2CTL_PIXCLKDIS_DISABLE (0x01 << 3)
534
535#define MGAREG_C2CTL_CRTCDACSEL_MASK (0x01 << 20)
536#define MGAREG_C2CTL_CRTCDACSEL_CRTC1 0x00
537#define MGAREG_C2CTL_CRTCDACSEL_CRTC2 (0x01 << 20)
538
539#define MGAREG_C2HPARAM 0x3c14
540#define MGAREG_C2HSYNC 0x3c18
541#define MGAREG_C2VPARAM 0x3c1c
542#define MGAREG_C2VSYNC 0x3c20
543#define MGAREG_C2STARTADD0 0x3c28
544
545#define MGAREG_C2OFFSET 0x3c40
546#define MGAREG_C2DATACTL 0x3c4c
547
548/* video register */
549
550#define MGAREG_BESA1C3ORG 0x3d60
551#define MGAREG_BESA1CORG 0x3d10
552#define MGAREG_BESA1ORG 0x3d00
553#define MGAREG_BESCTL 0x3d20
554#define MGAREG_BESGLOBCTL 0x3dc0
555#define MGAREG_BESHCOORD 0x3d28
556#define MGAREG_BESHISCAL 0x3d30
557#define MGAREG_BESHSRCEND 0x3d3c
558#define MGAREG_BESHSRCLST 0x3d50
559#define MGAREG_BESHSRCST 0x3d38
560#define MGAREG_BESLUMACTL 0x3d40
561#define MGAREG_BESPITCH 0x3d24
562#define MGAREG_BESV1SRCLST 0x3d54
563#define MGAREG_BESV1WGHT 0x3d48
564#define MGAREG_BESVCOORD 0x3d2c
565#define MGAREG_BESVISCAL 0x3d34
566
567/* texture engine registers */
568
569#define MGAREG_TMR0 0x2c00
570#define MGAREG_TMR1 0x2c04
571#define MGAREG_TMR2 0x2c08
572#define MGAREG_TMR3 0x2c0c
573#define MGAREG_TMR4 0x2c10
574#define MGAREG_TMR5 0x2c14
575#define MGAREG_TMR6 0x2c18
576#define MGAREG_TMR7 0x2c1c
577#define MGAREG_TMR8 0x2c20
578#define MGAREG_TEXORG 0x2c24
579#define MGAREG_TEXWIDTH 0x2c28
580#define MGAREG_TEXHEIGHT 0x2c2c
581#define MGAREG_TEXCTL 0x2c30
582# define MGA_TW4 (0x00000000)
583# define MGA_TW8 (0x00000001)
584# define MGA_TW15 (0x00000002)
585# define MGA_TW16 (0x00000003)
586# define MGA_TW12 (0x00000004)
587# define MGA_TW32 (0x00000006)
588# define MGA_TW8A (0x00000007)
589# define MGA_TW8AL (0x00000008)
590# define MGA_TW422 (0x0000000A)
591# define MGA_TW422UYVY (0x0000000B)
592# define MGA_PITCHLIN (0x00000100)
593# define MGA_NOPERSPECTIVE (0x00200000)
594# define MGA_TAKEY (0x02000000)
595# define MGA_TAMASK (0x04000000)
596# define MGA_CLAMPUV (0x18000000)
597# define MGA_TEXMODULATE (0x20000000)
598#define MGAREG_TEXCTL2 0x2c3c
599# define MGA_G400_TC2_MAGIC (0x00008000)
600# define MGA_TC2_DECALBLEND (0x00000001)
601# define MGA_TC2_IDECAL (0x00000002)
602# define MGA_TC2_DECALDIS (0x00000004)
603# define MGA_TC2_CKSTRANSDIS (0x00000010)
604# define MGA_TC2_BORDEREN (0x00000020)
605# define MGA_TC2_SPECEN (0x00000040)
606# define MGA_TC2_DUALTEX (0x00000080)
607# define MGA_TC2_TABLEFOG (0x00000100)
608# define MGA_TC2_BUMPMAP (0x00000200)
609# define MGA_TC2_SELECT_TMU1 (0x80000000)
610#define MGAREG_TEXTRANS 0x2c34
611#define MGAREG_TEXTRANSHIGH 0x2c38
612#define MGAREG_TEXFILTER 0x2c58
613# define MGA_MIN_NRST (0x00000000)
614# define MGA_MIN_BILIN (0x00000002)
615# define MGA_MIN_ANISO (0x0000000D)
616# define MGA_MAG_NRST (0x00000000)
617# define MGA_MAG_BILIN (0x00000020)
618# define MGA_FILTERALPHA (0x00100000)
619#define MGAREG_ALPHASTART 0x2c70
620#define MGAREG_ALPHAXINC 0x2c74
621#define MGAREG_ALPHAYINC 0x2c78
622#define MGAREG_ALPHACTRL 0x2c7c
623# define MGA_SRC_ZERO (0x00000000)
624# define MGA_SRC_ONE (0x00000001)
625# define MGA_SRC_DST_COLOR (0x00000002)
626# define MGA_SRC_ONE_MINUS_DST_COLOR (0x00000003)
627# define MGA_SRC_ALPHA (0x00000004)
628# define MGA_SRC_ONE_MINUS_SRC_ALPHA (0x00000005)
629# define MGA_SRC_DST_ALPHA (0x00000006)
630# define MGA_SRC_ONE_MINUS_DST_ALPHA (0x00000007)
631# define MGA_SRC_SRC_ALPHA_SATURATE (0x00000008)
632# define MGA_SRC_BLEND_MASK (0x0000000f)
633# define MGA_DST_ZERO (0x00000000)
634# define MGA_DST_ONE (0x00000010)
635# define MGA_DST_SRC_COLOR (0x00000020)
636# define MGA_DST_ONE_MINUS_SRC_COLOR (0x00000030)
637# define MGA_DST_SRC_ALPHA (0x00000040)
638# define MGA_DST_ONE_MINUS_SRC_ALPHA (0x00000050)
639# define MGA_DST_DST_ALPHA (0x00000060)
640# define MGA_DST_ONE_MINUS_DST_ALPHA (0x00000070)
641# define MGA_DST_BLEND_MASK (0x00000070)
642# define MGA_ALPHACHANNEL (0x00000100)
643# define MGA_VIDEOALPHA (0x00000200)
644# define MGA_DIFFUSEDALPHA (0x01000000)
645# define MGA_MODULATEDALPHA (0x02000000)
646#define MGAREG_TDUALSTAGE0 (0x2CF8)
647#define MGAREG_TDUALSTAGE1 (0x2CFC)
648# define MGA_TDS_COLOR_ARG2_DIFFUSE (0x00000000)
649# define MGA_TDS_COLOR_ARG2_SPECULAR (0x00000001)
650# define MGA_TDS_COLOR_ARG2_FCOL (0x00000002)
651# define MGA_TDS_COLOR_ARG2_PREVSTAGE (0x00000003)
652# define MGA_TDS_COLOR_ALPHA_DIFFUSE (0x00000000)
653# define MGA_TDS_COLOR_ALPHA_FCOL (0x00000004)
654# define MGA_TDS_COLOR_ALPHA_CURRTEX (0x00000008)
655# define MGA_TDS_COLOR_ALPHA_PREVTEX (0x0000000c)
656# define MGA_TDS_COLOR_ALPHA_PREVSTAGE (0x00000010)
657# define MGA_TDS_COLOR_ARG1_REPLICATEALPHA (0x00000020)
658# define MGA_TDS_COLOR_ARG1_INV (0x00000040)
659# define MGA_TDS_COLOR_ARG2_REPLICATEALPHA (0x00000080)
660# define MGA_TDS_COLOR_ARG2_INV (0x00000100)
661# define MGA_TDS_COLOR_ALPHA1INV (0x00000200)
662# define MGA_TDS_COLOR_ALPHA2INV (0x00000400)
663# define MGA_TDS_COLOR_ARG1MUL_ALPHA1 (0x00000800)
664# define MGA_TDS_COLOR_ARG2MUL_ALPHA2 (0x00001000)
665# define MGA_TDS_COLOR_ARG1ADD_MULOUT (0x00002000)
666# define MGA_TDS_COLOR_ARG2ADD_MULOUT (0x00004000)
667# define MGA_TDS_COLOR_MODBRIGHT_2X (0x00008000)
668# define MGA_TDS_COLOR_MODBRIGHT_4X (0x00010000)
669# define MGA_TDS_COLOR_ADD_SUB (0x00000000)
670# define MGA_TDS_COLOR_ADD_ADD (0x00020000)
671# define MGA_TDS_COLOR_ADD2X (0x00040000)
672# define MGA_TDS_COLOR_ADDBIAS (0x00080000)
673# define MGA_TDS_COLOR_BLEND (0x00100000)
674# define MGA_TDS_COLOR_SEL_ARG1 (0x00000000)
675# define MGA_TDS_COLOR_SEL_ARG2 (0x00200000)
676# define MGA_TDS_COLOR_SEL_ADD (0x00400000)
677# define MGA_TDS_COLOR_SEL_MUL (0x00600000)
678# define MGA_TDS_ALPHA_ARG1_INV (0x00800000)
679# define MGA_TDS_ALPHA_ARG2_DIFFUSE (0x00000000)
680# define MGA_TDS_ALPHA_ARG2_FCOL (0x01000000)
681# define MGA_TDS_ALPHA_ARG2_PREVTEX (0x02000000)
682# define MGA_TDS_ALPHA_ARG2_PREVSTAGE (0x03000000)
683# define MGA_TDS_ALPHA_ARG2_INV (0x04000000)
684# define MGA_TDS_ALPHA_ADD (0x08000000)
685# define MGA_TDS_ALPHA_ADDBIAS (0x10000000)
686# define MGA_TDS_ALPHA_ADD2X (0x20000000)
687# define MGA_TDS_ALPHA_SEL_ARG1 (0x00000000)
688# define MGA_TDS_ALPHA_SEL_ARG2 (0x40000000)
689# define MGA_TDS_ALPHA_SEL_ADD (0x80000000)
690# define MGA_TDS_ALPHA_SEL_MUL (0xc0000000)
691
692#define MGAREG_DWGSYNC 0x2c4c
693
694#define MGAREG_AGP_PLL 0x1e4c
695#define MGA_AGP2XPLL_ENABLE 0x1
696#define MGA_AGP2XPLL_DISABLE 0x0
697
698#endif