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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * This dts file supports Dalmore A04.
4 * Other board revisions are not supported
5 */
6
7/dts-v1/;
8
9#include <dt-bindings/input/input.h>
10#include "tegra114.dtsi"
11
12/ {
13 model = "NVIDIA Tegra114 Dalmore evaluation board";
14 compatible = "nvidia,dalmore", "nvidia,tegra114";
15
16 aliases {
17 rtc0 = "/i2c@7000d000/tps65913@58";
18 rtc1 = "/rtc@7000e000";
19 serial0 = &uartd;
20 };
21
22 chosen {
23 stdout-path = "serial0:115200n8";
24 };
25
26 memory@80000000 {
27 reg = <0x80000000 0x40000000>;
28 };
29
30 host1x@50000000 {
31 hdmi@54280000 {
32 status = "okay";
33
34 hdmi-supply = <&vdd_5v0_hdmi>;
35 vdd-supply = <&vdd_hdmi_reg>;
36 pll-supply = <&palmas_smps3_reg>;
37
38 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
39 nvidia,hpd-gpio =
40 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
41 };
42
43 dsi@54300000 {
44 status = "okay";
45
46 avdd-dsi-csi-supply = <&avdd_1v2_reg>;
47
48 panel@0 {
49 compatible = "panasonic,vvx10f004b00",
50 "simple-panel";
51 reg = <0>;
52
53 power-supply = <&avdd_lcd_reg>;
54 backlight = <&backlight>;
55 };
56 };
57 };
58
59 pinmux@70000868 {
60 pinctrl-names = "default";
61 pinctrl-0 = <&state_default>;
62
63 state_default: pinmux {
64 clk1_out_pw4 {
65 nvidia,pins = "clk1_out_pw4";
66 nvidia,function = "extperiph1";
67 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
68 nvidia,tristate = <TEGRA_PIN_DISABLE>;
69 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
70 };
71 dap1_din_pn1 {
72 nvidia,pins = "dap1_din_pn1";
73 nvidia,function = "i2s0";
74 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
75 nvidia,tristate = <TEGRA_PIN_ENABLE>;
76 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
77 };
78 dap1_dout_pn2 {
79 nvidia,pins = "dap1_dout_pn2",
80 "dap1_fs_pn0",
81 "dap1_sclk_pn3";
82 nvidia,function = "i2s0";
83 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
84 nvidia,tristate = <TEGRA_PIN_DISABLE>;
85 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
86 };
87 dap2_din_pa4 {
88 nvidia,pins = "dap2_din_pa4";
89 nvidia,function = "i2s1";
90 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
91 nvidia,tristate = <TEGRA_PIN_ENABLE>;
92 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
93 };
94 dap2_dout_pa5 {
95 nvidia,pins = "dap2_dout_pa5",
96 "dap2_fs_pa2",
97 "dap2_sclk_pa3";
98 nvidia,function = "i2s1";
99 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
100 nvidia,tristate = <TEGRA_PIN_DISABLE>;
101 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
102 };
103 dap4_din_pp5 {
104 nvidia,pins = "dap4_din_pp5",
105 "dap4_dout_pp6",
106 "dap4_fs_pp4",
107 "dap4_sclk_pp7";
108 nvidia,function = "i2s3";
109 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
110 nvidia,tristate = <TEGRA_PIN_DISABLE>;
111 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
112 };
113 dvfs_pwm_px0 {
114 nvidia,pins = "dvfs_pwm_px0",
115 "dvfs_clk_px2";
116 nvidia,function = "cldvfs";
117 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
118 nvidia,tristate = <TEGRA_PIN_DISABLE>;
119 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
120 };
121 ulpi_clk_py0 {
122 nvidia,pins = "ulpi_clk_py0",
123 "ulpi_data0_po1",
124 "ulpi_data1_po2",
125 "ulpi_data2_po3",
126 "ulpi_data3_po4",
127 "ulpi_data4_po5",
128 "ulpi_data5_po6",
129 "ulpi_data6_po7",
130 "ulpi_data7_po0";
131 nvidia,function = "ulpi";
132 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
133 nvidia,tristate = <TEGRA_PIN_DISABLE>;
134 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
135 };
136 ulpi_dir_py1 {
137 nvidia,pins = "ulpi_dir_py1",
138 "ulpi_nxt_py2";
139 nvidia,function = "ulpi";
140 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
141 nvidia,tristate = <TEGRA_PIN_ENABLE>;
142 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
143 };
144 ulpi_stp_py3 {
145 nvidia,pins = "ulpi_stp_py3";
146 nvidia,function = "ulpi";
147 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
148 nvidia,tristate = <TEGRA_PIN_DISABLE>;
149 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
150 };
151 cam_i2c_scl_pbb1 {
152 nvidia,pins = "cam_i2c_scl_pbb1",
153 "cam_i2c_sda_pbb2";
154 nvidia,function = "i2c3";
155 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
156 nvidia,tristate = <TEGRA_PIN_DISABLE>;
157 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
158 nvidia,lock = <TEGRA_PIN_DISABLE>;
159 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
160 };
161 cam_mclk_pcc0 {
162 nvidia,pins = "cam_mclk_pcc0",
163 "pbb0";
164 nvidia,function = "vi_alt3";
165 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
166 nvidia,tristate = <TEGRA_PIN_DISABLE>;
167 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
168 nvidia,lock = <TEGRA_PIN_DISABLE>;
169 };
170 gen2_i2c_scl_pt5 {
171 nvidia,pins = "gen2_i2c_scl_pt5",
172 "gen2_i2c_sda_pt6";
173 nvidia,function = "i2c2";
174 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
175 nvidia,tristate = <TEGRA_PIN_DISABLE>;
176 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
177 nvidia,lock = <TEGRA_PIN_DISABLE>;
178 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
179 };
180 gmi_a16_pj7 {
181 nvidia,pins = "gmi_a16_pj7";
182 nvidia,function = "uartd";
183 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
184 nvidia,tristate = <TEGRA_PIN_DISABLE>;
185 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
186 };
187 gmi_a17_pb0 {
188 nvidia,pins = "gmi_a17_pb0",
189 "gmi_a18_pb1";
190 nvidia,function = "uartd";
191 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
192 nvidia,tristate = <TEGRA_PIN_ENABLE>;
193 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
194 };
195 gmi_a19_pk7 {
196 nvidia,pins = "gmi_a19_pk7";
197 nvidia,function = "uartd";
198 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
199 nvidia,tristate = <TEGRA_PIN_DISABLE>;
200 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
201 };
202 gmi_ad5_pg5 {
203 nvidia,pins = "gmi_ad5_pg5",
204 "gmi_cs6_n_pi3",
205 "gmi_wr_n_pi0";
206 nvidia,function = "spi4";
207 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
208 nvidia,tristate = <TEGRA_PIN_DISABLE>;
209 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
210 };
211 gmi_ad6_pg6 {
212 nvidia,pins = "gmi_ad6_pg6",
213 "gmi_ad7_pg7";
214 nvidia,function = "spi4";
215 nvidia,pull = <TEGRA_PIN_PULL_UP>;
216 nvidia,tristate = <TEGRA_PIN_DISABLE>;
217 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
218 };
219 gmi_ad12_ph4 {
220 nvidia,pins = "gmi_ad12_ph4";
221 nvidia,function = "rsvd4";
222 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
223 nvidia,tristate = <TEGRA_PIN_DISABLE>;
224 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
225 };
226 gmi_ad9_ph1 {
227 nvidia,pins = "gmi_ad9_ph1";
228 nvidia,function = "pwm1";
229 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
230 nvidia,tristate = <TEGRA_PIN_DISABLE>;
231 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
232 };
233 gmi_cs1_n_pj2 {
234 nvidia,pins = "gmi_cs1_n_pj2",
235 "gmi_oe_n_pi1";
236 nvidia,function = "soc";
237 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
238 nvidia,tristate = <TEGRA_PIN_ENABLE>;
239 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
240 };
241 clk2_out_pw5 {
242 nvidia,pins = "clk2_out_pw5";
243 nvidia,function = "extperiph2";
244 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
245 nvidia,tristate = <TEGRA_PIN_DISABLE>;
246 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
247 };
248 sdmmc1_clk_pz0 {
249 nvidia,pins = "sdmmc1_clk_pz0";
250 nvidia,function = "sdmmc1";
251 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
252 nvidia,tristate = <TEGRA_PIN_DISABLE>;
253 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
254 };
255 sdmmc1_cmd_pz1 {
256 nvidia,pins = "sdmmc1_cmd_pz1",
257 "sdmmc1_dat0_py7",
258 "sdmmc1_dat1_py6",
259 "sdmmc1_dat2_py5",
260 "sdmmc1_dat3_py4";
261 nvidia,function = "sdmmc1";
262 nvidia,pull = <TEGRA_PIN_PULL_UP>;
263 nvidia,tristate = <TEGRA_PIN_DISABLE>;
264 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
265 };
266 sdmmc1_wp_n_pv3 {
267 nvidia,pins = "sdmmc1_wp_n_pv3";
268 nvidia,function = "spi4";
269 nvidia,pull = <TEGRA_PIN_PULL_UP>;
270 nvidia,tristate = <TEGRA_PIN_DISABLE>;
271 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
272 };
273 sdmmc3_clk_pa6 {
274 nvidia,pins = "sdmmc3_clk_pa6";
275 nvidia,function = "sdmmc3";
276 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
277 nvidia,tristate = <TEGRA_PIN_DISABLE>;
278 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
279 };
280 sdmmc3_cmd_pa7 {
281 nvidia,pins = "sdmmc3_cmd_pa7",
282 "sdmmc3_dat0_pb7",
283 "sdmmc3_dat1_pb6",
284 "sdmmc3_dat2_pb5",
285 "sdmmc3_dat3_pb4",
286 "kb_col4_pq4",
287 "sdmmc3_clk_lb_out_pee4",
288 "sdmmc3_clk_lb_in_pee5";
289 nvidia,function = "sdmmc3";
290 nvidia,pull = <TEGRA_PIN_PULL_UP>;
291 nvidia,tristate = <TEGRA_PIN_DISABLE>;
292 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
293 };
294 sdmmc4_clk_pcc4 {
295 nvidia,pins = "sdmmc4_clk_pcc4";
296 nvidia,function = "sdmmc4";
297 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
298 nvidia,tristate = <TEGRA_PIN_DISABLE>;
299 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
300 };
301 sdmmc4_cmd_pt7 {
302 nvidia,pins = "sdmmc4_cmd_pt7",
303 "sdmmc4_dat0_paa0",
304 "sdmmc4_dat1_paa1",
305 "sdmmc4_dat2_paa2",
306 "sdmmc4_dat3_paa3",
307 "sdmmc4_dat4_paa4",
308 "sdmmc4_dat5_paa5",
309 "sdmmc4_dat6_paa6",
310 "sdmmc4_dat7_paa7";
311 nvidia,function = "sdmmc4";
312 nvidia,pull = <TEGRA_PIN_PULL_UP>;
313 nvidia,tristate = <TEGRA_PIN_DISABLE>;
314 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
315 };
316 clk_32k_out_pa0 {
317 nvidia,pins = "clk_32k_out_pa0";
318 nvidia,function = "blink";
319 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
320 nvidia,tristate = <TEGRA_PIN_DISABLE>;
321 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
322 };
323 kb_col0_pq0 {
324 nvidia,pins = "kb_col0_pq0",
325 "kb_col1_pq1",
326 "kb_col2_pq2",
327 "kb_row0_pr0",
328 "kb_row1_pr1",
329 "kb_row2_pr2";
330 nvidia,function = "kbc";
331 nvidia,pull = <TEGRA_PIN_PULL_UP>;
332 nvidia,tristate = <TEGRA_PIN_DISABLE>;
333 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
334 };
335 dap3_din_pp1 {
336 nvidia,pins = "dap3_din_pp1",
337 "dap3_sclk_pp3";
338 nvidia,function = "displayb";
339 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
340 nvidia,tristate = <TEGRA_PIN_ENABLE>;
341 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
342 };
343 pv0 {
344 nvidia,pins = "pv0";
345 nvidia,function = "rsvd4";
346 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
347 nvidia,tristate = <TEGRA_PIN_ENABLE>;
348 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
349 };
350 kb_row7_pr7 {
351 nvidia,pins = "kb_row7_pr7";
352 nvidia,function = "rsvd2";
353 nvidia,pull = <TEGRA_PIN_PULL_UP>;
354 nvidia,tristate = <TEGRA_PIN_DISABLE>;
355 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
356 };
357 kb_row10_ps2 {
358 nvidia,pins = "kb_row10_ps2";
359 nvidia,function = "uarta";
360 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
361 nvidia,tristate = <TEGRA_PIN_ENABLE>;
362 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
363 };
364 kb_row9_ps1 {
365 nvidia,pins = "kb_row9_ps1";
366 nvidia,function = "uarta";
367 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
368 nvidia,tristate = <TEGRA_PIN_DISABLE>;
369 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
370 };
371 pwr_i2c_scl_pz6 {
372 nvidia,pins = "pwr_i2c_scl_pz6",
373 "pwr_i2c_sda_pz7";
374 nvidia,function = "i2cpwr";
375 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
376 nvidia,tristate = <TEGRA_PIN_DISABLE>;
377 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
378 nvidia,lock = <TEGRA_PIN_DISABLE>;
379 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
380 };
381 sys_clk_req_pz5 {
382 nvidia,pins = "sys_clk_req_pz5";
383 nvidia,function = "sysclk";
384 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
385 nvidia,tristate = <TEGRA_PIN_DISABLE>;
386 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
387 };
388 core_pwr_req {
389 nvidia,pins = "core_pwr_req";
390 nvidia,function = "pwron";
391 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
392 nvidia,tristate = <TEGRA_PIN_DISABLE>;
393 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
394 };
395 cpu_pwr_req {
396 nvidia,pins = "cpu_pwr_req";
397 nvidia,function = "cpu";
398 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
399 nvidia,tristate = <TEGRA_PIN_DISABLE>;
400 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
401 };
402 pwr_int_n {
403 nvidia,pins = "pwr_int_n";
404 nvidia,function = "pmi";
405 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
406 nvidia,tristate = <TEGRA_PIN_ENABLE>;
407 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
408 };
409 reset_out_n {
410 nvidia,pins = "reset_out_n";
411 nvidia,function = "reset_out_n";
412 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
413 nvidia,tristate = <TEGRA_PIN_DISABLE>;
414 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
415 };
416 clk3_out_pee0 {
417 nvidia,pins = "clk3_out_pee0";
418 nvidia,function = "extperiph3";
419 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
420 nvidia,tristate = <TEGRA_PIN_DISABLE>;
421 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
422 };
423 gen1_i2c_scl_pc4 {
424 nvidia,pins = "gen1_i2c_scl_pc4",
425 "gen1_i2c_sda_pc5";
426 nvidia,function = "i2c1";
427 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
428 nvidia,tristate = <TEGRA_PIN_DISABLE>;
429 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
430 nvidia,lock = <TEGRA_PIN_DISABLE>;
431 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
432 };
433 uart2_cts_n_pj5 {
434 nvidia,pins = "uart2_cts_n_pj5";
435 nvidia,function = "uartb";
436 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
437 nvidia,tristate = <TEGRA_PIN_ENABLE>;
438 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
439 };
440 uart2_rts_n_pj6 {
441 nvidia,pins = "uart2_rts_n_pj6";
442 nvidia,function = "uartb";
443 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
444 nvidia,tristate = <TEGRA_PIN_DISABLE>;
445 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
446 };
447 uart2_rxd_pc3 {
448 nvidia,pins = "uart2_rxd_pc3";
449 nvidia,function = "irda";
450 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
451 nvidia,tristate = <TEGRA_PIN_ENABLE>;
452 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
453 };
454 uart2_txd_pc2 {
455 nvidia,pins = "uart2_txd_pc2";
456 nvidia,function = "irda";
457 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
458 nvidia,tristate = <TEGRA_PIN_DISABLE>;
459 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
460 };
461 uart3_cts_n_pa1 {
462 nvidia,pins = "uart3_cts_n_pa1",
463 "uart3_rxd_pw7";
464 nvidia,function = "uartc";
465 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
466 nvidia,tristate = <TEGRA_PIN_ENABLE>;
467 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
468 };
469 uart3_rts_n_pc0 {
470 nvidia,pins = "uart3_rts_n_pc0",
471 "uart3_txd_pw6";
472 nvidia,function = "uartc";
473 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
474 nvidia,tristate = <TEGRA_PIN_DISABLE>;
475 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
476 };
477 owr {
478 nvidia,pins = "owr";
479 nvidia,function = "owr";
480 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
481 nvidia,tristate = <TEGRA_PIN_DISABLE>;
482 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
483 };
484 hdmi_cec_pee3 {
485 nvidia,pins = "hdmi_cec_pee3";
486 nvidia,function = "cec";
487 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
488 nvidia,tristate = <TEGRA_PIN_DISABLE>;
489 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
490 nvidia,lock = <TEGRA_PIN_DISABLE>;
491 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
492 };
493 ddc_scl_pv4 {
494 nvidia,pins = "ddc_scl_pv4",
495 "ddc_sda_pv5";
496 nvidia,function = "i2c4";
497 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
498 nvidia,tristate = <TEGRA_PIN_DISABLE>;
499 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
500 nvidia,lock = <TEGRA_PIN_DISABLE>;
501 nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
502 };
503 spdif_in_pk6 {
504 nvidia,pins = "spdif_in_pk6";
505 nvidia,function = "usb";
506 nvidia,pull = <TEGRA_PIN_PULL_UP>;
507 nvidia,tristate = <TEGRA_PIN_DISABLE>;
508 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
509 nvidia,lock = <TEGRA_PIN_DISABLE>;
510 };
511 usb_vbus_en0_pn4 {
512 nvidia,pins = "usb_vbus_en0_pn4";
513 nvidia,function = "usb";
514 nvidia,pull = <TEGRA_PIN_PULL_UP>;
515 nvidia,tristate = <TEGRA_PIN_DISABLE>;
516 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
517 nvidia,lock = <TEGRA_PIN_DISABLE>;
518 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
519 };
520 gpio_x6_aud_px6 {
521 nvidia,pins = "gpio_x6_aud_px6";
522 nvidia,function = "spi6";
523 nvidia,pull = <TEGRA_PIN_PULL_UP>;
524 nvidia,tristate = <TEGRA_PIN_ENABLE>;
525 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
526 };
527 gpio_x4_aud_px4 {
528 nvidia,pins = "gpio_x4_aud_px4",
529 "gpio_x7_aud_px7";
530 nvidia,function = "rsvd1";
531 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
532 nvidia,tristate = <TEGRA_PIN_DISABLE>;
533 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
534 };
535 gpio_x5_aud_px5 {
536 nvidia,pins = "gpio_x5_aud_px5";
537 nvidia,function = "rsvd1";
538 nvidia,pull = <TEGRA_PIN_PULL_UP>;
539 nvidia,tristate = <TEGRA_PIN_DISABLE>;
540 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
541 };
542 gpio_w2_aud_pw2 {
543 nvidia,pins = "gpio_w2_aud_pw2";
544 nvidia,function = "rsvd2";
545 nvidia,pull = <TEGRA_PIN_PULL_UP>;
546 nvidia,tristate = <TEGRA_PIN_DISABLE>;
547 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
548 };
549 gpio_w3_aud_pw3 {
550 nvidia,pins = "gpio_w3_aud_pw3";
551 nvidia,function = "spi6";
552 nvidia,pull = <TEGRA_PIN_PULL_UP>;
553 nvidia,tristate = <TEGRA_PIN_DISABLE>;
554 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
555 };
556 gpio_x1_aud_px1 {
557 nvidia,pins = "gpio_x1_aud_px1";
558 nvidia,function = "rsvd4";
559 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
560 nvidia,tristate = <TEGRA_PIN_DISABLE>;
561 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
562 };
563 gpio_x3_aud_px3 {
564 nvidia,pins = "gpio_x3_aud_px3";
565 nvidia,function = "rsvd4";
566 nvidia,pull = <TEGRA_PIN_PULL_UP>;
567 nvidia,tristate = <TEGRA_PIN_DISABLE>;
568 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
569 };
570 dap3_fs_pp0 {
571 nvidia,pins = "dap3_fs_pp0";
572 nvidia,function = "i2s2";
573 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
574 nvidia,tristate = <TEGRA_PIN_DISABLE>;
575 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
576 };
577 dap3_dout_pp2 {
578 nvidia,pins = "dap3_dout_pp2";
579 nvidia,function = "i2s2";
580 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
581 nvidia,tristate = <TEGRA_PIN_DISABLE>;
582 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
583 };
584 pv1 {
585 nvidia,pins = "pv1";
586 nvidia,function = "rsvd1";
587 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
588 nvidia,tristate = <TEGRA_PIN_DISABLE>;
589 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
590 };
591 pbb3 {
592 nvidia,pins = "pbb3",
593 "pbb5",
594 "pbb6",
595 "pbb7";
596 nvidia,function = "rsvd4";
597 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
598 nvidia,tristate = <TEGRA_PIN_DISABLE>;
599 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
600 };
601 pcc1 {
602 nvidia,pins = "pcc1",
603 "pcc2";
604 nvidia,function = "rsvd4";
605 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
606 nvidia,tristate = <TEGRA_PIN_DISABLE>;
607 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
608 };
609 gmi_ad0_pg0 {
610 nvidia,pins = "gmi_ad0_pg0",
611 "gmi_ad1_pg1";
612 nvidia,function = "gmi";
613 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
614 nvidia,tristate = <TEGRA_PIN_DISABLE>;
615 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
616 };
617 gmi_ad10_ph2 {
618 nvidia,pins = "gmi_ad10_ph2",
619 "gmi_ad11_ph3",
620 "gmi_ad13_ph5",
621 "gmi_ad8_ph0",
622 "gmi_clk_pk1";
623 nvidia,function = "gmi";
624 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
625 nvidia,tristate = <TEGRA_PIN_DISABLE>;
626 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
627 };
628 gmi_ad2_pg2 {
629 nvidia,pins = "gmi_ad2_pg2",
630 "gmi_ad3_pg3";
631 nvidia,function = "gmi";
632 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
633 nvidia,tristate = <TEGRA_PIN_DISABLE>;
634 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
635 };
636 gmi_adv_n_pk0 {
637 nvidia,pins = "gmi_adv_n_pk0",
638 "gmi_cs0_n_pj0",
639 "gmi_cs2_n_pk3",
640 "gmi_cs4_n_pk2",
641 "gmi_cs7_n_pi6",
642 "gmi_dqs_p_pj3",
643 "gmi_iordy_pi5",
644 "gmi_wp_n_pc7";
645 nvidia,function = "gmi";
646 nvidia,pull = <TEGRA_PIN_PULL_UP>;
647 nvidia,tristate = <TEGRA_PIN_DISABLE>;
648 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
649 };
650 gmi_cs3_n_pk4 {
651 nvidia,pins = "gmi_cs3_n_pk4";
652 nvidia,function = "gmi";
653 nvidia,pull = <TEGRA_PIN_PULL_UP>;
654 nvidia,tristate = <TEGRA_PIN_DISABLE>;
655 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
656 };
657 clk2_req_pcc5 {
658 nvidia,pins = "clk2_req_pcc5";
659 nvidia,function = "rsvd4";
660 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
661 nvidia,tristate = <TEGRA_PIN_DISABLE>;
662 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
663 };
664 kb_col3_pq3 {
665 nvidia,pins = "kb_col3_pq3",
666 "kb_col6_pq6",
667 "kb_col7_pq7";
668 nvidia,function = "kbc";
669 nvidia,pull = <TEGRA_PIN_PULL_UP>;
670 nvidia,tristate = <TEGRA_PIN_DISABLE>;
671 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
672 };
673 kb_col5_pq5 {
674 nvidia,pins = "kb_col5_pq5";
675 nvidia,function = "kbc";
676 nvidia,pull = <TEGRA_PIN_PULL_UP>;
677 nvidia,tristate = <TEGRA_PIN_DISABLE>;
678 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
679 };
680 kb_row3_pr3 {
681 nvidia,pins = "kb_row3_pr3",
682 "kb_row4_pr4",
683 "kb_row6_pr6",
684 "kb_row8_ps0";
685 nvidia,function = "kbc";
686 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
687 nvidia,tristate = <TEGRA_PIN_DISABLE>;
688 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
689 };
690 clk3_req_pee1 {
691 nvidia,pins = "clk3_req_pee1";
692 nvidia,function = "rsvd4";
693 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
694 nvidia,tristate = <TEGRA_PIN_DISABLE>;
695 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
696 };
697 pu4 {
698 nvidia,pins = "pu4";
699 nvidia,function = "displayb";
700 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
701 nvidia,tristate = <TEGRA_PIN_DISABLE>;
702 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
703 };
704 pu5 {
705 nvidia,pins = "pu5",
706 "pu6";
707 nvidia,function = "displayb";
708 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
709 nvidia,tristate = <TEGRA_PIN_DISABLE>;
710 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
711 };
712 hdmi_int_pn7 {
713 nvidia,pins = "hdmi_int_pn7";
714 nvidia,function = "rsvd1";
715 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
716 nvidia,tristate = <TEGRA_PIN_DISABLE>;
717 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
718 };
719 clk1_req_pee2 {
720 nvidia,pins = "clk1_req_pee2",
721 "usb_vbus_en1_pn5";
722 nvidia,function = "rsvd4";
723 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
724 nvidia,tristate = <TEGRA_PIN_ENABLE>;
725 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
726 };
727
728 drive_sdio1 {
729 nvidia,pins = "drive_sdio1";
730 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
731 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
732 nvidia,pull-down-strength = <36>;
733 nvidia,pull-up-strength = <20>;
734 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>;
735 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOW>;
736 };
737 drive_sdio3 {
738 nvidia,pins = "drive_sdio3";
739 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
740 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
741 nvidia,pull-down-strength = <22>;
742 nvidia,pull-up-strength = <36>;
743 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
744 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
745 };
746 drive_gma {
747 nvidia,pins = "drive_gma";
748 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
749 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
750 nvidia,pull-down-strength = <2>;
751 nvidia,pull-up-strength = <1>;
752 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
753 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
754 };
755 };
756 };
757
758 serial@70006300 {
759 status = "okay";
760 };
761
762 pwm@7000a000 {
763 status = "okay";
764 };
765
766 i2c@7000c000 {
767 status = "okay";
768 clock-frequency = <100000>;
769
770 battery: smart-battery@b {
771 compatible = "ti,bq20z45", "sbs,sbs-battery";
772 reg = <0xb>;
773 battery-name = "battery";
774 sbs,i2c-retry-count = <2>;
775 sbs,poll-retry-count = <100>;
776 power-supplies = <&charger>;
777 };
778
779 rt5640: rt5640@1c {
780 compatible = "realtek,rt5640";
781 reg = <0x1c>;
782 interrupt-parent = <&gpio>;
783 interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_FALLING>;
784 realtek,ldo1-en-gpios =
785 <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
786 };
787
788 temperature-sensor@4c {
789 compatible = "onnn,nct1008";
790 reg = <0x4c>;
791 vcc-supply = <&palmas_ldo6_reg>;
792 interrupt-parent = <&gpio>;
793 interrupts = <TEGRA_GPIO(O, 4) IRQ_TYPE_LEVEL_LOW>;
794 };
795 };
796
797 hdmi_ddc: i2c@7000c700 {
798 status = "okay";
799 };
800
801 i2c@7000d000 {
802 status = "okay";
803 clock-frequency = <400000>;
804
805 tps51632@43 {
806 compatible = "ti,tps51632";
807 reg = <0x43>;
808 regulator-name = "vdd-cpu";
809 regulator-min-microvolt = <500000>;
810 regulator-max-microvolt = <1520000>;
811 regulator-boot-on;
812 regulator-always-on;
813 };
814
815 tps65090@48 {
816 compatible = "ti,tps65090";
817 reg = <0x48>;
818 interrupt-parent = <&gpio>;
819 interrupts = <TEGRA_GPIO(J, 0) IRQ_TYPE_LEVEL_HIGH>;
820
821 vsys1-supply = <&vdd_ac_bat_reg>;
822 vsys2-supply = <&vdd_ac_bat_reg>;
823 vsys3-supply = <&vdd_ac_bat_reg>;
824 infet1-supply = <&vdd_ac_bat_reg>;
825 infet2-supply = <&vdd_ac_bat_reg>;
826 infet3-supply = <&tps65090_dcdc2_reg>;
827 infet4-supply = <&tps65090_dcdc2_reg>;
828 infet5-supply = <&tps65090_dcdc2_reg>;
829 infet6-supply = <&tps65090_dcdc2_reg>;
830 infet7-supply = <&tps65090_dcdc2_reg>;
831 vsys-l1-supply = <&vdd_ac_bat_reg>;
832 vsys-l2-supply = <&vdd_ac_bat_reg>;
833
834 charger: charger {
835 compatible = "ti,tps65090-charger";
836 ti,enable-low-current-chrg;
837 };
838
839 regulators {
840 tps65090_dcdc1_reg: dcdc1 {
841 regulator-name = "vdd-sys-5v0";
842 regulator-always-on;
843 regulator-boot-on;
844 };
845
846 tps65090_dcdc2_reg: dcdc2 {
847 regulator-name = "vdd-sys-3v3";
848 regulator-always-on;
849 regulator-boot-on;
850 };
851
852 tps65090_dcdc3_reg: dcdc3 {
853 regulator-name = "vdd-ao";
854 regulator-always-on;
855 regulator-boot-on;
856 };
857
858 vdd_bl_reg: fet1 {
859 regulator-name = "vdd-lcd-bl";
860 };
861
862 fet3 {
863 regulator-name = "vdd-modem-3v3";
864 };
865
866 avdd_lcd_reg: fet4 {
867 regulator-name = "avdd-lcd";
868 };
869
870 fet5 {
871 regulator-name = "vdd-lvds";
872 };
873
874 fet6 {
875 regulator-name = "vdd-sd-slot";
876 regulator-always-on;
877 regulator-boot-on;
878 };
879
880 fet7 {
881 regulator-name = "vdd-com-3v3";
882 };
883
884 ldo1 {
885 regulator-name = "vdd-sby-5v0";
886 regulator-always-on;
887 regulator-boot-on;
888 };
889
890 ldo2 {
891 regulator-name = "vdd-sby-3v3";
892 regulator-always-on;
893 regulator-boot-on;
894 };
895 };
896 };
897
898 palmas: tps65913@58 {
899 compatible = "ti,palmas";
900 reg = <0x58>;
901 interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
902
903 #interrupt-cells = <2>;
904 interrupt-controller;
905
906 ti,system-power-controller;
907
908 palmas_gpio: gpio {
909 compatible = "ti,palmas-gpio";
910 gpio-controller;
911 #gpio-cells = <2>;
912 };
913
914 pmic {
915 compatible = "ti,tps65913-pmic", "ti,palmas-pmic";
916 smps1-in-supply = <&tps65090_dcdc3_reg>;
917 smps3-in-supply = <&tps65090_dcdc3_reg>;
918 smps4-in-supply = <&tps65090_dcdc2_reg>;
919 smps7-in-supply = <&tps65090_dcdc2_reg>;
920 smps8-in-supply = <&tps65090_dcdc2_reg>;
921 smps9-in-supply = <&tps65090_dcdc2_reg>;
922 ldo1-in-supply = <&tps65090_dcdc2_reg>;
923 ldo2-in-supply = <&tps65090_dcdc2_reg>;
924 ldo3-in-supply = <&palmas_smps3_reg>;
925 ldo4-in-supply = <&tps65090_dcdc2_reg>;
926 ldo5-in-supply = <&vdd_ac_bat_reg>;
927 ldo6-in-supply = <&tps65090_dcdc2_reg>;
928 ldo7-in-supply = <&tps65090_dcdc2_reg>;
929 ldo8-in-supply = <&tps65090_dcdc3_reg>;
930 ldo9-in-supply = <&palmas_smps9_reg>;
931 ldoln-in-supply = <&tps65090_dcdc1_reg>;
932 ldousb-in-supply = <&tps65090_dcdc1_reg>;
933
934 regulators {
935 smps12 {
936 regulator-name = "vddio-ddr";
937 regulator-min-microvolt = <1350000>;
938 regulator-max-microvolt = <1350000>;
939 regulator-always-on;
940 regulator-boot-on;
941 };
942
943 palmas_smps3_reg: smps3 {
944 regulator-name = "vddio-1v8";
945 regulator-min-microvolt = <1800000>;
946 regulator-max-microvolt = <1800000>;
947 regulator-always-on;
948 regulator-boot-on;
949 };
950
951 smps45 {
952 regulator-name = "vdd-core";
953 regulator-min-microvolt = <900000>;
954 regulator-max-microvolt = <1400000>;
955 regulator-always-on;
956 regulator-boot-on;
957 };
958
959 smps457 {
960 regulator-name = "vdd-core";
961 regulator-min-microvolt = <900000>;
962 regulator-max-microvolt = <1400000>;
963 regulator-always-on;
964 regulator-boot-on;
965 };
966
967 smps8 {
968 regulator-name = "avdd-pll";
969 regulator-min-microvolt = <1050000>;
970 regulator-max-microvolt = <1050000>;
971 regulator-always-on;
972 regulator-boot-on;
973 };
974
975 palmas_smps9_reg: smps9 {
976 regulator-name = "sdhci-vdd-sd-slot";
977 regulator-min-microvolt = <2800000>;
978 regulator-max-microvolt = <2800000>;
979 regulator-always-on;
980 };
981
982 ldo1 {
983 regulator-name = "avdd-cam1";
984 regulator-min-microvolt = <2800000>;
985 regulator-max-microvolt = <2800000>;
986 };
987
988 ldo2 {
989 regulator-name = "avdd-cam2";
990 regulator-min-microvolt = <2800000>;
991 regulator-max-microvolt = <2800000>;
992 };
993
994 avdd_1v2_reg: ldo3 {
995 regulator-name = "avdd-dsi-csi";
996 regulator-min-microvolt = <1200000>;
997 regulator-max-microvolt = <1200000>;
998 };
999
1000 ldo4 {
1001 regulator-name = "vpp-fuse";
1002 regulator-min-microvolt = <1800000>;
1003 regulator-max-microvolt = <1800000>;
1004 };
1005
1006 palmas_ldo6_reg: ldo6 {
1007 regulator-name = "vdd-sensor-2v85";
1008 regulator-min-microvolt = <2850000>;
1009 regulator-max-microvolt = <2850000>;
1010 };
1011
1012 ldo7 {
1013 regulator-name = "vdd-af-cam1";
1014 regulator-min-microvolt = <2800000>;
1015 regulator-max-microvolt = <2800000>;
1016 };
1017
1018 ldo8 {
1019 regulator-name = "vdd-rtc";
1020 regulator-min-microvolt = <900000>;
1021 regulator-max-microvolt = <900000>;
1022 regulator-always-on;
1023 regulator-boot-on;
1024 ti,enable-ldo8-tracking;
1025 };
1026
1027 ldo9 {
1028 regulator-name = "vddio-sdmmc-2";
1029 regulator-min-microvolt = <1800000>;
1030 regulator-max-microvolt = <3300000>;
1031 regulator-always-on;
1032 regulator-boot-on;
1033 };
1034
1035 ldoln {
1036 regulator-name = "hvdd-usb";
1037 regulator-min-microvolt = <3300000>;
1038 regulator-max-microvolt = <3300000>;
1039 };
1040
1041 ldousb {
1042 regulator-name = "avdd-usb";
1043 regulator-min-microvolt = <3300000>;
1044 regulator-max-microvolt = <3300000>;
1045 regulator-always-on;
1046 regulator-boot-on;
1047 };
1048
1049 regen1 {
1050 regulator-name = "rail-3v3";
1051 regulator-max-microvolt = <3300000>;
1052 regulator-always-on;
1053 regulator-boot-on;
1054 };
1055
1056 regen2 {
1057 regulator-name = "rail-5v0";
1058 regulator-max-microvolt = <5000000>;
1059 regulator-always-on;
1060 regulator-boot-on;
1061 };
1062 };
1063 };
1064
1065 rtc {
1066 compatible = "ti,palmas-rtc";
1067 interrupt-parent = <&palmas>;
1068 interrupts = <8 0>;
1069 };
1070
1071 pinmux {
1072 compatible = "ti,tps65913-pinctrl";
1073 pinctrl-names = "default";
1074 pinctrl-0 = <&palmas_default>;
1075
1076 palmas_default: pinmux {
1077 pin_gpio6 {
1078 pins = "gpio6";
1079 function = "gpio";
1080 };
1081 };
1082 };
1083 };
1084 };
1085
1086 spi@7000da00 {
1087 status = "okay";
1088 spi-max-frequency = <25000000>;
1089 spi-flash@0 {
1090 compatible = "winbond,w25q32dw", "jedec,spi-nor";
1091 reg = <0>;
1092 spi-max-frequency = <20000000>;
1093 };
1094 };
1095
1096 pmc@7000e400 {
1097 nvidia,invert-interrupt;
1098 nvidia,suspend-mode = <1>;
1099 nvidia,cpu-pwr-good-time = <500>;
1100 nvidia,cpu-pwr-off-time = <300>;
1101 nvidia,core-pwr-good-time = <641 3845>;
1102 nvidia,core-pwr-off-time = <61036>;
1103 nvidia,core-power-req-active-high;
1104 nvidia,sys-clock-req-active-high;
1105 };
1106
1107 ahub@70080000 {
1108 i2s@70080400 {
1109 status = "okay";
1110 };
1111 };
1112
1113 sdhci@78000400 {
1114 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
1115 wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
1116 bus-width = <4>;
1117 status = "okay";
1118 };
1119
1120 sdhci@78000600 {
1121 bus-width = <8>;
1122 status = "okay";
1123 non-removable;
1124 };
1125
1126 usb@7d000000 {
1127 compatible = "nvidia,tegra114-udc";
1128 status = "okay";
1129 dr_mode = "peripheral";
1130 };
1131
1132 usb-phy@7d000000 {
1133 status = "okay";
1134 };
1135
1136 usb@7d008000 {
1137 status = "okay";
1138 };
1139
1140 usb-phy@7d008000 {
1141 status = "okay";
1142 vbus-supply = <&usb3_vbus_reg>;
1143 };
1144
1145 backlight: backlight {
1146 compatible = "pwm-backlight";
1147
1148 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
1149 power-supply = <&vdd_bl_reg>;
1150 pwms = <&pwm 1 1000000>;
1151
1152 brightness-levels = <0 4 8 16 32 64 128 255>;
1153 default-brightness-level = <6>;
1154 };
1155
1156 clocks {
1157 compatible = "simple-bus";
1158 #address-cells = <1>;
1159 #size-cells = <0>;
1160
1161 clk32k_in: clock@0 {
1162 compatible = "fixed-clock";
1163 reg = <0>;
1164 #clock-cells = <0>;
1165 clock-frequency = <32768>;
1166 };
1167 };
1168
1169 gpio-keys {
1170 compatible = "gpio-keys";
1171
1172 home {
1173 label = "Home";
1174 gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
1175 linux,code = <KEY_HOME>;
1176 };
1177
1178 power {
1179 label = "Power";
1180 gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1181 linux,code = <KEY_POWER>;
1182 wakeup-source;
1183 };
1184
1185 volume_down {
1186 label = "Volume Down";
1187 gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
1188 linux,code = <KEY_VOLUMEDOWN>;
1189 };
1190
1191 volume_up {
1192 label = "Volume Up";
1193 gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>;
1194 linux,code = <KEY_VOLUMEUP>;
1195 };
1196 };
1197
1198 regulators {
1199 compatible = "simple-bus";
1200 #address-cells = <1>;
1201 #size-cells = <0>;
1202
1203 vdd_ac_bat_reg: regulator@0 {
1204 compatible = "regulator-fixed";
1205 reg = <0>;
1206 regulator-name = "vdd_ac_bat";
1207 regulator-min-microvolt = <5000000>;
1208 regulator-max-microvolt = <5000000>;
1209 regulator-always-on;
1210 };
1211
1212 dvdd_ts_reg: regulator@1 {
1213 compatible = "regulator-fixed";
1214 reg = <1>;
1215 regulator-name = "dvdd_ts";
1216 regulator-min-microvolt = <1800000>;
1217 regulator-max-microvolt = <1800000>;
1218 enable-active-high;
1219 gpio = <&gpio TEGRA_GPIO(H, 5) GPIO_ACTIVE_HIGH>;
1220 };
1221
1222 usb1_vbus_reg: regulator@3 {
1223 compatible = "regulator-fixed";
1224 reg = <3>;
1225 regulator-name = "usb1_vbus";
1226 regulator-min-microvolt = <5000000>;
1227 regulator-max-microvolt = <5000000>;
1228 enable-active-high;
1229 gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1230 gpio-open-drain;
1231 vin-supply = <&tps65090_dcdc1_reg>;
1232 };
1233
1234 usb3_vbus_reg: regulator@4 {
1235 compatible = "regulator-fixed";
1236 reg = <4>;
1237 regulator-name = "usb2_vbus";
1238 regulator-min-microvolt = <5000000>;
1239 regulator-max-microvolt = <5000000>;
1240 enable-active-high;
1241 gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
1242 gpio-open-drain;
1243 vin-supply = <&tps65090_dcdc1_reg>;
1244 };
1245
1246 vdd_hdmi_reg: regulator@5 {
1247 compatible = "regulator-fixed";
1248 reg = <5>;
1249 regulator-name = "vdd_hdmi_5v0";
1250 regulator-min-microvolt = <5000000>;
1251 regulator-max-microvolt = <5000000>;
1252 vin-supply = <&tps65090_dcdc1_reg>;
1253 };
1254
1255 vdd_cam_1v8_reg: regulator@6 {
1256 compatible = "regulator-fixed";
1257 reg = <6>;
1258 regulator-name = "vdd_cam_1v8_reg";
1259 regulator-min-microvolt = <1800000>;
1260 regulator-max-microvolt = <1800000>;
1261 enable-active-high;
1262 gpio = <&palmas_gpio 6 0>;
1263 };
1264
1265 vdd_5v0_hdmi: regulator@7 {
1266 compatible = "regulator-fixed";
1267 reg = <7>;
1268 regulator-name = "VDD_5V0_HDMI_CON";
1269 regulator-min-microvolt = <5000000>;
1270 regulator-max-microvolt = <5000000>;
1271 gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
1272 enable-active-high;
1273 vin-supply = <&tps65090_dcdc1_reg>;
1274 };
1275 };
1276
1277 sound {
1278 compatible = "nvidia,tegra-audio-rt5640-dalmore",
1279 "nvidia,tegra-audio-rt5640";
1280 nvidia,model = "NVIDIA Tegra Dalmore";
1281
1282 nvidia,audio-routing =
1283 "Headphones", "HPOR",
1284 "Headphones", "HPOL",
1285 "Speakers", "SPORP",
1286 "Speakers", "SPORN",
1287 "Speakers", "SPOLP",
1288 "Speakers", "SPOLN",
1289 "Mic Jack", "MICBIAS1",
1290 "IN2P", "Mic Jack";
1291
1292 nvidia,i2s-controller = <&tegra_i2s1>;
1293 nvidia,audio-codec = <&rt5640>;
1294
1295 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
1296
1297 clocks = <&tegra_car TEGRA114_CLK_PLL_A>,
1298 <&tegra_car TEGRA114_CLK_PLL_A_OUT0>,
1299 <&tegra_car TEGRA114_CLK_EXTERN1>;
1300 clock-names = "pll_a", "pll_a_out0", "mclk";
1301 };
1302};