1/*
  2 * Copyright 2013-2014 Freescale Semiconductor, Inc.
  3 * Copyright 2018 NXP
  4 *
  5 * This file is dual-licensed: you can use it either under the terms
  6 * of the GPL or the X11 license, at your option. Note that this dual
  7 * licensing only applies to this file, and not this project as a
  8 * whole.
  9 *
 10 *  a) This file is free software; you can redistribute it and/or
 11 *     modify it under the terms of the GNU General Public License as
 12 *     published by the Free Software Foundation; either version 2 of
 13 *     the License, or (at your option) any later version.
 14 *
 15 *     This file is distributed in the hope that it will be useful,
 16 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 17 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 18 *     GNU General Public License for more details.
 19 *
 20 *     You should have received a copy of the GNU General Public
 21 *     License along with this file; if not, write to the Free
 22 *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
 23 *     MA 02110-1301 USA
 24 *
 25 * Or, alternatively,
 26 *
 27 *  b) Permission is hereby granted, free of charge, to any person
 28 *     obtaining a copy of this software and associated documentation
 29 *     files (the "Software"), to deal in the Software without
 30 *     restriction, including without limitation the rights to use,
 31 *     copy, modify, merge, publish, distribute, sublicense, and/or
 32 *     sell copies of the Software, and to permit persons to whom the
 33 *     Software is furnished to do so, subject to the following
 34 *     conditions:
 35 *
 36 *     The above copyright notice and this permission notice shall be
 37 *     included in all copies or substantial portions of the Software.
 38 *
 39 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 40 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 41 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 42 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 43 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 44 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 45 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 46 *     OTHER DEALINGS IN THE SOFTWARE.
 47 */
 48
 49/dts-v1/;
 50#include "ls1021a.dtsi"
 51
 52/ {
 53	model = "LS1021A TWR Board";
 54	compatible = "fsl,ls1021a-twr", "fsl,ls1021a";
 55
 56	aliases {
 57		enet2_rgmii_phy = &rgmii_phy1;
 58		enet0_sgmii_phy = &sgmii_phy2;
 59		enet1_sgmii_phy = &sgmii_phy0;
 60	};
 61
 62	sys_mclk: clock-mclk {
 63		compatible = "fixed-clock";
 64		#clock-cells = <0>;
 65		clock-frequency = <24576000>;
 66	};
 67
 68	regulators {
 69		compatible = "simple-bus";
 70		#address-cells = <1>;
 71		#size-cells = <0>;
 72
 73		reg_3p3v: regulator@0 {
 74			compatible = "regulator-fixed";
 75			reg = <0>;
 76			regulator-name = "3P3V";
 77			regulator-min-microvolt = <3300000>;
 78			regulator-max-microvolt = <3300000>;
 79			regulator-always-on;
 80		};
 81	};
 82
 83	sound {
 84		compatible = "simple-audio-card";
 85		simple-audio-card,format = "i2s";
 86		simple-audio-card,widgets =
 87			"Microphone", "Microphone Jack",
 88			"Headphone", "Headphone Jack",
 89			"Speaker", "Speaker Ext",
 90			"Line", "Line In Jack";
 91		simple-audio-card,routing =
 92			"MIC_IN", "Microphone Jack",
 93			"Microphone Jack", "Mic Bias",
 94			"LINE_IN", "Line In Jack",
 95			"Headphone Jack", "HP_OUT",
 96			"Speaker Ext", "LINE_OUT";
 97
 98		simple-audio-card,cpu {
 99			sound-dai = <&sai1>;
100			frame-master;
101			bitclock-master;
102		};
103
104		simple-audio-card,codec {
105			sound-dai = <&codec>;
106			frame-master;
107			bitclock-master;
108		};
109	};
110
111	panel: panel {
112		compatible = "nec,nl4827hc19-05b";
113
114		port {
115			panel_in: endpoint {
116				remote-endpoint = <&dcu_out>;
117			};
118		};
119	};
120};
121
122&dcu {
123	status = "okay";
124
125	port {
126		dcu_out: endpoint {
127			remote-endpoint = <&panel_in>;
128		};
129	};
130};
131
132&dspi1 {
133	bus-num = <0>;
134	status = "okay";
135
136	dspiflash: s25fl064k@0 {
137		#address-cells = <1>;
138		#size-cells = <1>;
139		compatible = "spansion,s25fl064k";
140		spi-max-frequency = <16000000>;
141		spi-cpol;
142		spi-cpha;
143		reg = <0>;
144	};
145};
146
147&enet0 {
148	tbi-handle = <&tbi0>;
149	phy-handle = <&sgmii_phy2>;
150	phy-connection-type = "sgmii";
151	status = "okay";
152};
153
154&enet1 {
155	tbi-handle = <&tbi1>;
156	phy-handle = <&sgmii_phy0>;
157	phy-connection-type = "sgmii";
158	status = "okay";
159};
160
161&enet2 {
162	phy-handle = <&rgmii_phy1>;
163	phy-connection-type = "rgmii-id";
164	status = "okay";
165};
166
167&i2c0 {
168	status = "okay";
169
170	ina220@40 {
171		compatible = "ti,ina220";
172		reg = <0x40>;
173		shunt-resistor = <1000>;
174	};
175
176	ina220@41 {
177		compatible = "ti,ina220";
178		reg = <0x41>;
179		shunt-resistor = <1000>;
180	};
181
182};
183
184&i2c1 {
185	status = "okay";
186	codec: sgtl5000@a {
187		#sound-dai-cells = <0>;
188		compatible = "fsl,sgtl5000";
189		reg = <0x0a>;
190		VDDA-supply = <&reg_3p3v>;
191		VDDIO-supply = <&reg_3p3v>;
192		clocks = <&sys_mclk>;
193	};
194};
195
196&ifc {
197	#address-cells = <2>;
198	#size-cells = <1>;
199	/* NOR Flash on board */
200	ranges = <0x0 0x0 0x0 0x60000000 0x08000000>;
201	status = "okay";
202
203	nor@0,0 {
204		#address-cells = <1>;
205		#size-cells = <1>;
206		compatible = "cfi-flash";
207		reg = <0x0 0x0 0x8000000>;
208		big-endian;
209		bank-width = <2>;
210		device-width = <1>;
211	};
212};
213
214&lpuart0 {
215	status = "okay";
216};
217
218&mdio0 {
219	sgmii_phy0: ethernet-phy@0 {
220		reg = <0x0>;
221	};
222	rgmii_phy1: ethernet-phy@1 {
223		reg = <0x1>;
224	};
225	sgmii_phy2: ethernet-phy@2 {
226		reg = <0x2>;
227	};
228	tbi0: tbi-phy@1f {
229		reg = <0x1f>;
230		device_type = "tbi-phy";
231	};
232};
233
234&mdio1 {
235	tbi1: tbi-phy@1f {
236		reg = <0x1f>;
237		device_type = "tbi-phy";
238	};
239};
240
241&esdhc {
242        status = "okay";
243};
244
245&sai1 {
246	status = "okay";
247};
248
249&sata {
250	status = "okay";
251};
252
253&uart0 {
254	status = "okay";
255};
256
257&uart1 {
258	status = "okay";
259};
260
261&can0 {
262	status = "okay";
263};
264
265&can1 {
266	status = "okay";
267};
268
269&can2 {
270	status = "disabled";
271};
272
273&can3 {
274	status = "disabled";
275};