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Note: File does not exist in v6.13.7.
  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * Copyright 2011 Freescale Semiconductor, Inc.
  4 * Copyright 2011 Linaro Ltd.
  5 */
  6
  7/dts-v1/;
  8#include <dt-bindings/gpio/gpio.h>
  9#include "imx6q.dtsi"
 10
 11/ {
 12	model = "Freescale i.MX6 Quad Armadillo2 Board";
 13	compatible = "fsl,imx6q-arm2", "fsl,imx6q";
 14
 15	memory@10000000 {
 16		device_type = "memory";
 17		reg = <0x10000000 0x80000000>;
 18	};
 19
 20	regulators {
 21		compatible = "simple-bus";
 22		#address-cells = <1>;
 23		#size-cells = <0>;
 24
 25		reg_3p3v: regulator@0 {
 26			compatible = "regulator-fixed";
 27			reg = <0>;
 28			regulator-name = "3P3V";
 29			regulator-min-microvolt = <3300000>;
 30			regulator-max-microvolt = <3300000>;
 31			regulator-always-on;
 32		};
 33
 34		reg_usb_otg_vbus: regulator@1 {
 35			compatible = "regulator-fixed";
 36			reg = <1>;
 37			regulator-name = "usb_otg_vbus";
 38			regulator-min-microvolt = <5000000>;
 39			regulator-max-microvolt = <5000000>;
 40			gpio = <&gpio3 22 0>;
 41			enable-active-high;
 42		};
 43	};
 44
 45	leds {
 46		compatible = "gpio-leds";
 47
 48		debug-led {
 49			label = "Heartbeat";
 50			gpios = <&gpio3 25 0>;
 51			linux,default-trigger = "heartbeat";
 52		};
 53	};
 54};
 55
 56&gpmi {
 57	pinctrl-names = "default";
 58	pinctrl-0 = <&pinctrl_gpmi_nand>;
 59	status = "disabled"; /* gpmi nand conflicts with SD */
 60};
 61
 62&iomuxc {
 63	pinctrl-names = "default";
 64	pinctrl-0 = <&pinctrl_hog>;
 65
 66	imx6q-arm2 {
 67		pinctrl_hog: hoggrp {
 68			fsl,pins = <
 69				MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x80000000
 70			>;
 71		};
 72
 73		pinctrl_enet: enetgrp {
 74			fsl,pins = <
 75				MX6QDL_PAD_KEY_COL1__ENET_MDIO		0x1b0b0
 76				MX6QDL_PAD_KEY_COL2__ENET_MDC		0x1b0b0
 77				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b030
 78				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b030
 79				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b030
 80				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b030
 81				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b030
 82				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
 83				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
 84				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
 85				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
 86				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
 87				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
 88				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
 89				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
 90				MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1
 91			>;
 92		};
 93
 94		pinctrl_gpmi_nand: gpminandgrp {
 95			fsl,pins = <
 96				MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
 97				MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
 98				MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
 99				MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000
100				MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
101				MX6QDL_PAD_NANDF_CS1__NAND_CE1_B	0xb0b1
102				MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
103				MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
104				MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
105				MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
106				MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
107				MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
108				MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
109				MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
110				MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
111				MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
112				MX6QDL_PAD_SD4_DAT0__NAND_DQS		0x00b1
113			>;
114		};
115
116		pinctrl_uart2: uart2grp {
117			fsl,pins = <
118				MX6QDL_PAD_EIM_D26__UART2_RX_DATA	0x1b0b1
119				MX6QDL_PAD_EIM_D27__UART2_TX_DATA	0x1b0b1
120				MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B	0x1b0b1
121				MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B	0x1b0b1
122			>;
123		};
124
125		pinctrl_uart4: uart4grp {
126			fsl,pins = <
127				MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1
128				MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1
129			>;
130		};
131
132		pinctrl_usbotg: usbotggrp {
133			fsl,pins = <
134				MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
135			>;
136		};
137
138		pinctrl_usdhc3: usdhc3grp {
139			fsl,pins = <
140				MX6QDL_PAD_SD3_CMD__SD3_CMD		0x17059
141				MX6QDL_PAD_SD3_CLK__SD3_CLK		0x10059
142				MX6QDL_PAD_SD3_DAT0__SD3_DATA0		0x17059
143				MX6QDL_PAD_SD3_DAT1__SD3_DATA1		0x17059
144				MX6QDL_PAD_SD3_DAT2__SD3_DATA2		0x17059
145				MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
146				MX6QDL_PAD_SD3_DAT4__SD3_DATA4		0x17059
147				MX6QDL_PAD_SD3_DAT5__SD3_DATA5		0x17059
148				MX6QDL_PAD_SD3_DAT6__SD3_DATA6		0x17059
149				MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059
150			>;
151		};
152
153		pinctrl_usdhc3_cdwp: usdhc3cdwp {
154			fsl,pins = <
155				MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x80000000
156				MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x80000000
157			>;
158		};
159
160		pinctrl_usdhc4: usdhc4grp {
161			fsl,pins = <
162				MX6QDL_PAD_SD4_CMD__SD4_CMD		0x17059
163				MX6QDL_PAD_SD4_CLK__SD4_CLK		0x10059
164				MX6QDL_PAD_SD4_DAT0__SD4_DATA0		0x17059
165				MX6QDL_PAD_SD4_DAT1__SD4_DATA1		0x17059
166				MX6QDL_PAD_SD4_DAT2__SD4_DATA2		0x17059
167				MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059
168				MX6QDL_PAD_SD4_DAT4__SD4_DATA4		0x17059
169				MX6QDL_PAD_SD4_DAT5__SD4_DATA5		0x17059
170				MX6QDL_PAD_SD4_DAT6__SD4_DATA6		0x17059
171				MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059
172			>;
173		};
174	};
175};
176
177&fec {
178	pinctrl-names = "default";
179	pinctrl-0 = <&pinctrl_enet>;
180	phy-mode = "rgmii";
181	interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
182			      <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
183	fsl,err006687-workaround-present;
184	status = "okay";
185};
186
187&usbotg {
188	vbus-supply = <&reg_usb_otg_vbus>;
189	pinctrl-names = "default";
190	pinctrl-0 = <&pinctrl_usbotg>;
191	disable-over-current;
192	status = "okay";
193};
194
195&usdhc3 {
196	cd-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
197	wp-gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>;
198	vmmc-supply = <&reg_3p3v>;
199	pinctrl-names = "default";
200	pinctrl-0 = <&pinctrl_usdhc3
201		     &pinctrl_usdhc3_cdwp>;
202	status = "okay";
203};
204
205&usdhc4 {
206	non-removable;
207	vmmc-supply = <&reg_3p3v>;
208	pinctrl-names = "default";
209	pinctrl-0 = <&pinctrl_usdhc4>;
210	status = "okay";
211};
212
213&uart2 {
214	pinctrl-names = "default";
215	pinctrl-0 = <&pinctrl_uart2>;
216	fsl,dte-mode;
217	uart-has-rtscts;
218	status = "okay";
219};
220
221&uart4 {
222	pinctrl-names = "default";
223	pinctrl-0 = <&pinctrl_uart4>;
224	status = "okay";
225};