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v5.4
 1/* SPDX-License-Identifier: GPL-2.0 */
 2/* Generic I/O and MEMIO string operations.  */
 3
 4#define __ide_insw	insw
 5#define __ide_insl	insl
 6#define __ide_outsw	outsw
 7#define __ide_outsl	outsl
 8
 9static __inline__ void __ide_mm_insw(void __iomem *port, void *addr, u32 count)
10{
11	while (count--) {
12		*(u16 *)addr = readw(port);
13		addr += 2;
14	}
15}
16
17static __inline__ void __ide_mm_insl(void __iomem *port, void *addr, u32 count)
18{
19	while (count--) {
20		*(u32 *)addr = readl(port);
21		addr += 4;
22	}
23}
24
25static __inline__ void __ide_mm_outsw(void __iomem *port, void *addr, u32 count)
26{
27	while (count--) {
28		writew(*(u16 *)addr, port);
29		addr += 2;
30	}
31}
32
33static __inline__ void __ide_mm_outsl(void __iomem * port, void *addr, u32 count)
34{
35	while (count--) {
36		writel(*(u32 *)addr, port);
37		addr += 4;
38	}
39}
v5.9
 1/* SPDX-License-Identifier: GPL-2.0 */
 2/* Generic I/O and MEMIO string operations.  */
 3
 4#define __ide_insw	insw
 5#define __ide_insl	insl
 6#define __ide_outsw	outsw
 7#define __ide_outsl	outsl
 8
 9static __inline__ void __ide_mm_insw(void __iomem *port, void *addr, u32 count)
10{
11	while (count--) {
12		*(u16 *)addr = readw(port);
13		addr += 2;
14	}
15}
16
17static __inline__ void __ide_mm_insl(void __iomem *port, void *addr, u32 count)
18{
19	while (count--) {
20		*(u32 *)addr = readl(port);
21		addr += 4;
22	}
23}
24
25static __inline__ void __ide_mm_outsw(void __iomem *port, void *addr, u32 count)
26{
27	while (count--) {
28		writew(*(u16 *)addr, port);
29		addr += 2;
30	}
31}
32
33static __inline__ void __ide_mm_outsl(void __iomem * port, void *addr, u32 count)
34{
35	while (count--) {
36		writel(*(u32 *)addr, port);
37		addr += 4;
38	}
39}