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v5.4
  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 *  Copyright (c) 1991,1992,1995  Linus Torvalds
  4 *  Copyright (c) 1994  Alan Modra
  5 *  Copyright (c) 1995  Markus Kuhn
  6 *  Copyright (c) 1996  Ingo Molnar
  7 *  Copyright (c) 1998  Andrea Arcangeli
  8 *  Copyright (c) 2002,2006  Vojtech Pavlik
  9 *  Copyright (c) 2003  Andi Kleen
 10 *
 11 */
 12
 13#include <linux/clocksource.h>
 14#include <linux/clockchips.h>
 15#include <linux/interrupt.h>
 16#include <linux/irq.h>
 17#include <linux/i8253.h>
 18#include <linux/time.h>
 19#include <linux/export.h>
 20
 21#include <asm/vsyscall.h>
 22#include <asm/x86_init.h>
 23#include <asm/i8259.h>
 24#include <asm/timer.h>
 25#include <asm/hpet.h>
 26#include <asm/time.h>
 27
 28#ifdef CONFIG_X86_64
 29__visible volatile unsigned long jiffies __cacheline_aligned_in_smp = INITIAL_JIFFIES;
 30#endif
 31
 32unsigned long profile_pc(struct pt_regs *regs)
 33{
 34	unsigned long pc = instruction_pointer(regs);
 35
 36	if (!user_mode(regs) && in_lock_functions(pc)) {
 37#ifdef CONFIG_FRAME_POINTER
 38		return *(unsigned long *)(regs->bp + sizeof(long));
 39#else
 40		unsigned long *sp = (unsigned long *)regs->sp;
 41		/*
 42		 * Return address is either directly at stack pointer
 43		 * or above a saved flags. Eflags has bits 22-31 zero,
 44		 * kernel addresses don't.
 45		 */
 46		if (sp[0] >> 22)
 47			return sp[0];
 48		if (sp[1] >> 22)
 49			return sp[1];
 50#endif
 51	}
 52	return pc;
 53}
 54EXPORT_SYMBOL(profile_pc);
 55
 56/*
 57 * Default timer interrupt handler for PIT/HPET
 58 */
 59static irqreturn_t timer_interrupt(int irq, void *dev_id)
 60{
 61	global_clock_event->event_handler(global_clock_event);
 62	return IRQ_HANDLED;
 63}
 64
 65static struct irqaction irq0  = {
 66	.handler = timer_interrupt,
 67	.flags = IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER,
 68	.name = "timer"
 69};
 70
 71static void __init setup_default_timer_irq(void)
 72{
 
 
 73	/*
 74	 * Unconditionally register the legacy timer; even without legacy
 75	 * PIC/PIT we need this for the HPET0 in legacy replacement mode.
 
 76	 */
 77	if (setup_irq(0, &irq0))
 78		pr_info("Failed to register legacy timer interrupt\n");
 79}
 80
 81/* Default timer init function */
 82void __init hpet_time_init(void)
 83{
 84	if (!hpet_enable()) {
 85		if (!pit_timer_init())
 86			return;
 87	}
 88
 89	setup_default_timer_irq();
 90}
 91
 92static __init void x86_late_time_init(void)
 93{
 
 
 
 
 
 
 
 94	x86_init.timers.timer_init();
 
 95	/*
 96	 * After PIT/HPET timers init, select and setup
 97	 * the final interrupt mode for delivering IRQs.
 98	 */
 99	x86_init.irqs.intr_mode_init();
100	tsc_init();
 
 
 
101}
102
103/*
104 * Initialize TSC and delay the periodic timer init to
105 * late x86_late_time_init() so ioremap works.
106 */
107void __init time_init(void)
108{
109	late_time_init = x86_late_time_init;
110}
111
112/*
113 * Sanity check the vdso related archdata content.
114 */
115void clocksource_arch_init(struct clocksource *cs)
116{
117	if (cs->archdata.vclock_mode == VCLOCK_NONE)
118		return;
119
120	if (cs->archdata.vclock_mode > VCLOCK_MAX) {
121		pr_warn("clocksource %s registered with invalid vclock_mode %d. Disabling vclock.\n",
122			cs->name, cs->archdata.vclock_mode);
123		cs->archdata.vclock_mode = VCLOCK_NONE;
124	}
125
126	if (cs->mask != CLOCKSOURCE_MASK(64)) {
127		pr_warn("clocksource %s registered with invalid mask %016llx. Disabling vclock.\n",
128			cs->name, cs->mask);
129		cs->archdata.vclock_mode = VCLOCK_NONE;
130	}
131}
v5.9
  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 *  Copyright (c) 1991,1992,1995  Linus Torvalds
  4 *  Copyright (c) 1994  Alan Modra
  5 *  Copyright (c) 1995  Markus Kuhn
  6 *  Copyright (c) 1996  Ingo Molnar
  7 *  Copyright (c) 1998  Andrea Arcangeli
  8 *  Copyright (c) 2002,2006  Vojtech Pavlik
  9 *  Copyright (c) 2003  Andi Kleen
 10 *
 11 */
 12
 13#include <linux/clocksource.h>
 14#include <linux/clockchips.h>
 15#include <linux/interrupt.h>
 16#include <linux/irq.h>
 17#include <linux/i8253.h>
 18#include <linux/time.h>
 19#include <linux/export.h>
 20
 21#include <asm/vsyscall.h>
 22#include <asm/x86_init.h>
 23#include <asm/i8259.h>
 24#include <asm/timer.h>
 25#include <asm/hpet.h>
 26#include <asm/time.h>
 27
 
 
 
 
 28unsigned long profile_pc(struct pt_regs *regs)
 29{
 30	unsigned long pc = instruction_pointer(regs);
 31
 32	if (!user_mode(regs) && in_lock_functions(pc)) {
 33#ifdef CONFIG_FRAME_POINTER
 34		return *(unsigned long *)(regs->bp + sizeof(long));
 35#else
 36		unsigned long *sp = (unsigned long *)regs->sp;
 37		/*
 38		 * Return address is either directly at stack pointer
 39		 * or above a saved flags. Eflags has bits 22-31 zero,
 40		 * kernel addresses don't.
 41		 */
 42		if (sp[0] >> 22)
 43			return sp[0];
 44		if (sp[1] >> 22)
 45			return sp[1];
 46#endif
 47	}
 48	return pc;
 49}
 50EXPORT_SYMBOL(profile_pc);
 51
 52/*
 53 * Default timer interrupt handler for PIT/HPET
 54 */
 55static irqreturn_t timer_interrupt(int irq, void *dev_id)
 56{
 57	global_clock_event->event_handler(global_clock_event);
 58	return IRQ_HANDLED;
 59}
 60
 
 
 
 
 
 
 61static void __init setup_default_timer_irq(void)
 62{
 63	unsigned long flags = IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER;
 64
 65	/*
 66	 * Unconditionally register the legacy timer interrupt; even
 67	 * without legacy PIC/PIT we need this for the HPET0 in legacy
 68	 * replacement mode.
 69	 */
 70	if (request_irq(0, timer_interrupt, flags, "timer", NULL))
 71		pr_info("Failed to register legacy timer interrupt\n");
 72}
 73
 74/* Default timer init function */
 75void __init hpet_time_init(void)
 76{
 77	if (!hpet_enable()) {
 78		if (!pit_timer_init())
 79			return;
 80	}
 81
 82	setup_default_timer_irq();
 83}
 84
 85static __init void x86_late_time_init(void)
 86{
 87	/*
 88	 * Before PIT/HPET init, select the interrupt mode. This is required
 89	 * to make the decision whether PIT should be initialized correct.
 90	 */
 91	x86_init.irqs.intr_mode_select();
 92
 93	/* Setup the legacy timers */
 94	x86_init.timers.timer_init();
 95
 96	/*
 97	 * After PIT/HPET timers init, set up the final interrupt mode for
 98	 * delivering IRQs.
 99	 */
100	x86_init.irqs.intr_mode_init();
101	tsc_init();
102
103	if (static_cpu_has(X86_FEATURE_WAITPKG))
104		use_tpause_delay();
105}
106
107/*
108 * Initialize TSC and delay the periodic timer init to
109 * late x86_late_time_init() so ioremap works.
110 */
111void __init time_init(void)
112{
113	late_time_init = x86_late_time_init;
114}
115
116/*
117 * Sanity check the vdso related archdata content.
118 */
119void clocksource_arch_init(struct clocksource *cs)
120{
121	if (cs->vdso_clock_mode == VDSO_CLOCKMODE_NONE)
122		return;
123
 
 
 
 
 
 
124	if (cs->mask != CLOCKSOURCE_MASK(64)) {
125		pr_warn("clocksource %s registered with invalid mask %016llx for VDSO. Disabling VDSO support.\n",
126			cs->name, cs->mask);
127		cs->vdso_clock_mode = VDSO_CLOCKMODE_NONE;
128	}
129}