1/* SPDX-License-Identifier: GPL-2.0 */
 2/* Copyright (c) 2019, Intel Corporation. */
 3
 4#ifndef _ICE_TXRX_LIB_H_
 5#define _ICE_TXRX_LIB_H_
 6#include "ice.h"
 7
 8/**
 9 * ice_test_staterr - tests bits in Rx descriptor status and error fields
10 * @rx_desc: pointer to receive descriptor (in le64 format)
11 * @stat_err_bits: value to mask
12 *
13 * This function does some fast chicanery in order to return the
14 * value of the mask which is really only used for boolean tests.
15 * The status_error_len doesn't need to be shifted because it begins
16 * at offset zero.
17 */
18static inline bool
19ice_test_staterr(union ice_32b_rx_flex_desc *rx_desc, const u16 stat_err_bits)
20{
21	return !!(rx_desc->wb.status_error0 & cpu_to_le16(stat_err_bits));
22}
23
24static inline __le64
25ice_build_ctob(u64 td_cmd, u64 td_offset, unsigned int size, u64 td_tag)
26{
27	return cpu_to_le64(ICE_TX_DESC_DTYPE_DATA |
28			   (td_cmd    << ICE_TXD_QW1_CMD_S) |
29			   (td_offset << ICE_TXD_QW1_OFFSET_S) |
30			   ((u64)size << ICE_TXD_QW1_TX_BUF_SZ_S) |
31			   (td_tag    << ICE_TXD_QW1_L2TAG1_S));
32}
33
34/**
35 * ice_xdp_ring_update_tail - Updates the XDP Tx ring tail register
36 * @xdp_ring: XDP Tx ring
37 *
38 * This function updates the XDP Tx ring tail register.
39 */
40static inline void ice_xdp_ring_update_tail(struct ice_ring *xdp_ring)
41{
42	/* Force memory writes to complete before letting h/w
43	 * know there are new descriptors to fetch.
44	 */
45	wmb();
46	writel_relaxed(xdp_ring->next_to_use, xdp_ring->tail);
47}
48
49void ice_finalize_xdp_rx(struct ice_ring *rx_ring, unsigned int xdp_res);
50int ice_xmit_xdp_buff(struct xdp_buff *xdp, struct ice_ring *xdp_ring);
51int ice_xmit_xdp_ring(void *data, u16 size, struct ice_ring *xdp_ring);
52void ice_release_rx_desc(struct ice_ring *rx_ring, u16 val);
53void
54ice_process_skb_fields(struct ice_ring *rx_ring,
55		       union ice_32b_rx_flex_desc *rx_desc,
56		       struct sk_buff *skb, u8 ptype);
57void
58ice_receive_skb(struct ice_ring *rx_ring, struct sk_buff *skb, u16 vlan_tag);
59#endif /* !_ICE_TXRX_LIB_H_ */