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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * PowerPC version
4 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
5 *
6 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
7 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
8 * Copyright (C) 1996 Paul Mackerras
9 * PPC44x/36-bit changes by Matt Porter (mporter@mvista.com)
10 *
11 * Derived from "arch/i386/mm/init.c"
12 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
13 */
14
15#include <linux/export.h>
16#include <linux/sched.h>
17#include <linux/kernel.h>
18#include <linux/errno.h>
19#include <linux/string.h>
20#include <linux/gfp.h>
21#include <linux/types.h>
22#include <linux/mm.h>
23#include <linux/stddef.h>
24#include <linux/init.h>
25#include <linux/memblock.h>
26#include <linux/highmem.h>
27#include <linux/initrd.h>
28#include <linux/pagemap.h>
29#include <linux/suspend.h>
30#include <linux/hugetlb.h>
31#include <linux/slab.h>
32#include <linux/vmalloc.h>
33#include <linux/memremap.h>
34
35#include <asm/pgalloc.h>
36#include <asm/prom.h>
37#include <asm/io.h>
38#include <asm/mmu_context.h>
39#include <asm/pgtable.h>
40#include <asm/mmu.h>
41#include <asm/smp.h>
42#include <asm/machdep.h>
43#include <asm/btext.h>
44#include <asm/tlb.h>
45#include <asm/sections.h>
46#include <asm/sparsemem.h>
47#include <asm/vdso.h>
48#include <asm/fixmap.h>
49#include <asm/swiotlb.h>
50#include <asm/rtas.h>
51
52#include <mm/mmu_decl.h>
53
54#ifndef CPU_FTR_COHERENT_ICACHE
55#define CPU_FTR_COHERENT_ICACHE 0 /* XXX for now */
56#define CPU_FTR_NOEXECUTE 0
57#endif
58
59unsigned long long memory_limit;
60bool init_mem_is_free;
61
62#ifdef CONFIG_HIGHMEM
63pte_t *kmap_pte;
64EXPORT_SYMBOL(kmap_pte);
65pgprot_t kmap_prot;
66EXPORT_SYMBOL(kmap_prot);
67
68static inline pte_t *virt_to_kpte(unsigned long vaddr)
69{
70 return pte_offset_kernel(pmd_offset(pud_offset(pgd_offset_k(vaddr),
71 vaddr), vaddr), vaddr);
72}
73#endif
74
75pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
76 unsigned long size, pgprot_t vma_prot)
77{
78 if (ppc_md.phys_mem_access_prot)
79 return ppc_md.phys_mem_access_prot(file, pfn, size, vma_prot);
80
81 if (!page_is_ram(pfn))
82 vma_prot = pgprot_noncached(vma_prot);
83
84 return vma_prot;
85}
86EXPORT_SYMBOL(phys_mem_access_prot);
87
88#ifdef CONFIG_MEMORY_HOTPLUG
89
90#ifdef CONFIG_NUMA
91int memory_add_physaddr_to_nid(u64 start)
92{
93 return hot_add_scn_to_nid(start);
94}
95#endif
96
97int __weak create_section_mapping(unsigned long start, unsigned long end, int nid)
98{
99 return -ENODEV;
100}
101
102int __weak remove_section_mapping(unsigned long start, unsigned long end)
103{
104 return -ENODEV;
105}
106
107int __ref arch_add_memory(int nid, u64 start, u64 size,
108 struct mhp_restrictions *restrictions)
109{
110 unsigned long start_pfn = start >> PAGE_SHIFT;
111 unsigned long nr_pages = size >> PAGE_SHIFT;
112 int rc;
113
114 resize_hpt_for_hotplug(memblock_phys_mem_size());
115
116 start = (unsigned long)__va(start);
117 rc = create_section_mapping(start, start + size, nid);
118 if (rc) {
119 pr_warn("Unable to create mapping for hot added memory 0x%llx..0x%llx: %d\n",
120 start, start + size, rc);
121 return -EFAULT;
122 }
123 flush_dcache_range(start, start + size);
124
125 return __add_pages(nid, start_pfn, nr_pages, restrictions);
126}
127
128void __ref arch_remove_memory(int nid, u64 start, u64 size,
129 struct vmem_altmap *altmap)
130{
131 unsigned long start_pfn = start >> PAGE_SHIFT;
132 unsigned long nr_pages = size >> PAGE_SHIFT;
133 struct page *page = pfn_to_page(start_pfn) + vmem_altmap_offset(altmap);
134 int ret;
135
136 __remove_pages(page_zone(page), start_pfn, nr_pages, altmap);
137
138 /* Remove htab bolted mappings for this section of memory */
139 start = (unsigned long)__va(start);
140 flush_dcache_range(start, start + size);
141 ret = remove_section_mapping(start, start + size);
142 WARN_ON_ONCE(ret);
143
144 /* Ensure all vmalloc mappings are flushed in case they also
145 * hit that section of memory
146 */
147 vm_unmap_aliases();
148
149 if (resize_hpt_for_hotplug(memblock_phys_mem_size()) == -ENOSPC)
150 pr_warn("Hash collision while resizing HPT\n");
151}
152#endif
153
154#ifndef CONFIG_NEED_MULTIPLE_NODES
155void __init mem_topology_setup(void)
156{
157 max_low_pfn = max_pfn = memblock_end_of_DRAM() >> PAGE_SHIFT;
158 min_low_pfn = MEMORY_START >> PAGE_SHIFT;
159#ifdef CONFIG_HIGHMEM
160 max_low_pfn = lowmem_end_addr >> PAGE_SHIFT;
161#endif
162
163 /* Place all memblock_regions in the same node and merge contiguous
164 * memblock_regions
165 */
166 memblock_set_node(0, PHYS_ADDR_MAX, &memblock.memory, 0);
167}
168
169void __init initmem_init(void)
170{
171 /* XXX need to clip this if using highmem? */
172 sparse_memory_present_with_active_regions(0);
173 sparse_init();
174}
175
176/* mark pages that don't exist as nosave */
177static int __init mark_nonram_nosave(void)
178{
179 struct memblock_region *reg, *prev = NULL;
180
181 for_each_memblock(memory, reg) {
182 if (prev &&
183 memblock_region_memory_end_pfn(prev) < memblock_region_memory_base_pfn(reg))
184 register_nosave_region(memblock_region_memory_end_pfn(prev),
185 memblock_region_memory_base_pfn(reg));
186 prev = reg;
187 }
188 return 0;
189}
190#else /* CONFIG_NEED_MULTIPLE_NODES */
191static int __init mark_nonram_nosave(void)
192{
193 return 0;
194}
195#endif
196
197/*
198 * Zones usage:
199 *
200 * We setup ZONE_DMA to be 31-bits on all platforms and ZONE_NORMAL to be
201 * everything else. GFP_DMA32 page allocations automatically fall back to
202 * ZONE_DMA.
203 *
204 * By using 31-bit unconditionally, we can exploit ARCH_ZONE_DMA_BITS to
205 * inform the generic DMA mapping code. 32-bit only devices (if not handled
206 * by an IOMMU anyway) will take a first dip into ZONE_NORMAL and get
207 * otherwise served by ZONE_DMA.
208 */
209static unsigned long max_zone_pfns[MAX_NR_ZONES];
210
211/*
212 * paging_init() sets up the page tables - in fact we've already done this.
213 */
214void __init paging_init(void)
215{
216 unsigned long long total_ram = memblock_phys_mem_size();
217 phys_addr_t top_of_ram = memblock_end_of_DRAM();
218
219#ifdef CONFIG_PPC32
220 unsigned long v = __fix_to_virt(__end_of_fixed_addresses - 1);
221 unsigned long end = __fix_to_virt(FIX_HOLE);
222
223 for (; v < end; v += PAGE_SIZE)
224 map_kernel_page(v, 0, __pgprot(0)); /* XXX gross */
225#endif
226
227#ifdef CONFIG_HIGHMEM
228 map_kernel_page(PKMAP_BASE, 0, __pgprot(0)); /* XXX gross */
229 pkmap_page_table = virt_to_kpte(PKMAP_BASE);
230
231 kmap_pte = virt_to_kpte(__fix_to_virt(FIX_KMAP_BEGIN));
232 kmap_prot = PAGE_KERNEL;
233#endif /* CONFIG_HIGHMEM */
234
235 printk(KERN_DEBUG "Top of RAM: 0x%llx, Total RAM: 0x%llx\n",
236 (unsigned long long)top_of_ram, total_ram);
237 printk(KERN_DEBUG "Memory hole size: %ldMB\n",
238 (long int)((top_of_ram - total_ram) >> 20));
239
240#ifdef CONFIG_ZONE_DMA
241 max_zone_pfns[ZONE_DMA] = min(max_low_pfn,
242 1UL << (ARCH_ZONE_DMA_BITS - PAGE_SHIFT));
243#endif
244 max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
245#ifdef CONFIG_HIGHMEM
246 max_zone_pfns[ZONE_HIGHMEM] = max_pfn;
247#endif
248
249 free_area_init_nodes(max_zone_pfns);
250
251 mark_nonram_nosave();
252}
253
254void __init mem_init(void)
255{
256 /*
257 * book3s is limited to 16 page sizes due to encoding this in
258 * a 4-bit field for slices.
259 */
260 BUILD_BUG_ON(MMU_PAGE_COUNT > 16);
261
262#ifdef CONFIG_SWIOTLB
263 swiotlb_init(0);
264#endif
265
266 high_memory = (void *) __va(max_low_pfn * PAGE_SIZE);
267 set_max_mapnr(max_pfn);
268 memblock_free_all();
269
270#ifdef CONFIG_HIGHMEM
271 {
272 unsigned long pfn, highmem_mapnr;
273
274 highmem_mapnr = lowmem_end_addr >> PAGE_SHIFT;
275 for (pfn = highmem_mapnr; pfn < max_mapnr; ++pfn) {
276 phys_addr_t paddr = (phys_addr_t)pfn << PAGE_SHIFT;
277 struct page *page = pfn_to_page(pfn);
278 if (!memblock_is_reserved(paddr))
279 free_highmem_page(page);
280 }
281 }
282#endif /* CONFIG_HIGHMEM */
283
284#if defined(CONFIG_PPC_FSL_BOOK3E) && !defined(CONFIG_SMP)
285 /*
286 * If smp is enabled, next_tlbcam_idx is initialized in the cpu up
287 * functions.... do it here for the non-smp case.
288 */
289 per_cpu(next_tlbcam_idx, smp_processor_id()) =
290 (mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY) - 1;
291#endif
292
293 mem_init_print_info(NULL);
294#ifdef CONFIG_PPC32
295 pr_info("Kernel virtual memory layout:\n");
296#ifdef CONFIG_KASAN
297 pr_info(" * 0x%08lx..0x%08lx : kasan shadow mem\n",
298 KASAN_SHADOW_START, KASAN_SHADOW_END);
299#endif
300 pr_info(" * 0x%08lx..0x%08lx : fixmap\n", FIXADDR_START, FIXADDR_TOP);
301#ifdef CONFIG_HIGHMEM
302 pr_info(" * 0x%08lx..0x%08lx : highmem PTEs\n",
303 PKMAP_BASE, PKMAP_ADDR(LAST_PKMAP));
304#endif /* CONFIG_HIGHMEM */
305 if (ioremap_bot != IOREMAP_TOP)
306 pr_info(" * 0x%08lx..0x%08lx : early ioremap\n",
307 ioremap_bot, IOREMAP_TOP);
308 pr_info(" * 0x%08lx..0x%08lx : vmalloc & ioremap\n",
309 VMALLOC_START, VMALLOC_END);
310#endif /* CONFIG_PPC32 */
311}
312
313void free_initmem(void)
314{
315 ppc_md.progress = ppc_printk_progress;
316 mark_initmem_nx();
317 init_mem_is_free = true;
318 free_initmem_default(POISON_FREE_INITMEM);
319}
320
321/*
322 * This is called when a page has been modified by the kernel.
323 * It just marks the page as not i-cache clean. We do the i-cache
324 * flush later when the page is given to a user process, if necessary.
325 */
326void flush_dcache_page(struct page *page)
327{
328 if (cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
329 return;
330 /* avoid an atomic op if possible */
331 if (test_bit(PG_arch_1, &page->flags))
332 clear_bit(PG_arch_1, &page->flags);
333}
334EXPORT_SYMBOL(flush_dcache_page);
335
336void flush_dcache_icache_page(struct page *page)
337{
338#ifdef CONFIG_HUGETLB_PAGE
339 if (PageCompound(page)) {
340 flush_dcache_icache_hugepage(page);
341 return;
342 }
343#endif
344#if defined(CONFIG_PPC_8xx) || defined(CONFIG_PPC64)
345 /* On 8xx there is no need to kmap since highmem is not supported */
346 __flush_dcache_icache(page_address(page));
347#else
348 if (IS_ENABLED(CONFIG_BOOKE) || sizeof(phys_addr_t) > sizeof(void *)) {
349 void *start = kmap_atomic(page);
350 __flush_dcache_icache(start);
351 kunmap_atomic(start);
352 } else {
353 __flush_dcache_icache_phys(page_to_pfn(page) << PAGE_SHIFT);
354 }
355#endif
356}
357EXPORT_SYMBOL(flush_dcache_icache_page);
358
359void clear_user_page(void *page, unsigned long vaddr, struct page *pg)
360{
361 clear_page(page);
362
363 /*
364 * We shouldn't have to do this, but some versions of glibc
365 * require it (ld.so assumes zero filled pages are icache clean)
366 * - Anton
367 */
368 flush_dcache_page(pg);
369}
370EXPORT_SYMBOL(clear_user_page);
371
372void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
373 struct page *pg)
374{
375 copy_page(vto, vfrom);
376
377 /*
378 * We should be able to use the following optimisation, however
379 * there are two problems.
380 * Firstly a bug in some versions of binutils meant PLT sections
381 * were not marked executable.
382 * Secondly the first word in the GOT section is blrl, used
383 * to establish the GOT address. Until recently the GOT was
384 * not marked executable.
385 * - Anton
386 */
387#if 0
388 if (!vma->vm_file && ((vma->vm_flags & VM_EXEC) == 0))
389 return;
390#endif
391
392 flush_dcache_page(pg);
393}
394
395void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
396 unsigned long addr, int len)
397{
398 unsigned long maddr;
399
400 maddr = (unsigned long) kmap(page) + (addr & ~PAGE_MASK);
401 flush_icache_range(maddr, maddr + len);
402 kunmap(page);
403}
404EXPORT_SYMBOL(flush_icache_user_range);
405
406/*
407 * System memory should not be in /proc/iomem but various tools expect it
408 * (eg kdump).
409 */
410static int __init add_system_ram_resources(void)
411{
412 struct memblock_region *reg;
413
414 for_each_memblock(memory, reg) {
415 struct resource *res;
416 unsigned long base = reg->base;
417 unsigned long size = reg->size;
418
419 res = kzalloc(sizeof(struct resource), GFP_KERNEL);
420 WARN_ON(!res);
421
422 if (res) {
423 res->name = "System RAM";
424 res->start = base;
425 res->end = base + size - 1;
426 res->flags = IORESOURCE_SYSTEM_RAM | IORESOURCE_BUSY;
427 WARN_ON(request_resource(&iomem_resource, res) < 0);
428 }
429 }
430
431 return 0;
432}
433subsys_initcall(add_system_ram_resources);
434
435#ifdef CONFIG_STRICT_DEVMEM
436/*
437 * devmem_is_allowed(): check to see if /dev/mem access to a certain address
438 * is valid. The argument is a physical page number.
439 *
440 * Access has to be given to non-kernel-ram areas as well, these contain the
441 * PCI mmio resources as well as potential bios/acpi data regions.
442 */
443int devmem_is_allowed(unsigned long pfn)
444{
445 if (page_is_rtas_user_buf(pfn))
446 return 1;
447 if (iomem_is_exclusive(PFN_PHYS(pfn)))
448 return 0;
449 if (!page_is_ram(pfn))
450 return 1;
451 return 0;
452}
453#endif /* CONFIG_STRICT_DEVMEM */
454
455/*
456 * This is defined in kernel/resource.c but only powerpc needs to export it, for
457 * the EHEA driver. Drop this when drivers/net/ethernet/ibm/ehea is removed.
458 */
459EXPORT_SYMBOL_GPL(walk_system_ram_range);
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * PowerPC version
4 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
5 *
6 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
7 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
8 * Copyright (C) 1996 Paul Mackerras
9 * PPC44x/36-bit changes by Matt Porter (mporter@mvista.com)
10 *
11 * Derived from "arch/i386/mm/init.c"
12 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
13 */
14
15#include <linux/export.h>
16#include <linux/sched.h>
17#include <linux/kernel.h>
18#include <linux/errno.h>
19#include <linux/string.h>
20#include <linux/gfp.h>
21#include <linux/types.h>
22#include <linux/mm.h>
23#include <linux/stddef.h>
24#include <linux/init.h>
25#include <linux/memblock.h>
26#include <linux/highmem.h>
27#include <linux/initrd.h>
28#include <linux/pagemap.h>
29#include <linux/suspend.h>
30#include <linux/hugetlb.h>
31#include <linux/slab.h>
32#include <linux/vmalloc.h>
33#include <linux/memremap.h>
34#include <linux/dma-direct.h>
35#include <linux/kprobes.h>
36
37#include <asm/prom.h>
38#include <asm/io.h>
39#include <asm/mmu_context.h>
40#include <asm/mmu.h>
41#include <asm/smp.h>
42#include <asm/machdep.h>
43#include <asm/btext.h>
44#include <asm/tlb.h>
45#include <asm/sections.h>
46#include <asm/sparsemem.h>
47#include <asm/vdso.h>
48#include <asm/fixmap.h>
49#include <asm/swiotlb.h>
50#include <asm/rtas.h>
51#include <asm/kasan.h>
52
53#include <mm/mmu_decl.h>
54
55#ifndef CPU_FTR_COHERENT_ICACHE
56#define CPU_FTR_COHERENT_ICACHE 0 /* XXX for now */
57#define CPU_FTR_NOEXECUTE 0
58#endif
59
60unsigned long long memory_limit;
61bool init_mem_is_free;
62
63#ifdef CONFIG_HIGHMEM
64pte_t *kmap_pte;
65EXPORT_SYMBOL(kmap_pte);
66#endif
67
68pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
69 unsigned long size, pgprot_t vma_prot)
70{
71 if (ppc_md.phys_mem_access_prot)
72 return ppc_md.phys_mem_access_prot(file, pfn, size, vma_prot);
73
74 if (!page_is_ram(pfn))
75 vma_prot = pgprot_noncached(vma_prot);
76
77 return vma_prot;
78}
79EXPORT_SYMBOL(phys_mem_access_prot);
80
81#ifdef CONFIG_MEMORY_HOTPLUG
82
83#ifdef CONFIG_NUMA
84int memory_add_physaddr_to_nid(u64 start)
85{
86 return hot_add_scn_to_nid(start);
87}
88#endif
89
90int __weak create_section_mapping(unsigned long start, unsigned long end,
91 int nid, pgprot_t prot)
92{
93 return -ENODEV;
94}
95
96int __weak remove_section_mapping(unsigned long start, unsigned long end)
97{
98 return -ENODEV;
99}
100
101#define FLUSH_CHUNK_SIZE SZ_1G
102/**
103 * flush_dcache_range_chunked(): Write any modified data cache blocks out to
104 * memory and invalidate them, in chunks of up to FLUSH_CHUNK_SIZE
105 * Does not invalidate the corresponding instruction cache blocks.
106 *
107 * @start: the start address
108 * @stop: the stop address (exclusive)
109 * @chunk: the max size of the chunks
110 */
111static void flush_dcache_range_chunked(unsigned long start, unsigned long stop,
112 unsigned long chunk)
113{
114 unsigned long i;
115
116 for (i = start; i < stop; i += chunk) {
117 flush_dcache_range(i, min(stop, i + chunk));
118 cond_resched();
119 }
120}
121
122int __ref arch_add_memory(int nid, u64 start, u64 size,
123 struct mhp_params *params)
124{
125 unsigned long start_pfn = start >> PAGE_SHIFT;
126 unsigned long nr_pages = size >> PAGE_SHIFT;
127 int rc;
128
129 start = (unsigned long)__va(start);
130 rc = create_section_mapping(start, start + size, nid,
131 params->pgprot);
132 if (rc) {
133 pr_warn("Unable to create mapping for hot added memory 0x%llx..0x%llx: %d\n",
134 start, start + size, rc);
135 return -EFAULT;
136 }
137
138 return __add_pages(nid, start_pfn, nr_pages, params);
139}
140
141void __ref arch_remove_memory(int nid, u64 start, u64 size,
142 struct vmem_altmap *altmap)
143{
144 unsigned long start_pfn = start >> PAGE_SHIFT;
145 unsigned long nr_pages = size >> PAGE_SHIFT;
146 int ret;
147
148 __remove_pages(start_pfn, nr_pages, altmap);
149
150 /* Remove htab bolted mappings for this section of memory */
151 start = (unsigned long)__va(start);
152 flush_dcache_range_chunked(start, start + size, FLUSH_CHUNK_SIZE);
153
154 ret = remove_section_mapping(start, start + size);
155 WARN_ON_ONCE(ret);
156
157 /* Ensure all vmalloc mappings are flushed in case they also
158 * hit that section of memory
159 */
160 vm_unmap_aliases();
161}
162#endif
163
164#ifndef CONFIG_NEED_MULTIPLE_NODES
165void __init mem_topology_setup(void)
166{
167 max_low_pfn = max_pfn = memblock_end_of_DRAM() >> PAGE_SHIFT;
168 min_low_pfn = MEMORY_START >> PAGE_SHIFT;
169#ifdef CONFIG_HIGHMEM
170 max_low_pfn = lowmem_end_addr >> PAGE_SHIFT;
171#endif
172
173 /* Place all memblock_regions in the same node and merge contiguous
174 * memblock_regions
175 */
176 memblock_set_node(0, PHYS_ADDR_MAX, &memblock.memory, 0);
177}
178
179void __init initmem_init(void)
180{
181 sparse_init();
182}
183
184/* mark pages that don't exist as nosave */
185static int __init mark_nonram_nosave(void)
186{
187 struct memblock_region *reg, *prev = NULL;
188
189 for_each_memblock(memory, reg) {
190 if (prev &&
191 memblock_region_memory_end_pfn(prev) < memblock_region_memory_base_pfn(reg))
192 register_nosave_region(memblock_region_memory_end_pfn(prev),
193 memblock_region_memory_base_pfn(reg));
194 prev = reg;
195 }
196 return 0;
197}
198#else /* CONFIG_NEED_MULTIPLE_NODES */
199static int __init mark_nonram_nosave(void)
200{
201 return 0;
202}
203#endif
204
205/*
206 * Zones usage:
207 *
208 * We setup ZONE_DMA to be 31-bits on all platforms and ZONE_NORMAL to be
209 * everything else. GFP_DMA32 page allocations automatically fall back to
210 * ZONE_DMA.
211 *
212 * By using 31-bit unconditionally, we can exploit zone_dma_bits to inform the
213 * generic DMA mapping code. 32-bit only devices (if not handled by an IOMMU
214 * anyway) will take a first dip into ZONE_NORMAL and get otherwise served by
215 * ZONE_DMA.
216 */
217static unsigned long max_zone_pfns[MAX_NR_ZONES];
218
219/*
220 * paging_init() sets up the page tables - in fact we've already done this.
221 */
222void __init paging_init(void)
223{
224 unsigned long long total_ram = memblock_phys_mem_size();
225 phys_addr_t top_of_ram = memblock_end_of_DRAM();
226
227#ifdef CONFIG_HIGHMEM
228 unsigned long v = __fix_to_virt(FIX_KMAP_END);
229 unsigned long end = __fix_to_virt(FIX_KMAP_BEGIN);
230
231 for (; v < end; v += PAGE_SIZE)
232 map_kernel_page(v, 0, __pgprot(0)); /* XXX gross */
233
234 map_kernel_page(PKMAP_BASE, 0, __pgprot(0)); /* XXX gross */
235 pkmap_page_table = virt_to_kpte(PKMAP_BASE);
236
237 kmap_pte = virt_to_kpte(__fix_to_virt(FIX_KMAP_BEGIN));
238#endif /* CONFIG_HIGHMEM */
239
240 printk(KERN_DEBUG "Top of RAM: 0x%llx, Total RAM: 0x%llx\n",
241 (unsigned long long)top_of_ram, total_ram);
242 printk(KERN_DEBUG "Memory hole size: %ldMB\n",
243 (long int)((top_of_ram - total_ram) >> 20));
244
245 /*
246 * Allow 30-bit DMA for very limited Broadcom wifi chips on many
247 * powerbooks.
248 */
249 if (IS_ENABLED(CONFIG_PPC32))
250 zone_dma_bits = 30;
251 else
252 zone_dma_bits = 31;
253
254#ifdef CONFIG_ZONE_DMA
255 max_zone_pfns[ZONE_DMA] = min(max_low_pfn,
256 1UL << (zone_dma_bits - PAGE_SHIFT));
257#endif
258 max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
259#ifdef CONFIG_HIGHMEM
260 max_zone_pfns[ZONE_HIGHMEM] = max_pfn;
261#endif
262
263 free_area_init(max_zone_pfns);
264
265 mark_nonram_nosave();
266}
267
268void __init mem_init(void)
269{
270 /*
271 * book3s is limited to 16 page sizes due to encoding this in
272 * a 4-bit field for slices.
273 */
274 BUILD_BUG_ON(MMU_PAGE_COUNT > 16);
275
276#ifdef CONFIG_SWIOTLB
277 /*
278 * Some platforms (e.g. 85xx) limit DMA-able memory way below
279 * 4G. We force memblock to bottom-up mode to ensure that the
280 * memory allocated in swiotlb_init() is DMA-able.
281 * As it's the last memblock allocation, no need to reset it
282 * back to to-down.
283 */
284 memblock_set_bottom_up(true);
285 swiotlb_init(0);
286#endif
287
288 high_memory = (void *) __va(max_low_pfn * PAGE_SIZE);
289 set_max_mapnr(max_pfn);
290
291 kasan_late_init();
292
293 memblock_free_all();
294
295#ifdef CONFIG_HIGHMEM
296 {
297 unsigned long pfn, highmem_mapnr;
298
299 highmem_mapnr = lowmem_end_addr >> PAGE_SHIFT;
300 for (pfn = highmem_mapnr; pfn < max_mapnr; ++pfn) {
301 phys_addr_t paddr = (phys_addr_t)pfn << PAGE_SHIFT;
302 struct page *page = pfn_to_page(pfn);
303 if (!memblock_is_reserved(paddr))
304 free_highmem_page(page);
305 }
306 }
307#endif /* CONFIG_HIGHMEM */
308
309#if defined(CONFIG_PPC_FSL_BOOK3E) && !defined(CONFIG_SMP)
310 /*
311 * If smp is enabled, next_tlbcam_idx is initialized in the cpu up
312 * functions.... do it here for the non-smp case.
313 */
314 per_cpu(next_tlbcam_idx, smp_processor_id()) =
315 (mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY) - 1;
316#endif
317
318 mem_init_print_info(NULL);
319#ifdef CONFIG_PPC32
320 pr_info("Kernel virtual memory layout:\n");
321#ifdef CONFIG_KASAN
322 pr_info(" * 0x%08lx..0x%08lx : kasan shadow mem\n",
323 KASAN_SHADOW_START, KASAN_SHADOW_END);
324#endif
325 pr_info(" * 0x%08lx..0x%08lx : fixmap\n", FIXADDR_START, FIXADDR_TOP);
326#ifdef CONFIG_HIGHMEM
327 pr_info(" * 0x%08lx..0x%08lx : highmem PTEs\n",
328 PKMAP_BASE, PKMAP_ADDR(LAST_PKMAP));
329#endif /* CONFIG_HIGHMEM */
330 if (ioremap_bot != IOREMAP_TOP)
331 pr_info(" * 0x%08lx..0x%08lx : early ioremap\n",
332 ioremap_bot, IOREMAP_TOP);
333 pr_info(" * 0x%08lx..0x%08lx : vmalloc & ioremap\n",
334 VMALLOC_START, VMALLOC_END);
335#endif /* CONFIG_PPC32 */
336}
337
338void free_initmem(void)
339{
340 ppc_md.progress = ppc_printk_progress;
341 mark_initmem_nx();
342 init_mem_is_free = true;
343 free_initmem_default(POISON_FREE_INITMEM);
344}
345
346/**
347 * flush_coherent_icache() - if a CPU has a coherent icache, flush it
348 * @addr: The base address to use (can be any valid address, the whole cache will be flushed)
349 * Return true if the cache was flushed, false otherwise
350 */
351static inline bool flush_coherent_icache(unsigned long addr)
352{
353 /*
354 * For a snooping icache, we still need a dummy icbi to purge all the
355 * prefetched instructions from the ifetch buffers. We also need a sync
356 * before the icbi to order the the actual stores to memory that might
357 * have modified instructions with the icbi.
358 */
359 if (cpu_has_feature(CPU_FTR_COHERENT_ICACHE)) {
360 mb(); /* sync */
361 allow_read_from_user((const void __user *)addr, L1_CACHE_BYTES);
362 icbi((void *)addr);
363 prevent_read_from_user((const void __user *)addr, L1_CACHE_BYTES);
364 mb(); /* sync */
365 isync();
366 return true;
367 }
368
369 return false;
370}
371
372/**
373 * invalidate_icache_range() - Flush the icache by issuing icbi across an address range
374 * @start: the start address
375 * @stop: the stop address (exclusive)
376 */
377static void invalidate_icache_range(unsigned long start, unsigned long stop)
378{
379 unsigned long shift = l1_icache_shift();
380 unsigned long bytes = l1_icache_bytes();
381 char *addr = (char *)(start & ~(bytes - 1));
382 unsigned long size = stop - (unsigned long)addr + (bytes - 1);
383 unsigned long i;
384
385 for (i = 0; i < size >> shift; i++, addr += bytes)
386 icbi(addr);
387
388 mb(); /* sync */
389 isync();
390}
391
392/**
393 * flush_icache_range: Write any modified data cache blocks out to memory
394 * and invalidate the corresponding blocks in the instruction cache
395 *
396 * Generic code will call this after writing memory, before executing from it.
397 *
398 * @start: the start address
399 * @stop: the stop address (exclusive)
400 */
401void flush_icache_range(unsigned long start, unsigned long stop)
402{
403 if (flush_coherent_icache(start))
404 return;
405
406 clean_dcache_range(start, stop);
407
408 if (IS_ENABLED(CONFIG_44x)) {
409 /*
410 * Flash invalidate on 44x because we are passed kmapped
411 * addresses and this doesn't work for userspace pages due to
412 * the virtually tagged icache.
413 */
414 iccci((void *)start);
415 mb(); /* sync */
416 isync();
417 } else
418 invalidate_icache_range(start, stop);
419}
420EXPORT_SYMBOL(flush_icache_range);
421
422#if !defined(CONFIG_PPC_8xx) && !defined(CONFIG_PPC64)
423/**
424 * flush_dcache_icache_phys() - Flush a page by it's physical address
425 * @physaddr: the physical address of the page
426 */
427static void flush_dcache_icache_phys(unsigned long physaddr)
428{
429 unsigned long bytes = l1_dcache_bytes();
430 unsigned long nb = PAGE_SIZE / bytes;
431 unsigned long addr = physaddr & PAGE_MASK;
432 unsigned long msr, msr0;
433 unsigned long loop1 = addr, loop2 = addr;
434
435 msr0 = mfmsr();
436 msr = msr0 & ~MSR_DR;
437 /*
438 * This must remain as ASM to prevent potential memory accesses
439 * while the data MMU is disabled
440 */
441 asm volatile(
442 " mtctr %2;\n"
443 " mtmsr %3;\n"
444 " isync;\n"
445 "0: dcbst 0, %0;\n"
446 " addi %0, %0, %4;\n"
447 " bdnz 0b;\n"
448 " sync;\n"
449 " mtctr %2;\n"
450 "1: icbi 0, %1;\n"
451 " addi %1, %1, %4;\n"
452 " bdnz 1b;\n"
453 " sync;\n"
454 " mtmsr %5;\n"
455 " isync;\n"
456 : "+&r" (loop1), "+&r" (loop2)
457 : "r" (nb), "r" (msr), "i" (bytes), "r" (msr0)
458 : "ctr", "memory");
459}
460NOKPROBE_SYMBOL(flush_dcache_icache_phys)
461#endif // !defined(CONFIG_PPC_8xx) && !defined(CONFIG_PPC64)
462
463/*
464 * This is called when a page has been modified by the kernel.
465 * It just marks the page as not i-cache clean. We do the i-cache
466 * flush later when the page is given to a user process, if necessary.
467 */
468void flush_dcache_page(struct page *page)
469{
470 if (cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
471 return;
472 /* avoid an atomic op if possible */
473 if (test_bit(PG_arch_1, &page->flags))
474 clear_bit(PG_arch_1, &page->flags);
475}
476EXPORT_SYMBOL(flush_dcache_page);
477
478void flush_dcache_icache_page(struct page *page)
479{
480#ifdef CONFIG_HUGETLB_PAGE
481 if (PageCompound(page)) {
482 flush_dcache_icache_hugepage(page);
483 return;
484 }
485#endif
486#if defined(CONFIG_PPC_8xx) || defined(CONFIG_PPC64)
487 /* On 8xx there is no need to kmap since highmem is not supported */
488 __flush_dcache_icache(page_address(page));
489#else
490 if (IS_ENABLED(CONFIG_BOOKE) || sizeof(phys_addr_t) > sizeof(void *)) {
491 void *start = kmap_atomic(page);
492 __flush_dcache_icache(start);
493 kunmap_atomic(start);
494 } else {
495 unsigned long addr = page_to_pfn(page) << PAGE_SHIFT;
496
497 if (flush_coherent_icache(addr))
498 return;
499 flush_dcache_icache_phys(addr);
500 }
501#endif
502}
503EXPORT_SYMBOL(flush_dcache_icache_page);
504
505/**
506 * __flush_dcache_icache(): Flush a particular page from the data cache to RAM.
507 * Note: this is necessary because the instruction cache does *not*
508 * snoop from the data cache.
509 *
510 * @page: the address of the page to flush
511 */
512void __flush_dcache_icache(void *p)
513{
514 unsigned long addr = (unsigned long)p;
515
516 if (flush_coherent_icache(addr))
517 return;
518
519 clean_dcache_range(addr, addr + PAGE_SIZE);
520
521 /*
522 * We don't flush the icache on 44x. Those have a virtual icache and we
523 * don't have access to the virtual address here (it's not the page
524 * vaddr but where it's mapped in user space). The flushing of the
525 * icache on these is handled elsewhere, when a change in the address
526 * space occurs, before returning to user space.
527 */
528
529 if (cpu_has_feature(MMU_FTR_TYPE_44x))
530 return;
531
532 invalidate_icache_range(addr, addr + PAGE_SIZE);
533}
534
535void clear_user_page(void *page, unsigned long vaddr, struct page *pg)
536{
537 clear_page(page);
538
539 /*
540 * We shouldn't have to do this, but some versions of glibc
541 * require it (ld.so assumes zero filled pages are icache clean)
542 * - Anton
543 */
544 flush_dcache_page(pg);
545}
546EXPORT_SYMBOL(clear_user_page);
547
548void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
549 struct page *pg)
550{
551 copy_page(vto, vfrom);
552
553 /*
554 * We should be able to use the following optimisation, however
555 * there are two problems.
556 * Firstly a bug in some versions of binutils meant PLT sections
557 * were not marked executable.
558 * Secondly the first word in the GOT section is blrl, used
559 * to establish the GOT address. Until recently the GOT was
560 * not marked executable.
561 * - Anton
562 */
563#if 0
564 if (!vma->vm_file && ((vma->vm_flags & VM_EXEC) == 0))
565 return;
566#endif
567
568 flush_dcache_page(pg);
569}
570
571void flush_icache_user_page(struct vm_area_struct *vma, struct page *page,
572 unsigned long addr, int len)
573{
574 unsigned long maddr;
575
576 maddr = (unsigned long) kmap(page) + (addr & ~PAGE_MASK);
577 flush_icache_range(maddr, maddr + len);
578 kunmap(page);
579}
580
581/*
582 * System memory should not be in /proc/iomem but various tools expect it
583 * (eg kdump).
584 */
585static int __init add_system_ram_resources(void)
586{
587 struct memblock_region *reg;
588
589 for_each_memblock(memory, reg) {
590 struct resource *res;
591 unsigned long base = reg->base;
592 unsigned long size = reg->size;
593
594 res = kzalloc(sizeof(struct resource), GFP_KERNEL);
595 WARN_ON(!res);
596
597 if (res) {
598 res->name = "System RAM";
599 res->start = base;
600 res->end = base + size - 1;
601 res->flags = IORESOURCE_SYSTEM_RAM | IORESOURCE_BUSY;
602 WARN_ON(request_resource(&iomem_resource, res) < 0);
603 }
604 }
605
606 return 0;
607}
608subsys_initcall(add_system_ram_resources);
609
610#ifdef CONFIG_STRICT_DEVMEM
611/*
612 * devmem_is_allowed(): check to see if /dev/mem access to a certain address
613 * is valid. The argument is a physical page number.
614 *
615 * Access has to be given to non-kernel-ram areas as well, these contain the
616 * PCI mmio resources as well as potential bios/acpi data regions.
617 */
618int devmem_is_allowed(unsigned long pfn)
619{
620 if (page_is_rtas_user_buf(pfn))
621 return 1;
622 if (iomem_is_exclusive(PFN_PHYS(pfn)))
623 return 0;
624 if (!page_is_ram(pfn))
625 return 1;
626 return 0;
627}
628#endif /* CONFIG_STRICT_DEVMEM */
629
630/*
631 * This is defined in kernel/resource.c but only powerpc needs to export it, for
632 * the EHEA driver. Drop this when drivers/net/ethernet/ibm/ehea is removed.
633 */
634EXPORT_SYMBOL_GPL(walk_system_ram_range);