Loading...
1// SPDX-License-Identifier: GPL-2.0+
2// Copyright (c) 2018 Facebook Inc.
3// Author: Vijay Khemka <vijaykhemka@fb.com>
4/dts-v1/;
5
6#include "aspeed-g5.dtsi"
7#include <dt-bindings/gpio/aspeed-gpio.h>
8
9/ {
10 model = "Facebook TiogaPass BMC";
11 compatible = "facebook,tiogapass-bmc", "aspeed,ast2500";
12 aliases {
13 serial0 = &uart1;
14 serial4 = &uart5;
15
16 /*
17 * Hardcode the bus number of i2c switches' channels to
18 * avoid breaking the legacy applications.
19 */
20 i2c16 = &imux16;
21 i2c17 = &imux17;
22 i2c18 = &imux18;
23 i2c19 = &imux19;
24 i2c20 = &imux20;
25 i2c21 = &imux21;
26 i2c22 = &imux22;
27 i2c23 = &imux23;
28 i2c24 = &imux24;
29 i2c25 = &imux25;
30 i2c26 = &imux26;
31 i2c27 = &imux27;
32 i2c28 = &imux28;
33 i2c29 = &imux29;
34 i2c30 = &imux30;
35 i2c31 = &imux31;
36 };
37 chosen {
38 stdout-path = &uart5;
39 bootargs = "console=ttyS4,115200 earlyprintk";
40 };
41
42 memory@80000000 {
43 reg = <0x80000000 0x20000000>;
44 };
45
46 iio-hwmon {
47 compatible = "iio-hwmon";
48 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
49 <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>;
50 };
51
52};
53
54&fmc {
55 status = "okay";
56 flash@0 {
57 status = "okay";
58 m25p,fast-read;
59#include "openbmc-flash-layout.dtsi"
60 };
61};
62
63&spi1 {
64 status = "okay";
65 pinctrl-names = "default";
66 pinctrl-0 = <&pinctrl_spi1_default>;
67 flash@0 {
68 status = "okay";
69 m25p,fast-read;
70 label = "pnor";
71 };
72};
73
74&lpc_snoop {
75 status = "okay";
76 snoop-ports = <0x80>;
77};
78
79&lpc_ctrl {
80 // Enable lpc clock
81 status = "okay";
82};
83
84&vuart {
85 // VUART Host Console
86 status = "okay";
87};
88
89&uart1 {
90 // Host Console
91 status = "okay";
92 pinctrl-names = "default";
93 pinctrl-0 = <&pinctrl_txd1_default
94 &pinctrl_rxd1_default>;
95};
96
97&uart2 {
98 // SoL Host Console
99 status = "okay";
100};
101
102&uart3 {
103 // SoL BMC Console
104 status = "okay";
105};
106
107&uart5 {
108 // BMC Console
109 status = "okay";
110};
111
112&kcs2 {
113 // BMC KCS channel 2
114 status = "okay";
115 kcs_addr = <0xca8>;
116};
117
118&kcs3 {
119 // BMC KCS channel 3
120 status = "okay";
121 kcs_addr = <0xca2>;
122};
123
124&mac0 {
125 status = "okay";
126
127 pinctrl-names = "default";
128 pinctrl-0 = <&pinctrl_rmii1_default>;
129 use-ncsi;
130};
131
132&adc {
133 status = "okay";
134};
135
136&i2c0 {
137 status = "okay";
138 //Airmax Conn B, CPU0 PIROM, CPU1 PIROM
139};
140
141&i2c1 {
142 status = "okay";
143 //X24 Riser
144 i2c-switch@71 {
145 compatible = "nxp,pca9544";
146 #address-cells = <1>;
147 #size-cells = <0>;
148 reg = <0x71>;
149
150 imux16: i2c@0 {
151 #address-cells = <1>;
152 #size-cells = <0>;
153 reg = <0>;
154
155 ina230@45 {
156 compatible = "ti,ina230";
157 reg = <0x45>;
158 };
159
160 tmp75@48 {
161 compatible = "ti,tmp75";
162 reg = <0x48>;
163 };
164
165 tmp421@49 {
166 compatible = "ti,tmp75";
167 reg = <0x49>;
168 };
169
170 eeprom@50 {
171 compatible = "atmel,24c64";
172 reg = <0x50>;
173 pagesize = <32>;
174 };
175
176 i2c-switch@73 {
177 compatible = "nxp,pca9546";
178 #address-cells = <1>;
179 #size-cells = <0>;
180 reg = <0x73>;
181
182 imux20: i2c@0 {
183 #address-cells = <1>;
184 #size-cells = <0>;
185 reg = <0>;
186 };
187
188 imux21: i2c@1 {
189 #address-cells = <1>;
190 #size-cells = <0>;
191 reg = <1>;
192 };
193
194 imux22: i2c@2 {
195 #address-cells = <1>;
196 #size-cells = <0>;
197 reg = <2>;
198 };
199
200 imux23: i2c@3 {
201 #address-cells = <1>;
202 #size-cells = <0>;
203 reg = <3>;
204 };
205
206 };
207
208 };
209
210 imux17: i2c@1 {
211 #address-cells = <1>;
212 #size-cells = <0>;
213 reg = <1>;
214
215 ina230@45 {
216 compatible = "ti,ina230";
217 reg = <0x45>;
218 };
219
220 tmp421@48 {
221 compatible = "ti,tmp75";
222 reg = <0x48>;
223 };
224
225 tmp421@49 {
226 compatible = "ti,tmp75";
227 reg = <0x49>;
228 };
229
230 eeprom@50 {
231 compatible = "atmel,24c64";
232 reg = <0x50>;
233 pagesize = <32>;
234 };
235
236 i2c-switch@73 {
237 compatible = "nxp,pca9546";
238 #address-cells = <1>;
239 #size-cells = <0>;
240 reg = <0x73>;
241
242 imux24: i2c@0 {
243 #address-cells = <1>;
244 #size-cells = <0>;
245 reg = <0>;
246 };
247
248 imux25: i2c@1 {
249 #address-cells = <1>;
250 #size-cells = <0>;
251 reg = <1>;
252 };
253
254 imux26: i2c@2 {
255 #address-cells = <1>;
256 #size-cells = <0>;
257 reg = <2>;
258 };
259
260 imux27: i2c@3 {
261 #address-cells = <1>;
262 #size-cells = <0>;
263 reg = <3>;
264 };
265
266 };
267
268 };
269
270 imux18: i2c@2 {
271 #address-cells = <1>;
272 #size-cells = <0>;
273 reg = <2>;
274
275 ina230@45 {
276 compatible = "ti,ina230";
277 reg = <0x45>;
278 };
279
280 tmp421@48 {
281 compatible = "ti,tmp75";
282 reg = <0x48>;
283 };
284
285 tmp421@49 {
286 compatible = "ti,tmp75";
287 reg = <0x49>;
288 };
289
290 eeprom@50 {
291 compatible = "atmel,24c64";
292 reg = <0x50>;
293 pagesize = <32>;
294 };
295
296 i2c-switch@73 {
297 compatible = "nxp,pca9546";
298 #address-cells = <1>;
299 #size-cells = <0>;
300 reg = <0x73>;
301
302 imux28: i2c@0 {
303 #address-cells = <1>;
304 #size-cells = <0>;
305 reg = <0>;
306 };
307
308 imux29: i2c@1 {
309 #address-cells = <1>;
310 #size-cells = <0>;
311 reg = <1>;
312 };
313
314 imux30: i2c@2 {
315 #address-cells = <1>;
316 #size-cells = <0>;
317 reg = <2>;
318 };
319
320 imux31: i2c@3 {
321 #address-cells = <1>;
322 #size-cells = <0>;
323 reg = <3>;
324 };
325
326 };
327
328 };
329
330 imux19: i2c@3 {
331 #address-cells = <1>;
332 #size-cells = <0>;
333 reg = <3>;
334
335 i2c-switch@40 {
336 compatible = "ti,ina230";
337 reg = <0x40>;
338 };
339
340 i2c-switch@41 {
341 compatible = "ti,ina230";
342 reg = <0x41>;
343 };
344
345 i2c-switch@45 {
346 compatible = "ti,ina230";
347 reg = <0x45>;
348 };
349
350 };
351
352 };
353};
354
355&i2c2 {
356 status = "okay";
357 // Mezz Management SMBus
358};
359
360&i2c3 {
361 status = "okay";
362 // SMBus to Board ID EEPROM
363};
364
365&i2c4 {
366 status = "okay";
367 // BMC Debug Header
368};
369
370&i2c5 {
371 status = "okay";
372 // CPU Voltage regulators
373 regulator@48 {
374 compatible = "infineon,pxe1610";
375 reg = <0x48>;
376 };
377 regulator@4a {
378 compatible = "infineon,pxe1610";
379 reg = <0x4a>;
380 };
381 regulator@50 {
382 compatible = "infineon,pxe1610";
383 reg = <0x50>;
384 };
385 regulator@52 {
386 compatible = "infineon,pxe1610";
387 reg = <0x52>;
388 };
389 regulator@58 {
390 compatible = "infineon,pxe1610";
391 reg = <0x58>;
392 };
393 regulator@5a {
394 compatible = "infineon,pxe1610";
395 reg = <0x5a>;
396 };
397 regulator@68 {
398 compatible = "infineon,pxe1610";
399 reg = <0x68>;
400 };
401 regulator@70 {
402 compatible = "infineon,pxe1610";
403 reg = <0x70>;
404 };
405 regulator@72 {
406 compatible = "infineon,pxe1610";
407 reg = <0x72>;
408 };
409};
410
411&i2c6 {
412 status = "okay";
413 tpm@20 {
414 compatible = "infineon,slb9645tt";
415 reg = <0x20>;
416 };
417 tmp421@4e {
418 compatible = "ti,tmp421";
419 reg = <0x4e>;
420 };
421 tmp421@4f {
422 compatible = "ti,tmp421";
423 reg = <0x4f>;
424 };
425 eeprom@54 {
426 compatible = "atmel,24c64";
427 reg = <0x54>;
428 pagesize = <32>;
429 };
430};
431
432&i2c7 {
433 status = "okay";
434 //HSC, AirMax Conn A
435};
436
437&i2c8 {
438 status = "okay";
439 tmp421@1f {
440 compatible = "ti,tmp421";
441 reg = <0x1f>;
442 };
443 //Mezz Sensor SMBus
444};
445
446&i2c9 {
447 status = "okay";
448 //USB Debug Connector
449};
450
451&pwm_tacho {
452 status = "okay";
453 pinctrl-names = "default";
454 pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>;
455 fan@0 {
456 reg = <0x00>;
457 aspeed,fan-tach-ch = /bits/ 8 <0x00>;
458 };
459
460 fan@1 {
461 reg = <0x01>;
462 aspeed,fan-tach-ch = /bits/ 8 <0x02>;
463 };
464};
1// SPDX-License-Identifier: GPL-2.0+
2// Copyright (c) 2018 Facebook Inc.
3// Author: Vijay Khemka <vijaykhemka@fb.com>
4/dts-v1/;
5
6#include "aspeed-g5.dtsi"
7#include <dt-bindings/gpio/aspeed-gpio.h>
8#include <dt-bindings/i2c/i2c.h>
9
10/ {
11 model = "Facebook TiogaPass BMC";
12 compatible = "facebook,tiogapass-bmc", "aspeed,ast2500";
13 aliases {
14 serial0 = &uart1;
15 serial4 = &uart5;
16
17 /*
18 * Hardcode the bus number of i2c switches' channels to
19 * avoid breaking the legacy applications.
20 */
21 i2c16 = &imux16;
22 i2c17 = &imux17;
23 i2c18 = &imux18;
24 i2c19 = &imux19;
25 i2c20 = &imux20;
26 i2c21 = &imux21;
27 i2c22 = &imux22;
28 i2c23 = &imux23;
29 i2c24 = &imux24;
30 i2c25 = &imux25;
31 i2c26 = &imux26;
32 i2c27 = &imux27;
33 i2c28 = &imux28;
34 i2c29 = &imux29;
35 i2c30 = &imux30;
36 i2c31 = &imux31;
37 };
38 chosen {
39 stdout-path = &uart5;
40 bootargs = "console=ttyS4,115200 earlyprintk";
41 };
42
43 memory@80000000 {
44 reg = <0x80000000 0x20000000>;
45 };
46
47 iio-hwmon {
48 compatible = "iio-hwmon";
49 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
50 <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>;
51 };
52
53};
54
55&fmc {
56 status = "okay";
57 flash@0 {
58 status = "okay";
59 m25p,fast-read;
60#include "openbmc-flash-layout.dtsi"
61 };
62};
63
64&spi1 {
65 status = "okay";
66 pinctrl-names = "default";
67 pinctrl-0 = <&pinctrl_spi1_default>;
68 flash@0 {
69 status = "okay";
70 m25p,fast-read;
71 label = "pnor";
72 };
73};
74
75&lpc_snoop {
76 status = "okay";
77 snoop-ports = <0x80>;
78};
79
80&lpc_ctrl {
81 // Enable lpc clock
82 status = "okay";
83};
84
85&vuart {
86 // VUART Host Console
87 status = "okay";
88};
89
90&uart1 {
91 // Host Console
92 status = "okay";
93 pinctrl-names = "default";
94 pinctrl-0 = <&pinctrl_txd1_default
95 &pinctrl_rxd1_default>;
96};
97
98&uart2 {
99 // SoL Host Console
100 status = "okay";
101};
102
103&uart3 {
104 // SoL BMC Console
105 status = "okay";
106};
107
108&uart5 {
109 // BMC Console
110 status = "okay";
111};
112
113&kcs2 {
114 // BMC KCS channel 2
115 status = "okay";
116 aspeed,lpc-io-reg = <0xca8>;
117};
118
119&kcs3 {
120 // BMC KCS channel 3
121 status = "okay";
122 aspeed,lpc-io-reg = <0xca2>;
123};
124
125&gpio {
126 status = "okay";
127 gpio-line-names =
128 /*A0-A7*/ "BMC_CPLD_FPGA_SEL","","","","","","","",
129 /*B0-B7*/ "","BMC_DEBUG_EN","","","","BMC_PPIN","PS_PWROK",
130 "IRQ_PVDDQ_GHJ_VRHOT_LVT3",
131 /*C0-C7*/ "","","","","","","","",
132 /*D0-D7*/ "BIOS_MRC_DEBUG_MSG_DIS","BOARD_REV_ID0","",
133 "BOARD_REV_ID1","IRQ_DIMM_SAVE_LVT3","BOARD_REV_ID2",
134 "CPU_ERR0_LVT3_BMC","CPU_ERR1_LVT3_BMC",
135 /*E0-E7*/ "RESET_BUTTON","RESET_OUT","POWER_BUTTON",
136 "POWER_OUT","NMI_BUTTON","","CPU0_PROCHOT_LVT3_ BMC",
137 "CPU1_PROCHOT_LVT3_ BMC",
138 /*F0-F7*/ "IRQ_PVDDQ_ABC_VRHOT_LVT3","",
139 "IRQ_PVCCIN_CPU0_VRHOT_LVC3",
140 "IRQ_PVCCIN_CPU1_VRHOT_LVC3",
141 "IRQ_PVDDQ_KLM_VRHOT_LVT3","","P3VBAT_BRIDGE_EN","",
142 /*G0-G7*/ "CPU_ERR2_LVT3","CPU_CATERR_LVT3","PCH_BMC_THERMTRIP",
143 "CPU0_SKTOCC_LVT3","","","","BIOS_SMI_ACTIVE",
144 /*H0-H7*/ "LED_POST_CODE_0","LED_POST_CODE_1","LED_POST_CODE_2",
145 "LED_POST_CODE_3","LED_POST_CODE_4","LED_POST_CODE_5",
146 "LED_POST_CODE_6","LED_POST_CODE_7",
147 /*I0-I7*/ "CPU0_FIVR_FAULT_LVT3","CPU1_FIVR_FAULT_LVT3",
148 "FORCE_ADR","UV_ADR_TRIGGER_EN","","","","",
149 /*J0-J7*/ "","","","","","","","",
150 /*K0-K7*/ "","","","","","","","",
151 /*L0-L7*/ "IRQ_UV_DETECT","IRQ_OC_DETECT","HSC_TIMER_EXP","",
152 "MEM_THERM_EVENT_PCH","PMBUS_ALERT_BUF_EN","","",
153 /*M0-M7*/ "CPU0_RC_ERROR","CPU1_RC_ERROR","","OC_DETECT_EN",
154 "CPU0_THERMTRIP_LATCH_LVT3",
155 "CPU1_THERMTRIP_LATCH_LVT3","","",
156 /*N0-N7*/ "","","","CPU_MSMI_LVT3","","BIOS_SPI_BMC_CTRL","","",
157 /*O0-O7*/ "","","","","","","","",
158 /*P0-P7*/ "BOARD_SKU_ID0","BOARD_SKU_ID1","BOARD_SKU_ID2",
159 "BOARD_SKU_ID3","BOARD_SKU_ID4","BMC_PREQ",
160 "BMC_PWR_DEBUG","RST_RSMRST",
161 /*Q0-Q7*/ "","","","","UARTSW_LSB","UARTSW_MSB",
162 "POST_CARD_PRES_BMC","PE_BMC_WAKE",
163 /*R0-R7*/ "","","BMC_TCK_MUX_SEL","BMC_PRDY",
164 "BMC_XDP_PRSNT_IN","RST_BMC_PLTRST_BUF","SLT_CFG0",
165 "SLT_CFG1",
166 /*S0-S7*/ "THROTTLE","BMC_READY","","HSC_SMBUS_SWITCH_EN","",
167 "","","",
168 /*T0-T7*/ "","","","","","","","",
169 /*U0-U7*/ "","","","","","BMC_FAULT","","",
170 /*V0-V7*/ "","","","FAST_PROCHOT_EN","","","","",
171 /*W0-W7*/ "","","","","","","","",
172 /*X0-X7*/ "","","","GLOBAL_RST_WARN",
173 "CPU0_MEMABC_MEMHOT_LVT3_BMC",
174 "CPU0_MEMDEF_MEMHOT_LVT3_BMC",
175 "CPU1_MEMGHJ_MEMHOT_LVT3_BMC",
176 "CPU1_MEMKLM_MEMHOT_LVT3_BMC",
177 /*Y0-Y7*/ "SIO_S3","SIO_S5","BMC_JTAG_SEL","SIO_ONCONTROL","",
178 "","","",
179 /*Z0-Z7*/ "","SIO_POWER_GOOD","IRQ_PVDDQ_DEF_VRHOT_LVT3","",
180 "","","","",
181 /*AA0-AA7*/ "CPU1_SKTOCC_LVT3","IRQ_SML1_PMBUS_ALERT",
182 "SERVER_POWER_LED","","PECI_MUX_SELECT","UV_HIGH_SET",
183 "","POST_COMPLETE",
184 /*AB0-AB7*/ "IRQ_HSC_FAULT","OCP_MEZZA_PRES","","","","","","",
185 /*AC0-AC7*/ "","","","","","","","";
186};
187
188&mac0 {
189 status = "okay";
190
191 pinctrl-names = "default";
192 pinctrl-0 = <&pinctrl_rmii1_default>;
193 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
194 <&syscon ASPEED_CLK_MAC1RCLK>;
195 clock-names = "MACCLK", "RCLK";
196 use-ncsi;
197};
198
199&adc {
200 status = "okay";
201};
202
203&i2c0 {
204 status = "okay";
205 //Airmax Conn B, CPU0 PIROM, CPU1 PIROM
206};
207
208&i2c1 {
209 status = "okay";
210 //X24 Riser
211 i2c-switch@71 {
212 compatible = "nxp,pca9544";
213 #address-cells = <1>;
214 #size-cells = <0>;
215 reg = <0x71>;
216
217 imux16: i2c@0 {
218 #address-cells = <1>;
219 #size-cells = <0>;
220 reg = <0>;
221
222 ina230@45 {
223 compatible = "ti,ina230";
224 reg = <0x45>;
225 };
226
227 tmp75@48 {
228 compatible = "ti,tmp75";
229 reg = <0x48>;
230 };
231
232 tmp421@49 {
233 compatible = "ti,tmp75";
234 reg = <0x49>;
235 };
236
237 eeprom@50 {
238 compatible = "atmel,24c64";
239 reg = <0x50>;
240 pagesize = <32>;
241 };
242
243 i2c-switch@73 {
244 compatible = "nxp,pca9546";
245 #address-cells = <1>;
246 #size-cells = <0>;
247 reg = <0x73>;
248
249 imux20: i2c@0 {
250 #address-cells = <1>;
251 #size-cells = <0>;
252 reg = <0>;
253 };
254
255 imux21: i2c@1 {
256 #address-cells = <1>;
257 #size-cells = <0>;
258 reg = <1>;
259 };
260
261 imux22: i2c@2 {
262 #address-cells = <1>;
263 #size-cells = <0>;
264 reg = <2>;
265 };
266
267 imux23: i2c@3 {
268 #address-cells = <1>;
269 #size-cells = <0>;
270 reg = <3>;
271 };
272
273 };
274
275 };
276
277 imux17: i2c@1 {
278 #address-cells = <1>;
279 #size-cells = <0>;
280 reg = <1>;
281
282 ina230@45 {
283 compatible = "ti,ina230";
284 reg = <0x45>;
285 };
286
287 tmp421@48 {
288 compatible = "ti,tmp75";
289 reg = <0x48>;
290 };
291
292 tmp421@49 {
293 compatible = "ti,tmp75";
294 reg = <0x49>;
295 };
296
297 eeprom@50 {
298 compatible = "atmel,24c64";
299 reg = <0x50>;
300 pagesize = <32>;
301 };
302
303 i2c-switch@73 {
304 compatible = "nxp,pca9546";
305 #address-cells = <1>;
306 #size-cells = <0>;
307 reg = <0x73>;
308
309 imux24: i2c@0 {
310 #address-cells = <1>;
311 #size-cells = <0>;
312 reg = <0>;
313 };
314
315 imux25: i2c@1 {
316 #address-cells = <1>;
317 #size-cells = <0>;
318 reg = <1>;
319 };
320
321 imux26: i2c@2 {
322 #address-cells = <1>;
323 #size-cells = <0>;
324 reg = <2>;
325 };
326
327 imux27: i2c@3 {
328 #address-cells = <1>;
329 #size-cells = <0>;
330 reg = <3>;
331 };
332
333 };
334
335 };
336
337 imux18: i2c@2 {
338 #address-cells = <1>;
339 #size-cells = <0>;
340 reg = <2>;
341
342 ina230@45 {
343 compatible = "ti,ina230";
344 reg = <0x45>;
345 };
346
347 tmp421@48 {
348 compatible = "ti,tmp75";
349 reg = <0x48>;
350 };
351
352 tmp421@49 {
353 compatible = "ti,tmp75";
354 reg = <0x49>;
355 };
356
357 eeprom@50 {
358 compatible = "atmel,24c64";
359 reg = <0x50>;
360 pagesize = <32>;
361 };
362
363 i2c-switch@73 {
364 compatible = "nxp,pca9546";
365 #address-cells = <1>;
366 #size-cells = <0>;
367 reg = <0x73>;
368
369 imux28: i2c@0 {
370 #address-cells = <1>;
371 #size-cells = <0>;
372 reg = <0>;
373 };
374
375 imux29: i2c@1 {
376 #address-cells = <1>;
377 #size-cells = <0>;
378 reg = <1>;
379 };
380
381 imux30: i2c@2 {
382 #address-cells = <1>;
383 #size-cells = <0>;
384 reg = <2>;
385 };
386
387 imux31: i2c@3 {
388 #address-cells = <1>;
389 #size-cells = <0>;
390 reg = <3>;
391 };
392
393 };
394
395 };
396
397 imux19: i2c@3 {
398 #address-cells = <1>;
399 #size-cells = <0>;
400 reg = <3>;
401
402 i2c-switch@40 {
403 compatible = "ti,ina230";
404 reg = <0x40>;
405 };
406
407 i2c-switch@41 {
408 compatible = "ti,ina230";
409 reg = <0x41>;
410 };
411
412 i2c-switch@45 {
413 compatible = "ti,ina230";
414 reg = <0x45>;
415 };
416
417 };
418
419 };
420};
421
422&i2c2 {
423 status = "okay";
424 // Mezz Management SMBus
425};
426
427&i2c3 {
428 status = "okay";
429 // SMBus to Board ID EEPROM
430};
431
432&i2c4 {
433 status = "okay";
434 // BMC Debug Header
435 ipmb0@10 {
436 compatible = "ipmb-dev";
437 reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
438 i2c-protocol;
439 };
440};
441
442&i2c5 {
443 status = "okay";
444 // CPU Voltage regulators
445 regulator@48 {
446 compatible = "infineon,pxe1610";
447 reg = <0x48>;
448 };
449 regulator@4a {
450 compatible = "infineon,pxe1610";
451 reg = <0x4a>;
452 };
453 regulator@50 {
454 compatible = "infineon,pxe1610";
455 reg = <0x50>;
456 };
457 regulator@52 {
458 compatible = "infineon,pxe1610";
459 reg = <0x52>;
460 };
461 regulator@58 {
462 compatible = "infineon,pxe1610";
463 reg = <0x58>;
464 };
465 regulator@5a {
466 compatible = "infineon,pxe1610";
467 reg = <0x5a>;
468 };
469 regulator@68 {
470 compatible = "infineon,pxe1610";
471 reg = <0x68>;
472 };
473 regulator@70 {
474 compatible = "infineon,pxe1610";
475 reg = <0x70>;
476 };
477 regulator@72 {
478 compatible = "infineon,pxe1610";
479 reg = <0x72>;
480 };
481};
482
483&i2c6 {
484 status = "okay";
485 tpm@20 {
486 compatible = "infineon,slb9645tt";
487 reg = <0x20>;
488 };
489 tmp421@4e {
490 compatible = "ti,tmp421";
491 reg = <0x4e>;
492 };
493 tmp421@4f {
494 compatible = "ti,tmp421";
495 reg = <0x4f>;
496 };
497 eeprom@54 {
498 compatible = "atmel,24c64";
499 reg = <0x54>;
500 pagesize = <32>;
501 };
502};
503
504&i2c7 {
505 status = "okay";
506 //HSC, AirMax Conn A
507};
508
509&i2c8 {
510 status = "okay";
511 tmp421@1f {
512 compatible = "ti,tmp421";
513 reg = <0x1f>;
514 };
515 //Mezz Sensor SMBus
516};
517
518&i2c9 {
519 status = "okay";
520 //USB Debug Connector
521 ipmb0@10 {
522 compatible = "ipmb-dev";
523 reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
524 i2c-protocol;
525 };
526};
527
528&pwm_tacho {
529 status = "okay";
530 pinctrl-names = "default";
531 pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>;
532 fan@0 {
533 reg = <0x00>;
534 aspeed,fan-tach-ch = /bits/ 8 <0x00>;
535 };
536
537 fan@1 {
538 reg = <0x01>;
539 aspeed,fan-tach-ch = /bits/ 8 <0x02>;
540 };
541};