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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * SMP initialisation and IPI support
4 * Based on arch/arm64/kernel/smp.c
5 *
6 * Copyright (C) 2012 ARM Ltd.
7 * Copyright (C) 2015 Regents of the University of California
8 * Copyright (C) 2017 SiFive
9 */
10
11#include <linux/cpu.h>
12#include <linux/interrupt.h>
13#include <linux/profile.h>
14#include <linux/smp.h>
15#include <linux/sched.h>
16#include <linux/seq_file.h>
17#include <linux/delay.h>
18
19#include <asm/sbi.h>
20#include <asm/tlbflush.h>
21#include <asm/cacheflush.h>
22
23enum ipi_message_type {
24 IPI_RESCHEDULE,
25 IPI_CALL_FUNC,
26 IPI_CPU_STOP,
27 IPI_MAX
28};
29
30unsigned long __cpuid_to_hartid_map[NR_CPUS] = {
31 [0 ... NR_CPUS-1] = INVALID_HARTID
32};
33
34void __init smp_setup_processor_id(void)
35{
36 cpuid_to_hartid_map(0) = boot_cpu_hartid;
37}
38
39/* A collection of single bit ipi messages. */
40static struct {
41 unsigned long stats[IPI_MAX] ____cacheline_aligned;
42 unsigned long bits ____cacheline_aligned;
43} ipi_data[NR_CPUS] __cacheline_aligned;
44
45int riscv_hartid_to_cpuid(int hartid)
46{
47 int i;
48
49 for (i = 0; i < NR_CPUS; i++)
50 if (cpuid_to_hartid_map(i) == hartid)
51 return i;
52
53 pr_err("Couldn't find cpu id for hartid [%d]\n", hartid);
54 return i;
55}
56
57void riscv_cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask *out)
58{
59 int cpu;
60
61 cpumask_clear(out);
62 for_each_cpu(cpu, in)
63 cpumask_set_cpu(cpuid_to_hartid_map(cpu), out);
64}
65
66bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
67{
68 return phys_id == cpuid_to_hartid_map(cpu);
69}
70
71/* Unsupported */
72int setup_profiling_timer(unsigned int multiplier)
73{
74 return -EINVAL;
75}
76
77static void ipi_stop(void)
78{
79 set_cpu_online(smp_processor_id(), false);
80 while (1)
81 wait_for_interrupt();
82}
83
84static void send_ipi_mask(const struct cpumask *mask, enum ipi_message_type op)
85{
86 struct cpumask hartid_mask;
87 int cpu;
88
89 smp_mb__before_atomic();
90 for_each_cpu(cpu, mask)
91 set_bit(op, &ipi_data[cpu].bits);
92 smp_mb__after_atomic();
93
94 riscv_cpuid_to_hartid_mask(mask, &hartid_mask);
95 sbi_send_ipi(cpumask_bits(&hartid_mask));
96}
97
98static void send_ipi_single(int cpu, enum ipi_message_type op)
99{
100 int hartid = cpuid_to_hartid_map(cpu);
101
102 smp_mb__before_atomic();
103 set_bit(op, &ipi_data[cpu].bits);
104 smp_mb__after_atomic();
105
106 sbi_send_ipi(cpumask_bits(cpumask_of(hartid)));
107}
108
109static inline void clear_ipi(void)
110{
111 csr_clear(CSR_SIP, SIE_SSIE);
112}
113
114void riscv_software_interrupt(void)
115{
116 unsigned long *pending_ipis = &ipi_data[smp_processor_id()].bits;
117 unsigned long *stats = ipi_data[smp_processor_id()].stats;
118
119 clear_ipi();
120
121 while (true) {
122 unsigned long ops;
123
124 /* Order bit clearing and data access. */
125 mb();
126
127 ops = xchg(pending_ipis, 0);
128 if (ops == 0)
129 return;
130
131 if (ops & (1 << IPI_RESCHEDULE)) {
132 stats[IPI_RESCHEDULE]++;
133 scheduler_ipi();
134 }
135
136 if (ops & (1 << IPI_CALL_FUNC)) {
137 stats[IPI_CALL_FUNC]++;
138 generic_smp_call_function_interrupt();
139 }
140
141 if (ops & (1 << IPI_CPU_STOP)) {
142 stats[IPI_CPU_STOP]++;
143 ipi_stop();
144 }
145
146 BUG_ON((ops >> IPI_MAX) != 0);
147
148 /* Order data access and bit testing. */
149 mb();
150 }
151}
152
153static const char * const ipi_names[] = {
154 [IPI_RESCHEDULE] = "Rescheduling interrupts",
155 [IPI_CALL_FUNC] = "Function call interrupts",
156 [IPI_CPU_STOP] = "CPU stop interrupts",
157};
158
159void show_ipi_stats(struct seq_file *p, int prec)
160{
161 unsigned int cpu, i;
162
163 for (i = 0; i < IPI_MAX; i++) {
164 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
165 prec >= 4 ? " " : "");
166 for_each_online_cpu(cpu)
167 seq_printf(p, "%10lu ", ipi_data[cpu].stats[i]);
168 seq_printf(p, " %s\n", ipi_names[i]);
169 }
170}
171
172void arch_send_call_function_ipi_mask(struct cpumask *mask)
173{
174 send_ipi_mask(mask, IPI_CALL_FUNC);
175}
176
177void arch_send_call_function_single_ipi(int cpu)
178{
179 send_ipi_single(cpu, IPI_CALL_FUNC);
180}
181
182void smp_send_stop(void)
183{
184 unsigned long timeout;
185
186 if (num_online_cpus() > 1) {
187 cpumask_t mask;
188
189 cpumask_copy(&mask, cpu_online_mask);
190 cpumask_clear_cpu(smp_processor_id(), &mask);
191
192 if (system_state <= SYSTEM_RUNNING)
193 pr_crit("SMP: stopping secondary CPUs\n");
194 send_ipi_mask(&mask, IPI_CPU_STOP);
195 }
196
197 /* Wait up to one second for other CPUs to stop */
198 timeout = USEC_PER_SEC;
199 while (num_online_cpus() > 1 && timeout--)
200 udelay(1);
201
202 if (num_online_cpus() > 1)
203 pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
204 cpumask_pr_args(cpu_online_mask));
205}
206
207void smp_send_reschedule(int cpu)
208{
209 send_ipi_single(cpu, IPI_RESCHEDULE);
210}
211EXPORT_SYMBOL_GPL(smp_send_reschedule);
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * SMP initialisation and IPI support
4 * Based on arch/arm64/kernel/smp.c
5 *
6 * Copyright (C) 2012 ARM Ltd.
7 * Copyright (C) 2015 Regents of the University of California
8 * Copyright (C) 2017 SiFive
9 */
10
11#include <linux/cpu.h>
12#include <linux/clockchips.h>
13#include <linux/interrupt.h>
14#include <linux/module.h>
15#include <linux/profile.h>
16#include <linux/smp.h>
17#include <linux/sched.h>
18#include <linux/seq_file.h>
19#include <linux/delay.h>
20#include <linux/irq_work.h>
21
22#include <asm/sbi.h>
23#include <asm/tlbflush.h>
24#include <asm/cacheflush.h>
25
26enum ipi_message_type {
27 IPI_RESCHEDULE,
28 IPI_CALL_FUNC,
29 IPI_CPU_STOP,
30 IPI_IRQ_WORK,
31 IPI_TIMER,
32 IPI_MAX
33};
34
35unsigned long __cpuid_to_hartid_map[NR_CPUS] __ro_after_init = {
36 [0 ... NR_CPUS-1] = INVALID_HARTID
37};
38
39void __init smp_setup_processor_id(void)
40{
41 cpuid_to_hartid_map(0) = boot_cpu_hartid;
42}
43
44/* A collection of single bit ipi messages. */
45static struct {
46 unsigned long stats[IPI_MAX] ____cacheline_aligned;
47 unsigned long bits ____cacheline_aligned;
48} ipi_data[NR_CPUS] __cacheline_aligned;
49
50int riscv_hartid_to_cpuid(int hartid)
51{
52 int i;
53
54 for (i = 0; i < NR_CPUS; i++)
55 if (cpuid_to_hartid_map(i) == hartid)
56 return i;
57
58 pr_err("Couldn't find cpu id for hartid [%d]\n", hartid);
59 return -ENOENT;
60}
61
62void riscv_cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask *out)
63{
64 int cpu;
65
66 cpumask_clear(out);
67 for_each_cpu(cpu, in)
68 cpumask_set_cpu(cpuid_to_hartid_map(cpu), out);
69}
70EXPORT_SYMBOL_GPL(riscv_cpuid_to_hartid_mask);
71
72bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
73{
74 return phys_id == cpuid_to_hartid_map(cpu);
75}
76
77/* Unsupported */
78int setup_profiling_timer(unsigned int multiplier)
79{
80 return -EINVAL;
81}
82
83static void ipi_stop(void)
84{
85 set_cpu_online(smp_processor_id(), false);
86 while (1)
87 wait_for_interrupt();
88}
89
90static const struct riscv_ipi_ops *ipi_ops __ro_after_init;
91
92void riscv_set_ipi_ops(const struct riscv_ipi_ops *ops)
93{
94 ipi_ops = ops;
95}
96EXPORT_SYMBOL_GPL(riscv_set_ipi_ops);
97
98void riscv_clear_ipi(void)
99{
100 if (ipi_ops && ipi_ops->ipi_clear)
101 ipi_ops->ipi_clear();
102
103 csr_clear(CSR_IP, IE_SIE);
104}
105EXPORT_SYMBOL_GPL(riscv_clear_ipi);
106
107static void send_ipi_mask(const struct cpumask *mask, enum ipi_message_type op)
108{
109 int cpu;
110
111 smp_mb__before_atomic();
112 for_each_cpu(cpu, mask)
113 set_bit(op, &ipi_data[cpu].bits);
114 smp_mb__after_atomic();
115
116 if (ipi_ops && ipi_ops->ipi_inject)
117 ipi_ops->ipi_inject(mask);
118 else
119 pr_warn("SMP: IPI inject method not available\n");
120}
121
122static void send_ipi_single(int cpu, enum ipi_message_type op)
123{
124 smp_mb__before_atomic();
125 set_bit(op, &ipi_data[cpu].bits);
126 smp_mb__after_atomic();
127
128 if (ipi_ops && ipi_ops->ipi_inject)
129 ipi_ops->ipi_inject(cpumask_of(cpu));
130 else
131 pr_warn("SMP: IPI inject method not available\n");
132}
133
134#ifdef CONFIG_IRQ_WORK
135void arch_irq_work_raise(void)
136{
137 send_ipi_single(smp_processor_id(), IPI_IRQ_WORK);
138}
139#endif
140
141void handle_IPI(struct pt_regs *regs)
142{
143 struct pt_regs *old_regs = set_irq_regs(regs);
144 unsigned long *pending_ipis = &ipi_data[smp_processor_id()].bits;
145 unsigned long *stats = ipi_data[smp_processor_id()].stats;
146
147 irq_enter();
148
149 riscv_clear_ipi();
150
151 while (true) {
152 unsigned long ops;
153
154 /* Order bit clearing and data access. */
155 mb();
156
157 ops = xchg(pending_ipis, 0);
158 if (ops == 0)
159 goto done;
160
161 if (ops & (1 << IPI_RESCHEDULE)) {
162 stats[IPI_RESCHEDULE]++;
163 scheduler_ipi();
164 }
165
166 if (ops & (1 << IPI_CALL_FUNC)) {
167 stats[IPI_CALL_FUNC]++;
168 generic_smp_call_function_interrupt();
169 }
170
171 if (ops & (1 << IPI_CPU_STOP)) {
172 stats[IPI_CPU_STOP]++;
173 ipi_stop();
174 }
175
176 if (ops & (1 << IPI_IRQ_WORK)) {
177 stats[IPI_IRQ_WORK]++;
178 irq_work_run();
179 }
180
181#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
182 if (ops & (1 << IPI_TIMER)) {
183 stats[IPI_TIMER]++;
184 tick_receive_broadcast();
185 }
186#endif
187 BUG_ON((ops >> IPI_MAX) != 0);
188
189 /* Order data access and bit testing. */
190 mb();
191 }
192
193done:
194 irq_exit();
195 set_irq_regs(old_regs);
196}
197
198static const char * const ipi_names[] = {
199 [IPI_RESCHEDULE] = "Rescheduling interrupts",
200 [IPI_CALL_FUNC] = "Function call interrupts",
201 [IPI_CPU_STOP] = "CPU stop interrupts",
202 [IPI_IRQ_WORK] = "IRQ work interrupts",
203 [IPI_TIMER] = "Timer broadcast interrupts",
204};
205
206void show_ipi_stats(struct seq_file *p, int prec)
207{
208 unsigned int cpu, i;
209
210 for (i = 0; i < IPI_MAX; i++) {
211 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
212 prec >= 4 ? " " : "");
213 for_each_online_cpu(cpu)
214 seq_printf(p, "%10lu ", ipi_data[cpu].stats[i]);
215 seq_printf(p, " %s\n", ipi_names[i]);
216 }
217}
218
219void arch_send_call_function_ipi_mask(struct cpumask *mask)
220{
221 send_ipi_mask(mask, IPI_CALL_FUNC);
222}
223
224void arch_send_call_function_single_ipi(int cpu)
225{
226 send_ipi_single(cpu, IPI_CALL_FUNC);
227}
228
229#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
230void tick_broadcast(const struct cpumask *mask)
231{
232 send_ipi_mask(mask, IPI_TIMER);
233}
234#endif
235
236void smp_send_stop(void)
237{
238 unsigned long timeout;
239
240 if (num_online_cpus() > 1) {
241 cpumask_t mask;
242
243 cpumask_copy(&mask, cpu_online_mask);
244 cpumask_clear_cpu(smp_processor_id(), &mask);
245
246 if (system_state <= SYSTEM_RUNNING)
247 pr_crit("SMP: stopping secondary CPUs\n");
248 send_ipi_mask(&mask, IPI_CPU_STOP);
249 }
250
251 /* Wait up to one second for other CPUs to stop */
252 timeout = USEC_PER_SEC;
253 while (num_online_cpus() > 1 && timeout--)
254 udelay(1);
255
256 if (num_online_cpus() > 1)
257 pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
258 cpumask_pr_args(cpu_online_mask));
259}
260
261void smp_send_reschedule(int cpu)
262{
263 send_ipi_single(cpu, IPI_RESCHEDULE);
264}
265EXPORT_SYMBOL_GPL(smp_send_reschedule);