Loading...
1/*
2 * Copyright 2012-15 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#ifndef __DAL_HUBP_H__
27#define __DAL_HUBP_H__
28
29#include "mem_input.h"
30
31#define OPP_ID_INVALID 0xf
32
33
34enum cursor_pitch {
35 CURSOR_PITCH_64_PIXELS = 0,
36 CURSOR_PITCH_128_PIXELS,
37 CURSOR_PITCH_256_PIXELS
38};
39
40enum cursor_lines_per_chunk {
41#if defined(CONFIG_DRM_AMD_DC_DCN2_0)
42 CURSOR_LINE_PER_CHUNK_1 = 0, /* new for DCN2 */
43#endif
44 CURSOR_LINE_PER_CHUNK_2 = 1,
45 CURSOR_LINE_PER_CHUNK_4,
46 CURSOR_LINE_PER_CHUNK_8,
47 CURSOR_LINE_PER_CHUNK_16
48};
49
50enum hubp_ind_block_size {
51 hubp_ind_block_unconstrained = 0,
52 hubp_ind_block_64b,
53};
54
55struct hubp {
56 const struct hubp_funcs *funcs;
57 struct dc_context *ctx;
58 struct dc_plane_address request_address;
59 int inst;
60
61 /* run time states */
62 int opp_id;
63 int mpcc_id;
64 struct dc_cursor_attributes curs_attr;
65 bool power_gated;
66};
67
68struct hubp_funcs {
69 void (*hubp_setup)(
70 struct hubp *hubp,
71 struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
72 struct _vcs_dpi_display_ttu_regs_st *ttu_regs,
73 struct _vcs_dpi_display_rq_regs_st *rq_regs,
74 struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest);
75
76 void (*hubp_setup_interdependent)(
77 struct hubp *hubp,
78 struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
79 struct _vcs_dpi_display_ttu_regs_st *ttu_regs);
80
81 void (*dcc_control)(struct hubp *hubp, bool enable,
82 enum hubp_ind_block_size blk_size);
83
84 void (*mem_program_viewport)(
85 struct hubp *hubp,
86 const struct rect *viewport,
87 const struct rect *viewport_c);
88
89 bool (*hubp_program_surface_flip_and_addr)(
90 struct hubp *hubp,
91 const struct dc_plane_address *address,
92 bool flip_immediate);
93
94 void (*hubp_program_pte_vm)(
95 struct hubp *hubp,
96 enum surface_pixel_format format,
97 union dc_tiling_info *tiling_info,
98 enum dc_rotation_angle rotation);
99
100 void (*hubp_set_vm_system_aperture_settings)(
101 struct hubp *hubp,
102 struct vm_system_aperture_param *apt);
103
104 void (*hubp_set_vm_context0_settings)(
105 struct hubp *hubp,
106 const struct vm_context0_param *vm0);
107
108 void (*hubp_program_surface_config)(
109 struct hubp *hubp,
110 enum surface_pixel_format format,
111 union dc_tiling_info *tiling_info,
112 struct plane_size *plane_size,
113 enum dc_rotation_angle rotation,
114 struct dc_plane_dcc_param *dcc,
115 bool horizontal_mirror,
116 unsigned int compa_level);
117
118 bool (*hubp_is_flip_pending)(struct hubp *hubp);
119
120 void (*set_blank)(struct hubp *hubp, bool blank);
121 void (*set_hubp_blank_en)(struct hubp *hubp, bool blank);
122
123 void (*set_cursor_attributes)(
124 struct hubp *hubp,
125 const struct dc_cursor_attributes *attr);
126
127 void (*set_cursor_position)(
128 struct hubp *hubp,
129 const struct dc_cursor_position *pos,
130 const struct dc_cursor_mi_param *param);
131
132 void (*hubp_disconnect)(struct hubp *hubp);
133
134 void (*hubp_clk_cntl)(struct hubp *hubp, bool enable);
135 void (*hubp_vtg_sel)(struct hubp *hubp, uint32_t otg_inst);
136 void (*hubp_read_state)(struct hubp *hubp);
137 void (*hubp_clear_underflow)(struct hubp *hubp);
138 void (*hubp_disable_control)(struct hubp *hubp, bool disable_hubp);
139 unsigned int (*hubp_get_underflow_status)(struct hubp *hubp);
140 void (*hubp_init)(struct hubp *hubp);
141
142#if defined(CONFIG_DRM_AMD_DC_DCN2_0)
143 void (*dmdata_set_attributes)(
144 struct hubp *hubp,
145 const struct dc_dmdata_attributes *attr);
146
147 void (*dmdata_load)(
148 struct hubp *hubp,
149 uint32_t dmdata_sw_size,
150 const uint32_t *dmdata_sw_data);
151 bool (*dmdata_status_done)(struct hubp *hubp);
152 void (*hubp_enable_tripleBuffer)(
153 struct hubp *hubp,
154 bool enable);
155
156 bool (*hubp_is_triplebuffer_enabled)(
157 struct hubp *hubp);
158
159 void (*hubp_set_flip_control_surface_gsl)(
160 struct hubp *hubp,
161 bool enable);
162#endif
163
164};
165
166#endif
1/*
2 * Copyright 2012-15 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#ifndef __DAL_HUBP_H__
27#define __DAL_HUBP_H__
28
29#include "mem_input.h"
30
31#define OPP_ID_INVALID 0xf
32#define MAX_TTU 0xffffff
33
34
35enum cursor_pitch {
36 CURSOR_PITCH_64_PIXELS = 0,
37 CURSOR_PITCH_128_PIXELS,
38 CURSOR_PITCH_256_PIXELS
39};
40
41enum cursor_lines_per_chunk {
42 CURSOR_LINE_PER_CHUNK_1 = 0, /* new for DCN2 */
43 CURSOR_LINE_PER_CHUNK_2 = 1,
44 CURSOR_LINE_PER_CHUNK_4,
45 CURSOR_LINE_PER_CHUNK_8,
46 CURSOR_LINE_PER_CHUNK_16
47};
48
49enum hubp_ind_block_size {
50 hubp_ind_block_unconstrained = 0,
51 hubp_ind_block_64b,
52 hubp_ind_block_128b,
53 hubp_ind_block_64b_no_128bcl,
54};
55
56struct hubp {
57 const struct hubp_funcs *funcs;
58 struct dc_context *ctx;
59 struct dc_plane_address request_address;
60 int inst;
61
62 /* run time states */
63 int opp_id;
64 int mpcc_id;
65 struct dc_cursor_attributes curs_attr;
66 bool power_gated;
67};
68
69struct surface_flip_registers {
70 uint32_t DCSURF_SURFACE_CONTROL;
71 uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH;
72 uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS;
73 uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH;
74 uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS;
75 uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C;
76 uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_C;
77 uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C;
78 uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_C;
79 uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH;
80 uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS;
81 uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH;
82 uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS;
83 bool tmz_surface;
84 bool immediate;
85 uint8_t vmid;
86 bool grph_stereo;
87};
88
89struct hubp_funcs {
90 void (*hubp_setup)(
91 struct hubp *hubp,
92 struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
93 struct _vcs_dpi_display_ttu_regs_st *ttu_regs,
94 struct _vcs_dpi_display_rq_regs_st *rq_regs,
95 struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest);
96
97 void (*hubp_setup_interdependent)(
98 struct hubp *hubp,
99 struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
100 struct _vcs_dpi_display_ttu_regs_st *ttu_regs);
101
102 void (*dcc_control)(struct hubp *hubp, bool enable,
103 enum hubp_ind_block_size blk_size);
104
105 void (*mem_program_viewport)(
106 struct hubp *hubp,
107 const struct rect *viewport,
108 const struct rect *viewport_c);
109
110 bool (*hubp_program_surface_flip_and_addr)(
111 struct hubp *hubp,
112 const struct dc_plane_address *address,
113 bool flip_immediate);
114
115 void (*hubp_program_pte_vm)(
116 struct hubp *hubp,
117 enum surface_pixel_format format,
118 union dc_tiling_info *tiling_info,
119 enum dc_rotation_angle rotation);
120
121 void (*hubp_set_vm_system_aperture_settings)(
122 struct hubp *hubp,
123 struct vm_system_aperture_param *apt);
124
125 void (*hubp_set_vm_context0_settings)(
126 struct hubp *hubp,
127 const struct vm_context0_param *vm0);
128
129 void (*hubp_program_surface_config)(
130 struct hubp *hubp,
131 enum surface_pixel_format format,
132 union dc_tiling_info *tiling_info,
133 struct plane_size *plane_size,
134 enum dc_rotation_angle rotation,
135 struct dc_plane_dcc_param *dcc,
136 bool horizontal_mirror,
137 unsigned int compa_level);
138
139 bool (*hubp_is_flip_pending)(struct hubp *hubp);
140
141 void (*set_blank)(struct hubp *hubp, bool blank);
142 void (*set_hubp_blank_en)(struct hubp *hubp, bool blank);
143
144 void (*set_cursor_attributes)(
145 struct hubp *hubp,
146 const struct dc_cursor_attributes *attr);
147
148 void (*set_cursor_position)(
149 struct hubp *hubp,
150 const struct dc_cursor_position *pos,
151 const struct dc_cursor_mi_param *param);
152
153 void (*hubp_disconnect)(struct hubp *hubp);
154
155 void (*hubp_clk_cntl)(struct hubp *hubp, bool enable);
156 void (*hubp_vtg_sel)(struct hubp *hubp, uint32_t otg_inst);
157 void (*hubp_read_state)(struct hubp *hubp);
158 void (*hubp_clear_underflow)(struct hubp *hubp);
159 void (*hubp_disable_control)(struct hubp *hubp, bool disable_hubp);
160 unsigned int (*hubp_get_underflow_status)(struct hubp *hubp);
161 void (*hubp_init)(struct hubp *hubp);
162
163 void (*dmdata_set_attributes)(
164 struct hubp *hubp,
165 const struct dc_dmdata_attributes *attr);
166
167 void (*dmdata_load)(
168 struct hubp *hubp,
169 uint32_t dmdata_sw_size,
170 const uint32_t *dmdata_sw_data);
171 bool (*dmdata_status_done)(struct hubp *hubp);
172 void (*hubp_enable_tripleBuffer)(
173 struct hubp *hubp,
174 bool enable);
175
176 bool (*hubp_is_triplebuffer_enabled)(
177 struct hubp *hubp);
178
179 void (*hubp_set_flip_control_surface_gsl)(
180 struct hubp *hubp,
181 bool enable);
182
183 void (*validate_dml_output)(
184 struct hubp *hubp,
185 struct dc_context *ctx,
186 struct _vcs_dpi_display_rq_regs_st *dml_rq_regs,
187 struct _vcs_dpi_display_dlg_regs_st *dml_dlg_attr,
188 struct _vcs_dpi_display_ttu_regs_st *dml_ttu_attr);
189 void (*set_unbounded_requesting)(
190 struct hubp *hubp,
191 bool enable);
192 bool (*hubp_in_blank)(struct hubp *hubp);
193 void (*hubp_soft_reset)(struct hubp *hubp, bool reset);
194
195 void (*hubp_set_flip_int)(struct hubp *hubp);
196
197};
198
199#endif