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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * HyperV Detection code.
4 *
5 * Copyright (C) 2010, Novell, Inc.
6 * Author : K. Y. Srinivasan <ksrinivasan@novell.com>
7 */
8
9#include <linux/types.h>
10#include <linux/time.h>
11#include <linux/clocksource.h>
12#include <linux/init.h>
13#include <linux/export.h>
14#include <linux/hardirq.h>
15#include <linux/efi.h>
16#include <linux/interrupt.h>
17#include <linux/irq.h>
18#include <linux/kexec.h>
19#include <linux/i8253.h>
20#include <linux/random.h>
21#include <asm/processor.h>
22#include <asm/hypervisor.h>
23#include <asm/hyperv-tlfs.h>
24#include <asm/mshyperv.h>
25#include <asm/desc.h>
26#include <asm/irq_regs.h>
27#include <asm/i8259.h>
28#include <asm/apic.h>
29#include <asm/timer.h>
30#include <asm/reboot.h>
31#include <asm/nmi.h>
32#include <clocksource/hyperv_timer.h>
33
34struct ms_hyperv_info ms_hyperv;
35EXPORT_SYMBOL_GPL(ms_hyperv);
36
37#if IS_ENABLED(CONFIG_HYPERV)
38static void (*vmbus_handler)(void);
39static void (*hv_stimer0_handler)(void);
40static void (*hv_kexec_handler)(void);
41static void (*hv_crash_handler)(struct pt_regs *regs);
42
43__visible void __irq_entry hyperv_vector_handler(struct pt_regs *regs)
44{
45 struct pt_regs *old_regs = set_irq_regs(regs);
46
47 entering_irq();
48 inc_irq_stat(irq_hv_callback_count);
49 if (vmbus_handler)
50 vmbus_handler();
51
52 if (ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED)
53 ack_APIC_irq();
54
55 exiting_irq();
56 set_irq_regs(old_regs);
57}
58
59void hv_setup_vmbus_irq(void (*handler)(void))
60{
61 vmbus_handler = handler;
62}
63
64void hv_remove_vmbus_irq(void)
65{
66 /* We have no way to deallocate the interrupt gate */
67 vmbus_handler = NULL;
68}
69EXPORT_SYMBOL_GPL(hv_setup_vmbus_irq);
70EXPORT_SYMBOL_GPL(hv_remove_vmbus_irq);
71
72/*
73 * Routines to do per-architecture handling of stimer0
74 * interrupts when in Direct Mode
75 */
76
77__visible void __irq_entry hv_stimer0_vector_handler(struct pt_regs *regs)
78{
79 struct pt_regs *old_regs = set_irq_regs(regs);
80
81 entering_irq();
82 inc_irq_stat(hyperv_stimer0_count);
83 if (hv_stimer0_handler)
84 hv_stimer0_handler();
85 add_interrupt_randomness(HYPERV_STIMER0_VECTOR, 0);
86 ack_APIC_irq();
87
88 exiting_irq();
89 set_irq_regs(old_regs);
90}
91
92int hv_setup_stimer0_irq(int *irq, int *vector, void (*handler)(void))
93{
94 *vector = HYPERV_STIMER0_VECTOR;
95 *irq = -1; /* Unused on x86/x64 */
96 hv_stimer0_handler = handler;
97 return 0;
98}
99EXPORT_SYMBOL_GPL(hv_setup_stimer0_irq);
100
101void hv_remove_stimer0_irq(int irq)
102{
103 /* We have no way to deallocate the interrupt gate */
104 hv_stimer0_handler = NULL;
105}
106EXPORT_SYMBOL_GPL(hv_remove_stimer0_irq);
107
108void hv_setup_kexec_handler(void (*handler)(void))
109{
110 hv_kexec_handler = handler;
111}
112EXPORT_SYMBOL_GPL(hv_setup_kexec_handler);
113
114void hv_remove_kexec_handler(void)
115{
116 hv_kexec_handler = NULL;
117}
118EXPORT_SYMBOL_GPL(hv_remove_kexec_handler);
119
120void hv_setup_crash_handler(void (*handler)(struct pt_regs *regs))
121{
122 hv_crash_handler = handler;
123}
124EXPORT_SYMBOL_GPL(hv_setup_crash_handler);
125
126void hv_remove_crash_handler(void)
127{
128 hv_crash_handler = NULL;
129}
130EXPORT_SYMBOL_GPL(hv_remove_crash_handler);
131
132#ifdef CONFIG_KEXEC_CORE
133static void hv_machine_shutdown(void)
134{
135 if (kexec_in_progress && hv_kexec_handler)
136 hv_kexec_handler();
137 native_machine_shutdown();
138}
139
140static void hv_machine_crash_shutdown(struct pt_regs *regs)
141{
142 if (hv_crash_handler)
143 hv_crash_handler(regs);
144 native_machine_crash_shutdown(regs);
145}
146#endif /* CONFIG_KEXEC_CORE */
147#endif /* CONFIG_HYPERV */
148
149static uint32_t __init ms_hyperv_platform(void)
150{
151 u32 eax;
152 u32 hyp_signature[3];
153
154 if (!boot_cpu_has(X86_FEATURE_HYPERVISOR))
155 return 0;
156
157 cpuid(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS,
158 &eax, &hyp_signature[0], &hyp_signature[1], &hyp_signature[2]);
159
160 if (eax >= HYPERV_CPUID_MIN &&
161 eax <= HYPERV_CPUID_MAX &&
162 !memcmp("Microsoft Hv", hyp_signature, 12))
163 return HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS;
164
165 return 0;
166}
167
168static unsigned char hv_get_nmi_reason(void)
169{
170 return 0;
171}
172
173#ifdef CONFIG_X86_LOCAL_APIC
174/*
175 * Prior to WS2016 Debug-VM sends NMIs to all CPUs which makes
176 * it dificult to process CHANNELMSG_UNLOAD in case of crash. Handle
177 * unknown NMI on the first CPU which gets it.
178 */
179static int hv_nmi_unknown(unsigned int val, struct pt_regs *regs)
180{
181 static atomic_t nmi_cpu = ATOMIC_INIT(-1);
182
183 if (!unknown_nmi_panic)
184 return NMI_DONE;
185
186 if (atomic_cmpxchg(&nmi_cpu, -1, raw_smp_processor_id()) != -1)
187 return NMI_HANDLED;
188
189 return NMI_DONE;
190}
191#endif
192
193static unsigned long hv_get_tsc_khz(void)
194{
195 unsigned long freq;
196
197 rdmsrl(HV_X64_MSR_TSC_FREQUENCY, freq);
198
199 return freq / 1000;
200}
201
202#if defined(CONFIG_SMP) && IS_ENABLED(CONFIG_HYPERV)
203static void __init hv_smp_prepare_boot_cpu(void)
204{
205 native_smp_prepare_boot_cpu();
206#if defined(CONFIG_X86_64) && defined(CONFIG_PARAVIRT_SPINLOCKS)
207 hv_init_spinlocks();
208#endif
209}
210#endif
211
212static void __init ms_hyperv_init_platform(void)
213{
214 int hv_host_info_eax;
215 int hv_host_info_ebx;
216 int hv_host_info_ecx;
217 int hv_host_info_edx;
218
219#ifdef CONFIG_PARAVIRT
220 pv_info.name = "Hyper-V";
221#endif
222
223 /*
224 * Extract the features and hints
225 */
226 ms_hyperv.features = cpuid_eax(HYPERV_CPUID_FEATURES);
227 ms_hyperv.misc_features = cpuid_edx(HYPERV_CPUID_FEATURES);
228 ms_hyperv.hints = cpuid_eax(HYPERV_CPUID_ENLIGHTMENT_INFO);
229
230 pr_info("Hyper-V: features 0x%x, hints 0x%x\n",
231 ms_hyperv.features, ms_hyperv.hints);
232
233 ms_hyperv.max_vp_index = cpuid_eax(HYPERV_CPUID_IMPLEMENT_LIMITS);
234 ms_hyperv.max_lp_index = cpuid_ebx(HYPERV_CPUID_IMPLEMENT_LIMITS);
235
236 pr_debug("Hyper-V: max %u virtual processors, %u logical processors\n",
237 ms_hyperv.max_vp_index, ms_hyperv.max_lp_index);
238
239 /*
240 * Extract host information.
241 */
242 if (cpuid_eax(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS) >=
243 HYPERV_CPUID_VERSION) {
244 hv_host_info_eax = cpuid_eax(HYPERV_CPUID_VERSION);
245 hv_host_info_ebx = cpuid_ebx(HYPERV_CPUID_VERSION);
246 hv_host_info_ecx = cpuid_ecx(HYPERV_CPUID_VERSION);
247 hv_host_info_edx = cpuid_edx(HYPERV_CPUID_VERSION);
248
249 pr_info("Hyper-V Host Build:%d-%d.%d-%d-%d.%d\n",
250 hv_host_info_eax, hv_host_info_ebx >> 16,
251 hv_host_info_ebx & 0xFFFF, hv_host_info_ecx,
252 hv_host_info_edx >> 24, hv_host_info_edx & 0xFFFFFF);
253 }
254
255 if (ms_hyperv.features & HV_X64_ACCESS_FREQUENCY_MSRS &&
256 ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {
257 x86_platform.calibrate_tsc = hv_get_tsc_khz;
258 x86_platform.calibrate_cpu = hv_get_tsc_khz;
259 }
260
261 if (ms_hyperv.hints & HV_X64_ENLIGHTENED_VMCS_RECOMMENDED) {
262 ms_hyperv.nested_features =
263 cpuid_eax(HYPERV_CPUID_NESTED_FEATURES);
264 }
265
266#ifdef CONFIG_X86_LOCAL_APIC
267 if (ms_hyperv.features & HV_X64_ACCESS_FREQUENCY_MSRS &&
268 ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {
269 /*
270 * Get the APIC frequency.
271 */
272 u64 hv_lapic_frequency;
273
274 rdmsrl(HV_X64_MSR_APIC_FREQUENCY, hv_lapic_frequency);
275 hv_lapic_frequency = div_u64(hv_lapic_frequency, HZ);
276 lapic_timer_period = hv_lapic_frequency;
277 pr_info("Hyper-V: LAPIC Timer Frequency: %#x\n",
278 lapic_timer_period);
279 }
280
281 register_nmi_handler(NMI_UNKNOWN, hv_nmi_unknown, NMI_FLAG_FIRST,
282 "hv_nmi_unknown");
283#endif
284
285#ifdef CONFIG_X86_IO_APIC
286 no_timer_check = 1;
287#endif
288
289#if IS_ENABLED(CONFIG_HYPERV) && defined(CONFIG_KEXEC_CORE)
290 machine_ops.shutdown = hv_machine_shutdown;
291 machine_ops.crash_shutdown = hv_machine_crash_shutdown;
292#endif
293 mark_tsc_unstable("running on Hyper-V");
294
295 /*
296 * Generation 2 instances don't support reading the NMI status from
297 * 0x61 port.
298 */
299 if (efi_enabled(EFI_BOOT))
300 x86_platform.get_nmi_reason = hv_get_nmi_reason;
301
302 /*
303 * Hyper-V VMs have a PIT emulation quirk such that zeroing the
304 * counter register during PIT shutdown restarts the PIT. So it
305 * continues to interrupt @18.2 HZ. Setting i8253_clear_counter
306 * to false tells pit_shutdown() not to zero the counter so that
307 * the PIT really is shutdown. Generation 2 VMs don't have a PIT,
308 * and setting this value has no effect.
309 */
310 i8253_clear_counter_on_shutdown = false;
311
312#if IS_ENABLED(CONFIG_HYPERV)
313 /*
314 * Setup the hook to get control post apic initialization.
315 */
316 x86_platform.apic_post_init = hyperv_init;
317 hyperv_setup_mmu_ops();
318 /* Setup the IDT for hypervisor callback */
319 alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR, hyperv_callback_vector);
320
321 /* Setup the IDT for reenlightenment notifications */
322 if (ms_hyperv.features & HV_X64_ACCESS_REENLIGHTENMENT)
323 alloc_intr_gate(HYPERV_REENLIGHTENMENT_VECTOR,
324 hyperv_reenlightenment_vector);
325
326 /* Setup the IDT for stimer0 */
327 if (ms_hyperv.misc_features & HV_STIMER_DIRECT_MODE_AVAILABLE)
328 alloc_intr_gate(HYPERV_STIMER0_VECTOR,
329 hv_stimer0_callback_vector);
330
331# ifdef CONFIG_SMP
332 smp_ops.smp_prepare_boot_cpu = hv_smp_prepare_boot_cpu;
333# endif
334
335 /*
336 * Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic,
337 * set x2apic destination mode to physcial mode when x2apic is available
338 * and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs
339 * have 8-bit APIC id.
340 */
341# ifdef CONFIG_X86_X2APIC
342 if (x2apic_supported())
343 x2apic_phys = 1;
344# endif
345
346 /* Register Hyper-V specific clocksource */
347 hv_init_clocksource();
348#endif
349}
350
351void hv_setup_sched_clock(void *sched_clock)
352{
353#ifdef CONFIG_PARAVIRT
354 pv_ops.time.sched_clock = sched_clock;
355#endif
356}
357
358const __initconst struct hypervisor_x86 x86_hyper_ms_hyperv = {
359 .name = "Microsoft Hyper-V",
360 .detect = ms_hyperv_platform,
361 .type = X86_HYPER_MS_HYPERV,
362 .init.init_platform = ms_hyperv_init_platform,
363};
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * HyperV Detection code.
4 *
5 * Copyright (C) 2010, Novell, Inc.
6 * Author : K. Y. Srinivasan <ksrinivasan@novell.com>
7 */
8
9#include <linux/types.h>
10#include <linux/time.h>
11#include <linux/clocksource.h>
12#include <linux/init.h>
13#include <linux/export.h>
14#include <linux/hardirq.h>
15#include <linux/efi.h>
16#include <linux/interrupt.h>
17#include <linux/irq.h>
18#include <linux/kexec.h>
19#include <linux/i8253.h>
20#include <linux/panic_notifier.h>
21#include <linux/random.h>
22#include <asm/processor.h>
23#include <asm/hypervisor.h>
24#include <asm/hyperv-tlfs.h>
25#include <asm/mshyperv.h>
26#include <asm/desc.h>
27#include <asm/idtentry.h>
28#include <asm/irq_regs.h>
29#include <asm/i8259.h>
30#include <asm/apic.h>
31#include <asm/timer.h>
32#include <asm/reboot.h>
33#include <asm/nmi.h>
34#include <clocksource/hyperv_timer.h>
35#include <asm/numa.h>
36
37/* Is Linux running as the root partition? */
38bool hv_root_partition;
39EXPORT_SYMBOL_GPL(hv_root_partition);
40
41struct ms_hyperv_info ms_hyperv;
42EXPORT_SYMBOL_GPL(ms_hyperv);
43
44#if IS_ENABLED(CONFIG_HYPERV)
45static void (*vmbus_handler)(void);
46static void (*hv_stimer0_handler)(void);
47static void (*hv_kexec_handler)(void);
48static void (*hv_crash_handler)(struct pt_regs *regs);
49
50DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_callback)
51{
52 struct pt_regs *old_regs = set_irq_regs(regs);
53
54 inc_irq_stat(irq_hv_callback_count);
55 if (vmbus_handler)
56 vmbus_handler();
57
58 if (ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED)
59 ack_APIC_irq();
60
61 set_irq_regs(old_regs);
62}
63
64void hv_setup_vmbus_handler(void (*handler)(void))
65{
66 vmbus_handler = handler;
67}
68EXPORT_SYMBOL_GPL(hv_setup_vmbus_handler);
69
70void hv_remove_vmbus_handler(void)
71{
72 /* We have no way to deallocate the interrupt gate */
73 vmbus_handler = NULL;
74}
75EXPORT_SYMBOL_GPL(hv_remove_vmbus_handler);
76
77/*
78 * Routines to do per-architecture handling of stimer0
79 * interrupts when in Direct Mode
80 */
81DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_stimer0)
82{
83 struct pt_regs *old_regs = set_irq_regs(regs);
84
85 inc_irq_stat(hyperv_stimer0_count);
86 if (hv_stimer0_handler)
87 hv_stimer0_handler();
88 add_interrupt_randomness(HYPERV_STIMER0_VECTOR, 0);
89 ack_APIC_irq();
90
91 set_irq_regs(old_regs);
92}
93
94/* For x86/x64, override weak placeholders in hyperv_timer.c */
95void hv_setup_stimer0_handler(void (*handler)(void))
96{
97 hv_stimer0_handler = handler;
98}
99
100void hv_remove_stimer0_handler(void)
101{
102 /* We have no way to deallocate the interrupt gate */
103 hv_stimer0_handler = NULL;
104}
105
106void hv_setup_kexec_handler(void (*handler)(void))
107{
108 hv_kexec_handler = handler;
109}
110EXPORT_SYMBOL_GPL(hv_setup_kexec_handler);
111
112void hv_remove_kexec_handler(void)
113{
114 hv_kexec_handler = NULL;
115}
116EXPORT_SYMBOL_GPL(hv_remove_kexec_handler);
117
118void hv_setup_crash_handler(void (*handler)(struct pt_regs *regs))
119{
120 hv_crash_handler = handler;
121}
122EXPORT_SYMBOL_GPL(hv_setup_crash_handler);
123
124void hv_remove_crash_handler(void)
125{
126 hv_crash_handler = NULL;
127}
128EXPORT_SYMBOL_GPL(hv_remove_crash_handler);
129
130#ifdef CONFIG_KEXEC_CORE
131static void hv_machine_shutdown(void)
132{
133 if (kexec_in_progress && hv_kexec_handler)
134 hv_kexec_handler();
135
136 /*
137 * Call hv_cpu_die() on all the CPUs, otherwise later the hypervisor
138 * corrupts the old VP Assist Pages and can crash the kexec kernel.
139 */
140 if (kexec_in_progress && hyperv_init_cpuhp > 0)
141 cpuhp_remove_state(hyperv_init_cpuhp);
142
143 /* The function calls stop_other_cpus(). */
144 native_machine_shutdown();
145
146 /* Disable the hypercall page when there is only 1 active CPU. */
147 if (kexec_in_progress)
148 hyperv_cleanup();
149}
150
151static void hv_machine_crash_shutdown(struct pt_regs *regs)
152{
153 if (hv_crash_handler)
154 hv_crash_handler(regs);
155
156 /* The function calls crash_smp_send_stop(). */
157 native_machine_crash_shutdown(regs);
158
159 /* Disable the hypercall page when there is only 1 active CPU. */
160 hyperv_cleanup();
161}
162#endif /* CONFIG_KEXEC_CORE */
163#endif /* CONFIG_HYPERV */
164
165static uint32_t __init ms_hyperv_platform(void)
166{
167 u32 eax;
168 u32 hyp_signature[3];
169
170 if (!boot_cpu_has(X86_FEATURE_HYPERVISOR))
171 return 0;
172
173 cpuid(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS,
174 &eax, &hyp_signature[0], &hyp_signature[1], &hyp_signature[2]);
175
176 if (eax >= HYPERV_CPUID_MIN &&
177 eax <= HYPERV_CPUID_MAX &&
178 !memcmp("Microsoft Hv", hyp_signature, 12))
179 return HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS;
180
181 return 0;
182}
183
184static unsigned char hv_get_nmi_reason(void)
185{
186 return 0;
187}
188
189#ifdef CONFIG_X86_LOCAL_APIC
190/*
191 * Prior to WS2016 Debug-VM sends NMIs to all CPUs which makes
192 * it difficult to process CHANNELMSG_UNLOAD in case of crash. Handle
193 * unknown NMI on the first CPU which gets it.
194 */
195static int hv_nmi_unknown(unsigned int val, struct pt_regs *regs)
196{
197 static atomic_t nmi_cpu = ATOMIC_INIT(-1);
198
199 if (!unknown_nmi_panic)
200 return NMI_DONE;
201
202 if (atomic_cmpxchg(&nmi_cpu, -1, raw_smp_processor_id()) != -1)
203 return NMI_HANDLED;
204
205 return NMI_DONE;
206}
207#endif
208
209static unsigned long hv_get_tsc_khz(void)
210{
211 unsigned long freq;
212
213 rdmsrl(HV_X64_MSR_TSC_FREQUENCY, freq);
214
215 return freq / 1000;
216}
217
218#if defined(CONFIG_SMP) && IS_ENABLED(CONFIG_HYPERV)
219static void __init hv_smp_prepare_boot_cpu(void)
220{
221 native_smp_prepare_boot_cpu();
222#if defined(CONFIG_X86_64) && defined(CONFIG_PARAVIRT_SPINLOCKS)
223 hv_init_spinlocks();
224#endif
225}
226
227static void __init hv_smp_prepare_cpus(unsigned int max_cpus)
228{
229#ifdef CONFIG_X86_64
230 int i;
231 int ret;
232#endif
233
234 native_smp_prepare_cpus(max_cpus);
235
236#ifdef CONFIG_X86_64
237 for_each_present_cpu(i) {
238 if (i == 0)
239 continue;
240 ret = hv_call_add_logical_proc(numa_cpu_node(i), i, cpu_physical_id(i));
241 BUG_ON(ret);
242 }
243
244 for_each_present_cpu(i) {
245 if (i == 0)
246 continue;
247 ret = hv_call_create_vp(numa_cpu_node(i), hv_current_partition_id, i, i);
248 BUG_ON(ret);
249 }
250#endif
251}
252#endif
253
254static void __init ms_hyperv_init_platform(void)
255{
256 int hv_max_functions_eax;
257 int hv_host_info_eax;
258 int hv_host_info_ebx;
259 int hv_host_info_ecx;
260 int hv_host_info_edx;
261
262#ifdef CONFIG_PARAVIRT
263 pv_info.name = "Hyper-V";
264#endif
265
266 /*
267 * Extract the features and hints
268 */
269 ms_hyperv.features = cpuid_eax(HYPERV_CPUID_FEATURES);
270 ms_hyperv.priv_high = cpuid_ebx(HYPERV_CPUID_FEATURES);
271 ms_hyperv.misc_features = cpuid_edx(HYPERV_CPUID_FEATURES);
272 ms_hyperv.hints = cpuid_eax(HYPERV_CPUID_ENLIGHTMENT_INFO);
273
274 hv_max_functions_eax = cpuid_eax(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS);
275
276 pr_info("Hyper-V: privilege flags low 0x%x, high 0x%x, hints 0x%x, misc 0x%x\n",
277 ms_hyperv.features, ms_hyperv.priv_high, ms_hyperv.hints,
278 ms_hyperv.misc_features);
279
280 ms_hyperv.max_vp_index = cpuid_eax(HYPERV_CPUID_IMPLEMENT_LIMITS);
281 ms_hyperv.max_lp_index = cpuid_ebx(HYPERV_CPUID_IMPLEMENT_LIMITS);
282
283 pr_debug("Hyper-V: max %u virtual processors, %u logical processors\n",
284 ms_hyperv.max_vp_index, ms_hyperv.max_lp_index);
285
286 /*
287 * Check CPU management privilege.
288 *
289 * To mirror what Windows does we should extract CPU management
290 * features and use the ReservedIdentityBit to detect if Linux is the
291 * root partition. But that requires negotiating CPU management
292 * interface (a process to be finalized).
293 *
294 * For now, use the privilege flag as the indicator for running as
295 * root.
296 */
297 if (cpuid_ebx(HYPERV_CPUID_FEATURES) & HV_CPU_MANAGEMENT) {
298 hv_root_partition = true;
299 pr_info("Hyper-V: running as root partition\n");
300 }
301
302 /*
303 * Extract host information.
304 */
305 if (hv_max_functions_eax >= HYPERV_CPUID_VERSION) {
306 hv_host_info_eax = cpuid_eax(HYPERV_CPUID_VERSION);
307 hv_host_info_ebx = cpuid_ebx(HYPERV_CPUID_VERSION);
308 hv_host_info_ecx = cpuid_ecx(HYPERV_CPUID_VERSION);
309 hv_host_info_edx = cpuid_edx(HYPERV_CPUID_VERSION);
310
311 pr_info("Hyper-V Host Build:%d-%d.%d-%d-%d.%d\n",
312 hv_host_info_eax, hv_host_info_ebx >> 16,
313 hv_host_info_ebx & 0xFFFF, hv_host_info_ecx,
314 hv_host_info_edx >> 24, hv_host_info_edx & 0xFFFFFF);
315 }
316
317 if (ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS &&
318 ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {
319 x86_platform.calibrate_tsc = hv_get_tsc_khz;
320 x86_platform.calibrate_cpu = hv_get_tsc_khz;
321 }
322
323 if (ms_hyperv.priv_high & HV_ISOLATION) {
324 ms_hyperv.isolation_config_a = cpuid_eax(HYPERV_CPUID_ISOLATION_CONFIG);
325 ms_hyperv.isolation_config_b = cpuid_ebx(HYPERV_CPUID_ISOLATION_CONFIG);
326
327 pr_info("Hyper-V: Isolation Config: Group A 0x%x, Group B 0x%x\n",
328 ms_hyperv.isolation_config_a, ms_hyperv.isolation_config_b);
329 }
330
331 if (hv_max_functions_eax >= HYPERV_CPUID_NESTED_FEATURES) {
332 ms_hyperv.nested_features =
333 cpuid_eax(HYPERV_CPUID_NESTED_FEATURES);
334 pr_info("Hyper-V: Nested features: 0x%x\n",
335 ms_hyperv.nested_features);
336 }
337
338 /*
339 * Hyper-V expects to get crash register data or kmsg when
340 * crash enlightment is available and system crashes. Set
341 * crash_kexec_post_notifiers to be true to make sure that
342 * calling crash enlightment interface before running kdump
343 * kernel.
344 */
345 if (ms_hyperv.misc_features & HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE)
346 crash_kexec_post_notifiers = true;
347
348#ifdef CONFIG_X86_LOCAL_APIC
349 if (ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS &&
350 ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {
351 /*
352 * Get the APIC frequency.
353 */
354 u64 hv_lapic_frequency;
355
356 rdmsrl(HV_X64_MSR_APIC_FREQUENCY, hv_lapic_frequency);
357 hv_lapic_frequency = div_u64(hv_lapic_frequency, HZ);
358 lapic_timer_period = hv_lapic_frequency;
359 pr_info("Hyper-V: LAPIC Timer Frequency: %#x\n",
360 lapic_timer_period);
361 }
362
363 register_nmi_handler(NMI_UNKNOWN, hv_nmi_unknown, NMI_FLAG_FIRST,
364 "hv_nmi_unknown");
365#endif
366
367#ifdef CONFIG_X86_IO_APIC
368 no_timer_check = 1;
369#endif
370
371#if IS_ENABLED(CONFIG_HYPERV) && defined(CONFIG_KEXEC_CORE)
372 machine_ops.shutdown = hv_machine_shutdown;
373 machine_ops.crash_shutdown = hv_machine_crash_shutdown;
374#endif
375 if (ms_hyperv.features & HV_ACCESS_TSC_INVARIANT) {
376 wrmsrl(HV_X64_MSR_TSC_INVARIANT_CONTROL, 0x1);
377 setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE);
378 }
379
380 /*
381 * Generation 2 instances don't support reading the NMI status from
382 * 0x61 port.
383 */
384 if (efi_enabled(EFI_BOOT))
385 x86_platform.get_nmi_reason = hv_get_nmi_reason;
386
387 /*
388 * Hyper-V VMs have a PIT emulation quirk such that zeroing the
389 * counter register during PIT shutdown restarts the PIT. So it
390 * continues to interrupt @18.2 HZ. Setting i8253_clear_counter
391 * to false tells pit_shutdown() not to zero the counter so that
392 * the PIT really is shutdown. Generation 2 VMs don't have a PIT,
393 * and setting this value has no effect.
394 */
395 i8253_clear_counter_on_shutdown = false;
396
397#if IS_ENABLED(CONFIG_HYPERV)
398 /*
399 * Setup the hook to get control post apic initialization.
400 */
401 x86_platform.apic_post_init = hyperv_init;
402 hyperv_setup_mmu_ops();
403 /* Setup the IDT for hypervisor callback */
404 alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR, asm_sysvec_hyperv_callback);
405
406 /* Setup the IDT for reenlightenment notifications */
407 if (ms_hyperv.features & HV_ACCESS_REENLIGHTENMENT) {
408 alloc_intr_gate(HYPERV_REENLIGHTENMENT_VECTOR,
409 asm_sysvec_hyperv_reenlightenment);
410 }
411
412 /* Setup the IDT for stimer0 */
413 if (ms_hyperv.misc_features & HV_STIMER_DIRECT_MODE_AVAILABLE) {
414 alloc_intr_gate(HYPERV_STIMER0_VECTOR,
415 asm_sysvec_hyperv_stimer0);
416 }
417
418# ifdef CONFIG_SMP
419 smp_ops.smp_prepare_boot_cpu = hv_smp_prepare_boot_cpu;
420 if (hv_root_partition)
421 smp_ops.smp_prepare_cpus = hv_smp_prepare_cpus;
422# endif
423
424 /*
425 * Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic,
426 * set x2apic destination mode to physical mode when x2apic is available
427 * and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs
428 * have 8-bit APIC id.
429 */
430# ifdef CONFIG_X86_X2APIC
431 if (x2apic_supported())
432 x2apic_phys = 1;
433# endif
434
435 /* Register Hyper-V specific clocksource */
436 hv_init_clocksource();
437#endif
438 /*
439 * TSC should be marked as unstable only after Hyper-V
440 * clocksource has been initialized. This ensures that the
441 * stability of the sched_clock is not altered.
442 */
443 if (!(ms_hyperv.features & HV_ACCESS_TSC_INVARIANT))
444 mark_tsc_unstable("running on Hyper-V");
445}
446
447static bool __init ms_hyperv_x2apic_available(void)
448{
449 return x2apic_supported();
450}
451
452/*
453 * If ms_hyperv_msi_ext_dest_id() returns true, hyperv_prepare_irq_remapping()
454 * returns -ENODEV and the Hyper-V IOMMU driver is not used; instead, the
455 * generic support of the 15-bit APIC ID is used: see __irq_msi_compose_msg().
456 *
457 * Note: for a VM on Hyper-V, the I/O-APIC is the only device which
458 * (logically) generates MSIs directly to the system APIC irq domain.
459 * There is no HPET, and PCI MSI/MSI-X interrupts are remapped by the
460 * pci-hyperv host bridge.
461 */
462static bool __init ms_hyperv_msi_ext_dest_id(void)
463{
464 u32 eax;
465
466 eax = cpuid_eax(HYPERV_CPUID_VIRT_STACK_INTERFACE);
467 if (eax != HYPERV_VS_INTERFACE_EAX_SIGNATURE)
468 return false;
469
470 eax = cpuid_eax(HYPERV_CPUID_VIRT_STACK_PROPERTIES);
471 return eax & HYPERV_VS_PROPERTIES_EAX_EXTENDED_IOAPIC_RTE;
472}
473
474const __initconst struct hypervisor_x86 x86_hyper_ms_hyperv = {
475 .name = "Microsoft Hyper-V",
476 .detect = ms_hyperv_platform,
477 .type = X86_HYPER_MS_HYPERV,
478 .init.x2apic_available = ms_hyperv_x2apic_available,
479 .init.msi_ext_dest_id = ms_hyperv_msi_ext_dest_id,
480 .init.init_platform = ms_hyperv_init_platform,
481};