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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Driver for 93xx46 EEPROMs
4 *
5 * (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
6 */
7
8#include <linux/delay.h>
9#include <linux/device.h>
10#include <linux/gpio/consumer.h>
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/mutex.h>
14#include <linux/of.h>
15#include <linux/of_device.h>
16#include <linux/of_gpio.h>
17#include <linux/slab.h>
18#include <linux/spi/spi.h>
19#include <linux/nvmem-provider.h>
20#include <linux/eeprom_93xx46.h>
21
22#define OP_START 0x4
23#define OP_WRITE (OP_START | 0x1)
24#define OP_READ (OP_START | 0x2)
25#define ADDR_EWDS 0x00
26#define ADDR_ERAL 0x20
27#define ADDR_EWEN 0x30
28
29struct eeprom_93xx46_devtype_data {
30 unsigned int quirks;
31};
32
33static const struct eeprom_93xx46_devtype_data atmel_at93c46d_data = {
34 .quirks = EEPROM_93XX46_QUIRK_SINGLE_WORD_READ |
35 EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH,
36};
37
38struct eeprom_93xx46_dev {
39 struct spi_device *spi;
40 struct eeprom_93xx46_platform_data *pdata;
41 struct mutex lock;
42 struct nvmem_config nvmem_config;
43 struct nvmem_device *nvmem;
44 int addrlen;
45 int size;
46};
47
48static inline bool has_quirk_single_word_read(struct eeprom_93xx46_dev *edev)
49{
50 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_SINGLE_WORD_READ;
51}
52
53static inline bool has_quirk_instruction_length(struct eeprom_93xx46_dev *edev)
54{
55 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH;
56}
57
58static int eeprom_93xx46_read(void *priv, unsigned int off,
59 void *val, size_t count)
60{
61 struct eeprom_93xx46_dev *edev = priv;
62 char *buf = val;
63 int err = 0;
64
65 if (unlikely(off >= edev->size))
66 return 0;
67 if ((off + count) > edev->size)
68 count = edev->size - off;
69 if (unlikely(!count))
70 return count;
71
72 mutex_lock(&edev->lock);
73
74 if (edev->pdata->prepare)
75 edev->pdata->prepare(edev);
76
77 while (count) {
78 struct spi_message m;
79 struct spi_transfer t[2] = { { 0 } };
80 u16 cmd_addr = OP_READ << edev->addrlen;
81 size_t nbytes = count;
82 int bits;
83
84 if (edev->addrlen == 7) {
85 cmd_addr |= off & 0x7f;
86 bits = 10;
87 if (has_quirk_single_word_read(edev))
88 nbytes = 1;
89 } else {
90 cmd_addr |= (off >> 1) & 0x3f;
91 bits = 9;
92 if (has_quirk_single_word_read(edev))
93 nbytes = 2;
94 }
95
96 dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
97 cmd_addr, edev->spi->max_speed_hz);
98
99 spi_message_init(&m);
100
101 t[0].tx_buf = (char *)&cmd_addr;
102 t[0].len = 2;
103 t[0].bits_per_word = bits;
104 spi_message_add_tail(&t[0], &m);
105
106 t[1].rx_buf = buf;
107 t[1].len = count;
108 t[1].bits_per_word = 8;
109 spi_message_add_tail(&t[1], &m);
110
111 err = spi_sync(edev->spi, &m);
112 /* have to wait at least Tcsl ns */
113 ndelay(250);
114
115 if (err) {
116 dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
117 nbytes, (int)off, err);
118 break;
119 }
120
121 buf += nbytes;
122 off += nbytes;
123 count -= nbytes;
124 }
125
126 if (edev->pdata->finish)
127 edev->pdata->finish(edev);
128
129 mutex_unlock(&edev->lock);
130
131 return err;
132}
133
134static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
135{
136 struct spi_message m;
137 struct spi_transfer t;
138 int bits, ret;
139 u16 cmd_addr;
140
141 cmd_addr = OP_START << edev->addrlen;
142 if (edev->addrlen == 7) {
143 cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS) << 1;
144 bits = 10;
145 } else {
146 cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS);
147 bits = 9;
148 }
149
150 if (has_quirk_instruction_length(edev)) {
151 cmd_addr <<= 2;
152 bits += 2;
153 }
154
155 dev_dbg(&edev->spi->dev, "ew%s cmd 0x%04x, %d bits\n",
156 is_on ? "en" : "ds", cmd_addr, bits);
157
158 spi_message_init(&m);
159 memset(&t, 0, sizeof(t));
160
161 t.tx_buf = &cmd_addr;
162 t.len = 2;
163 t.bits_per_word = bits;
164 spi_message_add_tail(&t, &m);
165
166 mutex_lock(&edev->lock);
167
168 if (edev->pdata->prepare)
169 edev->pdata->prepare(edev);
170
171 ret = spi_sync(edev->spi, &m);
172 /* have to wait at least Tcsl ns */
173 ndelay(250);
174 if (ret)
175 dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
176 is_on ? "en" : "dis", ret);
177
178 if (edev->pdata->finish)
179 edev->pdata->finish(edev);
180
181 mutex_unlock(&edev->lock);
182 return ret;
183}
184
185static ssize_t
186eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
187 const char *buf, unsigned off)
188{
189 struct spi_message m;
190 struct spi_transfer t[2];
191 int bits, data_len, ret;
192 u16 cmd_addr;
193
194 cmd_addr = OP_WRITE << edev->addrlen;
195
196 if (edev->addrlen == 7) {
197 cmd_addr |= off & 0x7f;
198 bits = 10;
199 data_len = 1;
200 } else {
201 cmd_addr |= (off >> 1) & 0x3f;
202 bits = 9;
203 data_len = 2;
204 }
205
206 dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);
207
208 spi_message_init(&m);
209 memset(t, 0, sizeof(t));
210
211 t[0].tx_buf = (char *)&cmd_addr;
212 t[0].len = 2;
213 t[0].bits_per_word = bits;
214 spi_message_add_tail(&t[0], &m);
215
216 t[1].tx_buf = buf;
217 t[1].len = data_len;
218 t[1].bits_per_word = 8;
219 spi_message_add_tail(&t[1], &m);
220
221 ret = spi_sync(edev->spi, &m);
222 /* have to wait program cycle time Twc ms */
223 mdelay(6);
224 return ret;
225}
226
227static int eeprom_93xx46_write(void *priv, unsigned int off,
228 void *val, size_t count)
229{
230 struct eeprom_93xx46_dev *edev = priv;
231 char *buf = val;
232 int i, ret, step = 1;
233
234 if (unlikely(off >= edev->size))
235 return -EFBIG;
236 if ((off + count) > edev->size)
237 count = edev->size - off;
238 if (unlikely(!count))
239 return count;
240
241 /* only write even number of bytes on 16-bit devices */
242 if (edev->addrlen == 6) {
243 step = 2;
244 count &= ~1;
245 }
246
247 /* erase/write enable */
248 ret = eeprom_93xx46_ew(edev, 1);
249 if (ret)
250 return ret;
251
252 mutex_lock(&edev->lock);
253
254 if (edev->pdata->prepare)
255 edev->pdata->prepare(edev);
256
257 for (i = 0; i < count; i += step) {
258 ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
259 if (ret) {
260 dev_err(&edev->spi->dev, "write failed at %d: %d\n",
261 (int)off + i, ret);
262 break;
263 }
264 }
265
266 if (edev->pdata->finish)
267 edev->pdata->finish(edev);
268
269 mutex_unlock(&edev->lock);
270
271 /* erase/write disable */
272 eeprom_93xx46_ew(edev, 0);
273 return ret;
274}
275
276static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
277{
278 struct eeprom_93xx46_platform_data *pd = edev->pdata;
279 struct spi_message m;
280 struct spi_transfer t;
281 int bits, ret;
282 u16 cmd_addr;
283
284 cmd_addr = OP_START << edev->addrlen;
285 if (edev->addrlen == 7) {
286 cmd_addr |= ADDR_ERAL << 1;
287 bits = 10;
288 } else {
289 cmd_addr |= ADDR_ERAL;
290 bits = 9;
291 }
292
293 if (has_quirk_instruction_length(edev)) {
294 cmd_addr <<= 2;
295 bits += 2;
296 }
297
298 dev_dbg(&edev->spi->dev, "eral cmd 0x%04x, %d bits\n", cmd_addr, bits);
299
300 spi_message_init(&m);
301 memset(&t, 0, sizeof(t));
302
303 t.tx_buf = &cmd_addr;
304 t.len = 2;
305 t.bits_per_word = bits;
306 spi_message_add_tail(&t, &m);
307
308 mutex_lock(&edev->lock);
309
310 if (edev->pdata->prepare)
311 edev->pdata->prepare(edev);
312
313 ret = spi_sync(edev->spi, &m);
314 if (ret)
315 dev_err(&edev->spi->dev, "erase error %d\n", ret);
316 /* have to wait erase cycle time Tec ms */
317 mdelay(6);
318
319 if (pd->finish)
320 pd->finish(edev);
321
322 mutex_unlock(&edev->lock);
323 return ret;
324}
325
326static ssize_t eeprom_93xx46_store_erase(struct device *dev,
327 struct device_attribute *attr,
328 const char *buf, size_t count)
329{
330 struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
331 int erase = 0, ret;
332
333 sscanf(buf, "%d", &erase);
334 if (erase) {
335 ret = eeprom_93xx46_ew(edev, 1);
336 if (ret)
337 return ret;
338 ret = eeprom_93xx46_eral(edev);
339 if (ret)
340 return ret;
341 ret = eeprom_93xx46_ew(edev, 0);
342 if (ret)
343 return ret;
344 }
345 return count;
346}
347static DEVICE_ATTR(erase, S_IWUSR, NULL, eeprom_93xx46_store_erase);
348
349static void select_assert(void *context)
350{
351 struct eeprom_93xx46_dev *edev = context;
352
353 gpiod_set_value_cansleep(edev->pdata->select, 1);
354}
355
356static void select_deassert(void *context)
357{
358 struct eeprom_93xx46_dev *edev = context;
359
360 gpiod_set_value_cansleep(edev->pdata->select, 0);
361}
362
363static const struct of_device_id eeprom_93xx46_of_table[] = {
364 { .compatible = "eeprom-93xx46", },
365 { .compatible = "atmel,at93c46d", .data = &atmel_at93c46d_data, },
366 {}
367};
368MODULE_DEVICE_TABLE(of, eeprom_93xx46_of_table);
369
370static int eeprom_93xx46_probe_dt(struct spi_device *spi)
371{
372 const struct of_device_id *of_id =
373 of_match_device(eeprom_93xx46_of_table, &spi->dev);
374 struct device_node *np = spi->dev.of_node;
375 struct eeprom_93xx46_platform_data *pd;
376 u32 tmp;
377 int ret;
378
379 pd = devm_kzalloc(&spi->dev, sizeof(*pd), GFP_KERNEL);
380 if (!pd)
381 return -ENOMEM;
382
383 ret = of_property_read_u32(np, "data-size", &tmp);
384 if (ret < 0) {
385 dev_err(&spi->dev, "data-size property not found\n");
386 return ret;
387 }
388
389 if (tmp == 8) {
390 pd->flags |= EE_ADDR8;
391 } else if (tmp == 16) {
392 pd->flags |= EE_ADDR16;
393 } else {
394 dev_err(&spi->dev, "invalid data-size (%d)\n", tmp);
395 return -EINVAL;
396 }
397
398 if (of_property_read_bool(np, "read-only"))
399 pd->flags |= EE_READONLY;
400
401 pd->select = devm_gpiod_get_optional(&spi->dev, "select",
402 GPIOD_OUT_LOW);
403 if (IS_ERR(pd->select))
404 return PTR_ERR(pd->select);
405
406 pd->prepare = select_assert;
407 pd->finish = select_deassert;
408 gpiod_direction_output(pd->select, 0);
409
410 if (of_id->data) {
411 const struct eeprom_93xx46_devtype_data *data = of_id->data;
412
413 pd->quirks = data->quirks;
414 }
415
416 spi->dev.platform_data = pd;
417
418 return 0;
419}
420
421static int eeprom_93xx46_probe(struct spi_device *spi)
422{
423 struct eeprom_93xx46_platform_data *pd;
424 struct eeprom_93xx46_dev *edev;
425 int err;
426
427 if (spi->dev.of_node) {
428 err = eeprom_93xx46_probe_dt(spi);
429 if (err < 0)
430 return err;
431 }
432
433 pd = spi->dev.platform_data;
434 if (!pd) {
435 dev_err(&spi->dev, "missing platform data\n");
436 return -ENODEV;
437 }
438
439 edev = devm_kzalloc(&spi->dev, sizeof(*edev), GFP_KERNEL);
440 if (!edev)
441 return -ENOMEM;
442
443 if (pd->flags & EE_ADDR8)
444 edev->addrlen = 7;
445 else if (pd->flags & EE_ADDR16)
446 edev->addrlen = 6;
447 else {
448 dev_err(&spi->dev, "unspecified address type\n");
449 return -EINVAL;
450 }
451
452 mutex_init(&edev->lock);
453
454 edev->spi = spi;
455 edev->pdata = pd;
456
457 edev->size = 128;
458 edev->nvmem_config.name = dev_name(&spi->dev);
459 edev->nvmem_config.dev = &spi->dev;
460 edev->nvmem_config.read_only = pd->flags & EE_READONLY;
461 edev->nvmem_config.root_only = true;
462 edev->nvmem_config.owner = THIS_MODULE;
463 edev->nvmem_config.compat = true;
464 edev->nvmem_config.base_dev = &spi->dev;
465 edev->nvmem_config.reg_read = eeprom_93xx46_read;
466 edev->nvmem_config.reg_write = eeprom_93xx46_write;
467 edev->nvmem_config.priv = edev;
468 edev->nvmem_config.stride = 4;
469 edev->nvmem_config.word_size = 1;
470 edev->nvmem_config.size = edev->size;
471
472 edev->nvmem = devm_nvmem_register(&spi->dev, &edev->nvmem_config);
473 if (IS_ERR(edev->nvmem))
474 return PTR_ERR(edev->nvmem);
475
476 dev_info(&spi->dev, "%d-bit eeprom %s\n",
477 (pd->flags & EE_ADDR8) ? 8 : 16,
478 (pd->flags & EE_READONLY) ? "(readonly)" : "");
479
480 if (!(pd->flags & EE_READONLY)) {
481 if (device_create_file(&spi->dev, &dev_attr_erase))
482 dev_err(&spi->dev, "can't create erase interface\n");
483 }
484
485 spi_set_drvdata(spi, edev);
486 return 0;
487}
488
489static int eeprom_93xx46_remove(struct spi_device *spi)
490{
491 struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi);
492
493 if (!(edev->pdata->flags & EE_READONLY))
494 device_remove_file(&spi->dev, &dev_attr_erase);
495
496 return 0;
497}
498
499static struct spi_driver eeprom_93xx46_driver = {
500 .driver = {
501 .name = "93xx46",
502 .of_match_table = of_match_ptr(eeprom_93xx46_of_table),
503 },
504 .probe = eeprom_93xx46_probe,
505 .remove = eeprom_93xx46_remove,
506};
507
508module_spi_driver(eeprom_93xx46_driver);
509
510MODULE_LICENSE("GPL");
511MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs");
512MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>");
513MODULE_ALIAS("spi:93xx46");
1/*
2 * Driver for 93xx46 EEPROMs
3 *
4 * (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/delay.h>
12#include <linux/device.h>
13#include <linux/gpio/consumer.h>
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/mutex.h>
17#include <linux/of.h>
18#include <linux/of_device.h>
19#include <linux/of_gpio.h>
20#include <linux/slab.h>
21#include <linux/spi/spi.h>
22#include <linux/nvmem-provider.h>
23#include <linux/regmap.h>
24#include <linux/eeprom_93xx46.h>
25
26#define OP_START 0x4
27#define OP_WRITE (OP_START | 0x1)
28#define OP_READ (OP_START | 0x2)
29#define ADDR_EWDS 0x00
30#define ADDR_ERAL 0x20
31#define ADDR_EWEN 0x30
32
33struct eeprom_93xx46_devtype_data {
34 unsigned int quirks;
35};
36
37static const struct eeprom_93xx46_devtype_data atmel_at93c46d_data = {
38 .quirks = EEPROM_93XX46_QUIRK_SINGLE_WORD_READ |
39 EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH,
40};
41
42struct eeprom_93xx46_dev {
43 struct spi_device *spi;
44 struct eeprom_93xx46_platform_data *pdata;
45 struct mutex lock;
46 struct regmap_config regmap_config;
47 struct nvmem_config nvmem_config;
48 struct nvmem_device *nvmem;
49 int addrlen;
50 int size;
51};
52
53static inline bool has_quirk_single_word_read(struct eeprom_93xx46_dev *edev)
54{
55 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_SINGLE_WORD_READ;
56}
57
58static inline bool has_quirk_instruction_length(struct eeprom_93xx46_dev *edev)
59{
60 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH;
61}
62
63static ssize_t
64eeprom_93xx46_read(struct eeprom_93xx46_dev *edev, char *buf,
65 unsigned off, size_t count)
66{
67 ssize_t ret = 0;
68
69 if (unlikely(off >= edev->size))
70 return 0;
71 if ((off + count) > edev->size)
72 count = edev->size - off;
73 if (unlikely(!count))
74 return count;
75
76 mutex_lock(&edev->lock);
77
78 if (edev->pdata->prepare)
79 edev->pdata->prepare(edev);
80
81 while (count) {
82 struct spi_message m;
83 struct spi_transfer t[2] = { { 0 } };
84 u16 cmd_addr = OP_READ << edev->addrlen;
85 size_t nbytes = count;
86 int bits;
87 int err;
88
89 if (edev->addrlen == 7) {
90 cmd_addr |= off & 0x7f;
91 bits = 10;
92 if (has_quirk_single_word_read(edev))
93 nbytes = 1;
94 } else {
95 cmd_addr |= (off >> 1) & 0x3f;
96 bits = 9;
97 if (has_quirk_single_word_read(edev))
98 nbytes = 2;
99 }
100
101 dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
102 cmd_addr, edev->spi->max_speed_hz);
103
104 spi_message_init(&m);
105
106 t[0].tx_buf = (char *)&cmd_addr;
107 t[0].len = 2;
108 t[0].bits_per_word = bits;
109 spi_message_add_tail(&t[0], &m);
110
111 t[1].rx_buf = buf;
112 t[1].len = count;
113 t[1].bits_per_word = 8;
114 spi_message_add_tail(&t[1], &m);
115
116 err = spi_sync(edev->spi, &m);
117 /* have to wait at least Tcsl ns */
118 ndelay(250);
119
120 if (err) {
121 dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
122 nbytes, (int)off, err);
123 ret = err;
124 break;
125 }
126
127 buf += nbytes;
128 off += nbytes;
129 count -= nbytes;
130 ret += nbytes;
131 }
132
133 if (edev->pdata->finish)
134 edev->pdata->finish(edev);
135
136 mutex_unlock(&edev->lock);
137 return ret;
138}
139
140static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
141{
142 struct spi_message m;
143 struct spi_transfer t;
144 int bits, ret;
145 u16 cmd_addr;
146
147 cmd_addr = OP_START << edev->addrlen;
148 if (edev->addrlen == 7) {
149 cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS) << 1;
150 bits = 10;
151 } else {
152 cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS);
153 bits = 9;
154 }
155
156 if (has_quirk_instruction_length(edev)) {
157 cmd_addr <<= 2;
158 bits += 2;
159 }
160
161 dev_dbg(&edev->spi->dev, "ew%s cmd 0x%04x, %d bits\n",
162 is_on ? "en" : "ds", cmd_addr, bits);
163
164 spi_message_init(&m);
165 memset(&t, 0, sizeof(t));
166
167 t.tx_buf = &cmd_addr;
168 t.len = 2;
169 t.bits_per_word = bits;
170 spi_message_add_tail(&t, &m);
171
172 mutex_lock(&edev->lock);
173
174 if (edev->pdata->prepare)
175 edev->pdata->prepare(edev);
176
177 ret = spi_sync(edev->spi, &m);
178 /* have to wait at least Tcsl ns */
179 ndelay(250);
180 if (ret)
181 dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
182 is_on ? "en" : "dis", ret);
183
184 if (edev->pdata->finish)
185 edev->pdata->finish(edev);
186
187 mutex_unlock(&edev->lock);
188 return ret;
189}
190
191static ssize_t
192eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
193 const char *buf, unsigned off)
194{
195 struct spi_message m;
196 struct spi_transfer t[2];
197 int bits, data_len, ret;
198 u16 cmd_addr;
199
200 cmd_addr = OP_WRITE << edev->addrlen;
201
202 if (edev->addrlen == 7) {
203 cmd_addr |= off & 0x7f;
204 bits = 10;
205 data_len = 1;
206 } else {
207 cmd_addr |= (off >> 1) & 0x3f;
208 bits = 9;
209 data_len = 2;
210 }
211
212 dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);
213
214 spi_message_init(&m);
215 memset(t, 0, sizeof(t));
216
217 t[0].tx_buf = (char *)&cmd_addr;
218 t[0].len = 2;
219 t[0].bits_per_word = bits;
220 spi_message_add_tail(&t[0], &m);
221
222 t[1].tx_buf = buf;
223 t[1].len = data_len;
224 t[1].bits_per_word = 8;
225 spi_message_add_tail(&t[1], &m);
226
227 ret = spi_sync(edev->spi, &m);
228 /* have to wait program cycle time Twc ms */
229 mdelay(6);
230 return ret;
231}
232
233static ssize_t
234eeprom_93xx46_write(struct eeprom_93xx46_dev *edev, const char *buf,
235 loff_t off, size_t count)
236{
237 int i, ret, step = 1;
238
239 if (unlikely(off >= edev->size))
240 return -EFBIG;
241 if ((off + count) > edev->size)
242 count = edev->size - off;
243 if (unlikely(!count))
244 return count;
245
246 /* only write even number of bytes on 16-bit devices */
247 if (edev->addrlen == 6) {
248 step = 2;
249 count &= ~1;
250 }
251
252 /* erase/write enable */
253 ret = eeprom_93xx46_ew(edev, 1);
254 if (ret)
255 return ret;
256
257 mutex_lock(&edev->lock);
258
259 if (edev->pdata->prepare)
260 edev->pdata->prepare(edev);
261
262 for (i = 0; i < count; i += step) {
263 ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
264 if (ret) {
265 dev_err(&edev->spi->dev, "write failed at %d: %d\n",
266 (int)off + i, ret);
267 break;
268 }
269 }
270
271 if (edev->pdata->finish)
272 edev->pdata->finish(edev);
273
274 mutex_unlock(&edev->lock);
275
276 /* erase/write disable */
277 eeprom_93xx46_ew(edev, 0);
278 return ret ? : count;
279}
280
281/*
282 * Provide a regmap interface, which is registered with the NVMEM
283 * framework
284*/
285static int eeprom_93xx46_regmap_read(void *context, const void *reg,
286 size_t reg_size, void *val,
287 size_t val_size)
288{
289 struct eeprom_93xx46_dev *eeprom_93xx46 = context;
290 off_t offset = *(u32 *)reg;
291 int err;
292
293 err = eeprom_93xx46_read(eeprom_93xx46, val, offset, val_size);
294 if (err)
295 return err;
296 return 0;
297}
298
299static int eeprom_93xx46_regmap_write(void *context, const void *data,
300 size_t count)
301{
302 struct eeprom_93xx46_dev *eeprom_93xx46 = context;
303 const char *buf;
304 u32 offset;
305 size_t len;
306 int err;
307
308 memcpy(&offset, data, sizeof(offset));
309 buf = (const char *)data + sizeof(offset);
310 len = count - sizeof(offset);
311
312 err = eeprom_93xx46_write(eeprom_93xx46, buf, offset, len);
313 if (err)
314 return err;
315 return 0;
316}
317
318static const struct regmap_bus eeprom_93xx46_regmap_bus = {
319 .read = eeprom_93xx46_regmap_read,
320 .write = eeprom_93xx46_regmap_write,
321 .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
322};
323
324static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
325{
326 struct eeprom_93xx46_platform_data *pd = edev->pdata;
327 struct spi_message m;
328 struct spi_transfer t;
329 int bits, ret;
330 u16 cmd_addr;
331
332 cmd_addr = OP_START << edev->addrlen;
333 if (edev->addrlen == 7) {
334 cmd_addr |= ADDR_ERAL << 1;
335 bits = 10;
336 } else {
337 cmd_addr |= ADDR_ERAL;
338 bits = 9;
339 }
340
341 if (has_quirk_instruction_length(edev)) {
342 cmd_addr <<= 2;
343 bits += 2;
344 }
345
346 dev_dbg(&edev->spi->dev, "eral cmd 0x%04x, %d bits\n", cmd_addr, bits);
347
348 spi_message_init(&m);
349 memset(&t, 0, sizeof(t));
350
351 t.tx_buf = &cmd_addr;
352 t.len = 2;
353 t.bits_per_word = bits;
354 spi_message_add_tail(&t, &m);
355
356 mutex_lock(&edev->lock);
357
358 if (edev->pdata->prepare)
359 edev->pdata->prepare(edev);
360
361 ret = spi_sync(edev->spi, &m);
362 if (ret)
363 dev_err(&edev->spi->dev, "erase error %d\n", ret);
364 /* have to wait erase cycle time Tec ms */
365 mdelay(6);
366
367 if (pd->finish)
368 pd->finish(edev);
369
370 mutex_unlock(&edev->lock);
371 return ret;
372}
373
374static ssize_t eeprom_93xx46_store_erase(struct device *dev,
375 struct device_attribute *attr,
376 const char *buf, size_t count)
377{
378 struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
379 int erase = 0, ret;
380
381 sscanf(buf, "%d", &erase);
382 if (erase) {
383 ret = eeprom_93xx46_ew(edev, 1);
384 if (ret)
385 return ret;
386 ret = eeprom_93xx46_eral(edev);
387 if (ret)
388 return ret;
389 ret = eeprom_93xx46_ew(edev, 0);
390 if (ret)
391 return ret;
392 }
393 return count;
394}
395static DEVICE_ATTR(erase, S_IWUSR, NULL, eeprom_93xx46_store_erase);
396
397static void select_assert(void *context)
398{
399 struct eeprom_93xx46_dev *edev = context;
400
401 gpiod_set_value_cansleep(edev->pdata->select, 1);
402}
403
404static void select_deassert(void *context)
405{
406 struct eeprom_93xx46_dev *edev = context;
407
408 gpiod_set_value_cansleep(edev->pdata->select, 0);
409}
410
411static const struct of_device_id eeprom_93xx46_of_table[] = {
412 { .compatible = "eeprom-93xx46", },
413 { .compatible = "atmel,at93c46d", .data = &atmel_at93c46d_data, },
414 {}
415};
416MODULE_DEVICE_TABLE(of, eeprom_93xx46_of_table);
417
418static int eeprom_93xx46_probe_dt(struct spi_device *spi)
419{
420 const struct of_device_id *of_id =
421 of_match_device(eeprom_93xx46_of_table, &spi->dev);
422 struct device_node *np = spi->dev.of_node;
423 struct eeprom_93xx46_platform_data *pd;
424 u32 tmp;
425 int gpio;
426 enum of_gpio_flags of_flags;
427 int ret;
428
429 pd = devm_kzalloc(&spi->dev, sizeof(*pd), GFP_KERNEL);
430 if (!pd)
431 return -ENOMEM;
432
433 ret = of_property_read_u32(np, "data-size", &tmp);
434 if (ret < 0) {
435 dev_err(&spi->dev, "data-size property not found\n");
436 return ret;
437 }
438
439 if (tmp == 8) {
440 pd->flags |= EE_ADDR8;
441 } else if (tmp == 16) {
442 pd->flags |= EE_ADDR16;
443 } else {
444 dev_err(&spi->dev, "invalid data-size (%d)\n", tmp);
445 return -EINVAL;
446 }
447
448 if (of_property_read_bool(np, "read-only"))
449 pd->flags |= EE_READONLY;
450
451 gpio = of_get_named_gpio_flags(np, "select-gpios", 0, &of_flags);
452 if (gpio_is_valid(gpio)) {
453 unsigned long flags =
454 of_flags == OF_GPIO_ACTIVE_LOW ? GPIOF_ACTIVE_LOW : 0;
455
456 ret = devm_gpio_request_one(&spi->dev, gpio, flags,
457 "eeprom_93xx46_select");
458 if (ret)
459 return ret;
460
461 pd->select = gpio_to_desc(gpio);
462 pd->prepare = select_assert;
463 pd->finish = select_deassert;
464
465 gpiod_direction_output(pd->select, 0);
466 }
467
468 if (of_id->data) {
469 const struct eeprom_93xx46_devtype_data *data = of_id->data;
470
471 pd->quirks = data->quirks;
472 }
473
474 spi->dev.platform_data = pd;
475
476 return 0;
477}
478
479static int eeprom_93xx46_probe(struct spi_device *spi)
480{
481 struct eeprom_93xx46_platform_data *pd;
482 struct eeprom_93xx46_dev *edev;
483 struct regmap *regmap;
484 int err;
485
486 if (spi->dev.of_node) {
487 err = eeprom_93xx46_probe_dt(spi);
488 if (err < 0)
489 return err;
490 }
491
492 pd = spi->dev.platform_data;
493 if (!pd) {
494 dev_err(&spi->dev, "missing platform data\n");
495 return -ENODEV;
496 }
497
498 edev = kzalloc(sizeof(*edev), GFP_KERNEL);
499 if (!edev)
500 return -ENOMEM;
501
502 if (pd->flags & EE_ADDR8)
503 edev->addrlen = 7;
504 else if (pd->flags & EE_ADDR16)
505 edev->addrlen = 6;
506 else {
507 dev_err(&spi->dev, "unspecified address type\n");
508 err = -EINVAL;
509 goto fail;
510 }
511
512 mutex_init(&edev->lock);
513
514 edev->spi = spi_dev_get(spi);
515 edev->pdata = pd;
516
517 edev->size = 128;
518
519 edev->regmap_config.reg_bits = 32;
520 edev->regmap_config.val_bits = 8;
521 edev->regmap_config.reg_stride = 1;
522 edev->regmap_config.max_register = edev->size - 1;
523
524 regmap = devm_regmap_init(&spi->dev, &eeprom_93xx46_regmap_bus, edev,
525 &edev->regmap_config);
526 if (IS_ERR(regmap)) {
527 dev_err(&spi->dev, "regmap init failed\n");
528 err = PTR_ERR(regmap);
529 goto fail;
530 }
531
532 edev->nvmem_config.name = dev_name(&spi->dev);
533 edev->nvmem_config.dev = &spi->dev;
534 edev->nvmem_config.read_only = pd->flags & EE_READONLY;
535 edev->nvmem_config.root_only = true;
536 edev->nvmem_config.owner = THIS_MODULE;
537 edev->nvmem_config.compat = true;
538 edev->nvmem_config.base_dev = &spi->dev;
539
540 edev->nvmem = nvmem_register(&edev->nvmem_config);
541 if (IS_ERR(edev->nvmem)) {
542 err = PTR_ERR(edev->nvmem);
543 goto fail;
544 }
545
546 dev_info(&spi->dev, "%d-bit eeprom %s\n",
547 (pd->flags & EE_ADDR8) ? 8 : 16,
548 (pd->flags & EE_READONLY) ? "(readonly)" : "");
549
550 if (!(pd->flags & EE_READONLY)) {
551 if (device_create_file(&spi->dev, &dev_attr_erase))
552 dev_err(&spi->dev, "can't create erase interface\n");
553 }
554
555 spi_set_drvdata(spi, edev);
556 return 0;
557fail:
558 kfree(edev);
559 return err;
560}
561
562static int eeprom_93xx46_remove(struct spi_device *spi)
563{
564 struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi);
565
566 nvmem_unregister(edev->nvmem);
567
568 if (!(edev->pdata->flags & EE_READONLY))
569 device_remove_file(&spi->dev, &dev_attr_erase);
570
571 kfree(edev);
572 return 0;
573}
574
575static struct spi_driver eeprom_93xx46_driver = {
576 .driver = {
577 .name = "93xx46",
578 .of_match_table = of_match_ptr(eeprom_93xx46_of_table),
579 },
580 .probe = eeprom_93xx46_probe,
581 .remove = eeprom_93xx46_remove,
582};
583
584module_spi_driver(eeprom_93xx46_driver);
585
586MODULE_LICENSE("GPL");
587MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs");
588MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>");
589MODULE_ALIAS("spi:93xx46");