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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2013 - 2014 Texas Instruments Incorporated - http://www.ti.com
4 *
5 * Authors:
6 * Jyri Sarha <jsarha@ti.com>
7 * Sergej Sawazki <ce3a@gmx.de>
8 *
9 * Gpio controlled clock implementation
10 */
11
12#include <linux/clk-provider.h>
13#include <linux/export.h>
14#include <linux/slab.h>
15#include <linux/gpio/consumer.h>
16#include <linux/err.h>
17#include <linux/device.h>
18#include <linux/platform_device.h>
19#include <linux/of_device.h>
20
21/**
22 * DOC: basic gpio gated clock which can be enabled and disabled
23 * with gpio output
24 * Traits of this clock:
25 * prepare - clk_(un)prepare only ensures parent is (un)prepared
26 * enable - clk_enable and clk_disable are functional & control gpio
27 * rate - inherits rate from parent. No clk_set_rate support
28 * parent - fixed parent. No clk_set_parent support
29 */
30
31static int clk_gpio_gate_enable(struct clk_hw *hw)
32{
33 struct clk_gpio *clk = to_clk_gpio(hw);
34
35 gpiod_set_value(clk->gpiod, 1);
36
37 return 0;
38}
39
40static void clk_gpio_gate_disable(struct clk_hw *hw)
41{
42 struct clk_gpio *clk = to_clk_gpio(hw);
43
44 gpiod_set_value(clk->gpiod, 0);
45}
46
47static int clk_gpio_gate_is_enabled(struct clk_hw *hw)
48{
49 struct clk_gpio *clk = to_clk_gpio(hw);
50
51 return gpiod_get_value(clk->gpiod);
52}
53
54const struct clk_ops clk_gpio_gate_ops = {
55 .enable = clk_gpio_gate_enable,
56 .disable = clk_gpio_gate_disable,
57 .is_enabled = clk_gpio_gate_is_enabled,
58};
59EXPORT_SYMBOL_GPL(clk_gpio_gate_ops);
60
61static int clk_sleeping_gpio_gate_prepare(struct clk_hw *hw)
62{
63 struct clk_gpio *clk = to_clk_gpio(hw);
64
65 gpiod_set_value_cansleep(clk->gpiod, 1);
66
67 return 0;
68}
69
70static void clk_sleeping_gpio_gate_unprepare(struct clk_hw *hw)
71{
72 struct clk_gpio *clk = to_clk_gpio(hw);
73
74 gpiod_set_value_cansleep(clk->gpiod, 0);
75}
76
77static int clk_sleeping_gpio_gate_is_prepared(struct clk_hw *hw)
78{
79 struct clk_gpio *clk = to_clk_gpio(hw);
80
81 return gpiod_get_value_cansleep(clk->gpiod);
82}
83
84static const struct clk_ops clk_sleeping_gpio_gate_ops = {
85 .prepare = clk_sleeping_gpio_gate_prepare,
86 .unprepare = clk_sleeping_gpio_gate_unprepare,
87 .is_prepared = clk_sleeping_gpio_gate_is_prepared,
88};
89
90/**
91 * DOC: basic clock multiplexer which can be controlled with a gpio output
92 * Traits of this clock:
93 * prepare - clk_prepare only ensures that parents are prepared
94 * rate - rate is only affected by parent switching. No clk_set_rate support
95 * parent - parent is adjustable through clk_set_parent
96 */
97
98static u8 clk_gpio_mux_get_parent(struct clk_hw *hw)
99{
100 struct clk_gpio *clk = to_clk_gpio(hw);
101
102 return gpiod_get_value_cansleep(clk->gpiod);
103}
104
105static int clk_gpio_mux_set_parent(struct clk_hw *hw, u8 index)
106{
107 struct clk_gpio *clk = to_clk_gpio(hw);
108
109 gpiod_set_value_cansleep(clk->gpiod, index);
110
111 return 0;
112}
113
114const struct clk_ops clk_gpio_mux_ops = {
115 .get_parent = clk_gpio_mux_get_parent,
116 .set_parent = clk_gpio_mux_set_parent,
117 .determine_rate = __clk_mux_determine_rate,
118};
119EXPORT_SYMBOL_GPL(clk_gpio_mux_ops);
120
121static struct clk_hw *clk_register_gpio(struct device *dev, const char *name,
122 const char * const *parent_names, u8 num_parents, struct gpio_desc *gpiod,
123 unsigned long flags, const struct clk_ops *clk_gpio_ops)
124{
125 struct clk_gpio *clk_gpio;
126 struct clk_hw *hw;
127 struct clk_init_data init = {};
128 int err;
129
130 if (dev)
131 clk_gpio = devm_kzalloc(dev, sizeof(*clk_gpio), GFP_KERNEL);
132 else
133 clk_gpio = kzalloc(sizeof(*clk_gpio), GFP_KERNEL);
134
135 if (!clk_gpio)
136 return ERR_PTR(-ENOMEM);
137
138 init.name = name;
139 init.ops = clk_gpio_ops;
140 init.flags = flags;
141 init.parent_names = parent_names;
142 init.num_parents = num_parents;
143
144 clk_gpio->gpiod = gpiod;
145 clk_gpio->hw.init = &init;
146
147 hw = &clk_gpio->hw;
148 if (dev)
149 err = devm_clk_hw_register(dev, hw);
150 else
151 err = clk_hw_register(NULL, hw);
152
153 if (!err)
154 return hw;
155
156 if (!dev) {
157 kfree(clk_gpio);
158 }
159
160 return ERR_PTR(err);
161}
162
163/**
164 * clk_hw_register_gpio_gate - register a gpio clock gate with the clock
165 * framework
166 * @dev: device that is registering this clock
167 * @name: name of this clock
168 * @parent_name: name of this clock's parent
169 * @gpiod: gpio descriptor to gate this clock
170 * @flags: clock flags
171 */
172struct clk_hw *clk_hw_register_gpio_gate(struct device *dev, const char *name,
173 const char *parent_name, struct gpio_desc *gpiod,
174 unsigned long flags)
175{
176 const struct clk_ops *ops;
177
178 if (gpiod_cansleep(gpiod))
179 ops = &clk_sleeping_gpio_gate_ops;
180 else
181 ops = &clk_gpio_gate_ops;
182
183 return clk_register_gpio(dev, name,
184 (parent_name ? &parent_name : NULL),
185 (parent_name ? 1 : 0), gpiod, flags, ops);
186}
187EXPORT_SYMBOL_GPL(clk_hw_register_gpio_gate);
188
189struct clk *clk_register_gpio_gate(struct device *dev, const char *name,
190 const char *parent_name, struct gpio_desc *gpiod,
191 unsigned long flags)
192{
193 struct clk_hw *hw;
194
195 hw = clk_hw_register_gpio_gate(dev, name, parent_name, gpiod, flags);
196 if (IS_ERR(hw))
197 return ERR_CAST(hw);
198 return hw->clk;
199}
200EXPORT_SYMBOL_GPL(clk_register_gpio_gate);
201
202/**
203 * clk_hw_register_gpio_mux - register a gpio clock mux with the clock framework
204 * @dev: device that is registering this clock
205 * @name: name of this clock
206 * @parent_names: names of this clock's parents
207 * @num_parents: number of parents listed in @parent_names
208 * @gpiod: gpio descriptor to gate this clock
209 * @flags: clock flags
210 */
211struct clk_hw *clk_hw_register_gpio_mux(struct device *dev, const char *name,
212 const char * const *parent_names, u8 num_parents, struct gpio_desc *gpiod,
213 unsigned long flags)
214{
215 if (num_parents != 2) {
216 pr_err("mux-clock %s must have 2 parents\n", name);
217 return ERR_PTR(-EINVAL);
218 }
219
220 return clk_register_gpio(dev, name, parent_names, num_parents,
221 gpiod, flags, &clk_gpio_mux_ops);
222}
223EXPORT_SYMBOL_GPL(clk_hw_register_gpio_mux);
224
225struct clk *clk_register_gpio_mux(struct device *dev, const char *name,
226 const char * const *parent_names, u8 num_parents, struct gpio_desc *gpiod,
227 unsigned long flags)
228{
229 struct clk_hw *hw;
230
231 hw = clk_hw_register_gpio_mux(dev, name, parent_names, num_parents,
232 gpiod, flags);
233 if (IS_ERR(hw))
234 return ERR_CAST(hw);
235 return hw->clk;
236}
237EXPORT_SYMBOL_GPL(clk_register_gpio_mux);
238
239static int gpio_clk_driver_probe(struct platform_device *pdev)
240{
241 struct device_node *node = pdev->dev.of_node;
242 const char **parent_names, *gpio_name;
243 unsigned int num_parents;
244 struct gpio_desc *gpiod;
245 struct clk *clk;
246 bool is_mux;
247 int ret;
248
249 num_parents = of_clk_get_parent_count(node);
250 if (num_parents) {
251 parent_names = devm_kcalloc(&pdev->dev, num_parents,
252 sizeof(char *), GFP_KERNEL);
253 if (!parent_names)
254 return -ENOMEM;
255
256 of_clk_parent_fill(node, parent_names, num_parents);
257 } else {
258 parent_names = NULL;
259 }
260
261 is_mux = of_device_is_compatible(node, "gpio-mux-clock");
262
263 gpio_name = is_mux ? "select" : "enable";
264 gpiod = devm_gpiod_get(&pdev->dev, gpio_name, GPIOD_OUT_LOW);
265 if (IS_ERR(gpiod)) {
266 ret = PTR_ERR(gpiod);
267 if (ret == -EPROBE_DEFER)
268 pr_debug("%pOFn: %s: GPIOs not yet available, retry later\n",
269 node, __func__);
270 else
271 pr_err("%pOFn: %s: Can't get '%s' named GPIO property\n",
272 node, __func__,
273 gpio_name);
274 return ret;
275 }
276
277 if (is_mux)
278 clk = clk_register_gpio_mux(&pdev->dev, node->name,
279 parent_names, num_parents, gpiod, 0);
280 else
281 clk = clk_register_gpio_gate(&pdev->dev, node->name,
282 parent_names ? parent_names[0] : NULL, gpiod,
283 0);
284 if (IS_ERR(clk))
285 return PTR_ERR(clk);
286
287 return of_clk_add_provider(node, of_clk_src_simple_get, clk);
288}
289
290static const struct of_device_id gpio_clk_match_table[] = {
291 { .compatible = "gpio-mux-clock" },
292 { .compatible = "gpio-gate-clock" },
293 { }
294};
295
296static struct platform_driver gpio_clk_driver = {
297 .probe = gpio_clk_driver_probe,
298 .driver = {
299 .name = "gpio-clk",
300 .of_match_table = gpio_clk_match_table,
301 },
302};
303builtin_platform_driver(gpio_clk_driver);
1/*
2 * Copyright (C) 2013 - 2014 Texas Instruments Incorporated - http://www.ti.com
3 *
4 * Authors:
5 * Jyri Sarha <jsarha@ti.com>
6 * Sergej Sawazki <ce3a@gmx.de>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * Gpio controlled clock implementation
13 */
14
15#include <linux/clk-provider.h>
16#include <linux/export.h>
17#include <linux/slab.h>
18#include <linux/gpio.h>
19#include <linux/gpio/consumer.h>
20#include <linux/of_gpio.h>
21#include <linux/err.h>
22#include <linux/device.h>
23#include <linux/platform_device.h>
24#include <linux/of_device.h>
25
26/**
27 * DOC: basic gpio gated clock which can be enabled and disabled
28 * with gpio output
29 * Traits of this clock:
30 * prepare - clk_(un)prepare only ensures parent is (un)prepared
31 * enable - clk_enable and clk_disable are functional & control gpio
32 * rate - inherits rate from parent. No clk_set_rate support
33 * parent - fixed parent. No clk_set_parent support
34 */
35
36static int clk_gpio_gate_enable(struct clk_hw *hw)
37{
38 struct clk_gpio *clk = to_clk_gpio(hw);
39
40 gpiod_set_value(clk->gpiod, 1);
41
42 return 0;
43}
44
45static void clk_gpio_gate_disable(struct clk_hw *hw)
46{
47 struct clk_gpio *clk = to_clk_gpio(hw);
48
49 gpiod_set_value(clk->gpiod, 0);
50}
51
52static int clk_gpio_gate_is_enabled(struct clk_hw *hw)
53{
54 struct clk_gpio *clk = to_clk_gpio(hw);
55
56 return gpiod_get_value(clk->gpiod);
57}
58
59const struct clk_ops clk_gpio_gate_ops = {
60 .enable = clk_gpio_gate_enable,
61 .disable = clk_gpio_gate_disable,
62 .is_enabled = clk_gpio_gate_is_enabled,
63};
64EXPORT_SYMBOL_GPL(clk_gpio_gate_ops);
65
66/**
67 * DOC: basic clock multiplexer which can be controlled with a gpio output
68 * Traits of this clock:
69 * prepare - clk_prepare only ensures that parents are prepared
70 * rate - rate is only affected by parent switching. No clk_set_rate support
71 * parent - parent is adjustable through clk_set_parent
72 */
73
74static u8 clk_gpio_mux_get_parent(struct clk_hw *hw)
75{
76 struct clk_gpio *clk = to_clk_gpio(hw);
77
78 return gpiod_get_value(clk->gpiod);
79}
80
81static int clk_gpio_mux_set_parent(struct clk_hw *hw, u8 index)
82{
83 struct clk_gpio *clk = to_clk_gpio(hw);
84
85 gpiod_set_value(clk->gpiod, index);
86
87 return 0;
88}
89
90const struct clk_ops clk_gpio_mux_ops = {
91 .get_parent = clk_gpio_mux_get_parent,
92 .set_parent = clk_gpio_mux_set_parent,
93 .determine_rate = __clk_mux_determine_rate,
94};
95EXPORT_SYMBOL_GPL(clk_gpio_mux_ops);
96
97static struct clk *clk_register_gpio(struct device *dev, const char *name,
98 const char * const *parent_names, u8 num_parents, unsigned gpio,
99 bool active_low, unsigned long flags,
100 const struct clk_ops *clk_gpio_ops)
101{
102 struct clk_gpio *clk_gpio;
103 struct clk *clk;
104 struct clk_init_data init = {};
105 unsigned long gpio_flags;
106 int err;
107
108 if (dev)
109 clk_gpio = devm_kzalloc(dev, sizeof(*clk_gpio), GFP_KERNEL);
110 else
111 clk_gpio = kzalloc(sizeof(*clk_gpio), GFP_KERNEL);
112
113 if (!clk_gpio)
114 return ERR_PTR(-ENOMEM);
115
116 if (active_low)
117 gpio_flags = GPIOF_ACTIVE_LOW | GPIOF_OUT_INIT_HIGH;
118 else
119 gpio_flags = GPIOF_OUT_INIT_LOW;
120
121 if (dev)
122 err = devm_gpio_request_one(dev, gpio, gpio_flags, name);
123 else
124 err = gpio_request_one(gpio, gpio_flags, name);
125 if (err) {
126 if (err != -EPROBE_DEFER)
127 pr_err("%s: %s: Error requesting clock control gpio %u\n",
128 __func__, name, gpio);
129 if (!dev)
130 kfree(clk_gpio);
131
132 return ERR_PTR(err);
133 }
134
135 init.name = name;
136 init.ops = clk_gpio_ops;
137 init.flags = flags | CLK_IS_BASIC;
138 init.parent_names = parent_names;
139 init.num_parents = num_parents;
140
141 clk_gpio->gpiod = gpio_to_desc(gpio);
142 clk_gpio->hw.init = &init;
143
144 if (dev)
145 clk = devm_clk_register(dev, &clk_gpio->hw);
146 else
147 clk = clk_register(NULL, &clk_gpio->hw);
148
149 if (!IS_ERR(clk))
150 return clk;
151
152 if (!dev) {
153 gpiod_put(clk_gpio->gpiod);
154 kfree(clk_gpio);
155 }
156
157 return clk;
158}
159
160/**
161 * clk_register_gpio_gate - register a gpio clock gate with the clock framework
162 * @dev: device that is registering this clock
163 * @name: name of this clock
164 * @parent_name: name of this clock's parent
165 * @gpio: gpio number to gate this clock
166 * @active_low: true if gpio should be set to 0 to enable clock
167 * @flags: clock flags
168 */
169struct clk *clk_register_gpio_gate(struct device *dev, const char *name,
170 const char *parent_name, unsigned gpio, bool active_low,
171 unsigned long flags)
172{
173 return clk_register_gpio(dev, name,
174 (parent_name ? &parent_name : NULL),
175 (parent_name ? 1 : 0), gpio, active_low, flags,
176 &clk_gpio_gate_ops);
177}
178EXPORT_SYMBOL_GPL(clk_register_gpio_gate);
179
180/**
181 * clk_register_gpio_mux - register a gpio clock mux with the clock framework
182 * @dev: device that is registering this clock
183 * @name: name of this clock
184 * @parent_names: names of this clock's parents
185 * @num_parents: number of parents listed in @parent_names
186 * @gpio: gpio number to gate this clock
187 * @active_low: true if gpio should be set to 0 to enable clock
188 * @flags: clock flags
189 */
190struct clk *clk_register_gpio_mux(struct device *dev, const char *name,
191 const char * const *parent_names, u8 num_parents, unsigned gpio,
192 bool active_low, unsigned long flags)
193{
194 if (num_parents != 2) {
195 pr_err("mux-clock %s must have 2 parents\n", name);
196 return ERR_PTR(-EINVAL);
197 }
198
199 return clk_register_gpio(dev, name, parent_names, num_parents,
200 gpio, active_low, flags, &clk_gpio_mux_ops);
201}
202EXPORT_SYMBOL_GPL(clk_register_gpio_mux);
203
204static int gpio_clk_driver_probe(struct platform_device *pdev)
205{
206 struct device_node *node = pdev->dev.of_node;
207 const char **parent_names, *gpio_name;
208 unsigned int num_parents;
209 int gpio;
210 enum of_gpio_flags of_flags;
211 struct clk *clk;
212 bool active_low, is_mux;
213
214 num_parents = of_clk_get_parent_count(node);
215 if (num_parents) {
216 parent_names = devm_kcalloc(&pdev->dev, num_parents,
217 sizeof(char *), GFP_KERNEL);
218 if (!parent_names)
219 return -ENOMEM;
220
221 of_clk_parent_fill(node, parent_names, num_parents);
222 } else {
223 parent_names = NULL;
224 }
225
226 is_mux = of_device_is_compatible(node, "gpio-mux-clock");
227
228 gpio_name = is_mux ? "select-gpios" : "enable-gpios";
229 gpio = of_get_named_gpio_flags(node, gpio_name, 0, &of_flags);
230 if (gpio < 0) {
231 if (gpio == -EPROBE_DEFER)
232 pr_debug("%s: %s: GPIOs not yet available, retry later\n",
233 node->name, __func__);
234 else
235 pr_err("%s: %s: Can't get '%s' DT property\n",
236 node->name, __func__,
237 gpio_name);
238 return gpio;
239 }
240
241 active_low = of_flags & OF_GPIO_ACTIVE_LOW;
242
243 if (is_mux)
244 clk = clk_register_gpio_mux(&pdev->dev, node->name,
245 parent_names, num_parents, gpio, active_low, 0);
246 else
247 clk = clk_register_gpio_gate(&pdev->dev, node->name,
248 parent_names ? parent_names[0] : NULL, gpio,
249 active_low, 0);
250 if (IS_ERR(clk))
251 return PTR_ERR(clk);
252
253 return of_clk_add_provider(node, of_clk_src_simple_get, clk);
254}
255
256static const struct of_device_id gpio_clk_match_table[] = {
257 { .compatible = "gpio-mux-clock" },
258 { .compatible = "gpio-gate-clock" },
259 { }
260};
261
262static struct platform_driver gpio_clk_driver = {
263 .probe = gpio_clk_driver_probe,
264 .driver = {
265 .name = "gpio-clk",
266 .of_match_table = gpio_clk_match_table,
267 },
268};
269builtin_platform_driver(gpio_clk_driver);