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1/***********************license start***************
2 * Author: Cavium Networks
3 *
4 * Contact: support@caviumnetworks.com
5 * This file is part of the OCTEON SDK
6 *
7 * Copyright (c) 2003-2012 Cavium Networks
8 *
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more
17 * details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this file; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * or visit http://www.gnu.org/licenses/.
23 *
24 * This file may also be available under a different license from Cavium.
25 * Contact Cavium Networks for more information
26 ***********************license end**************************************/
27
28#ifndef __CVMX_IOB_DEFS_H__
29#define __CVMX_IOB_DEFS_H__
30
31#define CVMX_IOB_BIST_STATUS (CVMX_ADD_IO_SEG(0x00011800F00007F8ull))
32#define CVMX_IOB_CTL_STATUS (CVMX_ADD_IO_SEG(0x00011800F0000050ull))
33#define CVMX_IOB_DWB_PRI_CNT (CVMX_ADD_IO_SEG(0x00011800F0000028ull))
34#define CVMX_IOB_FAU_TIMEOUT (CVMX_ADD_IO_SEG(0x00011800F0000000ull))
35#define CVMX_IOB_I2C_PRI_CNT (CVMX_ADD_IO_SEG(0x00011800F0000010ull))
36#define CVMX_IOB_INB_CONTROL_MATCH (CVMX_ADD_IO_SEG(0x00011800F0000078ull))
37#define CVMX_IOB_INB_CONTROL_MATCH_ENB (CVMX_ADD_IO_SEG(0x00011800F0000088ull))
38#define CVMX_IOB_INB_DATA_MATCH (CVMX_ADD_IO_SEG(0x00011800F0000070ull))
39#define CVMX_IOB_INB_DATA_MATCH_ENB (CVMX_ADD_IO_SEG(0x00011800F0000080ull))
40#define CVMX_IOB_INT_ENB (CVMX_ADD_IO_SEG(0x00011800F0000060ull))
41#define CVMX_IOB_INT_SUM (CVMX_ADD_IO_SEG(0x00011800F0000058ull))
42#define CVMX_IOB_N2C_L2C_PRI_CNT (CVMX_ADD_IO_SEG(0x00011800F0000020ull))
43#define CVMX_IOB_N2C_RSP_PRI_CNT (CVMX_ADD_IO_SEG(0x00011800F0000008ull))
44#define CVMX_IOB_OUTB_COM_PRI_CNT (CVMX_ADD_IO_SEG(0x00011800F0000040ull))
45#define CVMX_IOB_OUTB_CONTROL_MATCH (CVMX_ADD_IO_SEG(0x00011800F0000098ull))
46#define CVMX_IOB_OUTB_CONTROL_MATCH_ENB (CVMX_ADD_IO_SEG(0x00011800F00000A8ull))
47#define CVMX_IOB_OUTB_DATA_MATCH (CVMX_ADD_IO_SEG(0x00011800F0000090ull))
48#define CVMX_IOB_OUTB_DATA_MATCH_ENB (CVMX_ADD_IO_SEG(0x00011800F00000A0ull))
49#define CVMX_IOB_OUTB_FPA_PRI_CNT (CVMX_ADD_IO_SEG(0x00011800F0000048ull))
50#define CVMX_IOB_OUTB_REQ_PRI_CNT (CVMX_ADD_IO_SEG(0x00011800F0000038ull))
51#define CVMX_IOB_P2C_REQ_PRI_CNT (CVMX_ADD_IO_SEG(0x00011800F0000018ull))
52#define CVMX_IOB_PKT_ERR (CVMX_ADD_IO_SEG(0x00011800F0000068ull))
53#define CVMX_IOB_TO_CMB_CREDITS (CVMX_ADD_IO_SEG(0x00011800F00000B0ull))
54#define CVMX_IOB_TO_NCB_DID_00_CREDITS (CVMX_ADD_IO_SEG(0x00011800F0000800ull))
55#define CVMX_IOB_TO_NCB_DID_111_CREDITS (CVMX_ADD_IO_SEG(0x00011800F0000B78ull))
56#define CVMX_IOB_TO_NCB_DID_223_CREDITS (CVMX_ADD_IO_SEG(0x00011800F0000EF8ull))
57#define CVMX_IOB_TO_NCB_DID_24_CREDITS (CVMX_ADD_IO_SEG(0x00011800F00008C0ull))
58#define CVMX_IOB_TO_NCB_DID_32_CREDITS (CVMX_ADD_IO_SEG(0x00011800F0000900ull))
59#define CVMX_IOB_TO_NCB_DID_40_CREDITS (CVMX_ADD_IO_SEG(0x00011800F0000940ull))
60#define CVMX_IOB_TO_NCB_DID_55_CREDITS (CVMX_ADD_IO_SEG(0x00011800F00009B8ull))
61#define CVMX_IOB_TO_NCB_DID_64_CREDITS (CVMX_ADD_IO_SEG(0x00011800F0000A00ull))
62#define CVMX_IOB_TO_NCB_DID_79_CREDITS (CVMX_ADD_IO_SEG(0x00011800F0000A78ull))
63#define CVMX_IOB_TO_NCB_DID_96_CREDITS (CVMX_ADD_IO_SEG(0x00011800F0000B00ull))
64#define CVMX_IOB_TO_NCB_DID_98_CREDITS (CVMX_ADD_IO_SEG(0x00011800F0000B10ull))
65
66union cvmx_iob_bist_status {
67 uint64_t u64;
68 struct cvmx_iob_bist_status_s {
69#ifdef __BIG_ENDIAN_BITFIELD
70 uint64_t reserved_2_63:62;
71 uint64_t ibd:1;
72 uint64_t icd:1;
73#else
74 uint64_t icd:1;
75 uint64_t ibd:1;
76 uint64_t reserved_2_63:62;
77#endif
78 } s;
79 struct cvmx_iob_bist_status_cn30xx {
80#ifdef __BIG_ENDIAN_BITFIELD
81 uint64_t reserved_18_63:46;
82 uint64_t icnrcb:1;
83 uint64_t icr0:1;
84 uint64_t icr1:1;
85 uint64_t icnr1:1;
86 uint64_t icnr0:1;
87 uint64_t ibdr0:1;
88 uint64_t ibdr1:1;
89 uint64_t ibr0:1;
90 uint64_t ibr1:1;
91 uint64_t icnrt:1;
92 uint64_t ibrq0:1;
93 uint64_t ibrq1:1;
94 uint64_t icrn0:1;
95 uint64_t icrn1:1;
96 uint64_t icrp0:1;
97 uint64_t icrp1:1;
98 uint64_t ibd:1;
99 uint64_t icd:1;
100#else
101 uint64_t icd:1;
102 uint64_t ibd:1;
103 uint64_t icrp1:1;
104 uint64_t icrp0:1;
105 uint64_t icrn1:1;
106 uint64_t icrn0:1;
107 uint64_t ibrq1:1;
108 uint64_t ibrq0:1;
109 uint64_t icnrt:1;
110 uint64_t ibr1:1;
111 uint64_t ibr0:1;
112 uint64_t ibdr1:1;
113 uint64_t ibdr0:1;
114 uint64_t icnr0:1;
115 uint64_t icnr1:1;
116 uint64_t icr1:1;
117 uint64_t icr0:1;
118 uint64_t icnrcb:1;
119 uint64_t reserved_18_63:46;
120#endif
121 } cn30xx;
122 struct cvmx_iob_bist_status_cn61xx {
123#ifdef __BIG_ENDIAN_BITFIELD
124 uint64_t reserved_23_63:41;
125 uint64_t xmdfif:1;
126 uint64_t xmcfif:1;
127 uint64_t iorfif:1;
128 uint64_t rsdfif:1;
129 uint64_t iocfif:1;
130 uint64_t icnrcb:1;
131 uint64_t icr0:1;
132 uint64_t icr1:1;
133 uint64_t icnr1:1;
134 uint64_t icnr0:1;
135 uint64_t ibdr0:1;
136 uint64_t ibdr1:1;
137 uint64_t ibr0:1;
138 uint64_t ibr1:1;
139 uint64_t icnrt:1;
140 uint64_t ibrq0:1;
141 uint64_t ibrq1:1;
142 uint64_t icrn0:1;
143 uint64_t icrn1:1;
144 uint64_t icrp0:1;
145 uint64_t icrp1:1;
146 uint64_t ibd:1;
147 uint64_t icd:1;
148#else
149 uint64_t icd:1;
150 uint64_t ibd:1;
151 uint64_t icrp1:1;
152 uint64_t icrp0:1;
153 uint64_t icrn1:1;
154 uint64_t icrn0:1;
155 uint64_t ibrq1:1;
156 uint64_t ibrq0:1;
157 uint64_t icnrt:1;
158 uint64_t ibr1:1;
159 uint64_t ibr0:1;
160 uint64_t ibdr1:1;
161 uint64_t ibdr0:1;
162 uint64_t icnr0:1;
163 uint64_t icnr1:1;
164 uint64_t icr1:1;
165 uint64_t icr0:1;
166 uint64_t icnrcb:1;
167 uint64_t iocfif:1;
168 uint64_t rsdfif:1;
169 uint64_t iorfif:1;
170 uint64_t xmcfif:1;
171 uint64_t xmdfif:1;
172 uint64_t reserved_23_63:41;
173#endif
174 } cn61xx;
175 struct cvmx_iob_bist_status_cn68xx {
176#ifdef __BIG_ENDIAN_BITFIELD
177 uint64_t reserved_18_63:46;
178 uint64_t xmdfif:1;
179 uint64_t xmcfif:1;
180 uint64_t iorfif:1;
181 uint64_t rsdfif:1;
182 uint64_t iocfif:1;
183 uint64_t icnrcb:1;
184 uint64_t icr0:1;
185 uint64_t icr1:1;
186 uint64_t icnr0:1;
187 uint64_t ibr0:1;
188 uint64_t ibr1:1;
189 uint64_t icnrt:1;
190 uint64_t ibrq0:1;
191 uint64_t ibrq1:1;
192 uint64_t icrn0:1;
193 uint64_t icrn1:1;
194 uint64_t ibd:1;
195 uint64_t icd:1;
196#else
197 uint64_t icd:1;
198 uint64_t ibd:1;
199 uint64_t icrn1:1;
200 uint64_t icrn0:1;
201 uint64_t ibrq1:1;
202 uint64_t ibrq0:1;
203 uint64_t icnrt:1;
204 uint64_t ibr1:1;
205 uint64_t ibr0:1;
206 uint64_t icnr0:1;
207 uint64_t icr1:1;
208 uint64_t icr0:1;
209 uint64_t icnrcb:1;
210 uint64_t iocfif:1;
211 uint64_t rsdfif:1;
212 uint64_t iorfif:1;
213 uint64_t xmcfif:1;
214 uint64_t xmdfif:1;
215 uint64_t reserved_18_63:46;
216#endif
217 } cn68xx;
218};
219
220union cvmx_iob_ctl_status {
221 uint64_t u64;
222 struct cvmx_iob_ctl_status_s {
223#ifdef __BIG_ENDIAN_BITFIELD
224 uint64_t reserved_11_63:53;
225 uint64_t fif_dly:1;
226 uint64_t xmc_per:4;
227 uint64_t reserved_5_5:1;
228 uint64_t outb_mat:1;
229 uint64_t inb_mat:1;
230 uint64_t pko_enb:1;
231 uint64_t dwb_enb:1;
232 uint64_t fau_end:1;
233#else
234 uint64_t fau_end:1;
235 uint64_t dwb_enb:1;
236 uint64_t pko_enb:1;
237 uint64_t inb_mat:1;
238 uint64_t outb_mat:1;
239 uint64_t reserved_5_5:1;
240 uint64_t xmc_per:4;
241 uint64_t fif_dly:1;
242 uint64_t reserved_11_63:53;
243#endif
244 } s;
245 struct cvmx_iob_ctl_status_cn30xx {
246#ifdef __BIG_ENDIAN_BITFIELD
247 uint64_t reserved_5_63:59;
248 uint64_t outb_mat:1;
249 uint64_t inb_mat:1;
250 uint64_t pko_enb:1;
251 uint64_t dwb_enb:1;
252 uint64_t fau_end:1;
253#else
254 uint64_t fau_end:1;
255 uint64_t dwb_enb:1;
256 uint64_t pko_enb:1;
257 uint64_t inb_mat:1;
258 uint64_t outb_mat:1;
259 uint64_t reserved_5_63:59;
260#endif
261 } cn30xx;
262 struct cvmx_iob_ctl_status_cn52xx {
263#ifdef __BIG_ENDIAN_BITFIELD
264 uint64_t reserved_6_63:58;
265 uint64_t rr_mode:1;
266 uint64_t outb_mat:1;
267 uint64_t inb_mat:1;
268 uint64_t pko_enb:1;
269 uint64_t dwb_enb:1;
270 uint64_t fau_end:1;
271#else
272 uint64_t fau_end:1;
273 uint64_t dwb_enb:1;
274 uint64_t pko_enb:1;
275 uint64_t inb_mat:1;
276 uint64_t outb_mat:1;
277 uint64_t rr_mode:1;
278 uint64_t reserved_6_63:58;
279#endif
280 } cn52xx;
281 struct cvmx_iob_ctl_status_cn61xx {
282#ifdef __BIG_ENDIAN_BITFIELD
283 uint64_t reserved_11_63:53;
284 uint64_t fif_dly:1;
285 uint64_t xmc_per:4;
286 uint64_t rr_mode:1;
287 uint64_t outb_mat:1;
288 uint64_t inb_mat:1;
289 uint64_t pko_enb:1;
290 uint64_t dwb_enb:1;
291 uint64_t fau_end:1;
292#else
293 uint64_t fau_end:1;
294 uint64_t dwb_enb:1;
295 uint64_t pko_enb:1;
296 uint64_t inb_mat:1;
297 uint64_t outb_mat:1;
298 uint64_t rr_mode:1;
299 uint64_t xmc_per:4;
300 uint64_t fif_dly:1;
301 uint64_t reserved_11_63:53;
302#endif
303 } cn61xx;
304 struct cvmx_iob_ctl_status_cn63xx {
305#ifdef __BIG_ENDIAN_BITFIELD
306 uint64_t reserved_10_63:54;
307 uint64_t xmc_per:4;
308 uint64_t rr_mode:1;
309 uint64_t outb_mat:1;
310 uint64_t inb_mat:1;
311 uint64_t pko_enb:1;
312 uint64_t dwb_enb:1;
313 uint64_t fau_end:1;
314#else
315 uint64_t fau_end:1;
316 uint64_t dwb_enb:1;
317 uint64_t pko_enb:1;
318 uint64_t inb_mat:1;
319 uint64_t outb_mat:1;
320 uint64_t rr_mode:1;
321 uint64_t xmc_per:4;
322 uint64_t reserved_10_63:54;
323#endif
324 } cn63xx;
325 struct cvmx_iob_ctl_status_cn68xx {
326#ifdef __BIG_ENDIAN_BITFIELD
327 uint64_t reserved_11_63:53;
328 uint64_t fif_dly:1;
329 uint64_t xmc_per:4;
330 uint64_t rsvr5:1;
331 uint64_t outb_mat:1;
332 uint64_t inb_mat:1;
333 uint64_t pko_enb:1;
334 uint64_t dwb_enb:1;
335 uint64_t fau_end:1;
336#else
337 uint64_t fau_end:1;
338 uint64_t dwb_enb:1;
339 uint64_t pko_enb:1;
340 uint64_t inb_mat:1;
341 uint64_t outb_mat:1;
342 uint64_t rsvr5:1;
343 uint64_t xmc_per:4;
344 uint64_t fif_dly:1;
345 uint64_t reserved_11_63:53;
346#endif
347 } cn68xx;
348};
349
350union cvmx_iob_dwb_pri_cnt {
351 uint64_t u64;
352 struct cvmx_iob_dwb_pri_cnt_s {
353#ifdef __BIG_ENDIAN_BITFIELD
354 uint64_t reserved_16_63:48;
355 uint64_t cnt_enb:1;
356 uint64_t cnt_val:15;
357#else
358 uint64_t cnt_val:15;
359 uint64_t cnt_enb:1;
360 uint64_t reserved_16_63:48;
361#endif
362 } s;
363};
364
365union cvmx_iob_fau_timeout {
366 uint64_t u64;
367 struct cvmx_iob_fau_timeout_s {
368#ifdef __BIG_ENDIAN_BITFIELD
369 uint64_t reserved_13_63:51;
370 uint64_t tout_enb:1;
371 uint64_t tout_val:12;
372#else
373 uint64_t tout_val:12;
374 uint64_t tout_enb:1;
375 uint64_t reserved_13_63:51;
376#endif
377 } s;
378};
379
380union cvmx_iob_i2c_pri_cnt {
381 uint64_t u64;
382 struct cvmx_iob_i2c_pri_cnt_s {
383#ifdef __BIG_ENDIAN_BITFIELD
384 uint64_t reserved_16_63:48;
385 uint64_t cnt_enb:1;
386 uint64_t cnt_val:15;
387#else
388 uint64_t cnt_val:15;
389 uint64_t cnt_enb:1;
390 uint64_t reserved_16_63:48;
391#endif
392 } s;
393};
394
395union cvmx_iob_inb_control_match {
396 uint64_t u64;
397 struct cvmx_iob_inb_control_match_s {
398#ifdef __BIG_ENDIAN_BITFIELD
399 uint64_t reserved_29_63:35;
400 uint64_t mask:8;
401 uint64_t opc:4;
402 uint64_t dst:9;
403 uint64_t src:8;
404#else
405 uint64_t src:8;
406 uint64_t dst:9;
407 uint64_t opc:4;
408 uint64_t mask:8;
409 uint64_t reserved_29_63:35;
410#endif
411 } s;
412};
413
414union cvmx_iob_inb_control_match_enb {
415 uint64_t u64;
416 struct cvmx_iob_inb_control_match_enb_s {
417#ifdef __BIG_ENDIAN_BITFIELD
418 uint64_t reserved_29_63:35;
419 uint64_t mask:8;
420 uint64_t opc:4;
421 uint64_t dst:9;
422 uint64_t src:8;
423#else
424 uint64_t src:8;
425 uint64_t dst:9;
426 uint64_t opc:4;
427 uint64_t mask:8;
428 uint64_t reserved_29_63:35;
429#endif
430 } s;
431};
432
433union cvmx_iob_inb_data_match {
434 uint64_t u64;
435 struct cvmx_iob_inb_data_match_s {
436#ifdef __BIG_ENDIAN_BITFIELD
437 uint64_t data:64;
438#else
439 uint64_t data:64;
440#endif
441 } s;
442};
443
444union cvmx_iob_inb_data_match_enb {
445 uint64_t u64;
446 struct cvmx_iob_inb_data_match_enb_s {
447#ifdef __BIG_ENDIAN_BITFIELD
448 uint64_t data:64;
449#else
450 uint64_t data:64;
451#endif
452 } s;
453};
454
455union cvmx_iob_int_enb {
456 uint64_t u64;
457 struct cvmx_iob_int_enb_s {
458#ifdef __BIG_ENDIAN_BITFIELD
459 uint64_t reserved_6_63:58;
460 uint64_t p_dat:1;
461 uint64_t np_dat:1;
462 uint64_t p_eop:1;
463 uint64_t p_sop:1;
464 uint64_t np_eop:1;
465 uint64_t np_sop:1;
466#else
467 uint64_t np_sop:1;
468 uint64_t np_eop:1;
469 uint64_t p_sop:1;
470 uint64_t p_eop:1;
471 uint64_t np_dat:1;
472 uint64_t p_dat:1;
473 uint64_t reserved_6_63:58;
474#endif
475 } s;
476 struct cvmx_iob_int_enb_cn30xx {
477#ifdef __BIG_ENDIAN_BITFIELD
478 uint64_t reserved_4_63:60;
479 uint64_t p_eop:1;
480 uint64_t p_sop:1;
481 uint64_t np_eop:1;
482 uint64_t np_sop:1;
483#else
484 uint64_t np_sop:1;
485 uint64_t np_eop:1;
486 uint64_t p_sop:1;
487 uint64_t p_eop:1;
488 uint64_t reserved_4_63:60;
489#endif
490 } cn30xx;
491 struct cvmx_iob_int_enb_cn68xx {
492#ifdef __BIG_ENDIAN_BITFIELD
493 uint64_t reserved_0_63:64;
494#else
495 uint64_t reserved_0_63:64;
496#endif
497 } cn68xx;
498};
499
500union cvmx_iob_int_sum {
501 uint64_t u64;
502 struct cvmx_iob_int_sum_s {
503#ifdef __BIG_ENDIAN_BITFIELD
504 uint64_t reserved_6_63:58;
505 uint64_t p_dat:1;
506 uint64_t np_dat:1;
507 uint64_t p_eop:1;
508 uint64_t p_sop:1;
509 uint64_t np_eop:1;
510 uint64_t np_sop:1;
511#else
512 uint64_t np_sop:1;
513 uint64_t np_eop:1;
514 uint64_t p_sop:1;
515 uint64_t p_eop:1;
516 uint64_t np_dat:1;
517 uint64_t p_dat:1;
518 uint64_t reserved_6_63:58;
519#endif
520 } s;
521 struct cvmx_iob_int_sum_cn30xx {
522#ifdef __BIG_ENDIAN_BITFIELD
523 uint64_t reserved_4_63:60;
524 uint64_t p_eop:1;
525 uint64_t p_sop:1;
526 uint64_t np_eop:1;
527 uint64_t np_sop:1;
528#else
529 uint64_t np_sop:1;
530 uint64_t np_eop:1;
531 uint64_t p_sop:1;
532 uint64_t p_eop:1;
533 uint64_t reserved_4_63:60;
534#endif
535 } cn30xx;
536 struct cvmx_iob_int_sum_cn68xx {
537#ifdef __BIG_ENDIAN_BITFIELD
538 uint64_t reserved_0_63:64;
539#else
540 uint64_t reserved_0_63:64;
541#endif
542 } cn68xx;
543};
544
545union cvmx_iob_n2c_l2c_pri_cnt {
546 uint64_t u64;
547 struct cvmx_iob_n2c_l2c_pri_cnt_s {
548#ifdef __BIG_ENDIAN_BITFIELD
549 uint64_t reserved_16_63:48;
550 uint64_t cnt_enb:1;
551 uint64_t cnt_val:15;
552#else
553 uint64_t cnt_val:15;
554 uint64_t cnt_enb:1;
555 uint64_t reserved_16_63:48;
556#endif
557 } s;
558};
559
560union cvmx_iob_n2c_rsp_pri_cnt {
561 uint64_t u64;
562 struct cvmx_iob_n2c_rsp_pri_cnt_s {
563#ifdef __BIG_ENDIAN_BITFIELD
564 uint64_t reserved_16_63:48;
565 uint64_t cnt_enb:1;
566 uint64_t cnt_val:15;
567#else
568 uint64_t cnt_val:15;
569 uint64_t cnt_enb:1;
570 uint64_t reserved_16_63:48;
571#endif
572 } s;
573};
574
575union cvmx_iob_outb_com_pri_cnt {
576 uint64_t u64;
577 struct cvmx_iob_outb_com_pri_cnt_s {
578#ifdef __BIG_ENDIAN_BITFIELD
579 uint64_t reserved_16_63:48;
580 uint64_t cnt_enb:1;
581 uint64_t cnt_val:15;
582#else
583 uint64_t cnt_val:15;
584 uint64_t cnt_enb:1;
585 uint64_t reserved_16_63:48;
586#endif
587 } s;
588};
589
590union cvmx_iob_outb_control_match {
591 uint64_t u64;
592 struct cvmx_iob_outb_control_match_s {
593#ifdef __BIG_ENDIAN_BITFIELD
594 uint64_t reserved_26_63:38;
595 uint64_t mask:8;
596 uint64_t eot:1;
597 uint64_t dst:8;
598 uint64_t src:9;
599#else
600 uint64_t src:9;
601 uint64_t dst:8;
602 uint64_t eot:1;
603 uint64_t mask:8;
604 uint64_t reserved_26_63:38;
605#endif
606 } s;
607};
608
609union cvmx_iob_outb_control_match_enb {
610 uint64_t u64;
611 struct cvmx_iob_outb_control_match_enb_s {
612#ifdef __BIG_ENDIAN_BITFIELD
613 uint64_t reserved_26_63:38;
614 uint64_t mask:8;
615 uint64_t eot:1;
616 uint64_t dst:8;
617 uint64_t src:9;
618#else
619 uint64_t src:9;
620 uint64_t dst:8;
621 uint64_t eot:1;
622 uint64_t mask:8;
623 uint64_t reserved_26_63:38;
624#endif
625 } s;
626};
627
628union cvmx_iob_outb_data_match {
629 uint64_t u64;
630 struct cvmx_iob_outb_data_match_s {
631#ifdef __BIG_ENDIAN_BITFIELD
632 uint64_t data:64;
633#else
634 uint64_t data:64;
635#endif
636 } s;
637};
638
639union cvmx_iob_outb_data_match_enb {
640 uint64_t u64;
641 struct cvmx_iob_outb_data_match_enb_s {
642#ifdef __BIG_ENDIAN_BITFIELD
643 uint64_t data:64;
644#else
645 uint64_t data:64;
646#endif
647 } s;
648};
649
650union cvmx_iob_outb_fpa_pri_cnt {
651 uint64_t u64;
652 struct cvmx_iob_outb_fpa_pri_cnt_s {
653#ifdef __BIG_ENDIAN_BITFIELD
654 uint64_t reserved_16_63:48;
655 uint64_t cnt_enb:1;
656 uint64_t cnt_val:15;
657#else
658 uint64_t cnt_val:15;
659 uint64_t cnt_enb:1;
660 uint64_t reserved_16_63:48;
661#endif
662 } s;
663};
664
665union cvmx_iob_outb_req_pri_cnt {
666 uint64_t u64;
667 struct cvmx_iob_outb_req_pri_cnt_s {
668#ifdef __BIG_ENDIAN_BITFIELD
669 uint64_t reserved_16_63:48;
670 uint64_t cnt_enb:1;
671 uint64_t cnt_val:15;
672#else
673 uint64_t cnt_val:15;
674 uint64_t cnt_enb:1;
675 uint64_t reserved_16_63:48;
676#endif
677 } s;
678};
679
680union cvmx_iob_p2c_req_pri_cnt {
681 uint64_t u64;
682 struct cvmx_iob_p2c_req_pri_cnt_s {
683#ifdef __BIG_ENDIAN_BITFIELD
684 uint64_t reserved_16_63:48;
685 uint64_t cnt_enb:1;
686 uint64_t cnt_val:15;
687#else
688 uint64_t cnt_val:15;
689 uint64_t cnt_enb:1;
690 uint64_t reserved_16_63:48;
691#endif
692 } s;
693};
694
695union cvmx_iob_pkt_err {
696 uint64_t u64;
697 struct cvmx_iob_pkt_err_s {
698#ifdef __BIG_ENDIAN_BITFIELD
699 uint64_t reserved_12_63:52;
700 uint64_t vport:6;
701 uint64_t port:6;
702#else
703 uint64_t port:6;
704 uint64_t vport:6;
705 uint64_t reserved_12_63:52;
706#endif
707 } s;
708 struct cvmx_iob_pkt_err_cn30xx {
709#ifdef __BIG_ENDIAN_BITFIELD
710 uint64_t reserved_6_63:58;
711 uint64_t port:6;
712#else
713 uint64_t port:6;
714 uint64_t reserved_6_63:58;
715#endif
716 } cn30xx;
717};
718
719union cvmx_iob_to_cmb_credits {
720 uint64_t u64;
721 struct cvmx_iob_to_cmb_credits_s {
722#ifdef __BIG_ENDIAN_BITFIELD
723 uint64_t reserved_6_63:58;
724 uint64_t ncb_rd:3;
725 uint64_t ncb_wr:3;
726#else
727 uint64_t ncb_wr:3;
728 uint64_t ncb_rd:3;
729 uint64_t reserved_6_63:58;
730#endif
731 } s;
732 struct cvmx_iob_to_cmb_credits_cn52xx {
733#ifdef __BIG_ENDIAN_BITFIELD
734 uint64_t reserved_9_63:55;
735 uint64_t pko_rd:3;
736 uint64_t ncb_rd:3;
737 uint64_t ncb_wr:3;
738#else
739 uint64_t ncb_wr:3;
740 uint64_t ncb_rd:3;
741 uint64_t pko_rd:3;
742 uint64_t reserved_9_63:55;
743#endif
744 } cn52xx;
745 struct cvmx_iob_to_cmb_credits_cn68xx {
746#ifdef __BIG_ENDIAN_BITFIELD
747 uint64_t reserved_9_63:55;
748 uint64_t dwb:3;
749 uint64_t ncb_rd:3;
750 uint64_t ncb_wr:3;
751#else
752 uint64_t ncb_wr:3;
753 uint64_t ncb_rd:3;
754 uint64_t dwb:3;
755 uint64_t reserved_9_63:55;
756#endif
757 } cn68xx;
758};
759
760union cvmx_iob_to_ncb_did_00_credits {
761 uint64_t u64;
762 struct cvmx_iob_to_ncb_did_00_credits_s {
763#ifdef __BIG_ENDIAN_BITFIELD
764 uint64_t reserved_7_63:57;
765 uint64_t crd:7;
766#else
767 uint64_t crd:7;
768 uint64_t reserved_7_63:57;
769#endif
770 } s;
771};
772
773union cvmx_iob_to_ncb_did_111_credits {
774 uint64_t u64;
775 struct cvmx_iob_to_ncb_did_111_credits_s {
776#ifdef __BIG_ENDIAN_BITFIELD
777 uint64_t reserved_7_63:57;
778 uint64_t crd:7;
779#else
780 uint64_t crd:7;
781 uint64_t reserved_7_63:57;
782#endif
783 } s;
784};
785
786union cvmx_iob_to_ncb_did_223_credits {
787 uint64_t u64;
788 struct cvmx_iob_to_ncb_did_223_credits_s {
789#ifdef __BIG_ENDIAN_BITFIELD
790 uint64_t reserved_7_63:57;
791 uint64_t crd:7;
792#else
793 uint64_t crd:7;
794 uint64_t reserved_7_63:57;
795#endif
796 } s;
797};
798
799union cvmx_iob_to_ncb_did_24_credits {
800 uint64_t u64;
801 struct cvmx_iob_to_ncb_did_24_credits_s {
802#ifdef __BIG_ENDIAN_BITFIELD
803 uint64_t reserved_7_63:57;
804 uint64_t crd:7;
805#else
806 uint64_t crd:7;
807 uint64_t reserved_7_63:57;
808#endif
809 } s;
810};
811
812union cvmx_iob_to_ncb_did_32_credits {
813 uint64_t u64;
814 struct cvmx_iob_to_ncb_did_32_credits_s {
815#ifdef __BIG_ENDIAN_BITFIELD
816 uint64_t reserved_7_63:57;
817 uint64_t crd:7;
818#else
819 uint64_t crd:7;
820 uint64_t reserved_7_63:57;
821#endif
822 } s;
823};
824
825union cvmx_iob_to_ncb_did_40_credits {
826 uint64_t u64;
827 struct cvmx_iob_to_ncb_did_40_credits_s {
828#ifdef __BIG_ENDIAN_BITFIELD
829 uint64_t reserved_7_63:57;
830 uint64_t crd:7;
831#else
832 uint64_t crd:7;
833 uint64_t reserved_7_63:57;
834#endif
835 } s;
836};
837
838union cvmx_iob_to_ncb_did_55_credits {
839 uint64_t u64;
840 struct cvmx_iob_to_ncb_did_55_credits_s {
841#ifdef __BIG_ENDIAN_BITFIELD
842 uint64_t reserved_7_63:57;
843 uint64_t crd:7;
844#else
845 uint64_t crd:7;
846 uint64_t reserved_7_63:57;
847#endif
848 } s;
849};
850
851union cvmx_iob_to_ncb_did_64_credits {
852 uint64_t u64;
853 struct cvmx_iob_to_ncb_did_64_credits_s {
854#ifdef __BIG_ENDIAN_BITFIELD
855 uint64_t reserved_7_63:57;
856 uint64_t crd:7;
857#else
858 uint64_t crd:7;
859 uint64_t reserved_7_63:57;
860#endif
861 } s;
862};
863
864union cvmx_iob_to_ncb_did_79_credits {
865 uint64_t u64;
866 struct cvmx_iob_to_ncb_did_79_credits_s {
867#ifdef __BIG_ENDIAN_BITFIELD
868 uint64_t reserved_7_63:57;
869 uint64_t crd:7;
870#else
871 uint64_t crd:7;
872 uint64_t reserved_7_63:57;
873#endif
874 } s;
875};
876
877union cvmx_iob_to_ncb_did_96_credits {
878 uint64_t u64;
879 struct cvmx_iob_to_ncb_did_96_credits_s {
880#ifdef __BIG_ENDIAN_BITFIELD
881 uint64_t reserved_7_63:57;
882 uint64_t crd:7;
883#else
884 uint64_t crd:7;
885 uint64_t reserved_7_63:57;
886#endif
887 } s;
888};
889
890union cvmx_iob_to_ncb_did_98_credits {
891 uint64_t u64;
892 struct cvmx_iob_to_ncb_did_98_credits_s {
893#ifdef __BIG_ENDIAN_BITFIELD
894 uint64_t reserved_7_63:57;
895 uint64_t crd:7;
896#else
897 uint64_t crd:7;
898 uint64_t reserved_7_63:57;
899#endif
900 } s;
901};
902
903#endif
1/***********************license start***************
2 * Author: Cavium Networks
3 *
4 * Contact: support@caviumnetworks.com
5 * This file is part of the OCTEON SDK
6 *
7 * Copyright (c) 2003-2012 Cavium Networks
8 *
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more
17 * details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this file; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * or visit http://www.gnu.org/licenses/.
23 *
24 * This file may also be available under a different license from Cavium.
25 * Contact Cavium Networks for more information
26 ***********************license end**************************************/
27
28#ifndef __CVMX_IOB_DEFS_H__
29#define __CVMX_IOB_DEFS_H__
30
31#define CVMX_IOB_BIST_STATUS (CVMX_ADD_IO_SEG(0x00011800F00007F8ull))
32#define CVMX_IOB_CTL_STATUS (CVMX_ADD_IO_SEG(0x00011800F0000050ull))
33#define CVMX_IOB_DWB_PRI_CNT (CVMX_ADD_IO_SEG(0x00011800F0000028ull))
34#define CVMX_IOB_FAU_TIMEOUT (CVMX_ADD_IO_SEG(0x00011800F0000000ull))
35#define CVMX_IOB_I2C_PRI_CNT (CVMX_ADD_IO_SEG(0x00011800F0000010ull))
36#define CVMX_IOB_INB_CONTROL_MATCH (CVMX_ADD_IO_SEG(0x00011800F0000078ull))
37#define CVMX_IOB_INB_CONTROL_MATCH_ENB (CVMX_ADD_IO_SEG(0x00011800F0000088ull))
38#define CVMX_IOB_INB_DATA_MATCH (CVMX_ADD_IO_SEG(0x00011800F0000070ull))
39#define CVMX_IOB_INB_DATA_MATCH_ENB (CVMX_ADD_IO_SEG(0x00011800F0000080ull))
40#define CVMX_IOB_INT_ENB (CVMX_ADD_IO_SEG(0x00011800F0000060ull))
41#define CVMX_IOB_INT_SUM (CVMX_ADD_IO_SEG(0x00011800F0000058ull))
42#define CVMX_IOB_N2C_L2C_PRI_CNT (CVMX_ADD_IO_SEG(0x00011800F0000020ull))
43#define CVMX_IOB_N2C_RSP_PRI_CNT (CVMX_ADD_IO_SEG(0x00011800F0000008ull))
44#define CVMX_IOB_OUTB_COM_PRI_CNT (CVMX_ADD_IO_SEG(0x00011800F0000040ull))
45#define CVMX_IOB_OUTB_CONTROL_MATCH (CVMX_ADD_IO_SEG(0x00011800F0000098ull))
46#define CVMX_IOB_OUTB_CONTROL_MATCH_ENB (CVMX_ADD_IO_SEG(0x00011800F00000A8ull))
47#define CVMX_IOB_OUTB_DATA_MATCH (CVMX_ADD_IO_SEG(0x00011800F0000090ull))
48#define CVMX_IOB_OUTB_DATA_MATCH_ENB (CVMX_ADD_IO_SEG(0x00011800F00000A0ull))
49#define CVMX_IOB_OUTB_FPA_PRI_CNT (CVMX_ADD_IO_SEG(0x00011800F0000048ull))
50#define CVMX_IOB_OUTB_REQ_PRI_CNT (CVMX_ADD_IO_SEG(0x00011800F0000038ull))
51#define CVMX_IOB_P2C_REQ_PRI_CNT (CVMX_ADD_IO_SEG(0x00011800F0000018ull))
52#define CVMX_IOB_PKT_ERR (CVMX_ADD_IO_SEG(0x00011800F0000068ull))
53#define CVMX_IOB_TO_CMB_CREDITS (CVMX_ADD_IO_SEG(0x00011800F00000B0ull))
54#define CVMX_IOB_TO_NCB_DID_00_CREDITS (CVMX_ADD_IO_SEG(0x00011800F0000800ull))
55#define CVMX_IOB_TO_NCB_DID_111_CREDITS (CVMX_ADD_IO_SEG(0x00011800F0000B78ull))
56#define CVMX_IOB_TO_NCB_DID_223_CREDITS (CVMX_ADD_IO_SEG(0x00011800F0000EF8ull))
57#define CVMX_IOB_TO_NCB_DID_24_CREDITS (CVMX_ADD_IO_SEG(0x00011800F00008C0ull))
58#define CVMX_IOB_TO_NCB_DID_32_CREDITS (CVMX_ADD_IO_SEG(0x00011800F0000900ull))
59#define CVMX_IOB_TO_NCB_DID_40_CREDITS (CVMX_ADD_IO_SEG(0x00011800F0000940ull))
60#define CVMX_IOB_TO_NCB_DID_55_CREDITS (CVMX_ADD_IO_SEG(0x00011800F00009B8ull))
61#define CVMX_IOB_TO_NCB_DID_64_CREDITS (CVMX_ADD_IO_SEG(0x00011800F0000A00ull))
62#define CVMX_IOB_TO_NCB_DID_79_CREDITS (CVMX_ADD_IO_SEG(0x00011800F0000A78ull))
63#define CVMX_IOB_TO_NCB_DID_96_CREDITS (CVMX_ADD_IO_SEG(0x00011800F0000B00ull))
64#define CVMX_IOB_TO_NCB_DID_98_CREDITS (CVMX_ADD_IO_SEG(0x00011800F0000B10ull))
65
66union cvmx_iob_bist_status {
67 uint64_t u64;
68 struct cvmx_iob_bist_status_s {
69#ifdef __BIG_ENDIAN_BITFIELD
70 uint64_t reserved_2_63:62;
71 uint64_t ibd:1;
72 uint64_t icd:1;
73#else
74 uint64_t icd:1;
75 uint64_t ibd:1;
76 uint64_t reserved_2_63:62;
77#endif
78 } s;
79 struct cvmx_iob_bist_status_cn30xx {
80#ifdef __BIG_ENDIAN_BITFIELD
81 uint64_t reserved_18_63:46;
82 uint64_t icnrcb:1;
83 uint64_t icr0:1;
84 uint64_t icr1:1;
85 uint64_t icnr1:1;
86 uint64_t icnr0:1;
87 uint64_t ibdr0:1;
88 uint64_t ibdr1:1;
89 uint64_t ibr0:1;
90 uint64_t ibr1:1;
91 uint64_t icnrt:1;
92 uint64_t ibrq0:1;
93 uint64_t ibrq1:1;
94 uint64_t icrn0:1;
95 uint64_t icrn1:1;
96 uint64_t icrp0:1;
97 uint64_t icrp1:1;
98 uint64_t ibd:1;
99 uint64_t icd:1;
100#else
101 uint64_t icd:1;
102 uint64_t ibd:1;
103 uint64_t icrp1:1;
104 uint64_t icrp0:1;
105 uint64_t icrn1:1;
106 uint64_t icrn0:1;
107 uint64_t ibrq1:1;
108 uint64_t ibrq0:1;
109 uint64_t icnrt:1;
110 uint64_t ibr1:1;
111 uint64_t ibr0:1;
112 uint64_t ibdr1:1;
113 uint64_t ibdr0:1;
114 uint64_t icnr0:1;
115 uint64_t icnr1:1;
116 uint64_t icr1:1;
117 uint64_t icr0:1;
118 uint64_t icnrcb:1;
119 uint64_t reserved_18_63:46;
120#endif
121 } cn30xx;
122 struct cvmx_iob_bist_status_cn30xx cn31xx;
123 struct cvmx_iob_bist_status_cn30xx cn38xx;
124 struct cvmx_iob_bist_status_cn30xx cn38xxp2;
125 struct cvmx_iob_bist_status_cn30xx cn50xx;
126 struct cvmx_iob_bist_status_cn30xx cn52xx;
127 struct cvmx_iob_bist_status_cn30xx cn52xxp1;
128 struct cvmx_iob_bist_status_cn30xx cn56xx;
129 struct cvmx_iob_bist_status_cn30xx cn56xxp1;
130 struct cvmx_iob_bist_status_cn30xx cn58xx;
131 struct cvmx_iob_bist_status_cn30xx cn58xxp1;
132 struct cvmx_iob_bist_status_cn61xx {
133#ifdef __BIG_ENDIAN_BITFIELD
134 uint64_t reserved_23_63:41;
135 uint64_t xmdfif:1;
136 uint64_t xmcfif:1;
137 uint64_t iorfif:1;
138 uint64_t rsdfif:1;
139 uint64_t iocfif:1;
140 uint64_t icnrcb:1;
141 uint64_t icr0:1;
142 uint64_t icr1:1;
143 uint64_t icnr1:1;
144 uint64_t icnr0:1;
145 uint64_t ibdr0:1;
146 uint64_t ibdr1:1;
147 uint64_t ibr0:1;
148 uint64_t ibr1:1;
149 uint64_t icnrt:1;
150 uint64_t ibrq0:1;
151 uint64_t ibrq1:1;
152 uint64_t icrn0:1;
153 uint64_t icrn1:1;
154 uint64_t icrp0:1;
155 uint64_t icrp1:1;
156 uint64_t ibd:1;
157 uint64_t icd:1;
158#else
159 uint64_t icd:1;
160 uint64_t ibd:1;
161 uint64_t icrp1:1;
162 uint64_t icrp0:1;
163 uint64_t icrn1:1;
164 uint64_t icrn0:1;
165 uint64_t ibrq1:1;
166 uint64_t ibrq0:1;
167 uint64_t icnrt:1;
168 uint64_t ibr1:1;
169 uint64_t ibr0:1;
170 uint64_t ibdr1:1;
171 uint64_t ibdr0:1;
172 uint64_t icnr0:1;
173 uint64_t icnr1:1;
174 uint64_t icr1:1;
175 uint64_t icr0:1;
176 uint64_t icnrcb:1;
177 uint64_t iocfif:1;
178 uint64_t rsdfif:1;
179 uint64_t iorfif:1;
180 uint64_t xmcfif:1;
181 uint64_t xmdfif:1;
182 uint64_t reserved_23_63:41;
183#endif
184 } cn61xx;
185 struct cvmx_iob_bist_status_cn61xx cn63xx;
186 struct cvmx_iob_bist_status_cn61xx cn63xxp1;
187 struct cvmx_iob_bist_status_cn61xx cn66xx;
188 struct cvmx_iob_bist_status_cn68xx {
189#ifdef __BIG_ENDIAN_BITFIELD
190 uint64_t reserved_18_63:46;
191 uint64_t xmdfif:1;
192 uint64_t xmcfif:1;
193 uint64_t iorfif:1;
194 uint64_t rsdfif:1;
195 uint64_t iocfif:1;
196 uint64_t icnrcb:1;
197 uint64_t icr0:1;
198 uint64_t icr1:1;
199 uint64_t icnr0:1;
200 uint64_t ibr0:1;
201 uint64_t ibr1:1;
202 uint64_t icnrt:1;
203 uint64_t ibrq0:1;
204 uint64_t ibrq1:1;
205 uint64_t icrn0:1;
206 uint64_t icrn1:1;
207 uint64_t ibd:1;
208 uint64_t icd:1;
209#else
210 uint64_t icd:1;
211 uint64_t ibd:1;
212 uint64_t icrn1:1;
213 uint64_t icrn0:1;
214 uint64_t ibrq1:1;
215 uint64_t ibrq0:1;
216 uint64_t icnrt:1;
217 uint64_t ibr1:1;
218 uint64_t ibr0:1;
219 uint64_t icnr0:1;
220 uint64_t icr1:1;
221 uint64_t icr0:1;
222 uint64_t icnrcb:1;
223 uint64_t iocfif:1;
224 uint64_t rsdfif:1;
225 uint64_t iorfif:1;
226 uint64_t xmcfif:1;
227 uint64_t xmdfif:1;
228 uint64_t reserved_18_63:46;
229#endif
230 } cn68xx;
231 struct cvmx_iob_bist_status_cn68xx cn68xxp1;
232 struct cvmx_iob_bist_status_cn61xx cnf71xx;
233};
234
235union cvmx_iob_ctl_status {
236 uint64_t u64;
237 struct cvmx_iob_ctl_status_s {
238#ifdef __BIG_ENDIAN_BITFIELD
239 uint64_t reserved_11_63:53;
240 uint64_t fif_dly:1;
241 uint64_t xmc_per:4;
242 uint64_t reserved_5_5:1;
243 uint64_t outb_mat:1;
244 uint64_t inb_mat:1;
245 uint64_t pko_enb:1;
246 uint64_t dwb_enb:1;
247 uint64_t fau_end:1;
248#else
249 uint64_t fau_end:1;
250 uint64_t dwb_enb:1;
251 uint64_t pko_enb:1;
252 uint64_t inb_mat:1;
253 uint64_t outb_mat:1;
254 uint64_t reserved_5_5:1;
255 uint64_t xmc_per:4;
256 uint64_t fif_dly:1;
257 uint64_t reserved_11_63:53;
258#endif
259 } s;
260 struct cvmx_iob_ctl_status_cn30xx {
261#ifdef __BIG_ENDIAN_BITFIELD
262 uint64_t reserved_5_63:59;
263 uint64_t outb_mat:1;
264 uint64_t inb_mat:1;
265 uint64_t pko_enb:1;
266 uint64_t dwb_enb:1;
267 uint64_t fau_end:1;
268#else
269 uint64_t fau_end:1;
270 uint64_t dwb_enb:1;
271 uint64_t pko_enb:1;
272 uint64_t inb_mat:1;
273 uint64_t outb_mat:1;
274 uint64_t reserved_5_63:59;
275#endif
276 } cn30xx;
277 struct cvmx_iob_ctl_status_cn30xx cn31xx;
278 struct cvmx_iob_ctl_status_cn30xx cn38xx;
279 struct cvmx_iob_ctl_status_cn30xx cn38xxp2;
280 struct cvmx_iob_ctl_status_cn30xx cn50xx;
281 struct cvmx_iob_ctl_status_cn52xx {
282#ifdef __BIG_ENDIAN_BITFIELD
283 uint64_t reserved_6_63:58;
284 uint64_t rr_mode:1;
285 uint64_t outb_mat:1;
286 uint64_t inb_mat:1;
287 uint64_t pko_enb:1;
288 uint64_t dwb_enb:1;
289 uint64_t fau_end:1;
290#else
291 uint64_t fau_end:1;
292 uint64_t dwb_enb:1;
293 uint64_t pko_enb:1;
294 uint64_t inb_mat:1;
295 uint64_t outb_mat:1;
296 uint64_t rr_mode:1;
297 uint64_t reserved_6_63:58;
298#endif
299 } cn52xx;
300 struct cvmx_iob_ctl_status_cn30xx cn52xxp1;
301 struct cvmx_iob_ctl_status_cn30xx cn56xx;
302 struct cvmx_iob_ctl_status_cn30xx cn56xxp1;
303 struct cvmx_iob_ctl_status_cn30xx cn58xx;
304 struct cvmx_iob_ctl_status_cn30xx cn58xxp1;
305 struct cvmx_iob_ctl_status_cn61xx {
306#ifdef __BIG_ENDIAN_BITFIELD
307 uint64_t reserved_11_63:53;
308 uint64_t fif_dly:1;
309 uint64_t xmc_per:4;
310 uint64_t rr_mode:1;
311 uint64_t outb_mat:1;
312 uint64_t inb_mat:1;
313 uint64_t pko_enb:1;
314 uint64_t dwb_enb:1;
315 uint64_t fau_end:1;
316#else
317 uint64_t fau_end:1;
318 uint64_t dwb_enb:1;
319 uint64_t pko_enb:1;
320 uint64_t inb_mat:1;
321 uint64_t outb_mat:1;
322 uint64_t rr_mode:1;
323 uint64_t xmc_per:4;
324 uint64_t fif_dly:1;
325 uint64_t reserved_11_63:53;
326#endif
327 } cn61xx;
328 struct cvmx_iob_ctl_status_cn63xx {
329#ifdef __BIG_ENDIAN_BITFIELD
330 uint64_t reserved_10_63:54;
331 uint64_t xmc_per:4;
332 uint64_t rr_mode:1;
333 uint64_t outb_mat:1;
334 uint64_t inb_mat:1;
335 uint64_t pko_enb:1;
336 uint64_t dwb_enb:1;
337 uint64_t fau_end:1;
338#else
339 uint64_t fau_end:1;
340 uint64_t dwb_enb:1;
341 uint64_t pko_enb:1;
342 uint64_t inb_mat:1;
343 uint64_t outb_mat:1;
344 uint64_t rr_mode:1;
345 uint64_t xmc_per:4;
346 uint64_t reserved_10_63:54;
347#endif
348 } cn63xx;
349 struct cvmx_iob_ctl_status_cn63xx cn63xxp1;
350 struct cvmx_iob_ctl_status_cn61xx cn66xx;
351 struct cvmx_iob_ctl_status_cn68xx {
352#ifdef __BIG_ENDIAN_BITFIELD
353 uint64_t reserved_11_63:53;
354 uint64_t fif_dly:1;
355 uint64_t xmc_per:4;
356 uint64_t rsvr5:1;
357 uint64_t outb_mat:1;
358 uint64_t inb_mat:1;
359 uint64_t pko_enb:1;
360 uint64_t dwb_enb:1;
361 uint64_t fau_end:1;
362#else
363 uint64_t fau_end:1;
364 uint64_t dwb_enb:1;
365 uint64_t pko_enb:1;
366 uint64_t inb_mat:1;
367 uint64_t outb_mat:1;
368 uint64_t rsvr5:1;
369 uint64_t xmc_per:4;
370 uint64_t fif_dly:1;
371 uint64_t reserved_11_63:53;
372#endif
373 } cn68xx;
374 struct cvmx_iob_ctl_status_cn68xx cn68xxp1;
375 struct cvmx_iob_ctl_status_cn61xx cnf71xx;
376};
377
378union cvmx_iob_dwb_pri_cnt {
379 uint64_t u64;
380 struct cvmx_iob_dwb_pri_cnt_s {
381#ifdef __BIG_ENDIAN_BITFIELD
382 uint64_t reserved_16_63:48;
383 uint64_t cnt_enb:1;
384 uint64_t cnt_val:15;
385#else
386 uint64_t cnt_val:15;
387 uint64_t cnt_enb:1;
388 uint64_t reserved_16_63:48;
389#endif
390 } s;
391 struct cvmx_iob_dwb_pri_cnt_s cn38xx;
392 struct cvmx_iob_dwb_pri_cnt_s cn38xxp2;
393 struct cvmx_iob_dwb_pri_cnt_s cn52xx;
394 struct cvmx_iob_dwb_pri_cnt_s cn52xxp1;
395 struct cvmx_iob_dwb_pri_cnt_s cn56xx;
396 struct cvmx_iob_dwb_pri_cnt_s cn56xxp1;
397 struct cvmx_iob_dwb_pri_cnt_s cn58xx;
398 struct cvmx_iob_dwb_pri_cnt_s cn58xxp1;
399 struct cvmx_iob_dwb_pri_cnt_s cn61xx;
400 struct cvmx_iob_dwb_pri_cnt_s cn63xx;
401 struct cvmx_iob_dwb_pri_cnt_s cn63xxp1;
402 struct cvmx_iob_dwb_pri_cnt_s cn66xx;
403 struct cvmx_iob_dwb_pri_cnt_s cnf71xx;
404};
405
406union cvmx_iob_fau_timeout {
407 uint64_t u64;
408 struct cvmx_iob_fau_timeout_s {
409#ifdef __BIG_ENDIAN_BITFIELD
410 uint64_t reserved_13_63:51;
411 uint64_t tout_enb:1;
412 uint64_t tout_val:12;
413#else
414 uint64_t tout_val:12;
415 uint64_t tout_enb:1;
416 uint64_t reserved_13_63:51;
417#endif
418 } s;
419 struct cvmx_iob_fau_timeout_s cn30xx;
420 struct cvmx_iob_fau_timeout_s cn31xx;
421 struct cvmx_iob_fau_timeout_s cn38xx;
422 struct cvmx_iob_fau_timeout_s cn38xxp2;
423 struct cvmx_iob_fau_timeout_s cn50xx;
424 struct cvmx_iob_fau_timeout_s cn52xx;
425 struct cvmx_iob_fau_timeout_s cn52xxp1;
426 struct cvmx_iob_fau_timeout_s cn56xx;
427 struct cvmx_iob_fau_timeout_s cn56xxp1;
428 struct cvmx_iob_fau_timeout_s cn58xx;
429 struct cvmx_iob_fau_timeout_s cn58xxp1;
430 struct cvmx_iob_fau_timeout_s cn61xx;
431 struct cvmx_iob_fau_timeout_s cn63xx;
432 struct cvmx_iob_fau_timeout_s cn63xxp1;
433 struct cvmx_iob_fau_timeout_s cn66xx;
434 struct cvmx_iob_fau_timeout_s cn68xx;
435 struct cvmx_iob_fau_timeout_s cn68xxp1;
436 struct cvmx_iob_fau_timeout_s cnf71xx;
437};
438
439union cvmx_iob_i2c_pri_cnt {
440 uint64_t u64;
441 struct cvmx_iob_i2c_pri_cnt_s {
442#ifdef __BIG_ENDIAN_BITFIELD
443 uint64_t reserved_16_63:48;
444 uint64_t cnt_enb:1;
445 uint64_t cnt_val:15;
446#else
447 uint64_t cnt_val:15;
448 uint64_t cnt_enb:1;
449 uint64_t reserved_16_63:48;
450#endif
451 } s;
452 struct cvmx_iob_i2c_pri_cnt_s cn38xx;
453 struct cvmx_iob_i2c_pri_cnt_s cn38xxp2;
454 struct cvmx_iob_i2c_pri_cnt_s cn52xx;
455 struct cvmx_iob_i2c_pri_cnt_s cn52xxp1;
456 struct cvmx_iob_i2c_pri_cnt_s cn56xx;
457 struct cvmx_iob_i2c_pri_cnt_s cn56xxp1;
458 struct cvmx_iob_i2c_pri_cnt_s cn58xx;
459 struct cvmx_iob_i2c_pri_cnt_s cn58xxp1;
460 struct cvmx_iob_i2c_pri_cnt_s cn61xx;
461 struct cvmx_iob_i2c_pri_cnt_s cn63xx;
462 struct cvmx_iob_i2c_pri_cnt_s cn63xxp1;
463 struct cvmx_iob_i2c_pri_cnt_s cn66xx;
464 struct cvmx_iob_i2c_pri_cnt_s cnf71xx;
465};
466
467union cvmx_iob_inb_control_match {
468 uint64_t u64;
469 struct cvmx_iob_inb_control_match_s {
470#ifdef __BIG_ENDIAN_BITFIELD
471 uint64_t reserved_29_63:35;
472 uint64_t mask:8;
473 uint64_t opc:4;
474 uint64_t dst:9;
475 uint64_t src:8;
476#else
477 uint64_t src:8;
478 uint64_t dst:9;
479 uint64_t opc:4;
480 uint64_t mask:8;
481 uint64_t reserved_29_63:35;
482#endif
483 } s;
484 struct cvmx_iob_inb_control_match_s cn30xx;
485 struct cvmx_iob_inb_control_match_s cn31xx;
486 struct cvmx_iob_inb_control_match_s cn38xx;
487 struct cvmx_iob_inb_control_match_s cn38xxp2;
488 struct cvmx_iob_inb_control_match_s cn50xx;
489 struct cvmx_iob_inb_control_match_s cn52xx;
490 struct cvmx_iob_inb_control_match_s cn52xxp1;
491 struct cvmx_iob_inb_control_match_s cn56xx;
492 struct cvmx_iob_inb_control_match_s cn56xxp1;
493 struct cvmx_iob_inb_control_match_s cn58xx;
494 struct cvmx_iob_inb_control_match_s cn58xxp1;
495 struct cvmx_iob_inb_control_match_s cn61xx;
496 struct cvmx_iob_inb_control_match_s cn63xx;
497 struct cvmx_iob_inb_control_match_s cn63xxp1;
498 struct cvmx_iob_inb_control_match_s cn66xx;
499 struct cvmx_iob_inb_control_match_s cn68xx;
500 struct cvmx_iob_inb_control_match_s cn68xxp1;
501 struct cvmx_iob_inb_control_match_s cnf71xx;
502};
503
504union cvmx_iob_inb_control_match_enb {
505 uint64_t u64;
506 struct cvmx_iob_inb_control_match_enb_s {
507#ifdef __BIG_ENDIAN_BITFIELD
508 uint64_t reserved_29_63:35;
509 uint64_t mask:8;
510 uint64_t opc:4;
511 uint64_t dst:9;
512 uint64_t src:8;
513#else
514 uint64_t src:8;
515 uint64_t dst:9;
516 uint64_t opc:4;
517 uint64_t mask:8;
518 uint64_t reserved_29_63:35;
519#endif
520 } s;
521 struct cvmx_iob_inb_control_match_enb_s cn30xx;
522 struct cvmx_iob_inb_control_match_enb_s cn31xx;
523 struct cvmx_iob_inb_control_match_enb_s cn38xx;
524 struct cvmx_iob_inb_control_match_enb_s cn38xxp2;
525 struct cvmx_iob_inb_control_match_enb_s cn50xx;
526 struct cvmx_iob_inb_control_match_enb_s cn52xx;
527 struct cvmx_iob_inb_control_match_enb_s cn52xxp1;
528 struct cvmx_iob_inb_control_match_enb_s cn56xx;
529 struct cvmx_iob_inb_control_match_enb_s cn56xxp1;
530 struct cvmx_iob_inb_control_match_enb_s cn58xx;
531 struct cvmx_iob_inb_control_match_enb_s cn58xxp1;
532 struct cvmx_iob_inb_control_match_enb_s cn61xx;
533 struct cvmx_iob_inb_control_match_enb_s cn63xx;
534 struct cvmx_iob_inb_control_match_enb_s cn63xxp1;
535 struct cvmx_iob_inb_control_match_enb_s cn66xx;
536 struct cvmx_iob_inb_control_match_enb_s cn68xx;
537 struct cvmx_iob_inb_control_match_enb_s cn68xxp1;
538 struct cvmx_iob_inb_control_match_enb_s cnf71xx;
539};
540
541union cvmx_iob_inb_data_match {
542 uint64_t u64;
543 struct cvmx_iob_inb_data_match_s {
544#ifdef __BIG_ENDIAN_BITFIELD
545 uint64_t data:64;
546#else
547 uint64_t data:64;
548#endif
549 } s;
550 struct cvmx_iob_inb_data_match_s cn30xx;
551 struct cvmx_iob_inb_data_match_s cn31xx;
552 struct cvmx_iob_inb_data_match_s cn38xx;
553 struct cvmx_iob_inb_data_match_s cn38xxp2;
554 struct cvmx_iob_inb_data_match_s cn50xx;
555 struct cvmx_iob_inb_data_match_s cn52xx;
556 struct cvmx_iob_inb_data_match_s cn52xxp1;
557 struct cvmx_iob_inb_data_match_s cn56xx;
558 struct cvmx_iob_inb_data_match_s cn56xxp1;
559 struct cvmx_iob_inb_data_match_s cn58xx;
560 struct cvmx_iob_inb_data_match_s cn58xxp1;
561 struct cvmx_iob_inb_data_match_s cn61xx;
562 struct cvmx_iob_inb_data_match_s cn63xx;
563 struct cvmx_iob_inb_data_match_s cn63xxp1;
564 struct cvmx_iob_inb_data_match_s cn66xx;
565 struct cvmx_iob_inb_data_match_s cn68xx;
566 struct cvmx_iob_inb_data_match_s cn68xxp1;
567 struct cvmx_iob_inb_data_match_s cnf71xx;
568};
569
570union cvmx_iob_inb_data_match_enb {
571 uint64_t u64;
572 struct cvmx_iob_inb_data_match_enb_s {
573#ifdef __BIG_ENDIAN_BITFIELD
574 uint64_t data:64;
575#else
576 uint64_t data:64;
577#endif
578 } s;
579 struct cvmx_iob_inb_data_match_enb_s cn30xx;
580 struct cvmx_iob_inb_data_match_enb_s cn31xx;
581 struct cvmx_iob_inb_data_match_enb_s cn38xx;
582 struct cvmx_iob_inb_data_match_enb_s cn38xxp2;
583 struct cvmx_iob_inb_data_match_enb_s cn50xx;
584 struct cvmx_iob_inb_data_match_enb_s cn52xx;
585 struct cvmx_iob_inb_data_match_enb_s cn52xxp1;
586 struct cvmx_iob_inb_data_match_enb_s cn56xx;
587 struct cvmx_iob_inb_data_match_enb_s cn56xxp1;
588 struct cvmx_iob_inb_data_match_enb_s cn58xx;
589 struct cvmx_iob_inb_data_match_enb_s cn58xxp1;
590 struct cvmx_iob_inb_data_match_enb_s cn61xx;
591 struct cvmx_iob_inb_data_match_enb_s cn63xx;
592 struct cvmx_iob_inb_data_match_enb_s cn63xxp1;
593 struct cvmx_iob_inb_data_match_enb_s cn66xx;
594 struct cvmx_iob_inb_data_match_enb_s cn68xx;
595 struct cvmx_iob_inb_data_match_enb_s cn68xxp1;
596 struct cvmx_iob_inb_data_match_enb_s cnf71xx;
597};
598
599union cvmx_iob_int_enb {
600 uint64_t u64;
601 struct cvmx_iob_int_enb_s {
602#ifdef __BIG_ENDIAN_BITFIELD
603 uint64_t reserved_6_63:58;
604 uint64_t p_dat:1;
605 uint64_t np_dat:1;
606 uint64_t p_eop:1;
607 uint64_t p_sop:1;
608 uint64_t np_eop:1;
609 uint64_t np_sop:1;
610#else
611 uint64_t np_sop:1;
612 uint64_t np_eop:1;
613 uint64_t p_sop:1;
614 uint64_t p_eop:1;
615 uint64_t np_dat:1;
616 uint64_t p_dat:1;
617 uint64_t reserved_6_63:58;
618#endif
619 } s;
620 struct cvmx_iob_int_enb_cn30xx {
621#ifdef __BIG_ENDIAN_BITFIELD
622 uint64_t reserved_4_63:60;
623 uint64_t p_eop:1;
624 uint64_t p_sop:1;
625 uint64_t np_eop:1;
626 uint64_t np_sop:1;
627#else
628 uint64_t np_sop:1;
629 uint64_t np_eop:1;
630 uint64_t p_sop:1;
631 uint64_t p_eop:1;
632 uint64_t reserved_4_63:60;
633#endif
634 } cn30xx;
635 struct cvmx_iob_int_enb_cn30xx cn31xx;
636 struct cvmx_iob_int_enb_cn30xx cn38xx;
637 struct cvmx_iob_int_enb_cn30xx cn38xxp2;
638 struct cvmx_iob_int_enb_s cn50xx;
639 struct cvmx_iob_int_enb_s cn52xx;
640 struct cvmx_iob_int_enb_s cn52xxp1;
641 struct cvmx_iob_int_enb_s cn56xx;
642 struct cvmx_iob_int_enb_s cn56xxp1;
643 struct cvmx_iob_int_enb_s cn58xx;
644 struct cvmx_iob_int_enb_s cn58xxp1;
645 struct cvmx_iob_int_enb_s cn61xx;
646 struct cvmx_iob_int_enb_s cn63xx;
647 struct cvmx_iob_int_enb_s cn63xxp1;
648 struct cvmx_iob_int_enb_s cn66xx;
649 struct cvmx_iob_int_enb_cn68xx {
650#ifdef __BIG_ENDIAN_BITFIELD
651 uint64_t reserved_0_63:64;
652#else
653 uint64_t reserved_0_63:64;
654#endif
655 } cn68xx;
656 struct cvmx_iob_int_enb_cn68xx cn68xxp1;
657 struct cvmx_iob_int_enb_s cnf71xx;
658};
659
660union cvmx_iob_int_sum {
661 uint64_t u64;
662 struct cvmx_iob_int_sum_s {
663#ifdef __BIG_ENDIAN_BITFIELD
664 uint64_t reserved_6_63:58;
665 uint64_t p_dat:1;
666 uint64_t np_dat:1;
667 uint64_t p_eop:1;
668 uint64_t p_sop:1;
669 uint64_t np_eop:1;
670 uint64_t np_sop:1;
671#else
672 uint64_t np_sop:1;
673 uint64_t np_eop:1;
674 uint64_t p_sop:1;
675 uint64_t p_eop:1;
676 uint64_t np_dat:1;
677 uint64_t p_dat:1;
678 uint64_t reserved_6_63:58;
679#endif
680 } s;
681 struct cvmx_iob_int_sum_cn30xx {
682#ifdef __BIG_ENDIAN_BITFIELD
683 uint64_t reserved_4_63:60;
684 uint64_t p_eop:1;
685 uint64_t p_sop:1;
686 uint64_t np_eop:1;
687 uint64_t np_sop:1;
688#else
689 uint64_t np_sop:1;
690 uint64_t np_eop:1;
691 uint64_t p_sop:1;
692 uint64_t p_eop:1;
693 uint64_t reserved_4_63:60;
694#endif
695 } cn30xx;
696 struct cvmx_iob_int_sum_cn30xx cn31xx;
697 struct cvmx_iob_int_sum_cn30xx cn38xx;
698 struct cvmx_iob_int_sum_cn30xx cn38xxp2;
699 struct cvmx_iob_int_sum_s cn50xx;
700 struct cvmx_iob_int_sum_s cn52xx;
701 struct cvmx_iob_int_sum_s cn52xxp1;
702 struct cvmx_iob_int_sum_s cn56xx;
703 struct cvmx_iob_int_sum_s cn56xxp1;
704 struct cvmx_iob_int_sum_s cn58xx;
705 struct cvmx_iob_int_sum_s cn58xxp1;
706 struct cvmx_iob_int_sum_s cn61xx;
707 struct cvmx_iob_int_sum_s cn63xx;
708 struct cvmx_iob_int_sum_s cn63xxp1;
709 struct cvmx_iob_int_sum_s cn66xx;
710 struct cvmx_iob_int_sum_cn68xx {
711#ifdef __BIG_ENDIAN_BITFIELD
712 uint64_t reserved_0_63:64;
713#else
714 uint64_t reserved_0_63:64;
715#endif
716 } cn68xx;
717 struct cvmx_iob_int_sum_cn68xx cn68xxp1;
718 struct cvmx_iob_int_sum_s cnf71xx;
719};
720
721union cvmx_iob_n2c_l2c_pri_cnt {
722 uint64_t u64;
723 struct cvmx_iob_n2c_l2c_pri_cnt_s {
724#ifdef __BIG_ENDIAN_BITFIELD
725 uint64_t reserved_16_63:48;
726 uint64_t cnt_enb:1;
727 uint64_t cnt_val:15;
728#else
729 uint64_t cnt_val:15;
730 uint64_t cnt_enb:1;
731 uint64_t reserved_16_63:48;
732#endif
733 } s;
734 struct cvmx_iob_n2c_l2c_pri_cnt_s cn38xx;
735 struct cvmx_iob_n2c_l2c_pri_cnt_s cn38xxp2;
736 struct cvmx_iob_n2c_l2c_pri_cnt_s cn52xx;
737 struct cvmx_iob_n2c_l2c_pri_cnt_s cn52xxp1;
738 struct cvmx_iob_n2c_l2c_pri_cnt_s cn56xx;
739 struct cvmx_iob_n2c_l2c_pri_cnt_s cn56xxp1;
740 struct cvmx_iob_n2c_l2c_pri_cnt_s cn58xx;
741 struct cvmx_iob_n2c_l2c_pri_cnt_s cn58xxp1;
742 struct cvmx_iob_n2c_l2c_pri_cnt_s cn61xx;
743 struct cvmx_iob_n2c_l2c_pri_cnt_s cn63xx;
744 struct cvmx_iob_n2c_l2c_pri_cnt_s cn63xxp1;
745 struct cvmx_iob_n2c_l2c_pri_cnt_s cn66xx;
746 struct cvmx_iob_n2c_l2c_pri_cnt_s cnf71xx;
747};
748
749union cvmx_iob_n2c_rsp_pri_cnt {
750 uint64_t u64;
751 struct cvmx_iob_n2c_rsp_pri_cnt_s {
752#ifdef __BIG_ENDIAN_BITFIELD
753 uint64_t reserved_16_63:48;
754 uint64_t cnt_enb:1;
755 uint64_t cnt_val:15;
756#else
757 uint64_t cnt_val:15;
758 uint64_t cnt_enb:1;
759 uint64_t reserved_16_63:48;
760#endif
761 } s;
762 struct cvmx_iob_n2c_rsp_pri_cnt_s cn38xx;
763 struct cvmx_iob_n2c_rsp_pri_cnt_s cn38xxp2;
764 struct cvmx_iob_n2c_rsp_pri_cnt_s cn52xx;
765 struct cvmx_iob_n2c_rsp_pri_cnt_s cn52xxp1;
766 struct cvmx_iob_n2c_rsp_pri_cnt_s cn56xx;
767 struct cvmx_iob_n2c_rsp_pri_cnt_s cn56xxp1;
768 struct cvmx_iob_n2c_rsp_pri_cnt_s cn58xx;
769 struct cvmx_iob_n2c_rsp_pri_cnt_s cn58xxp1;
770 struct cvmx_iob_n2c_rsp_pri_cnt_s cn61xx;
771 struct cvmx_iob_n2c_rsp_pri_cnt_s cn63xx;
772 struct cvmx_iob_n2c_rsp_pri_cnt_s cn63xxp1;
773 struct cvmx_iob_n2c_rsp_pri_cnt_s cn66xx;
774 struct cvmx_iob_n2c_rsp_pri_cnt_s cnf71xx;
775};
776
777union cvmx_iob_outb_com_pri_cnt {
778 uint64_t u64;
779 struct cvmx_iob_outb_com_pri_cnt_s {
780#ifdef __BIG_ENDIAN_BITFIELD
781 uint64_t reserved_16_63:48;
782 uint64_t cnt_enb:1;
783 uint64_t cnt_val:15;
784#else
785 uint64_t cnt_val:15;
786 uint64_t cnt_enb:1;
787 uint64_t reserved_16_63:48;
788#endif
789 } s;
790 struct cvmx_iob_outb_com_pri_cnt_s cn38xx;
791 struct cvmx_iob_outb_com_pri_cnt_s cn38xxp2;
792 struct cvmx_iob_outb_com_pri_cnt_s cn52xx;
793 struct cvmx_iob_outb_com_pri_cnt_s cn52xxp1;
794 struct cvmx_iob_outb_com_pri_cnt_s cn56xx;
795 struct cvmx_iob_outb_com_pri_cnt_s cn56xxp1;
796 struct cvmx_iob_outb_com_pri_cnt_s cn58xx;
797 struct cvmx_iob_outb_com_pri_cnt_s cn58xxp1;
798 struct cvmx_iob_outb_com_pri_cnt_s cn61xx;
799 struct cvmx_iob_outb_com_pri_cnt_s cn63xx;
800 struct cvmx_iob_outb_com_pri_cnt_s cn63xxp1;
801 struct cvmx_iob_outb_com_pri_cnt_s cn66xx;
802 struct cvmx_iob_outb_com_pri_cnt_s cn68xx;
803 struct cvmx_iob_outb_com_pri_cnt_s cn68xxp1;
804 struct cvmx_iob_outb_com_pri_cnt_s cnf71xx;
805};
806
807union cvmx_iob_outb_control_match {
808 uint64_t u64;
809 struct cvmx_iob_outb_control_match_s {
810#ifdef __BIG_ENDIAN_BITFIELD
811 uint64_t reserved_26_63:38;
812 uint64_t mask:8;
813 uint64_t eot:1;
814 uint64_t dst:8;
815 uint64_t src:9;
816#else
817 uint64_t src:9;
818 uint64_t dst:8;
819 uint64_t eot:1;
820 uint64_t mask:8;
821 uint64_t reserved_26_63:38;
822#endif
823 } s;
824 struct cvmx_iob_outb_control_match_s cn30xx;
825 struct cvmx_iob_outb_control_match_s cn31xx;
826 struct cvmx_iob_outb_control_match_s cn38xx;
827 struct cvmx_iob_outb_control_match_s cn38xxp2;
828 struct cvmx_iob_outb_control_match_s cn50xx;
829 struct cvmx_iob_outb_control_match_s cn52xx;
830 struct cvmx_iob_outb_control_match_s cn52xxp1;
831 struct cvmx_iob_outb_control_match_s cn56xx;
832 struct cvmx_iob_outb_control_match_s cn56xxp1;
833 struct cvmx_iob_outb_control_match_s cn58xx;
834 struct cvmx_iob_outb_control_match_s cn58xxp1;
835 struct cvmx_iob_outb_control_match_s cn61xx;
836 struct cvmx_iob_outb_control_match_s cn63xx;
837 struct cvmx_iob_outb_control_match_s cn63xxp1;
838 struct cvmx_iob_outb_control_match_s cn66xx;
839 struct cvmx_iob_outb_control_match_s cn68xx;
840 struct cvmx_iob_outb_control_match_s cn68xxp1;
841 struct cvmx_iob_outb_control_match_s cnf71xx;
842};
843
844union cvmx_iob_outb_control_match_enb {
845 uint64_t u64;
846 struct cvmx_iob_outb_control_match_enb_s {
847#ifdef __BIG_ENDIAN_BITFIELD
848 uint64_t reserved_26_63:38;
849 uint64_t mask:8;
850 uint64_t eot:1;
851 uint64_t dst:8;
852 uint64_t src:9;
853#else
854 uint64_t src:9;
855 uint64_t dst:8;
856 uint64_t eot:1;
857 uint64_t mask:8;
858 uint64_t reserved_26_63:38;
859#endif
860 } s;
861 struct cvmx_iob_outb_control_match_enb_s cn30xx;
862 struct cvmx_iob_outb_control_match_enb_s cn31xx;
863 struct cvmx_iob_outb_control_match_enb_s cn38xx;
864 struct cvmx_iob_outb_control_match_enb_s cn38xxp2;
865 struct cvmx_iob_outb_control_match_enb_s cn50xx;
866 struct cvmx_iob_outb_control_match_enb_s cn52xx;
867 struct cvmx_iob_outb_control_match_enb_s cn52xxp1;
868 struct cvmx_iob_outb_control_match_enb_s cn56xx;
869 struct cvmx_iob_outb_control_match_enb_s cn56xxp1;
870 struct cvmx_iob_outb_control_match_enb_s cn58xx;
871 struct cvmx_iob_outb_control_match_enb_s cn58xxp1;
872 struct cvmx_iob_outb_control_match_enb_s cn61xx;
873 struct cvmx_iob_outb_control_match_enb_s cn63xx;
874 struct cvmx_iob_outb_control_match_enb_s cn63xxp1;
875 struct cvmx_iob_outb_control_match_enb_s cn66xx;
876 struct cvmx_iob_outb_control_match_enb_s cn68xx;
877 struct cvmx_iob_outb_control_match_enb_s cn68xxp1;
878 struct cvmx_iob_outb_control_match_enb_s cnf71xx;
879};
880
881union cvmx_iob_outb_data_match {
882 uint64_t u64;
883 struct cvmx_iob_outb_data_match_s {
884#ifdef __BIG_ENDIAN_BITFIELD
885 uint64_t data:64;
886#else
887 uint64_t data:64;
888#endif
889 } s;
890 struct cvmx_iob_outb_data_match_s cn30xx;
891 struct cvmx_iob_outb_data_match_s cn31xx;
892 struct cvmx_iob_outb_data_match_s cn38xx;
893 struct cvmx_iob_outb_data_match_s cn38xxp2;
894 struct cvmx_iob_outb_data_match_s cn50xx;
895 struct cvmx_iob_outb_data_match_s cn52xx;
896 struct cvmx_iob_outb_data_match_s cn52xxp1;
897 struct cvmx_iob_outb_data_match_s cn56xx;
898 struct cvmx_iob_outb_data_match_s cn56xxp1;
899 struct cvmx_iob_outb_data_match_s cn58xx;
900 struct cvmx_iob_outb_data_match_s cn58xxp1;
901 struct cvmx_iob_outb_data_match_s cn61xx;
902 struct cvmx_iob_outb_data_match_s cn63xx;
903 struct cvmx_iob_outb_data_match_s cn63xxp1;
904 struct cvmx_iob_outb_data_match_s cn66xx;
905 struct cvmx_iob_outb_data_match_s cn68xx;
906 struct cvmx_iob_outb_data_match_s cn68xxp1;
907 struct cvmx_iob_outb_data_match_s cnf71xx;
908};
909
910union cvmx_iob_outb_data_match_enb {
911 uint64_t u64;
912 struct cvmx_iob_outb_data_match_enb_s {
913#ifdef __BIG_ENDIAN_BITFIELD
914 uint64_t data:64;
915#else
916 uint64_t data:64;
917#endif
918 } s;
919 struct cvmx_iob_outb_data_match_enb_s cn30xx;
920 struct cvmx_iob_outb_data_match_enb_s cn31xx;
921 struct cvmx_iob_outb_data_match_enb_s cn38xx;
922 struct cvmx_iob_outb_data_match_enb_s cn38xxp2;
923 struct cvmx_iob_outb_data_match_enb_s cn50xx;
924 struct cvmx_iob_outb_data_match_enb_s cn52xx;
925 struct cvmx_iob_outb_data_match_enb_s cn52xxp1;
926 struct cvmx_iob_outb_data_match_enb_s cn56xx;
927 struct cvmx_iob_outb_data_match_enb_s cn56xxp1;
928 struct cvmx_iob_outb_data_match_enb_s cn58xx;
929 struct cvmx_iob_outb_data_match_enb_s cn58xxp1;
930 struct cvmx_iob_outb_data_match_enb_s cn61xx;
931 struct cvmx_iob_outb_data_match_enb_s cn63xx;
932 struct cvmx_iob_outb_data_match_enb_s cn63xxp1;
933 struct cvmx_iob_outb_data_match_enb_s cn66xx;
934 struct cvmx_iob_outb_data_match_enb_s cn68xx;
935 struct cvmx_iob_outb_data_match_enb_s cn68xxp1;
936 struct cvmx_iob_outb_data_match_enb_s cnf71xx;
937};
938
939union cvmx_iob_outb_fpa_pri_cnt {
940 uint64_t u64;
941 struct cvmx_iob_outb_fpa_pri_cnt_s {
942#ifdef __BIG_ENDIAN_BITFIELD
943 uint64_t reserved_16_63:48;
944 uint64_t cnt_enb:1;
945 uint64_t cnt_val:15;
946#else
947 uint64_t cnt_val:15;
948 uint64_t cnt_enb:1;
949 uint64_t reserved_16_63:48;
950#endif
951 } s;
952 struct cvmx_iob_outb_fpa_pri_cnt_s cn38xx;
953 struct cvmx_iob_outb_fpa_pri_cnt_s cn38xxp2;
954 struct cvmx_iob_outb_fpa_pri_cnt_s cn52xx;
955 struct cvmx_iob_outb_fpa_pri_cnt_s cn52xxp1;
956 struct cvmx_iob_outb_fpa_pri_cnt_s cn56xx;
957 struct cvmx_iob_outb_fpa_pri_cnt_s cn56xxp1;
958 struct cvmx_iob_outb_fpa_pri_cnt_s cn58xx;
959 struct cvmx_iob_outb_fpa_pri_cnt_s cn58xxp1;
960 struct cvmx_iob_outb_fpa_pri_cnt_s cn61xx;
961 struct cvmx_iob_outb_fpa_pri_cnt_s cn63xx;
962 struct cvmx_iob_outb_fpa_pri_cnt_s cn63xxp1;
963 struct cvmx_iob_outb_fpa_pri_cnt_s cn66xx;
964 struct cvmx_iob_outb_fpa_pri_cnt_s cn68xx;
965 struct cvmx_iob_outb_fpa_pri_cnt_s cn68xxp1;
966 struct cvmx_iob_outb_fpa_pri_cnt_s cnf71xx;
967};
968
969union cvmx_iob_outb_req_pri_cnt {
970 uint64_t u64;
971 struct cvmx_iob_outb_req_pri_cnt_s {
972#ifdef __BIG_ENDIAN_BITFIELD
973 uint64_t reserved_16_63:48;
974 uint64_t cnt_enb:1;
975 uint64_t cnt_val:15;
976#else
977 uint64_t cnt_val:15;
978 uint64_t cnt_enb:1;
979 uint64_t reserved_16_63:48;
980#endif
981 } s;
982 struct cvmx_iob_outb_req_pri_cnt_s cn38xx;
983 struct cvmx_iob_outb_req_pri_cnt_s cn38xxp2;
984 struct cvmx_iob_outb_req_pri_cnt_s cn52xx;
985 struct cvmx_iob_outb_req_pri_cnt_s cn52xxp1;
986 struct cvmx_iob_outb_req_pri_cnt_s cn56xx;
987 struct cvmx_iob_outb_req_pri_cnt_s cn56xxp1;
988 struct cvmx_iob_outb_req_pri_cnt_s cn58xx;
989 struct cvmx_iob_outb_req_pri_cnt_s cn58xxp1;
990 struct cvmx_iob_outb_req_pri_cnt_s cn61xx;
991 struct cvmx_iob_outb_req_pri_cnt_s cn63xx;
992 struct cvmx_iob_outb_req_pri_cnt_s cn63xxp1;
993 struct cvmx_iob_outb_req_pri_cnt_s cn66xx;
994 struct cvmx_iob_outb_req_pri_cnt_s cn68xx;
995 struct cvmx_iob_outb_req_pri_cnt_s cn68xxp1;
996 struct cvmx_iob_outb_req_pri_cnt_s cnf71xx;
997};
998
999union cvmx_iob_p2c_req_pri_cnt {
1000 uint64_t u64;
1001 struct cvmx_iob_p2c_req_pri_cnt_s {
1002#ifdef __BIG_ENDIAN_BITFIELD
1003 uint64_t reserved_16_63:48;
1004 uint64_t cnt_enb:1;
1005 uint64_t cnt_val:15;
1006#else
1007 uint64_t cnt_val:15;
1008 uint64_t cnt_enb:1;
1009 uint64_t reserved_16_63:48;
1010#endif
1011 } s;
1012 struct cvmx_iob_p2c_req_pri_cnt_s cn38xx;
1013 struct cvmx_iob_p2c_req_pri_cnt_s cn38xxp2;
1014 struct cvmx_iob_p2c_req_pri_cnt_s cn52xx;
1015 struct cvmx_iob_p2c_req_pri_cnt_s cn52xxp1;
1016 struct cvmx_iob_p2c_req_pri_cnt_s cn56xx;
1017 struct cvmx_iob_p2c_req_pri_cnt_s cn56xxp1;
1018 struct cvmx_iob_p2c_req_pri_cnt_s cn58xx;
1019 struct cvmx_iob_p2c_req_pri_cnt_s cn58xxp1;
1020 struct cvmx_iob_p2c_req_pri_cnt_s cn61xx;
1021 struct cvmx_iob_p2c_req_pri_cnt_s cn63xx;
1022 struct cvmx_iob_p2c_req_pri_cnt_s cn63xxp1;
1023 struct cvmx_iob_p2c_req_pri_cnt_s cn66xx;
1024 struct cvmx_iob_p2c_req_pri_cnt_s cnf71xx;
1025};
1026
1027union cvmx_iob_pkt_err {
1028 uint64_t u64;
1029 struct cvmx_iob_pkt_err_s {
1030#ifdef __BIG_ENDIAN_BITFIELD
1031 uint64_t reserved_12_63:52;
1032 uint64_t vport:6;
1033 uint64_t port:6;
1034#else
1035 uint64_t port:6;
1036 uint64_t vport:6;
1037 uint64_t reserved_12_63:52;
1038#endif
1039 } s;
1040 struct cvmx_iob_pkt_err_cn30xx {
1041#ifdef __BIG_ENDIAN_BITFIELD
1042 uint64_t reserved_6_63:58;
1043 uint64_t port:6;
1044#else
1045 uint64_t port:6;
1046 uint64_t reserved_6_63:58;
1047#endif
1048 } cn30xx;
1049 struct cvmx_iob_pkt_err_cn30xx cn31xx;
1050 struct cvmx_iob_pkt_err_cn30xx cn38xx;
1051 struct cvmx_iob_pkt_err_cn30xx cn38xxp2;
1052 struct cvmx_iob_pkt_err_cn30xx cn50xx;
1053 struct cvmx_iob_pkt_err_cn30xx cn52xx;
1054 struct cvmx_iob_pkt_err_cn30xx cn52xxp1;
1055 struct cvmx_iob_pkt_err_cn30xx cn56xx;
1056 struct cvmx_iob_pkt_err_cn30xx cn56xxp1;
1057 struct cvmx_iob_pkt_err_cn30xx cn58xx;
1058 struct cvmx_iob_pkt_err_cn30xx cn58xxp1;
1059 struct cvmx_iob_pkt_err_s cn61xx;
1060 struct cvmx_iob_pkt_err_s cn63xx;
1061 struct cvmx_iob_pkt_err_s cn63xxp1;
1062 struct cvmx_iob_pkt_err_s cn66xx;
1063 struct cvmx_iob_pkt_err_s cnf71xx;
1064};
1065
1066union cvmx_iob_to_cmb_credits {
1067 uint64_t u64;
1068 struct cvmx_iob_to_cmb_credits_s {
1069#ifdef __BIG_ENDIAN_BITFIELD
1070 uint64_t reserved_6_63:58;
1071 uint64_t ncb_rd:3;
1072 uint64_t ncb_wr:3;
1073#else
1074 uint64_t ncb_wr:3;
1075 uint64_t ncb_rd:3;
1076 uint64_t reserved_6_63:58;
1077#endif
1078 } s;
1079 struct cvmx_iob_to_cmb_credits_cn52xx {
1080#ifdef __BIG_ENDIAN_BITFIELD
1081 uint64_t reserved_9_63:55;
1082 uint64_t pko_rd:3;
1083 uint64_t ncb_rd:3;
1084 uint64_t ncb_wr:3;
1085#else
1086 uint64_t ncb_wr:3;
1087 uint64_t ncb_rd:3;
1088 uint64_t pko_rd:3;
1089 uint64_t reserved_9_63:55;
1090#endif
1091 } cn52xx;
1092 struct cvmx_iob_to_cmb_credits_cn52xx cn61xx;
1093 struct cvmx_iob_to_cmb_credits_cn52xx cn63xx;
1094 struct cvmx_iob_to_cmb_credits_cn52xx cn63xxp1;
1095 struct cvmx_iob_to_cmb_credits_cn52xx cn66xx;
1096 struct cvmx_iob_to_cmb_credits_cn68xx {
1097#ifdef __BIG_ENDIAN_BITFIELD
1098 uint64_t reserved_9_63:55;
1099 uint64_t dwb:3;
1100 uint64_t ncb_rd:3;
1101 uint64_t ncb_wr:3;
1102#else
1103 uint64_t ncb_wr:3;
1104 uint64_t ncb_rd:3;
1105 uint64_t dwb:3;
1106 uint64_t reserved_9_63:55;
1107#endif
1108 } cn68xx;
1109 struct cvmx_iob_to_cmb_credits_cn68xx cn68xxp1;
1110 struct cvmx_iob_to_cmb_credits_cn52xx cnf71xx;
1111};
1112
1113union cvmx_iob_to_ncb_did_00_credits {
1114 uint64_t u64;
1115 struct cvmx_iob_to_ncb_did_00_credits_s {
1116#ifdef __BIG_ENDIAN_BITFIELD
1117 uint64_t reserved_7_63:57;
1118 uint64_t crd:7;
1119#else
1120 uint64_t crd:7;
1121 uint64_t reserved_7_63:57;
1122#endif
1123 } s;
1124 struct cvmx_iob_to_ncb_did_00_credits_s cn68xx;
1125 struct cvmx_iob_to_ncb_did_00_credits_s cn68xxp1;
1126};
1127
1128union cvmx_iob_to_ncb_did_111_credits {
1129 uint64_t u64;
1130 struct cvmx_iob_to_ncb_did_111_credits_s {
1131#ifdef __BIG_ENDIAN_BITFIELD
1132 uint64_t reserved_7_63:57;
1133 uint64_t crd:7;
1134#else
1135 uint64_t crd:7;
1136 uint64_t reserved_7_63:57;
1137#endif
1138 } s;
1139 struct cvmx_iob_to_ncb_did_111_credits_s cn68xx;
1140 struct cvmx_iob_to_ncb_did_111_credits_s cn68xxp1;
1141};
1142
1143union cvmx_iob_to_ncb_did_223_credits {
1144 uint64_t u64;
1145 struct cvmx_iob_to_ncb_did_223_credits_s {
1146#ifdef __BIG_ENDIAN_BITFIELD
1147 uint64_t reserved_7_63:57;
1148 uint64_t crd:7;
1149#else
1150 uint64_t crd:7;
1151 uint64_t reserved_7_63:57;
1152#endif
1153 } s;
1154 struct cvmx_iob_to_ncb_did_223_credits_s cn68xx;
1155 struct cvmx_iob_to_ncb_did_223_credits_s cn68xxp1;
1156};
1157
1158union cvmx_iob_to_ncb_did_24_credits {
1159 uint64_t u64;
1160 struct cvmx_iob_to_ncb_did_24_credits_s {
1161#ifdef __BIG_ENDIAN_BITFIELD
1162 uint64_t reserved_7_63:57;
1163 uint64_t crd:7;
1164#else
1165 uint64_t crd:7;
1166 uint64_t reserved_7_63:57;
1167#endif
1168 } s;
1169 struct cvmx_iob_to_ncb_did_24_credits_s cn68xx;
1170 struct cvmx_iob_to_ncb_did_24_credits_s cn68xxp1;
1171};
1172
1173union cvmx_iob_to_ncb_did_32_credits {
1174 uint64_t u64;
1175 struct cvmx_iob_to_ncb_did_32_credits_s {
1176#ifdef __BIG_ENDIAN_BITFIELD
1177 uint64_t reserved_7_63:57;
1178 uint64_t crd:7;
1179#else
1180 uint64_t crd:7;
1181 uint64_t reserved_7_63:57;
1182#endif
1183 } s;
1184 struct cvmx_iob_to_ncb_did_32_credits_s cn68xx;
1185 struct cvmx_iob_to_ncb_did_32_credits_s cn68xxp1;
1186};
1187
1188union cvmx_iob_to_ncb_did_40_credits {
1189 uint64_t u64;
1190 struct cvmx_iob_to_ncb_did_40_credits_s {
1191#ifdef __BIG_ENDIAN_BITFIELD
1192 uint64_t reserved_7_63:57;
1193 uint64_t crd:7;
1194#else
1195 uint64_t crd:7;
1196 uint64_t reserved_7_63:57;
1197#endif
1198 } s;
1199 struct cvmx_iob_to_ncb_did_40_credits_s cn68xx;
1200 struct cvmx_iob_to_ncb_did_40_credits_s cn68xxp1;
1201};
1202
1203union cvmx_iob_to_ncb_did_55_credits {
1204 uint64_t u64;
1205 struct cvmx_iob_to_ncb_did_55_credits_s {
1206#ifdef __BIG_ENDIAN_BITFIELD
1207 uint64_t reserved_7_63:57;
1208 uint64_t crd:7;
1209#else
1210 uint64_t crd:7;
1211 uint64_t reserved_7_63:57;
1212#endif
1213 } s;
1214 struct cvmx_iob_to_ncb_did_55_credits_s cn68xx;
1215 struct cvmx_iob_to_ncb_did_55_credits_s cn68xxp1;
1216};
1217
1218union cvmx_iob_to_ncb_did_64_credits {
1219 uint64_t u64;
1220 struct cvmx_iob_to_ncb_did_64_credits_s {
1221#ifdef __BIG_ENDIAN_BITFIELD
1222 uint64_t reserved_7_63:57;
1223 uint64_t crd:7;
1224#else
1225 uint64_t crd:7;
1226 uint64_t reserved_7_63:57;
1227#endif
1228 } s;
1229 struct cvmx_iob_to_ncb_did_64_credits_s cn68xx;
1230 struct cvmx_iob_to_ncb_did_64_credits_s cn68xxp1;
1231};
1232
1233union cvmx_iob_to_ncb_did_79_credits {
1234 uint64_t u64;
1235 struct cvmx_iob_to_ncb_did_79_credits_s {
1236#ifdef __BIG_ENDIAN_BITFIELD
1237 uint64_t reserved_7_63:57;
1238 uint64_t crd:7;
1239#else
1240 uint64_t crd:7;
1241 uint64_t reserved_7_63:57;
1242#endif
1243 } s;
1244 struct cvmx_iob_to_ncb_did_79_credits_s cn68xx;
1245 struct cvmx_iob_to_ncb_did_79_credits_s cn68xxp1;
1246};
1247
1248union cvmx_iob_to_ncb_did_96_credits {
1249 uint64_t u64;
1250 struct cvmx_iob_to_ncb_did_96_credits_s {
1251#ifdef __BIG_ENDIAN_BITFIELD
1252 uint64_t reserved_7_63:57;
1253 uint64_t crd:7;
1254#else
1255 uint64_t crd:7;
1256 uint64_t reserved_7_63:57;
1257#endif
1258 } s;
1259 struct cvmx_iob_to_ncb_did_96_credits_s cn68xx;
1260 struct cvmx_iob_to_ncb_did_96_credits_s cn68xxp1;
1261};
1262
1263union cvmx_iob_to_ncb_did_98_credits {
1264 uint64_t u64;
1265 struct cvmx_iob_to_ncb_did_98_credits_s {
1266#ifdef __BIG_ENDIAN_BITFIELD
1267 uint64_t reserved_7_63:57;
1268 uint64_t crd:7;
1269#else
1270 uint64_t crd:7;
1271 uint64_t reserved_7_63:57;
1272#endif
1273 } s;
1274 struct cvmx_iob_to_ncb_did_98_credits_s cn68xx;
1275 struct cvmx_iob_to_ncb_did_98_credits_s cn68xxp1;
1276};
1277
1278#endif