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v5.4
  1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2/*
  3 * Google Veyron Minnie Rev 0+ board device tree source
  4 *
  5 * Copyright 2015 Google, Inc
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
  6 */
  7
  8/dts-v1/;
  9#include "rk3288-veyron-chromebook.dtsi"
 10
 11/ {
 12	model = "Google Minnie";
 13	compatible = "google,veyron-minnie-rev4", "google,veyron-minnie-rev3",
 14		     "google,veyron-minnie-rev2", "google,veyron-minnie-rev1",
 15		     "google,veyron-minnie-rev0", "google,veyron-minnie",
 16		     "google,veyron", "rockchip,rk3288";
 17
 18	volume_buttons: volume-buttons {
 19		compatible = "gpio-keys";
 
 
 20		pinctrl-names = "default";
 21		pinctrl-0 = <&volum_down_l &volum_up_l>;
 
 
 
 
 22
 23		volum_down {
 24			label = "Volum_down";
 25			gpios = <&gpio5 RK_PB3 GPIO_ACTIVE_LOW>;
 26			linux,code = <KEY_VOLUMEDOWN>;
 27			debounce-interval = <100>;
 28		};
 
 
 
 29
 30		volum_up {
 31			label = "Volum_up";
 32			gpios = <&gpio5 RK_PB2 GPIO_ACTIVE_LOW>;
 33			linux,code = <KEY_VOLUMEUP>;
 34			debounce-interval = <100>;
 35		};
 
 
 
 
 36	};
 37};
 38
 39&backlight {
 40	/* Minnie panel PWM must be >= 1%, so start non-zero brightness at 3 */
 41	brightness-levels = <
 42			  0   3   4   5   6   7
 43			  8   9  10  11  12  13  14  15
 44			 16  17  18  19  20  21  22  23
 45			 24  25  26  27  28  29  30  31
 46			 32  33  34  35  36  37  38  39
 47			 40  41  42  43  44  45  46  47
 48			 48  49  50  51  52  53  54  55
 49			 56  57  58  59  60  61  62  63
 50			 64  65  66  67  68  69  70  71
 51			 72  73  74  75  76  77  78  79
 52			 80  81  82  83  84  85  86  87
 53			 88  89  90  91  92  93  94  95
 54			 96  97  98  99 100 101 102 103
 55			104 105 106 107 108 109 110 111
 56			112 113 114 115 116 117 118 119
 57			120 121 122 123 124 125 126 127
 58			128 129 130 131 132 133 134 135
 59			136 137 138 139 140 141 142 143
 60			144 145 146 147 148 149 150 151
 61			152 153 154 155 156 157 158 159
 62			160 161 162 163 164 165 166 167
 63			168 169 170 171 172 173 174 175
 64			176 177 178 179 180 181 182 183
 65			184 185 186 187 188 189 190 191
 66			192 193 194 195 196 197 198 199
 67			200 201 202 203 204 205 206 207
 68			208 209 210 211 212 213 214 215
 69			216 217 218 219 220 221 222 223
 70			224 225 226 227 228 229 230 231
 71			232 233 234 235 236 237 238 239
 72			240 241 242 243 244 245 246 247
 73			248 249 250 251 252 253 254 255>;
 74};
 75
 76&i2c_tunnel {
 77	battery: bq27500@55 {
 78		compatible = "ti,bq27500";
 79		reg = <0x55>;
 80	};
 81};
 82
 83&i2c3 {
 84	status = "okay";
 85
 86	clock-frequency = <400000>;
 87	i2c-scl-falling-time-ns = <50>;
 88	i2c-scl-rising-time-ns = <300>;
 89
 90	touchscreen@10 {
 91		compatible = "elan,ekth3500";
 92		reg = <0x10>;
 93		interrupt-parent = <&gpio2>;
 94		interrupts = <RK_PB6 IRQ_TYPE_EDGE_FALLING>;
 95		pinctrl-names = "default";
 96		pinctrl-0 = <&touch_int &touch_rst>;
 97		reset-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_LOW>;
 98		vcc33-supply = <&vcc33_touch>;
 99		vccio-supply = <&vcc33_touch>;
100	};
101};
102
103&panel {
104	compatible = "auo,b101ean01", "simple-panel";
105
106	/delete-node/ panel-timing;
107
108	panel-timing {
109		clock-frequency = <66666667>;
110		hactive = <1280>;
111		hfront-porch = <18>;
112		hback-porch = <21>;
113		hsync-len = <32>;
114		vactive = <800>;
115		vfront-porch = <4>;
116		vback-porch = <8>;
117		vsync-len = <18>;
118	};
119};
120
121&rk808 {
122	pinctrl-names = "default";
123	pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
124
125	regulators {
126		vcc33_touch: LDO_REG2 {
127			regulator-min-microvolt = <3300000>;
128			regulator-max-microvolt = <3300000>;
129			regulator-name = "vcc33_touch";
130			regulator-state-mem {
131				regulator-off-in-suspend;
132			};
133		};
134
135		vcc5v_touch: SWITCH_REG2 {
136			regulator-name = "vcc5v_touch";
137			regulator-state-mem {
138				regulator-off-in-suspend;
139			};
140		};
141	};
142};
143
144&sdmmc {
145	disable-wp;
146	pinctrl-names = "default";
147	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
148			&sdmmc_bus4>;
149};
150
151&vcc_5v {
152	enable-active-high;
153	gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
154	pinctrl-names = "default";
155	pinctrl-0 = <&drv_5v>;
156};
157
158&vcc50_hdmi {
159	enable-active-high;
160	gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;
161	pinctrl-names = "default";
162	pinctrl-0 = <&vcc50_hdmi_en>;
163};
164
165&gpio0 {
166	gpio-line-names = "PMIC_SLEEP_AP",
167			  "DDRIO_PWROFF",
168			  "DDRIO_RETEN",
169			  "TS3A227E_INT_L",
170			  "PMIC_INT_L",
171			  "PWR_KEY_L",
172			  "AP_LID_INT_L",
173			  "EC_IN_RW",
174
175			  "AC_PRESENT_AP",
176			  /*
177			   * RECOVERY_SW_L is Chrome OS ABI.  Schematics call
178			   * it REC_MODE_L.
179			   */
180			  "RECOVERY_SW_L",
181			  "OTP_OUT",
182			  "HOST1_PWR_EN",
183			  "USBOTG_PWREN_H",
184			  "AP_WARM_RESET_H",
185			  "nFALUT2",
186			  "I2C0_SDA_PMIC",
187
188			  "I2C0_SCL_PMIC",
189			  "SUSPEND_L",
190			  "USB_INT";
191};
192
193&gpio2 {
194	gpio-line-names = "CONFIG0",
195			  "CONFIG1",
196			  "CONFIG2",
197			  "",
198			  "",
199			  "",
200			  "",
201			  "CONFIG3",
202
203			  "PROCHOT#",
204			  "EMMC_RST_L",
205			  "",
206			  "",
207			  "BL_PWR_EN",
208			  "AVDD_1V8_DISP_EN",
209			  "TOUCH_INT",
210			  "TOUCH_RST",
211
212			  "I2C3_SCL_TP",
213			  "I2C3_SDA_TP";
214};
215
216&gpio3 {
217	gpio-line-names = "FLASH0_D0",
218			  "FLASH0_D1",
219			  "FLASH0_D2",
220			  "FLASH0_D3",
221			  "FLASH0_D4",
222			  "FLASH0_D5",
223			  "FLASH0_D6",
224			  "FLASH0_D7",
225
226			  "",
227			  "",
228			  "",
229			  "",
230			  "",
231			  "",
232			  "",
233			  "",
234
235			  "FLASH0_CS2/EMMC_CMD",
236			  "",
237			  "FLASH0_DQS/EMMC_CLKO";
238};
239
240&gpio4 {
241	gpio-line-names = "",
242			  "",
243			  "",
244			  "",
245			  "",
246			  "",
247			  "",
248			  "",
249
250			  "",
251			  "",
252			  "",
253			  "",
254			  "",
255			  "",
256			  "",
257			  "",
258
259			  "UART0_RXD",
260			  "UART0_TXD",
261			  "UART0_CTS",
262			  "UART0_RTS",
263			  "SDIO0_D0",
264			  "SDIO0_D1",
265			  "SDIO0_D2",
266			  "SDIO0_D3",
267
268			  "SDIO0_CMD",
269			  "SDIO0_CLK",
270			  "dev_wake",
271			  "",
272			  "WIFI_ENABLE_H",
273			  "BT_ENABLE_L",
274			  "WIFI_HOST_WAKE",
275			  "BT_HOST_WAKE";
276};
277
278&gpio5 {
279	gpio-line-names = "",
280			  "",
281			  "",
282			  "",
283			  "",
284			  "",
285			  "",
286			  "",
287
288			  "",
289			  "",
290			  "Volum_Up#",
291			  "Volum_Down#",
292			  "SPI0_CLK",
293			  "SPI0_CS0",
294			  "SPI0_TXD",
295			  "SPI0_RXD",
296
297			  "",
298			  "",
299			  "",
300			  "VCC50_HDMI_EN";
301};
302
303&gpio6 {
304	gpio-line-names = "I2S0_SCLK",
305			  "I2S0_LRCK_RX",
306			  "I2S0_LRCK_TX",
307			  "I2S0_SDI",
308			  "I2S0_SDO0",
309			  "HP_DET_H",
310			  "",
311			  "INT_CODEC",
312
313			  "I2S0_CLK",
314			  "I2C2_SDA",
315			  "I2C2_SCL",
316			  "MICDET",
317			  "",
318			  "",
319			  "",
320			  "",
321
322			  "SDMMC_D0",
323			  "SDMMC_D1",
324			  "SDMMC_D2",
325			  "SDMMC_D3",
326			  "SDMMC_CLK",
327			  "SDMMC_CMD";
328};
329
330&gpio7 {
331	gpio-line-names = "LCDC_BL",
332			  "PWM_LOG",
333			  "BL_EN",
334			  "TRACKPAD_INT",
335			  "TPM_INT_H",
336			  "SDMMC_DET_L",
337			  /*
338			   * AP_FLASH_WP_L is Chrome OS ABI.  Schematics call
339			   * it FW_WP_AP.
340			   */
341			  "AP_FLASH_WP_L",
342			  "EC_INT",
343
344			  "CPU_NMI",
345			  "DVS_OK",
346			  "SDMMC_WP",
347			  "EDP_HPD",
348			  "DVS1",
349			  "nFALUT1",
350			  "LCD_EN",
351			  "DVS2",
352
353			  "VCC5V_GOOD_H",
354			  "I2C4_SDA_TP",
355			  "I2C4_SCL_TP",
356			  "I2C5_SDA_HDMI",
357			  "I2C5_SCL_HDMI",
358			  "5V_DRV",
359			  "UART2_RXD",
360			  "UART2_TXD";
361};
362
363&gpio8 {
364	gpio-line-names = "RAM_ID0",
365			  "RAM_ID1",
366			  "RAM_ID2",
367			  "RAM_ID3",
368			  "I2C1_SDA_TPM",
369			  "I2C1_SCL_TPM",
370			  "SPI2_CLK",
371			  "SPI2_CS0",
372
373			  "SPI2_RXD",
374			  "SPI2_TXD";
375};
376
377&pinctrl {
 
 
 
 
 
 
378	buck-5v {
379		drv_5v: drv-5v {
380			rockchip,pins = <7 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
381		};
382	};
383
384	buttons {
385		volum_down_l: volum-down-l {
386			rockchip,pins = <5 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
387		};
388
389		volum_up_l: volum-up-l {
390			rockchip,pins = <5 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
391		};
392	};
393
394	hdmi {
395		vcc50_hdmi_en: vcc50-hdmi-en {
396			rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
 
 
 
 
 
 
 
 
 
 
397		};
398	};
399
400	pmic {
401		dvs_1: dvs-1 {
402			rockchip,pins = <7 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
403		};
404
405		dvs_2: dvs-2 {
406			rockchip,pins = <7 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
407		};
408	};
409
410	prochot {
411		gpio_prochot: gpio-prochot {
412			rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
413		};
414	};
415
416	touchscreen {
417		touch_int: touch-int {
418			rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
419		};
420
421		touch_rst: touch-rst {
422			rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
423		};
424	};
425};
v4.6
 
  1/*
  2 * Google Veyron Minnie Rev 0+ board device tree source
  3 *
  4 * Copyright 2015 Google, Inc
  5 *
  6 * This file is dual-licensed: you can use it either under the terms
  7 * of the GPL or the X11 license, at your option. Note that this dual
  8 * licensing only applies to this file, and not this project as a
  9 * whole.
 10 *
 11 *  a) This file is free software; you can redistribute it and/or
 12 *     modify it under the terms of the GNU General Public License as
 13 *     published by the Free Software Foundation; either version 2 of the
 14 *     License, or (at your option) any later version.
 15 *
 16 *     This file is distributed in the hope that it will be useful,
 17 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 18 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 19 *     GNU General Public License for more details.
 20 *
 21 *  Or, alternatively,
 22 *
 23 *  b) Permission is hereby granted, free of charge, to any person
 24 *     obtaining a copy of this software and associated documentation
 25 *     files (the "Software"), to deal in the Software without
 26 *     restriction, including without limitation the rights to use,
 27 *     copy, modify, merge, publish, distribute, sublicense, and/or
 28 *     sell copies of the Software, and to permit persons to whom the
 29 *     Software is furnished to do so, subject to the following
 30 *     conditions:
 31 *
 32 *     The above copyright notice and this permission notice shall be
 33 *     included in all copies or substantial portions of the Software.
 34 *
 35 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 36 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 37 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 38 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 39 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 40 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 41 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 42 *     OTHER DEALINGS IN THE SOFTWARE.
 43 */
 44
 45/dts-v1/;
 46#include "rk3288-veyron-chromebook.dtsi"
 47
 48/ {
 49	model = "Google Minnie";
 50	compatible = "google,veyron-minnie-rev4", "google,veyron-minnie-rev3",
 51		     "google,veyron-minnie-rev2", "google,veyron-minnie-rev1",
 52		     "google,veyron-minnie-rev0", "google,veyron-minnie",
 53		     "google,veyron", "rockchip,rk3288";
 54
 55	backlight_regulator: backlight-regulator {
 56		compatible = "regulator-fixed";
 57		enable-active-high;
 58		gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
 59		pinctrl-names = "default";
 60		pinctrl-0 = <&bl_pwr_en>;
 61		regulator-name = "backlight_regulator";
 62		vin-supply = <&vcc33_sys>;
 63		startup-delay-us = <15000>;
 64	};
 65
 66	panel_regulator: panel-regulator {
 67		compatible = "regulator-fixed";
 68		enable-active-high;
 69		gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
 70		pinctrl-names = "default";
 71		pinctrl-0 = <&lcd_enable_h>;
 72		regulator-name = "panel_regulator";
 73		vin-supply = <&vcc33_sys>;
 74	};
 75
 76	vcc18_lcd: vcc18-lcd {
 77		compatible = "regulator-fixed";
 78		enable-active-high;
 79		gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
 80		pinctrl-names = "default";
 81		pinctrl-0 = <&avdd_1v8_disp_en>;
 82		regulator-name = "vcc18_lcd";
 83		regulator-always-on;
 84		regulator-boot-on;
 85		vin-supply = <&vcc18_wl>;
 86	};
 87};
 88
 89&emmc {
 90	/delete-property/mmc-hs200-1_8v;
 91};
 92
 93&gpio_keys {
 94	pinctrl-0 = <&pwr_key_l &ap_lid_int_l &volum_down_l &volum_up_l>;
 95
 96	volum_down {
 97		label = "Volum_down";
 98		gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
 99		linux,code = <KEY_VOLUMEDOWN>;
100		debounce-interval = <100>;
101	};
102
103	volum_up {
104		label = "Volum_up";
105		gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;
106		linux,code = <KEY_VOLUMEUP>;
107		debounce-interval = <100>;
108	};
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
109};
110
111&i2c_tunnel {
112	battery: bq27500@55 {
113		compatible = "ti,bq27500";
114		reg = <0x55>;
115	};
116};
117
118&i2c3 {
119	status = "okay";
120
121	clock-frequency = <400000>;
122	i2c-scl-falling-time-ns = <50>;
123	i2c-scl-rising-time-ns = <300>;
124
125	touchscreen@10 {
126		compatible = "elan,ekth3500";
127		reg = <0x10>;
128		interrupt-parent = <&gpio2>;
129		interrupts = <14 IRQ_TYPE_EDGE_FALLING>;
130		pinctrl-names = "default";
131		pinctrl-0 = <&touch_int &touch_rst>;
132		reset-gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
133		vcc33-supply = <&vcc33_touch>;
134		vccio-supply = <&vcc33_touch>;
135	};
136};
137
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
138&rk808 {
139	pinctrl-names = "default";
140	pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
141
142	regulators {
143		vcc33_touch: LDO_REG2 {
144			regulator-min-microvolt = <3300000>;
145			regulator-max-microvolt = <3300000>;
146			regulator-name = "vcc33_touch";
147			regulator-state-mem {
148				regulator-off-in-suspend;
149			};
150		};
151
152		vcc5v_touch: SWITCH_REG2 {
153			regulator-name = "vcc5v_touch";
154			regulator-state-mem {
155				regulator-off-in-suspend;
156			};
157		};
158	};
159};
160
161&sdmmc {
162	disable-wp;
163	pinctrl-names = "default";
164	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
165			&sdmmc_bus4>;
166};
167
168&vcc_5v {
169	enable-active-high;
170	gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
171	pinctrl-names = "default";
172	pinctrl-0 = <&drv_5v>;
173};
174
175&vcc50_hdmi {
176	enable-active-high;
177	gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
178	pinctrl-names = "default";
179	pinctrl-0 = <&vcc50_hdmi_en>;
180};
181
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
182&pinctrl {
183	backlight {
184		bl_pwr_en: bl_pwr_en {
185			rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
186		};
187	};
188
189	buck-5v {
190		drv_5v: drv-5v {
191			rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
192		};
193	};
194
195	buttons {
196		volum_down_l: volum-down-l {
197			rockchip,pins = <5 11 RK_FUNC_GPIO &pcfg_pull_up>;
198		};
199
200		volum_up_l: volum-up-l {
201			rockchip,pins = <5 10 RK_FUNC_GPIO &pcfg_pull_up>;
202		};
203	};
204
205	hdmi {
206		vcc50_hdmi_en: vcc50-hdmi-en {
207			rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
208		};
209	};
210
211	lcd {
212		lcd_enable_h: lcd-en {
213			rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
214		};
215
216		avdd_1v8_disp_en: avdd-1v8-disp-en {
217			rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
218		};
219	};
220
221	pmic {
222		dvs_1: dvs-1 {
223			rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
224		};
225
226		dvs_2: dvs-2 {
227			rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
228		};
229	};
230
231	prochot {
232		gpio_prochot: gpio-prochot {
233			rockchip,pins = <2 8 RK_FUNC_GPIO &pcfg_pull_none>;
234		};
235	};
236
237	touchscreen {
238		touch_int: touch-int {
239			rockchip,pins = <2 14 RK_FUNC_GPIO &pcfg_pull_none>;
240		};
241
242		touch_rst: touch-rst {
243			rockchip,pins = <2 15 RK_FUNC_GPIO &pcfg_pull_none>;
244		};
245	};
246};