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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * at91-cosino.dtsi - Device Tree file for Cosino core module
4 *
5 * Copyright (C) 2013 - Rodolfo Giometti <giometti@linux.it>
6 * HCE Engineering
7 *
8 * Derived from at91sam9x5ek.dtsi by:
9 * Copyright (C) 2012 Atmel,
10 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
11 */
12
13#include "at91sam9g35.dtsi"
14
15/ {
16 model = "HCE Cosino core module";
17 compatible = "hce,cosino", "atmel,at91sam9x5", "atmel,at91sam9";
18
19 chosen {
20 bootargs = "console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootfstype=ext3 rootwait";
21 };
22
23 memory {
24 reg = <0x20000000 0x8000000>;
25 };
26
27 clocks {
28 slow_xtal {
29 clock-frequency = <32768>;
30 };
31
32 main_xtal {
33 clock-frequency = <12000000>;
34 };
35 };
36};
37
38&adc0 {
39 atmel,adc-ts-wires = <4>;
40 atmel,adc-ts-pressure-threshold = <10000>;
41 status = "okay";
42};
43
44&dbgu {
45 status = "okay";
46};
47
48&ebi {
49 pinctrl-0 = <&pinctrl_ebi_addr_nand
50 &pinctrl_ebi_data_0_7>;
51 pinctrl-names = "default";
52 status = "okay";
53
54 nand-controller {
55 pinctrl-0 = <&pinctrl_nand_oe_we
56 &pinctrl_nand_cs
57 &pinctrl_nand_rb>;
58 pinctrl-names = "default";
59 status = "okay";
60
61 nand@3 {
62 reg = <0x3 0x0 0x800000>;
63 rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
64 cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;
65 nand-bus-width = <8>;
66 nand-ecc-mode = "hw";
67 nand-ecc-strength = <4>;
68 nand-ecc-step-size = <512>;
69 nand-on-flash-bbt;
70 label = "atmel_nand";
71
72 partitions {
73 compatible = "fixed-partitions";
74 #address-cells = <1>;
75 #size-cells = <1>;
76
77 at91bootstrap@0 {
78 label = "at91bootstrap";
79 reg = <0x0 0x40000>;
80 };
81
82 uboot@40000 {
83 label = "u-boot";
84 reg = <0x40000 0x80000>;
85 };
86
87 ubootenv@c0000 {
88 label = "U-Boot Env";
89 reg = <0xc0000 0x140000>;
90 };
91
92 kernel@200000 {
93 label = "kernel";
94 reg = <0x200000 0x600000>;
95 };
96
97 rootfs@800000 {
98 label = "rootfs";
99 reg = <0x800000 0x0f800000>;
100 };
101 };
102 };
103 };
104};
105
106&i2c0 {
107 status = "okay";
108};
109
110&mmc0 {
111 pinctrl-0 = <
112 &pinctrl_board_mmc0
113 &pinctrl_mmc0_slot0_clk_cmd_dat0
114 &pinctrl_mmc0_slot0_dat1_3>;
115 status = "okay";
116
117 slot@0 {
118 reg = <0>;
119 bus-width = <4>;
120 cd-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
121 };
122};
123
124&pinctrl {
125 mmc0 {
126 pinctrl_board_mmc0: mmc0-board {
127 atmel,pins =
128 <AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD15 gpio CD pin pull up and deglitch */
129 };
130 };
131};
132
133&tcb0 {
134 timer@0 {
135 compatible = "atmel,tcb-timer";
136 reg = <0>;
137 };
138
139 timer@1 {
140 compatible = "atmel,tcb-timer";
141 reg = <1>;
142 };
143};
144
145&usart0 {
146 status = "okay";
147};
148
149&watchdog {
150 status = "okay";
151};
1/*
2 * at91-cosino.dtsi - Device Tree file for Cosino core module
3 *
4 * Copyright (C) 2013 - Rodolfo Giometti <giometti@linux.it>
5 * HCE Engineering
6 *
7 * Derived from at91sam9x5ek.dtsi by:
8 * Copyright (C) 2012 Atmel,
9 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
10 *
11 * Licensed under GPLv2 or later.
12 */
13
14#include "at91sam9g35.dtsi"
15
16/ {
17 model = "HCE Cosino core module";
18 compatible = "hce,cosino", "atmel,at91sam9x5", "atmel,at91sam9";
19
20 chosen {
21 bootargs = "console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootfstype=ext3 rootwait";
22 };
23
24 memory {
25 reg = <0x20000000 0x8000000>;
26 };
27
28 clocks {
29 #address-cells = <1>;
30 #size-cells = <1>;
31 ranges;
32
33 main_clock: clock@0 {
34 compatible = "atmel,osc", "fixed-clock";
35 clock-frequency = <12000000>;
36 };
37
38 slow_xtal {
39 clock-frequency = <32768>;
40 };
41
42 main_xtal {
43 clock-frequency = <12000000>;
44 };
45 };
46
47 ahb {
48 apb {
49 mmc0: mmc@f0008000 {
50 pinctrl-0 = <
51 &pinctrl_board_mmc0
52 &pinctrl_mmc0_slot0_clk_cmd_dat0
53 &pinctrl_mmc0_slot0_dat1_3>;
54 status = "okay";
55 slot@0 {
56 reg = <0>;
57 bus-width = <4>;
58 cd-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
59 };
60 };
61
62 dbgu: serial@fffff200 {
63 status = "okay";
64 };
65
66 usart0: serial@f801c000 {
67 status = "okay";
68 };
69
70 i2c0: i2c@f8010000 {
71 status = "okay";
72 };
73
74 adc0: adc@f804c000 {
75 atmel,adc-ts-wires = <4>;
76 atmel,adc-ts-pressure-threshold = <10000>;
77 status = "okay";
78 };
79
80 pinctrl@fffff400 {
81 mmc0 {
82 pinctrl_board_mmc0: mmc0-board {
83 atmel,pins =
84 <AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD15 gpio CD pin pull up and deglitch */
85 };
86 };
87 };
88
89 watchdog@fffffe40 {
90 status = "okay";
91 };
92 };
93
94 nand0: nand@40000000 {
95 nand-bus-width = <8>;
96 nand-ecc-mode = "hw";
97 atmel,has-pmecc; /* Enable PMECC */
98 atmel,pmecc-cap = <4>;
99 atmel,pmecc-sector-size = <512>;
100 nand-on-flash-bbt;
101 status = "okay";
102
103 at91bootstrap@0 {
104 label = "at91bootstrap";
105 reg = <0x0 0x40000>;
106 };
107
108 uboot@40000 {
109 label = "u-boot";
110 reg = <0x40000 0x80000>;
111 };
112
113 ubootenv@c0000 {
114 label = "U-Boot Env";
115 reg = <0xc0000 0x140000>;
116 };
117
118 kernel@200000 {
119 label = "kernel";
120 reg = <0x200000 0x600000>;
121 };
122
123 rootfs@800000 {
124 label = "rootfs";
125 reg = <0x800000 0x0f800000>;
126 };
127 };
128 };
129};