1/* SPDX-License-Identifier: GPL-2.0 */
  2/*
  3 * ARM specific SMP header, this contains our implementation
  4 * details.
  5 */
  6#ifndef __ASMARM_SMP_PLAT_H
  7#define __ASMARM_SMP_PLAT_H
  8
  9#include <linux/cpumask.h>
 10#include <linux/err.h>
 11
 12#include <asm/cpu.h>
 13#include <asm/cputype.h>
 14
 15/*
 16 * Return true if we are running on a SMP platform
 17 */
 18static inline bool is_smp(void)
 19{
 20#ifndef CONFIG_SMP
 21	return false;
 22#elif defined(CONFIG_SMP_ON_UP)
 23	extern unsigned int smp_on_up;
 24	return !!smp_on_up;
 25#else
 26	return true;
 27#endif
 28}
 29
 30/**
 31 * smp_cpuid_part() - return part id for a given cpu
 32 * @cpu:	logical cpu id.
 33 *
 34 * Return: part id of logical cpu passed as argument.
 35 */
 36static inline unsigned int smp_cpuid_part(int cpu)
 37{
 38	struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpu);
 39
 40	return is_smp() ? cpu_info->cpuid & ARM_CPU_PART_MASK :
 41			  read_cpuid_part();
 42}
 43
 44/* all SMP configurations have the extended CPUID registers */
 45#ifndef CONFIG_MMU
 46#define tlb_ops_need_broadcast()	0
 47#else
 48static inline int tlb_ops_need_broadcast(void)
 49{
 50	if (!is_smp())
 51		return 0;
 52
 53	return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 2;
 54}
 55#endif
 56
 57#if !defined(CONFIG_SMP) || __LINUX_ARM_ARCH__ >= 7
 58#define cache_ops_need_broadcast()	0
 59#else
 60static inline int cache_ops_need_broadcast(void)
 61{
 62	if (!is_smp())
 63		return 0;
 64
 65	return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 1;
 66}
 67#endif
 68
 69/*
 70 * Logical CPU mapping.
 71 */
 72extern u32 __cpu_logical_map[];
 73#define cpu_logical_map(cpu)	__cpu_logical_map[cpu]
 74/*
 75 * Retrieve logical cpu index corresponding to a given MPIDR[23:0]
 76 *  - mpidr: MPIDR[23:0] to be used for the look-up
 77 *
 78 * Returns the cpu logical index or -EINVAL on look-up error
 79 */
 80static inline int get_logical_index(u32 mpidr)
 81{
 82	int cpu;
 83	for (cpu = 0; cpu < nr_cpu_ids; cpu++)
 84		if (cpu_logical_map(cpu) == mpidr)
 85			return cpu;
 86	return -EINVAL;
 87}
 88
 89/*
 90 * NOTE ! Assembly code relies on the following
 91 * structure memory layout in order to carry out load
 92 * multiple from its base address. For more
 93 * information check arch/arm/kernel/sleep.S
 94 */
 95struct mpidr_hash {
 96	u32	mask; /* used by sleep.S */
 97	u32	shift_aff[3]; /* used by sleep.S */
 98	u32	bits;
 99};
100
101extern struct mpidr_hash mpidr_hash;
102
103static inline u32 mpidr_hash_size(void)
104{
105	return 1 << mpidr_hash.bits;
106}
107
108extern int platform_can_secondary_boot(void);
109extern int platform_can_cpu_hotplug(void);
110
111#ifdef CONFIG_HOTPLUG_CPU
112extern int platform_can_hotplug_cpu(unsigned int cpu);
113#else
114static inline int platform_can_hotplug_cpu(unsigned int cpu)
115{
116	return 0;
117}
118#endif
119
120#endif

 
  1/*
  2 * ARM specific SMP header, this contains our implementation
  3 * details.
  4 */
  5#ifndef __ASMARM_SMP_PLAT_H
  6#define __ASMARM_SMP_PLAT_H
  7
  8#include <linux/cpumask.h>
  9#include <linux/err.h>
 10
 11#include <asm/cpu.h>
 12#include <asm/cputype.h>
 13
 14/*
 15 * Return true if we are running on a SMP platform
 16 */
 17static inline bool is_smp(void)
 18{
 19#ifndef CONFIG_SMP
 20	return false;
 21#elif defined(CONFIG_SMP_ON_UP)
 22	extern unsigned int smp_on_up;
 23	return !!smp_on_up;
 24#else
 25	return true;
 26#endif
 27}
 28
 29/**
 30 * smp_cpuid_part() - return part id for a given cpu
 31 * @cpu:	logical cpu id.
 32 *
 33 * Return: part id of logical cpu passed as argument.
 34 */
 35static inline unsigned int smp_cpuid_part(int cpu)
 36{
 37	struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpu);
 38
 39	return is_smp() ? cpu_info->cpuid & ARM_CPU_PART_MASK :
 40			  read_cpuid_part();
 41}
 42
 43/* all SMP configurations have the extended CPUID registers */
 44#ifndef CONFIG_MMU
 45#define tlb_ops_need_broadcast()	0
 46#else
 47static inline int tlb_ops_need_broadcast(void)
 48{
 49	if (!is_smp())
 50		return 0;
 51
 52	return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 2;
 53}
 54#endif
 55
 56#if !defined(CONFIG_SMP) || __LINUX_ARM_ARCH__ >= 7
 57#define cache_ops_need_broadcast()	0
 58#else
 59static inline int cache_ops_need_broadcast(void)
 60{
 61	if (!is_smp())
 62		return 0;
 63
 64	return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 1;
 65}
 66#endif
 67
 68/*
 69 * Logical CPU mapping.
 70 */
 71extern u32 __cpu_logical_map[];
 72#define cpu_logical_map(cpu)	__cpu_logical_map[cpu]
 73/*
 74 * Retrieve logical cpu index corresponding to a given MPIDR[23:0]
 75 *  - mpidr: MPIDR[23:0] to be used for the look-up
 76 *
 77 * Returns the cpu logical index or -EINVAL on look-up error
 78 */
 79static inline int get_logical_index(u32 mpidr)
 80{
 81	int cpu;
 82	for (cpu = 0; cpu < nr_cpu_ids; cpu++)
 83		if (cpu_logical_map(cpu) == mpidr)
 84			return cpu;
 85	return -EINVAL;
 86}
 87
 88/*
 89 * NOTE ! Assembly code relies on the following
 90 * structure memory layout in order to carry out load
 91 * multiple from its base address. For more
 92 * information check arch/arm/kernel/sleep.S
 93 */
 94struct mpidr_hash {
 95	u32	mask; /* used by sleep.S */
 96	u32	shift_aff[3]; /* used by sleep.S */
 97	u32	bits;
 98};
 99
100extern struct mpidr_hash mpidr_hash;
101
102static inline u32 mpidr_hash_size(void)
103{
104	return 1 << mpidr_hash.bits;
105}
106
107extern int platform_can_secondary_boot(void);
108extern int platform_can_cpu_hotplug(void);
109
110#ifdef CONFIG_HOTPLUG_CPU
111extern int platform_can_hotplug_cpu(unsigned int cpu);
112#else
113static inline int platform_can_hotplug_cpu(unsigned int cpu)
114{
115	return 0;
116}
117#endif
118
119#endif