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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2015, The Linux Foundation. All rights reserved.
4 */
5
6#include "dsi_cfg.h"
7
8static const char * const dsi_v2_bus_clk_names[] = {
9 "core_mmss", "iface", "bus",
10};
11
12static const struct msm_dsi_config apq8064_dsi_cfg = {
13 .io_offset = 0,
14 .reg_cfg = {
15 .num = 3,
16 .regs = {
17 {"vdda", 100000, 100}, /* 1.2 V */
18 {"avdd", 10000, 100}, /* 3.0 V */
19 {"vddio", 100000, 100}, /* 1.8 V */
20 },
21 },
22 .bus_clk_names = dsi_v2_bus_clk_names,
23 .num_bus_clks = ARRAY_SIZE(dsi_v2_bus_clk_names),
24 .io_start = { 0x4700000, 0x5800000 },
25 .num_dsi = 2,
26};
27
28static const char * const dsi_6g_bus_clk_names[] = {
29 "mdp_core", "iface", "bus", "core_mmss",
30};
31
32static const struct msm_dsi_config msm8974_apq8084_dsi_cfg = {
33 .io_offset = DSI_6G_REG_SHIFT,
34 .reg_cfg = {
35 .num = 4,
36 .regs = {
37 {"gdsc", -1, -1},
38 {"vdd", 150000, 100}, /* 3.0 V */
39 {"vdda", 100000, 100}, /* 1.2 V */
40 {"vddio", 100000, 100}, /* 1.8 V */
41 },
42 },
43 .bus_clk_names = dsi_6g_bus_clk_names,
44 .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names),
45 .io_start = { 0xfd922800, 0xfd922b00 },
46 .num_dsi = 2,
47};
48
49static const char * const dsi_8916_bus_clk_names[] = {
50 "mdp_core", "iface", "bus",
51};
52
53static const struct msm_dsi_config msm8916_dsi_cfg = {
54 .io_offset = DSI_6G_REG_SHIFT,
55 .reg_cfg = {
56 .num = 3,
57 .regs = {
58 {"gdsc", -1, -1},
59 {"vdda", 100000, 100}, /* 1.2 V */
60 {"vddio", 100000, 100}, /* 1.8 V */
61 },
62 },
63 .bus_clk_names = dsi_8916_bus_clk_names,
64 .num_bus_clks = ARRAY_SIZE(dsi_8916_bus_clk_names),
65 .io_start = { 0x1a98000 },
66 .num_dsi = 1,
67};
68
69static const struct msm_dsi_config msm8994_dsi_cfg = {
70 .io_offset = DSI_6G_REG_SHIFT,
71 .reg_cfg = {
72 .num = 7,
73 .regs = {
74 {"gdsc", -1, -1},
75 {"vdda", 100000, 100}, /* 1.25 V */
76 {"vddio", 100000, 100}, /* 1.8 V */
77 {"vcca", 10000, 100}, /* 1.0 V */
78 {"vdd", 100000, 100}, /* 1.8 V */
79 {"lab_reg", -1, -1},
80 {"ibb_reg", -1, -1},
81 },
82 },
83 .bus_clk_names = dsi_6g_bus_clk_names,
84 .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names),
85 .io_start = { 0xfd998000, 0xfd9a0000 },
86 .num_dsi = 2,
87};
88
89/*
90 * TODO: core_mmss_clk fails to enable for some reason, but things work fine
91 * without it too. Figure out why it doesn't enable and uncomment below
92 */
93static const char * const dsi_8996_bus_clk_names[] = {
94 "mdp_core", "iface", "bus", /* "core_mmss", */
95};
96
97static const struct msm_dsi_config msm8996_dsi_cfg = {
98 .io_offset = DSI_6G_REG_SHIFT,
99 .reg_cfg = {
100 .num = 2,
101 .regs = {
102 {"vdda", 18160, 1 }, /* 1.25 V */
103 {"vcca", 17000, 32 }, /* 0.925 V */
104 {"vddio", 100000, 100 },/* 1.8 V */
105 },
106 },
107 .bus_clk_names = dsi_8996_bus_clk_names,
108 .num_bus_clks = ARRAY_SIZE(dsi_8996_bus_clk_names),
109 .io_start = { 0x994000, 0x996000 },
110 .num_dsi = 2,
111};
112
113static const char * const dsi_msm8998_bus_clk_names[] = {
114 "iface", "bus", "core",
115};
116
117static const struct msm_dsi_config msm8998_dsi_cfg = {
118 .io_offset = DSI_6G_REG_SHIFT,
119 .reg_cfg = {
120 .num = 2,
121 .regs = {
122 {"vdd", 367000, 16 }, /* 0.9 V */
123 {"vdda", 62800, 2 }, /* 1.2 V */
124 },
125 },
126 .bus_clk_names = dsi_msm8998_bus_clk_names,
127 .num_bus_clks = ARRAY_SIZE(dsi_msm8998_bus_clk_names),
128 .io_start = { 0xc994000, 0xc996000 },
129 .num_dsi = 2,
130};
131
132static const char * const dsi_sdm845_bus_clk_names[] = {
133 "iface", "bus",
134};
135
136static const struct msm_dsi_config sdm845_dsi_cfg = {
137 .io_offset = DSI_6G_REG_SHIFT,
138 .reg_cfg = {
139 .num = 1,
140 .regs = {
141 {"vdda", 21800, 4 }, /* 1.2 V */
142 },
143 },
144 .bus_clk_names = dsi_sdm845_bus_clk_names,
145 .num_bus_clks = ARRAY_SIZE(dsi_sdm845_bus_clk_names),
146 .io_start = { 0xae94000, 0xae96000 },
147 .num_dsi = 2,
148};
149
150const static struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = {
151 .link_clk_enable = dsi_link_clk_enable_v2,
152 .link_clk_disable = dsi_link_clk_disable_v2,
153 .clk_init_ver = dsi_clk_init_v2,
154 .tx_buf_alloc = dsi_tx_buf_alloc_v2,
155 .tx_buf_get = dsi_tx_buf_get_v2,
156 .tx_buf_put = NULL,
157 .dma_base_get = dsi_dma_base_get_v2,
158 .calc_clk_rate = dsi_calc_clk_rate_v2,
159};
160
161const static struct msm_dsi_host_cfg_ops msm_dsi_6g_host_ops = {
162 .link_clk_enable = dsi_link_clk_enable_6g,
163 .link_clk_disable = dsi_link_clk_disable_6g,
164 .clk_init_ver = NULL,
165 .tx_buf_alloc = dsi_tx_buf_alloc_6g,
166 .tx_buf_get = dsi_tx_buf_get_6g,
167 .tx_buf_put = dsi_tx_buf_put_6g,
168 .dma_base_get = dsi_dma_base_get_6g,
169 .calc_clk_rate = dsi_calc_clk_rate_6g,
170};
171
172const static struct msm_dsi_host_cfg_ops msm_dsi_6g_v2_host_ops = {
173 .link_clk_enable = dsi_link_clk_enable_6g,
174 .link_clk_disable = dsi_link_clk_disable_6g,
175 .clk_init_ver = dsi_clk_init_6g_v2,
176 .tx_buf_alloc = dsi_tx_buf_alloc_6g,
177 .tx_buf_get = dsi_tx_buf_get_6g,
178 .tx_buf_put = dsi_tx_buf_put_6g,
179 .dma_base_get = dsi_dma_base_get_6g,
180 .calc_clk_rate = dsi_calc_clk_rate_6g,
181};
182
183static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = {
184 {MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064,
185 &apq8064_dsi_cfg, &msm_dsi_v2_host_ops},
186 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_0,
187 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops},
188 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1,
189 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops},
190 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1_1,
191 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops},
192 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_2,
193 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops},
194 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3,
195 &msm8994_dsi_cfg, &msm_dsi_6g_host_ops},
196 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3_1,
197 &msm8916_dsi_cfg, &msm_dsi_6g_host_ops},
198 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_1,
199 &msm8996_dsi_cfg, &msm_dsi_6g_host_ops},
200 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_0,
201 &msm8998_dsi_cfg, &msm_dsi_6g_v2_host_ops},
202 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_1,
203 &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops},
204};
205
206const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor)
207{
208 const struct msm_dsi_cfg_handler *cfg_hnd = NULL;
209 int i;
210
211 for (i = ARRAY_SIZE(dsi_cfg_handlers) - 1; i >= 0; i--) {
212 if ((dsi_cfg_handlers[i].major == major) &&
213 (dsi_cfg_handlers[i].minor == minor)) {
214 cfg_hnd = &dsi_cfg_handlers[i];
215 break;
216 }
217 }
218
219 return cfg_hnd;
220}
221
1/*
2 * Copyright (c) 2015, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include "dsi_cfg.h"
15
16static const char * const dsi_v2_bus_clk_names[] = {
17 "core_mmss", "iface", "bus",
18};
19
20static const struct msm_dsi_config apq8064_dsi_cfg = {
21 .io_offset = 0,
22 .reg_cfg = {
23 .num = 3,
24 .regs = {
25 {"vdda", 100000, 100}, /* 1.2 V */
26 {"avdd", 10000, 100}, /* 3.0 V */
27 {"vddio", 100000, 100}, /* 1.8 V */
28 },
29 },
30 .bus_clk_names = dsi_v2_bus_clk_names,
31 .num_bus_clks = ARRAY_SIZE(dsi_v2_bus_clk_names),
32 .io_start = { 0x4700000, 0x5800000 },
33 .num_dsi = 2,
34};
35
36static const char * const dsi_6g_bus_clk_names[] = {
37 "mdp_core", "iface", "bus", "core_mmss",
38};
39
40static const struct msm_dsi_config msm8974_apq8084_dsi_cfg = {
41 .io_offset = DSI_6G_REG_SHIFT,
42 .reg_cfg = {
43 .num = 4,
44 .regs = {
45 {"gdsc", -1, -1},
46 {"vdd", 150000, 100}, /* 3.0 V */
47 {"vdda", 100000, 100}, /* 1.2 V */
48 {"vddio", 100000, 100}, /* 1.8 V */
49 },
50 },
51 .bus_clk_names = dsi_6g_bus_clk_names,
52 .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names),
53 .io_start = { 0xfd922800, 0xfd922b00 },
54 .num_dsi = 2,
55};
56
57static const char * const dsi_8916_bus_clk_names[] = {
58 "mdp_core", "iface", "bus",
59};
60
61static const struct msm_dsi_config msm8916_dsi_cfg = {
62 .io_offset = DSI_6G_REG_SHIFT,
63 .reg_cfg = {
64 .num = 3,
65 .regs = {
66 {"gdsc", -1, -1},
67 {"vdda", 100000, 100}, /* 1.2 V */
68 {"vddio", 100000, 100}, /* 1.8 V */
69 },
70 },
71 .bus_clk_names = dsi_8916_bus_clk_names,
72 .num_bus_clks = ARRAY_SIZE(dsi_8916_bus_clk_names),
73 .io_start = { 0x1a98000 },
74 .num_dsi = 1,
75};
76
77static const struct msm_dsi_config msm8994_dsi_cfg = {
78 .io_offset = DSI_6G_REG_SHIFT,
79 .reg_cfg = {
80 .num = 7,
81 .regs = {
82 {"gdsc", -1, -1},
83 {"vdda", 100000, 100}, /* 1.25 V */
84 {"vddio", 100000, 100}, /* 1.8 V */
85 {"vcca", 10000, 100}, /* 1.0 V */
86 {"vdd", 100000, 100}, /* 1.8 V */
87 {"lab_reg", -1, -1},
88 {"ibb_reg", -1, -1},
89 },
90 },
91 .bus_clk_names = dsi_6g_bus_clk_names,
92 .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names),
93 .io_start = { 0xfd998000, 0xfd9a0000 },
94 .num_dsi = 2,
95};
96
97/*
98 * TODO: core_mmss_clk fails to enable for some reason, but things work fine
99 * without it too. Figure out why it doesn't enable and uncomment below
100 */
101static const char * const dsi_8996_bus_clk_names[] = {
102 "mdp_core", "iface", "bus", /* "core_mmss", */
103};
104
105static const struct msm_dsi_config msm8996_dsi_cfg = {
106 .io_offset = DSI_6G_REG_SHIFT,
107 .reg_cfg = {
108 .num = 2,
109 .regs = {
110 {"vdda", 18160, 1 }, /* 1.25 V */
111 {"vcca", 17000, 32 }, /* 0.925 V */
112 {"vddio", 100000, 100 },/* 1.8 V */
113 },
114 },
115 .bus_clk_names = dsi_8996_bus_clk_names,
116 .num_bus_clks = ARRAY_SIZE(dsi_8996_bus_clk_names),
117 .io_start = { 0x994000, 0x996000 },
118 .num_dsi = 2,
119};
120
121static const char * const dsi_sdm845_bus_clk_names[] = {
122 "iface", "bus",
123};
124
125static const struct msm_dsi_config sdm845_dsi_cfg = {
126 .io_offset = DSI_6G_REG_SHIFT,
127 .reg_cfg = {
128 .num = 1,
129 .regs = {
130 {"vdda", 21800, 4 }, /* 1.2 V */
131 },
132 },
133 .bus_clk_names = dsi_sdm845_bus_clk_names,
134 .num_bus_clks = ARRAY_SIZE(dsi_sdm845_bus_clk_names),
135 .io_start = { 0xae94000, 0xae96000 },
136 .num_dsi = 2,
137};
138
139static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = {
140 {MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064, &apq8064_dsi_cfg},
141 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_0,
142 &msm8974_apq8084_dsi_cfg},
143 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1,
144 &msm8974_apq8084_dsi_cfg},
145 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1_1,
146 &msm8974_apq8084_dsi_cfg},
147 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_2,
148 &msm8974_apq8084_dsi_cfg},
149 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3, &msm8994_dsi_cfg},
150 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3_1, &msm8916_dsi_cfg},
151 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_1, &msm8996_dsi_cfg},
152 {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_1, &sdm845_dsi_cfg},
153};
154
155const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor)
156{
157 const struct msm_dsi_cfg_handler *cfg_hnd = NULL;
158 int i;
159
160 for (i = ARRAY_SIZE(dsi_cfg_handlers) - 1; i >= 0; i--) {
161 if ((dsi_cfg_handlers[i].major == major) &&
162 (dsi_cfg_handlers[i].minor == minor)) {
163 cfg_hnd = &dsi_cfg_handlers[i];
164 break;
165 }
166 }
167
168 return cfg_hnd;
169}
170