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v5.4
  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * Keymile kmcent2 Device Tree Source, based on T1040RDB DTS
  4 *
  5 * (C) Copyright 2016
  6 * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com
  7 *
  8 * Copyright 2014 - 2015 Freescale Semiconductor Inc.
 
 
 
 
 
  9 */
 10
 11/include/ "t104xsi-pre.dtsi"
 12
 13/ {
 14	model = "keymile,kmcent2";
 15	compatible = "keymile,kmcent2";
 16
 17	aliases {
 18		front_phy = &front_phy;
 19	};
 20
 21	reserved-memory {
 22		#address-cells = <2>;
 23		#size-cells = <2>;
 24		ranges;
 25
 26		bman_fbpr: bman-fbpr {
 27			size = <0 0x1000000>;
 28			alignment = <0 0x1000000>;
 29		};
 30		qman_fqd: qman-fqd {
 31			size = <0 0x400000>;
 32			alignment = <0 0x400000>;
 33		};
 34		qman_pfdr: qman-pfdr {
 35			size = <0 0x2000000>;
 36			alignment = <0 0x2000000>;
 37		};
 38	};
 39
 40	ifc: localbus@ffe124000 {
 41		reg = <0xf 0xfe124000 0 0x2000>;
 42		ranges = <0 0 0xf 0xe8000000 0x04000000
 43			  1 0 0xf 0xfa000000 0x00010000
 44			  2 0 0xf 0xfb000000 0x00010000
 45			  4 0 0xf 0xc0000000 0x08000000
 46			  6 0 0xf 0xd0000000 0x08000000
 47			  7 0 0xf 0xd8000000 0x08000000>;
 48
 49		nor@0,0 {
 50			#address-cells = <1>;
 51			#size-cells = <1>;
 52			compatible = "cfi-flash";
 53			reg = <0x0 0x0 0x04000000>;
 54			bank-width = <2>;
 55			device-width = <2>;
 56		};
 57
 58		nand@1,0 {
 59			#address-cells = <1>;
 60			#size-cells = <1>;
 61			compatible = "fsl,ifc-nand";
 62			reg = <0x1 0x0 0x10000>;
 63		};
 64
 65		board-control@2,0 {
 66			compatible = "keymile,qriox";
 67			reg = <0x2 0x0 0x80>;
 68		};
 69
 70		chassis-mgmt@6,0 {
 71			compatible = "keymile,bfticu";
 72			reg = <6 0 0x100>;
 73			interrupt-controller;
 74			interrupt-parent = <&mpic>;
 75			interrupts = <11 1 0 0>;
 76			#interrupt-cells = <1>;
 77		};
 78
 79	};
 80
 81	memory {
 82		device_type = "memory";
 83	};
 84
 85	dcsr: dcsr@f00000000 {
 86		ranges = <0x00000000 0xf 0x00000000 0x01072000>;
 87	};
 88
 89	bportals: bman-portals@ff4000000 {
 90		ranges = <0x0 0xf 0xf4000000 0x2000000>;
 91	};
 92
 93	qportals: qman-portals@ff6000000 {
 94		ranges = <0x0 0xf 0xf6000000 0x2000000>;
 95	};
 96
 97	soc: soc@ffe000000 {
 98		ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
 99		reg = <0xf 0xfe000000 0 0x00001000>;
100
101		spi@110000 {
102			network-clock@1 {
103				compatible = "zarlink,zl30364";
104				reg = <1>;
105				spi-max-frequency = <1000000>;
106			};
107		};
108
109		sdhc@114000 {
110			status = "disabled";
111		};
112
113		i2c@118000 {
114			clock-frequency = <100000>;
115
116			mux@70 {
117				compatible = "nxp,pca9547";
118				reg = <0x70>;
119				#address-cells = <1>;
120				#size-cells = <0>;
121				i2c-mux-idle-disconnect;
122
123				i2c@0 {
124					reg = <0>;
125					#address-cells = <1>;
126					#size-cells = <0>;
127
128					eeprom@54 {
129						compatible = "atmel,24c02";
130						reg = <0x54>;
131						pagesize = <2>;
132						read-only;
133						label = "ddr3-spd";
134					};
135				};
136
137				i2c@7 {
138					reg = <7>;
139					#address-cells = <1>;
140					#size-cells = <0>;
141
142					temp-sensor@48 {
143						compatible = "national,lm75";
144						reg = <0x48>;
145						label = "SENSOR_0";
146					};
147					temp-sensor@4a {
148						compatible = "national,lm75";
149						reg = <0x4a>;
150						label = "SENSOR_2";
151					};
152					temp-sensor@4b {
153						compatible = "national,lm75";
154						reg = <0x4b>;
155						label = "SENSOR_3";
156					};
157				};
158			};
159		};
160
161		i2c@118100 {
162			clock-frequency = <100000>;
163
164			eeprom@50 {
165				compatible = "atmel,24c08";
166				reg = <0x50>;
167				pagesize = <16>;
168			};
169
170			eeprom@54 {
171				compatible = "atmel,24c08";
172				reg = <0x54>;
173				pagesize = <16>;
174			};
175		};
176
177		i2c@119000 {
178			status = "disabled";
179		};
180
181		i2c@119100 {
182			status = "disabled";
183		};
184
185		serial2: serial@11d500 {
186			status = "disabled";
187		};
188
189		serial3: serial@11d600 {
190			status = "disabled";
191		};
192
193		usb0: usb@210000 {
194			status = "disabled";
195		};
196		usb1: usb@211000 {
197			status = "disabled";
198		};
199
200		display@180000 {
201			status = "disabled";
202		};
203
204		sata@220000 {
205			status = "disabled";
206		};
207		sata@221000 {
208			status = "disabled";
209		};
210
211		fman@400000 {
212			ethernet@e0000 {
213				fixed-link = <0 1 1000 0 0>;
214				phy-connection-type = "sgmii";
215			};
216
217			ethernet@e2000 {
218				fixed-link = <1 1 1000 0 0>;
219				phy-connection-type = "sgmii";
220			};
221
222			ethernet@e4000 {
223				status = "disabled";
224			};
225
226			ethernet@e6000 {
227				status = "disabled";
228			};
229
230			ethernet@e8000 {
231				phy-handle = <&front_phy>;
232				phy-connection-type = "rgmii";
233			};
234
235			mdio0: mdio@fc000 {
236				front_phy: ethernet-phy@11 {
237					reg = <0x11>;
238				};
239			};
240		};
241	};
242
243
244	pci0: pcie@ffe240000 {
245		reg = <0xf 0xfe240000 0 0x10000>;
246		ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
247			  0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
248		pcie@0 {
249			ranges = <0x02000000 0 0xe0000000
250				  0x02000000 0 0xe0000000
251				  0 0x20000000
252
253				  0x01000000 0 0x00000000
254				  0x01000000 0 0x00000000
255				  0 0x00010000>;
256		};
257	};
258
259	pci1: pcie@ffe250000 {
260		status = "disabled";
261	};
262
263	pci2: pcie@ffe260000 {
264		status = "disabled";
265	};
266
267	pci3: pcie@ffe270000 {
268		status = "disabled";
269	};
270
271	qe: qe@ffe140000 {
272		ranges = <0x0 0xf 0xfe140000 0x40000>;
273		reg = <0xf 0xfe140000 0 0x480>;
274		brg-frequency = <0>;
275		bus-frequency = <0>;
276
277		si1: si@700 {
278			compatible = "fsl,t1040-qe-si";
279			reg = <0x700 0x80>;
280		};
281
282		siram1: siram@1000 {
283			compatible = "fsl,t1040-qe-siram";
284			reg = <0x1000 0x800>;
285		};
286
287		ucc_hdlc: ucc@2000 {
288			device_type = "hdlc";
289			compatible = "fsl,ucc-hdlc";
290			rx-clock-name = "clk9";
291			tx-clock-name = "clk9";
292			fsl,hdlc-bus;
293		};
294	};
295};
296
297#include "t1040si-post.dtsi"
v4.17
 
  1/*
  2 * Keymile kmcent2 Device Tree Source, based on T1040RDB DTS
  3 *
  4 * (C) Copyright 2016
  5 * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com
  6 *
  7 * Copyright 2014 - 2015 Freescale Semiconductor Inc.
  8 *
  9 * This program is free software; you can redistribute  it and/or modify it
 10 * under  the terms of  the GNU General  Public License as published by the
 11 * Free Software Foundation;  either version 2 of the  License, or (at your
 12 * option) any later version.
 13 */
 14
 15/include/ "t104xsi-pre.dtsi"
 16
 17/ {
 18	model = "keymile,kmcent2";
 19	compatible = "keymile,kmcent2";
 20
 21	aliases {
 22		front_phy = &front_phy;
 23	};
 24
 25	reserved-memory {
 26		#address-cells = <2>;
 27		#size-cells = <2>;
 28		ranges;
 29
 30		bman_fbpr: bman-fbpr {
 31			size = <0 0x1000000>;
 32			alignment = <0 0x1000000>;
 33		};
 34		qman_fqd: qman-fqd {
 35			size = <0 0x400000>;
 36			alignment = <0 0x400000>;
 37		};
 38		qman_pfdr: qman-pfdr {
 39			size = <0 0x2000000>;
 40			alignment = <0 0x2000000>;
 41		};
 42	};
 43
 44	ifc: localbus@ffe124000 {
 45		reg = <0xf 0xfe124000 0 0x2000>;
 46		ranges = <0 0 0xf 0xe8000000 0x04000000
 47			  1 0 0xf 0xfa000000 0x00010000
 48			  2 0 0xf 0xfb000000 0x00010000
 49			  4 0 0xf 0xc0000000 0x08000000
 50			  6 0 0xf 0xd0000000 0x08000000
 51			  7 0 0xf 0xd8000000 0x08000000>;
 52
 53		nor@0,0 {
 54			#address-cells = <1>;
 55			#size-cells = <1>;
 56			compatible = "cfi-flash";
 57			reg = <0x0 0x0 0x04000000>;
 58			bank-width = <2>;
 59			device-width = <2>;
 60		};
 61
 62		nand@1,0 {
 63			#address-cells = <1>;
 64			#size-cells = <1>;
 65			compatible = "fsl,ifc-nand";
 66			reg = <0x1 0x0 0x10000>;
 67		};
 68
 69		board-control@2,0 {
 70			compatible = "keymile,qriox";
 71			reg = <0x2 0x0 0x80>;
 72		};
 73
 74		chassis-mgmt@6,0 {
 75			compatible = "keymile,bfticu";
 76			reg = <6 0 0x100>;
 77			interrupt-controller;
 78			interrupt-parent = <&mpic>;
 79			interrupts = <11 1 0 0>;
 80			#interrupt-cells = <1>;
 81		};
 82
 83	};
 84
 85	memory {
 86		device_type = "memory";
 87	};
 88
 89	dcsr: dcsr@f00000000 {
 90		ranges = <0x00000000 0xf 0x00000000 0x01072000>;
 91	};
 92
 93	bportals: bman-portals@ff4000000 {
 94		ranges = <0x0 0xf 0xf4000000 0x2000000>;
 95	};
 96
 97	qportals: qman-portals@ff6000000 {
 98		ranges = <0x0 0xf 0xf6000000 0x2000000>;
 99	};
100
101	soc: soc@ffe000000 {
102		ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
103		reg = <0xf 0xfe000000 0 0x00001000>;
104
105		spi@110000 {
106			network-clock@1 {
107				compatible = "zarlink,zl30364";
108				reg = <1>;
109				spi-max-frequency = <1000000>;
110			};
111		};
112
113		sdhc@114000 {
114			status = "disabled";
115		};
116
117		i2c@118000 {
118			clock-frequency = <100000>;
119
120			mux@70 {
121				compatible = "nxp,pca9547";
122				reg = <0x70>;
123				#address-cells = <1>;
124				#size-cells = <0>;
125				i2c-mux-idle-disconnect;
126
127				i2c@0 {
128					reg = <0>;
129					#address-cells = <1>;
130					#size-cells = <0>;
131
132					eeprom@54 {
133						compatible = "24c02";
134						reg = <0x54>;
135						pagesize = <2>;
136						read-only;
137						label = "ddr3-spd";
138					};
139				};
140
141				i2c@7 {
142					reg = <7>;
143					#address-cells = <1>;
144					#size-cells = <0>;
145
146					temp-sensor@48 {
147						compatible = "national,lm75";
148						reg = <0x48>;
149						label = "SENSOR_0";
150					};
151					temp-sensor@4a {
152						compatible = "national,lm75";
153						reg = <0x4a>;
154						label = "SENSOR_2";
155					};
156					temp-sensor@4b {
157						compatible = "national,lm75";
158						reg = <0x4b>;
159						label = "SENSOR_3";
160					};
161				};
162			};
163		};
164
165		i2c@118100 {
166			clock-frequency = <100000>;
167
168			eeprom@50 {
169				compatible = "atmel,24c08";
170				reg = <0x50>;
171				pagesize = <16>;
172			};
173
174			eeprom@54 {
175				compatible = "atmel,24c08";
176				reg = <0x54>;
177				pagesize = <16>;
178			};
179		};
180
181		i2c@119000 {
182			status = "disabled";
183		};
184
185		i2c@119100 {
186			status = "disabled";
187		};
188
189		serial2: serial@11d500 {
190			status = "disabled";
191		};
192
193		serial3: serial@11d600 {
194			status = "disabled";
195		};
196
197		usb0: usb@210000 {
198			status = "disabled";
199		};
200		usb1: usb@211000 {
201			status = "disabled";
202		};
203
204		display@180000 {
205			status = "disabled";
206		};
207
208		sata@220000 {
209			status = "disabled";
210		};
211		sata@221000 {
212			status = "disabled";
213		};
214
215		fman@400000 {
216			ethernet@e0000 {
217				fixed-link = <0 1 1000 0 0>;
218				phy-connection-type = "sgmii";
219			};
220
221			ethernet@e2000 {
222				fixed-link = <1 1 1000 0 0>;
223				phy-connection-type = "sgmii";
224			};
225
226			ethernet@e4000 {
227				status = "disabled";
228			};
229
230			ethernet@e6000 {
231				status = "disabled";
232			};
233
234			ethernet@e8000 {
235				phy-handle = <&front_phy>;
236				phy-connection-type = "rgmii";
237			};
238
239			mdio0: mdio@fc000 {
240				front_phy: ethernet-phy@11 {
241					reg = <0x11>;
242				};
243			};
244		};
245	};
246
247
248	pci0: pcie@ffe240000 {
249		reg = <0xf 0xfe240000 0 0x10000>;
250		ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
251			  0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
252		pcie@0 {
253			ranges = <0x02000000 0 0xe0000000
254				  0x02000000 0 0xe0000000
255				  0 0x20000000
256
257				  0x01000000 0 0x00000000
258				  0x01000000 0 0x00000000
259				  0 0x00010000>;
260		};
261	};
262
263	pci1: pcie@ffe250000 {
264		status = "disabled";
265	};
266
267	pci2: pcie@ffe260000 {
268		status = "disabled";
269	};
270
271	pci3: pcie@ffe270000 {
272		status = "disabled";
273	};
274
275	qe: qe@ffe140000 {
276		ranges = <0x0 0xf 0xfe140000 0x40000>;
277		reg = <0xf 0xfe140000 0 0x480>;
278		brg-frequency = <0>;
279		bus-frequency = <0>;
280
281		si1: si@700 {
282			compatible = "fsl,t1040-qe-si";
283			reg = <0x700 0x80>;
284		};
285
286		siram1: siram@1000 {
287			compatible = "fsl,t1040-qe-siram";
288			reg = <0x1000 0x800>;
289		};
290
291		ucc_hdlc: ucc@2000 {
292			device_type = "hdlc";
293			compatible = "fsl,ucc-hdlc";
294			rx-clock-name = "clk9";
295			tx-clock-name = "clk9";
296			fsl,hdlc-bus;
297		};
298	};
299};
300
301#include "t1040si-post.dtsi"