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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device driver for the PMU on 68K-based Apple PowerBooks
4 *
5 * The VIA (versatile interface adapter) interfaces to the PMU,
6 * a 6805 microprocessor core whose primary function is to control
7 * battery charging and system power on the PowerBooks.
8 * The PMU also controls the ADB (Apple Desktop Bus) which connects
9 * to the keyboard and mouse, as well as the non-volatile RAM
10 * and the RTC (real time clock) chip.
11 *
12 * Adapted for 68K PMU by Joshua M. Thompson
13 *
14 * Based largely on the PowerMac PMU code by Paul Mackerras and
15 * Fabio Riccardi.
16 *
17 * Also based on the PMU driver from MkLinux by Apple Computer, Inc.
18 * and the Open Software Foundation, Inc.
19 */
20
21#include <stdarg.h>
22#include <linux/types.h>
23#include <linux/errno.h>
24#include <linux/kernel.h>
25#include <linux/delay.h>
26#include <linux/miscdevice.h>
27#include <linux/blkdev.h>
28#include <linux/pci.h>
29#include <linux/init.h>
30#include <linux/interrupt.h>
31
32#include <linux/adb.h>
33#include <linux/pmu.h>
34#include <linux/cuda.h>
35
36#include <asm/macintosh.h>
37#include <asm/macints.h>
38#include <asm/mac_via.h>
39
40#include <asm/pgtable.h>
41#include <asm/irq.h>
42#include <linux/uaccess.h>
43
44/* Misc minor number allocated for /dev/pmu */
45#define PMU_MINOR 154
46
47/* VIA registers - spaced 0x200 bytes apart */
48#define RS 0x200 /* skip between registers */
49#define B 0 /* B-side data */
50#define A RS /* A-side data */
51#define DIRB (2*RS) /* B-side direction (1=output) */
52#define DIRA (3*RS) /* A-side direction (1=output) */
53#define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
54#define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
55#define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
56#define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
57#define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
58#define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
59#define SR (10*RS) /* Shift register */
60#define ACR (11*RS) /* Auxiliary control register */
61#define PCR (12*RS) /* Peripheral control register */
62#define IFR (13*RS) /* Interrupt flag register */
63#define IER (14*RS) /* Interrupt enable register */
64#define ANH (15*RS) /* A-side data, no handshake */
65
66/* Bits in B data register: both active low */
67#define TACK 0x02 /* Transfer acknowledge (input) */
68#define TREQ 0x04 /* Transfer request (output) */
69
70/* Bits in ACR */
71#define SR_CTRL 0x1c /* Shift register control bits */
72#define SR_EXT 0x0c /* Shift on external clock */
73#define SR_OUT 0x10 /* Shift out if 1 */
74
75/* Bits in IFR and IER */
76#define SR_INT 0x04 /* Shift register full/empty */
77#define CB1_INT 0x10 /* transition on CB1 input */
78
79static enum pmu_state {
80 idle,
81 sending,
82 intack,
83 reading,
84 reading_intr,
85} pmu_state;
86
87static struct adb_request *current_req;
88static struct adb_request *last_req;
89static struct adb_request *req_awaiting_reply;
90static unsigned char interrupt_data[32];
91static unsigned char *reply_ptr;
92static int data_index;
93static int data_len;
94static int adb_int_pending;
95static int pmu_adb_flags;
96static int adb_dev_map;
97static struct adb_request bright_req_1, bright_req_2, bright_req_3;
98static int pmu_kind = PMU_UNKNOWN;
99static int pmu_fully_inited;
100
101int asleep;
102
103static int pmu_probe(void);
104static int pmu_init(void);
105static void pmu_start(void);
106static irqreturn_t pmu_interrupt(int irq, void *arg);
107static int pmu_send_request(struct adb_request *req, int sync);
108static int pmu_autopoll(int devs);
109void pmu_poll(void);
110static int pmu_reset_bus(void);
111
112static int init_pmu(void);
113static void pmu_start(void);
114static void send_byte(int x);
115static void recv_byte(void);
116static void pmu_done(struct adb_request *req);
117static void pmu_handle_data(unsigned char *data, int len);
118static void set_volume(int level);
119static void pmu_enable_backlight(int on);
120static void pmu_set_brightness(int level);
121
122struct adb_driver via_pmu_driver = {
123 .name = "68K PMU",
124 .probe = pmu_probe,
125 .init = pmu_init,
126 .send_request = pmu_send_request,
127 .autopoll = pmu_autopoll,
128 .poll = pmu_poll,
129 .reset_bus = pmu_reset_bus,
130};
131
132/*
133 * This table indicates for each PMU opcode:
134 * - the number of data bytes to be sent with the command, or -1
135 * if a length byte should be sent,
136 * - the number of response bytes which the PMU will return, or
137 * -1 if it will send a length byte.
138 */
139static s8 pmu_data_len[256][2] = {
140/* 0 1 2 3 4 5 6 7 */
141/*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
142/*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
143/*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
144/*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
145/*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
146/*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1},
147/*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
148/*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0},
149/*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
150/*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
151/*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
152/*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
153/*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
154/*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
155/*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
156/*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1},
157/*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
158/*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
159/*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
160/*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
161/*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
162/*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
163/*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
164/*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
165/*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
166/*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
167/*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
168/*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
169/*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0},
170/*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
171/*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
172/*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
173};
174
175int __init find_via_pmu(void)
176{
177 switch (macintosh_config->adb_type) {
178 case MAC_ADB_PB1:
179 pmu_kind = PMU_68K_V1;
180 break;
181 case MAC_ADB_PB2:
182 pmu_kind = PMU_68K_V2;
183 break;
184 default:
185 pmu_kind = PMU_UNKNOWN;
186 return -ENODEV;
187 }
188
189 pmu_state = idle;
190
191 if (!init_pmu())
192 goto fail_init;
193
194 pr_info("adb: PMU 68K driver v0.5 for Unified ADB\n");
195
196 return 1;
197
198fail_init:
199 pmu_kind = PMU_UNKNOWN;
200 return 0;
201}
202
203static int pmu_probe(void)
204{
205 if (pmu_kind == PMU_UNKNOWN)
206 return -ENODEV;
207 return 0;
208}
209
210static int pmu_init(void)
211{
212 if (pmu_kind == PMU_UNKNOWN)
213 return -ENODEV;
214 return 0;
215}
216
217static int __init via_pmu_start(void)
218{
219 if (pmu_kind == PMU_UNKNOWN)
220 return -ENODEV;
221
222 if (request_irq(IRQ_MAC_ADB_SR, pmu_interrupt, 0, "PMU_SR",
223 pmu_interrupt)) {
224 pr_err("%s: can't get SR irq\n", __func__);
225 return -ENODEV;
226 }
227 if (request_irq(IRQ_MAC_ADB_CL, pmu_interrupt, 0, "PMU_CL",
228 pmu_interrupt)) {
229 pr_err("%s: can't get CL irq\n", __func__);
230 free_irq(IRQ_MAC_ADB_SR, pmu_interrupt);
231 return -ENODEV;
232 }
233
234 pmu_fully_inited = 1;
235
236 /* Enable backlight */
237 pmu_enable_backlight(1);
238
239 return 0;
240}
241
242arch_initcall(via_pmu_start);
243
244static int __init init_pmu(void)
245{
246 int timeout;
247 volatile struct adb_request req;
248
249 via2[B] |= TREQ; /* negate TREQ */
250 via2[DIRB] = (via2[DIRB] | TREQ) & ~TACK; /* TACK in, TREQ out */
251
252 pmu_request((struct adb_request *) &req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB);
253 timeout = 100000;
254 while (!req.complete) {
255 if (--timeout < 0) {
256 printk(KERN_ERR "pmu_init: no response from PMU\n");
257 return -EAGAIN;
258 }
259 udelay(10);
260 pmu_poll();
261 }
262
263 /* ack all pending interrupts */
264 timeout = 100000;
265 interrupt_data[0] = 1;
266 while (interrupt_data[0] || pmu_state != idle) {
267 if (--timeout < 0) {
268 printk(KERN_ERR "pmu_init: timed out acking intrs\n");
269 return -EAGAIN;
270 }
271 if (pmu_state == idle) {
272 adb_int_pending = 1;
273 pmu_interrupt(0, NULL);
274 }
275 pmu_poll();
276 udelay(10);
277 }
278
279 pmu_request((struct adb_request *) &req, NULL, 2, PMU_SET_INTR_MASK,
280 PMU_INT_ADB_AUTO|PMU_INT_SNDBRT|PMU_INT_ADB);
281 timeout = 100000;
282 while (!req.complete) {
283 if (--timeout < 0) {
284 printk(KERN_ERR "pmu_init: no response from PMU\n");
285 return -EAGAIN;
286 }
287 udelay(10);
288 pmu_poll();
289 }
290
291 bright_req_1.complete = 1;
292 bright_req_2.complete = 1;
293 bright_req_3.complete = 1;
294
295 return 1;
296}
297
298int
299pmu_get_model(void)
300{
301 return pmu_kind;
302}
303
304/* Send an ADB command */
305static int
306pmu_send_request(struct adb_request *req, int sync)
307{
308 int i, ret;
309
310 if (!pmu_fully_inited)
311 {
312 req->complete = 1;
313 return -ENXIO;
314 }
315
316 ret = -EINVAL;
317
318 switch (req->data[0]) {
319 case PMU_PACKET:
320 for (i = 0; i < req->nbytes - 1; ++i)
321 req->data[i] = req->data[i+1];
322 --req->nbytes;
323 if (pmu_data_len[req->data[0]][1] != 0) {
324 req->reply[0] = ADB_RET_OK;
325 req->reply_len = 1;
326 } else
327 req->reply_len = 0;
328 ret = pmu_queue_request(req);
329 break;
330 case CUDA_PACKET:
331 switch (req->data[1]) {
332 case CUDA_GET_TIME:
333 if (req->nbytes != 2)
334 break;
335 req->data[0] = PMU_READ_RTC;
336 req->nbytes = 1;
337 req->reply_len = 3;
338 req->reply[0] = CUDA_PACKET;
339 req->reply[1] = 0;
340 req->reply[2] = CUDA_GET_TIME;
341 ret = pmu_queue_request(req);
342 break;
343 case CUDA_SET_TIME:
344 if (req->nbytes != 6)
345 break;
346 req->data[0] = PMU_SET_RTC;
347 req->nbytes = 5;
348 for (i = 1; i <= 4; ++i)
349 req->data[i] = req->data[i+1];
350 req->reply_len = 3;
351 req->reply[0] = CUDA_PACKET;
352 req->reply[1] = 0;
353 req->reply[2] = CUDA_SET_TIME;
354 ret = pmu_queue_request(req);
355 break;
356 case CUDA_GET_PRAM:
357 if (req->nbytes != 4)
358 break;
359 req->data[0] = PMU_READ_NVRAM;
360 req->data[1] = req->data[2];
361 req->data[2] = req->data[3];
362 req->nbytes = 3;
363 req->reply_len = 3;
364 req->reply[0] = CUDA_PACKET;
365 req->reply[1] = 0;
366 req->reply[2] = CUDA_GET_PRAM;
367 ret = pmu_queue_request(req);
368 break;
369 case CUDA_SET_PRAM:
370 if (req->nbytes != 5)
371 break;
372 req->data[0] = PMU_WRITE_NVRAM;
373 req->data[1] = req->data[2];
374 req->data[2] = req->data[3];
375 req->data[3] = req->data[4];
376 req->nbytes = 4;
377 req->reply_len = 3;
378 req->reply[0] = CUDA_PACKET;
379 req->reply[1] = 0;
380 req->reply[2] = CUDA_SET_PRAM;
381 ret = pmu_queue_request(req);
382 break;
383 }
384 break;
385 case ADB_PACKET:
386 for (i = req->nbytes - 1; i > 1; --i)
387 req->data[i+2] = req->data[i];
388 req->data[3] = req->nbytes - 2;
389 req->data[2] = pmu_adb_flags;
390 /*req->data[1] = req->data[1];*/
391 req->data[0] = PMU_ADB_CMD;
392 req->nbytes += 2;
393 req->reply_expected = 1;
394 req->reply_len = 0;
395 ret = pmu_queue_request(req);
396 break;
397 }
398 if (ret)
399 {
400 req->complete = 1;
401 return ret;
402 }
403
404 if (sync) {
405 while (!req->complete)
406 pmu_poll();
407 }
408
409 return 0;
410}
411
412/* Enable/disable autopolling */
413static int
414pmu_autopoll(int devs)
415{
416 struct adb_request req;
417
418 if (!pmu_fully_inited) return -ENXIO;
419
420 if (devs) {
421 adb_dev_map = devs;
422 pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
423 adb_dev_map >> 8, adb_dev_map);
424 pmu_adb_flags = 2;
425 } else {
426 pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
427 pmu_adb_flags = 0;
428 }
429 while (!req.complete)
430 pmu_poll();
431 return 0;
432}
433
434/* Reset the ADB bus */
435static int
436pmu_reset_bus(void)
437{
438 struct adb_request req;
439 long timeout;
440 int save_autopoll = adb_dev_map;
441
442 if (!pmu_fully_inited) return -ENXIO;
443
444 /* anyone got a better idea?? */
445 pmu_autopoll(0);
446
447 req.nbytes = 5;
448 req.done = NULL;
449 req.data[0] = PMU_ADB_CMD;
450 req.data[1] = 0;
451 req.data[2] = 3; /* ADB_BUSRESET ??? */
452 req.data[3] = 0;
453 req.data[4] = 0;
454 req.reply_len = 0;
455 req.reply_expected = 1;
456 if (pmu_queue_request(&req) != 0)
457 {
458 printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n");
459 return -EIO;
460 }
461 while (!req.complete)
462 pmu_poll();
463 timeout = 100000;
464 while (!req.complete) {
465 if (--timeout < 0) {
466 printk(KERN_ERR "pmu_adb_reset_bus (reset): no response from PMU\n");
467 return -EIO;
468 }
469 udelay(10);
470 pmu_poll();
471 }
472
473 if (save_autopoll != 0)
474 pmu_autopoll(save_autopoll);
475
476 return 0;
477}
478
479/* Construct and send a pmu request */
480int
481pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
482 int nbytes, ...)
483{
484 va_list list;
485 int i;
486
487 if (nbytes < 0 || nbytes > 32) {
488 printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
489 req->complete = 1;
490 return -EINVAL;
491 }
492 req->nbytes = nbytes;
493 req->done = done;
494 va_start(list, nbytes);
495 for (i = 0; i < nbytes; ++i)
496 req->data[i] = va_arg(list, int);
497 va_end(list);
498 if (pmu_data_len[req->data[0]][1] != 0) {
499 req->reply[0] = ADB_RET_OK;
500 req->reply_len = 1;
501 } else
502 req->reply_len = 0;
503 req->reply_expected = 0;
504 return pmu_queue_request(req);
505}
506
507int
508pmu_queue_request(struct adb_request *req)
509{
510 unsigned long flags;
511 int nsend;
512
513 if (req->nbytes <= 0) {
514 req->complete = 1;
515 return 0;
516 }
517 nsend = pmu_data_len[req->data[0]][0];
518 if (nsend >= 0 && req->nbytes != nsend + 1) {
519 req->complete = 1;
520 return -EINVAL;
521 }
522
523 req->next = NULL;
524 req->sent = 0;
525 req->complete = 0;
526 local_irq_save(flags);
527
528 if (current_req != 0) {
529 last_req->next = req;
530 last_req = req;
531 } else {
532 current_req = req;
533 last_req = req;
534 if (pmu_state == idle)
535 pmu_start();
536 }
537
538 local_irq_restore(flags);
539 return 0;
540}
541
542static void
543send_byte(int x)
544{
545 via1[ACR] |= SR_CTRL;
546 via1[SR] = x;
547 via2[B] &= ~TREQ; /* assert TREQ */
548}
549
550static void
551recv_byte(void)
552{
553 char c;
554
555 via1[ACR] = (via1[ACR] | SR_EXT) & ~SR_OUT;
556 c = via1[SR]; /* resets SR */
557 via2[B] &= ~TREQ;
558}
559
560static void
561pmu_start(void)
562{
563 unsigned long flags;
564 struct adb_request *req;
565
566 /* assert pmu_state == idle */
567 /* get the packet to send */
568 local_irq_save(flags);
569 req = current_req;
570 if (req == 0 || pmu_state != idle
571 || (req->reply_expected && req_awaiting_reply))
572 goto out;
573
574 pmu_state = sending;
575 data_index = 1;
576 data_len = pmu_data_len[req->data[0]][0];
577
578 /* set the shift register to shift out and send a byte */
579 send_byte(req->data[0]);
580
581out:
582 local_irq_restore(flags);
583}
584
585void
586pmu_poll(void)
587{
588 unsigned long flags;
589
590 local_irq_save(flags);
591 if (via1[IFR] & SR_INT) {
592 via1[IFR] = SR_INT;
593 pmu_interrupt(IRQ_MAC_ADB_SR, NULL);
594 }
595 if (via1[IFR] & CB1_INT) {
596 via1[IFR] = CB1_INT;
597 pmu_interrupt(IRQ_MAC_ADB_CL, NULL);
598 }
599 local_irq_restore(flags);
600}
601
602static irqreturn_t
603pmu_interrupt(int irq, void *dev_id)
604{
605 struct adb_request *req;
606 int timeout, bite = 0; /* to prevent compiler warning */
607
608#if 0
609 printk("pmu_interrupt: irq %d state %d acr %02X, b %02X data_index %d/%d adb_int_pending %d\n",
610 irq, pmu_state, (uint) via1[ACR], (uint) via2[B], data_index, data_len, adb_int_pending);
611#endif
612
613 if (irq == IRQ_MAC_ADB_CL) { /* CB1 interrupt */
614 adb_int_pending = 1;
615 } else if (irq == IRQ_MAC_ADB_SR) { /* SR interrupt */
616 if (via2[B] & TACK) {
617 printk(KERN_DEBUG "PMU: SR_INT but ack still high! (%x)\n", via2[B]);
618 }
619
620 /* if reading grab the byte */
621 if ((via1[ACR] & SR_OUT) == 0) bite = via1[SR];
622
623 /* reset TREQ and wait for TACK to go high */
624 via2[B] |= TREQ;
625 timeout = 3200;
626 while (!(via2[B] & TACK)) {
627 if (--timeout < 0) {
628 printk(KERN_ERR "PMU not responding (!ack)\n");
629 goto finish;
630 }
631 udelay(10);
632 }
633
634 switch (pmu_state) {
635 case sending:
636 req = current_req;
637 if (data_len < 0) {
638 data_len = req->nbytes - 1;
639 send_byte(data_len);
640 break;
641 }
642 if (data_index <= data_len) {
643 send_byte(req->data[data_index++]);
644 break;
645 }
646 req->sent = 1;
647 data_len = pmu_data_len[req->data[0]][1];
648 if (data_len == 0) {
649 pmu_state = idle;
650 current_req = req->next;
651 if (req->reply_expected)
652 req_awaiting_reply = req;
653 else
654 pmu_done(req);
655 } else {
656 pmu_state = reading;
657 data_index = 0;
658 reply_ptr = req->reply + req->reply_len;
659 recv_byte();
660 }
661 break;
662
663 case intack:
664 data_index = 0;
665 data_len = -1;
666 pmu_state = reading_intr;
667 reply_ptr = interrupt_data;
668 recv_byte();
669 break;
670
671 case reading:
672 case reading_intr:
673 if (data_len == -1) {
674 data_len = bite;
675 if (bite > 32)
676 printk(KERN_ERR "PMU: bad reply len %d\n",
677 bite);
678 } else {
679 reply_ptr[data_index++] = bite;
680 }
681 if (data_index < data_len) {
682 recv_byte();
683 break;
684 }
685
686 if (pmu_state == reading_intr) {
687 pmu_handle_data(interrupt_data, data_index);
688 } else {
689 req = current_req;
690 current_req = req->next;
691 req->reply_len += data_index;
692 pmu_done(req);
693 }
694 pmu_state = idle;
695
696 break;
697
698 default:
699 printk(KERN_ERR "pmu_interrupt: unknown state %d?\n",
700 pmu_state);
701 }
702 }
703finish:
704 if (pmu_state == idle) {
705 if (adb_int_pending) {
706 pmu_state = intack;
707 send_byte(PMU_INT_ACK);
708 adb_int_pending = 0;
709 } else if (current_req) {
710 pmu_start();
711 }
712 }
713
714#if 0
715 printk("pmu_interrupt: exit state %d acr %02X, b %02X data_index %d/%d adb_int_pending %d\n",
716 pmu_state, (uint) via1[ACR], (uint) via2[B], data_index, data_len, adb_int_pending);
717#endif
718 return IRQ_HANDLED;
719}
720
721static void
722pmu_done(struct adb_request *req)
723{
724 req->complete = 1;
725 if (req->done)
726 (*req->done)(req);
727}
728
729/* Interrupt data could be the result data from an ADB cmd */
730static void
731pmu_handle_data(unsigned char *data, int len)
732{
733 static int show_pmu_ints = 1;
734
735 asleep = 0;
736 if (len < 1) {
737 adb_int_pending = 0;
738 return;
739 }
740 if (data[0] & PMU_INT_ADB) {
741 if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
742 struct adb_request *req = req_awaiting_reply;
743 if (req == 0) {
744 printk(KERN_ERR "PMU: extra ADB reply\n");
745 return;
746 }
747 req_awaiting_reply = NULL;
748 if (len <= 2)
749 req->reply_len = 0;
750 else {
751 memcpy(req->reply, data + 1, len - 1);
752 req->reply_len = len - 1;
753 }
754 pmu_done(req);
755 } else {
756 adb_input(data+1, len-1, 1);
757 }
758 } else {
759 if (data[0] == 0x08 && len == 3) {
760 /* sound/brightness buttons pressed */
761 pmu_set_brightness(data[1] >> 3);
762 set_volume(data[2]);
763 } else if (show_pmu_ints
764 && !(data[0] == PMU_INT_TICK && len == 1)) {
765 int i;
766 printk(KERN_DEBUG "pmu intr");
767 for (i = 0; i < len; ++i)
768 printk(" %.2x", data[i]);
769 printk("\n");
770 }
771 }
772}
773
774static int backlight_level = -1;
775static int backlight_enabled = 0;
776
777#define LEVEL_TO_BRIGHT(lev) ((lev) < 1? 0x7f: 0x4a - ((lev) << 1))
778
779static void
780pmu_enable_backlight(int on)
781{
782 struct adb_request req;
783
784 if (on) {
785 /* first call: get current backlight value */
786 if (backlight_level < 0) {
787 switch(pmu_kind) {
788 case PMU_68K_V1:
789 case PMU_68K_V2:
790 pmu_request(&req, NULL, 3, PMU_READ_NVRAM, 0x14, 0xe);
791 while (!req.complete)
792 pmu_poll();
793 printk(KERN_DEBUG "pmu: nvram returned bright: %d\n", (int)req.reply[1]);
794 backlight_level = req.reply[1];
795 break;
796 default:
797 backlight_enabled = 0;
798 return;
799 }
800 }
801 pmu_request(&req, NULL, 2, PMU_BACKLIGHT_BRIGHT,
802 LEVEL_TO_BRIGHT(backlight_level));
803 while (!req.complete)
804 pmu_poll();
805 }
806 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
807 PMU_POW_BACKLIGHT | (on ? PMU_POW_ON : PMU_POW_OFF));
808 while (!req.complete)
809 pmu_poll();
810 backlight_enabled = on;
811}
812
813static void
814pmu_set_brightness(int level)
815{
816 int bright;
817
818 backlight_level = level;
819 bright = LEVEL_TO_BRIGHT(level);
820 if (!backlight_enabled)
821 return;
822 if (bright_req_1.complete)
823 pmu_request(&bright_req_1, NULL, 2, PMU_BACKLIGHT_BRIGHT,
824 bright);
825 if (bright_req_2.complete)
826 pmu_request(&bright_req_2, NULL, 2, PMU_POWER_CTRL,
827 PMU_POW_BACKLIGHT | (bright < 0x7f ? PMU_POW_ON : PMU_POW_OFF));
828}
829
830void
831pmu_enable_irled(int on)
832{
833 struct adb_request req;
834
835 pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED |
836 (on ? PMU_POW_ON : PMU_POW_OFF));
837 while (!req.complete)
838 pmu_poll();
839}
840
841static void
842set_volume(int level)
843{
844}
845
846int
847pmu_present(void)
848{
849 return (pmu_kind != PMU_UNKNOWN);
850}