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v5.4
   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 * Copyright 2002 Andi Kleen, SuSE Labs.
   4 * Thanks to Ben LaHaise for precious feedback.
   5 */
   6#include <linux/highmem.h>
   7#include <linux/memblock.h>
   8#include <linux/sched.h>
   9#include <linux/mm.h>
  10#include <linux/interrupt.h>
  11#include <linux/seq_file.h>
  12#include <linux/debugfs.h>
  13#include <linux/pfn.h>
  14#include <linux/percpu.h>
  15#include <linux/gfp.h>
  16#include <linux/pci.h>
  17#include <linux/vmalloc.h>
  18
  19#include <asm/e820/api.h>
  20#include <asm/processor.h>
  21#include <asm/tlbflush.h>
  22#include <asm/sections.h>
  23#include <asm/setup.h>
  24#include <linux/uaccess.h>
  25#include <asm/pgalloc.h>
  26#include <asm/proto.h>
  27#include <asm/pat.h>
  28#include <asm/set_memory.h>
  29
  30#include "mm_internal.h"
  31
  32/*
  33 * The current flushing context - we pass it instead of 5 arguments:
  34 */
  35struct cpa_data {
  36	unsigned long	*vaddr;
  37	pgd_t		*pgd;
  38	pgprot_t	mask_set;
  39	pgprot_t	mask_clr;
  40	unsigned long	numpages;
  41	unsigned long	curpage;
  42	unsigned long	pfn;
  43	unsigned int	flags;
  44	unsigned int	force_split		: 1,
  45			force_static_prot	: 1;
  46	struct page	**pages;
  47};
  48
  49enum cpa_warn {
  50	CPA_CONFLICT,
  51	CPA_PROTECT,
  52	CPA_DETECT,
  53};
  54
  55static const int cpa_warn_level = CPA_PROTECT;
  56
  57/*
  58 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
  59 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
  60 * entries change the page attribute in parallel to some other cpu
  61 * splitting a large page entry along with changing the attribute.
  62 */
  63static DEFINE_SPINLOCK(cpa_lock);
  64
  65#define CPA_FLUSHTLB 1
  66#define CPA_ARRAY 2
  67#define CPA_PAGES_ARRAY 4
  68#define CPA_NO_CHECK_ALIAS 8 /* Do not search for aliases */
  69
  70#ifdef CONFIG_PROC_FS
  71static unsigned long direct_pages_count[PG_LEVEL_NUM];
  72
  73void update_page_count(int level, unsigned long pages)
  74{
  75	/* Protect against CPA */
  76	spin_lock(&pgd_lock);
  77	direct_pages_count[level] += pages;
  78	spin_unlock(&pgd_lock);
  79}
  80
  81static void split_page_count(int level)
  82{
  83	if (direct_pages_count[level] == 0)
  84		return;
  85
  86	direct_pages_count[level]--;
  87	direct_pages_count[level - 1] += PTRS_PER_PTE;
  88}
  89
  90void arch_report_meminfo(struct seq_file *m)
  91{
  92	seq_printf(m, "DirectMap4k:    %8lu kB\n",
  93			direct_pages_count[PG_LEVEL_4K] << 2);
  94#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
  95	seq_printf(m, "DirectMap2M:    %8lu kB\n",
  96			direct_pages_count[PG_LEVEL_2M] << 11);
  97#else
  98	seq_printf(m, "DirectMap4M:    %8lu kB\n",
  99			direct_pages_count[PG_LEVEL_2M] << 12);
 100#endif
 101	if (direct_gbpages)
 102		seq_printf(m, "DirectMap1G:    %8lu kB\n",
 103			direct_pages_count[PG_LEVEL_1G] << 20);
 104}
 105#else
 106static inline void split_page_count(int level) { }
 107#endif
 108
 109#ifdef CONFIG_X86_CPA_STATISTICS
 110
 111static unsigned long cpa_1g_checked;
 112static unsigned long cpa_1g_sameprot;
 113static unsigned long cpa_1g_preserved;
 114static unsigned long cpa_2m_checked;
 115static unsigned long cpa_2m_sameprot;
 116static unsigned long cpa_2m_preserved;
 117static unsigned long cpa_4k_install;
 118
 119static inline void cpa_inc_1g_checked(void)
 120{
 121	cpa_1g_checked++;
 122}
 123
 124static inline void cpa_inc_2m_checked(void)
 125{
 126	cpa_2m_checked++;
 127}
 128
 129static inline void cpa_inc_4k_install(void)
 130{
 131	cpa_4k_install++;
 132}
 133
 134static inline void cpa_inc_lp_sameprot(int level)
 135{
 136	if (level == PG_LEVEL_1G)
 137		cpa_1g_sameprot++;
 138	else
 139		cpa_2m_sameprot++;
 140}
 141
 142static inline void cpa_inc_lp_preserved(int level)
 143{
 144	if (level == PG_LEVEL_1G)
 145		cpa_1g_preserved++;
 146	else
 147		cpa_2m_preserved++;
 148}
 149
 150static int cpastats_show(struct seq_file *m, void *p)
 151{
 152	seq_printf(m, "1G pages checked:     %16lu\n", cpa_1g_checked);
 153	seq_printf(m, "1G pages sameprot:    %16lu\n", cpa_1g_sameprot);
 154	seq_printf(m, "1G pages preserved:   %16lu\n", cpa_1g_preserved);
 155	seq_printf(m, "2M pages checked:     %16lu\n", cpa_2m_checked);
 156	seq_printf(m, "2M pages sameprot:    %16lu\n", cpa_2m_sameprot);
 157	seq_printf(m, "2M pages preserved:   %16lu\n", cpa_2m_preserved);
 158	seq_printf(m, "4K pages set-checked: %16lu\n", cpa_4k_install);
 159	return 0;
 160}
 161
 162static int cpastats_open(struct inode *inode, struct file *file)
 163{
 164	return single_open(file, cpastats_show, NULL);
 165}
 166
 167static const struct file_operations cpastats_fops = {
 168	.open		= cpastats_open,
 169	.read		= seq_read,
 170	.llseek		= seq_lseek,
 171	.release	= single_release,
 172};
 173
 174static int __init cpa_stats_init(void)
 175{
 176	debugfs_create_file("cpa_stats", S_IRUSR, arch_debugfs_dir, NULL,
 177			    &cpastats_fops);
 178	return 0;
 179}
 180late_initcall(cpa_stats_init);
 181#else
 182static inline void cpa_inc_1g_checked(void) { }
 183static inline void cpa_inc_2m_checked(void) { }
 184static inline void cpa_inc_4k_install(void) { }
 185static inline void cpa_inc_lp_sameprot(int level) { }
 186static inline void cpa_inc_lp_preserved(int level) { }
 187#endif
 188
 189
 190static inline int
 191within(unsigned long addr, unsigned long start, unsigned long end)
 192{
 193	return addr >= start && addr < end;
 194}
 195
 196static inline int
 197within_inclusive(unsigned long addr, unsigned long start, unsigned long end)
 198{
 199	return addr >= start && addr <= end;
 200}
 201
 202#ifdef CONFIG_X86_64
 203
 204static inline unsigned long highmap_start_pfn(void)
 205{
 206	return __pa_symbol(_text) >> PAGE_SHIFT;
 207}
 208
 209static inline unsigned long highmap_end_pfn(void)
 210{
 211	/* Do not reference physical address outside the kernel. */
 212	return __pa_symbol(roundup(_brk_end, PMD_SIZE) - 1) >> PAGE_SHIFT;
 213}
 214
 215static bool __cpa_pfn_in_highmap(unsigned long pfn)
 216{
 217	/*
 218	 * Kernel text has an alias mapping at a high address, known
 219	 * here as "highmap".
 220	 */
 221	return within_inclusive(pfn, highmap_start_pfn(), highmap_end_pfn());
 222}
 223
 224#else
 225
 226static bool __cpa_pfn_in_highmap(unsigned long pfn)
 227{
 228	/* There is no highmap on 32-bit */
 229	return false;
 230}
 231
 232#endif
 233
 234/*
 235 * See set_mce_nospec().
 236 *
 237 * Machine check recovery code needs to change cache mode of poisoned pages to
 238 * UC to avoid speculative access logging another error. But passing the
 239 * address of the 1:1 mapping to set_memory_uc() is a fine way to encourage a
 240 * speculative access. So we cheat and flip the top bit of the address. This
 241 * works fine for the code that updates the page tables. But at the end of the
 242 * process we need to flush the TLB and cache and the non-canonical address
 243 * causes a #GP fault when used by the INVLPG and CLFLUSH instructions.
 244 *
 245 * But in the common case we already have a canonical address. This code
 246 * will fix the top bit if needed and is a no-op otherwise.
 247 */
 248static inline unsigned long fix_addr(unsigned long addr)
 249{
 250#ifdef CONFIG_X86_64
 251	return (long)(addr << 1) >> 1;
 252#else
 253	return addr;
 254#endif
 255}
 256
 257static unsigned long __cpa_addr(struct cpa_data *cpa, unsigned long idx)
 258{
 259	if (cpa->flags & CPA_PAGES_ARRAY) {
 260		struct page *page = cpa->pages[idx];
 261
 262		if (unlikely(PageHighMem(page)))
 263			return 0;
 264
 265		return (unsigned long)page_address(page);
 266	}
 267
 268	if (cpa->flags & CPA_ARRAY)
 269		return cpa->vaddr[idx];
 270
 271	return *cpa->vaddr + idx * PAGE_SIZE;
 272}
 273
 274/*
 275 * Flushing functions
 276 */
 277
 278static void clflush_cache_range_opt(void *vaddr, unsigned int size)
 
 
 
 
 
 
 
 
 279{
 280	const unsigned long clflush_size = boot_cpu_data.x86_clflush_size;
 281	void *p = (void *)((unsigned long)vaddr & ~(clflush_size - 1));
 282	void *vend = vaddr + size;
 283
 284	if (p >= vend)
 285		return;
 286
 
 
 287	for (; p < vend; p += clflush_size)
 288		clflushopt(p);
 289}
 290
 291/**
 292 * clflush_cache_range - flush a cache range with clflush
 293 * @vaddr:	virtual start address
 294 * @size:	number of bytes to flush
 295 *
 296 * CLFLUSHOPT is an unordered instruction which needs fencing with MFENCE or
 297 * SFENCE to avoid ordering issues.
 298 */
 299void clflush_cache_range(void *vaddr, unsigned int size)
 300{
 301	mb();
 302	clflush_cache_range_opt(vaddr, size);
 303	mb();
 304}
 305EXPORT_SYMBOL_GPL(clflush_cache_range);
 306
 307void arch_invalidate_pmem(void *addr, size_t size)
 308{
 309	clflush_cache_range(addr, size);
 310}
 311EXPORT_SYMBOL_GPL(arch_invalidate_pmem);
 312
 313static void __cpa_flush_all(void *arg)
 314{
 315	unsigned long cache = (unsigned long)arg;
 316
 317	/*
 318	 * Flush all to work around Errata in early athlons regarding
 319	 * large page flushing.
 320	 */
 321	__flush_tlb_all();
 322
 323	if (cache && boot_cpu_data.x86 >= 4)
 324		wbinvd();
 325}
 326
 327static void cpa_flush_all(unsigned long cache)
 328{
 329	BUG_ON(irqs_disabled() && !early_boot_irqs_disabled);
 330
 331	on_each_cpu(__cpa_flush_all, (void *) cache, 1);
 332}
 333
 334void __cpa_flush_tlb(void *data)
 335{
 336	struct cpa_data *cpa = data;
 337	unsigned int i;
 338
 339	for (i = 0; i < cpa->numpages; i++)
 340		__flush_tlb_one_kernel(fix_addr(__cpa_addr(cpa, i)));
 
 341}
 342
 343static void cpa_flush(struct cpa_data *data, int cache)
 344{
 345	struct cpa_data *cpa = data;
 346	unsigned int i;
 347
 348	BUG_ON(irqs_disabled() && !early_boot_irqs_disabled);
 
 349
 350	if (cache && !static_cpu_has(X86_FEATURE_CLFLUSH)) {
 351		cpa_flush_all(cache);
 352		return;
 353	}
 354
 355	if (cpa->numpages <= tlb_single_page_flush_ceiling)
 356		on_each_cpu(__cpa_flush_tlb, cpa, 1);
 357	else
 358		flush_tlb_all();
 359
 360	if (!cache)
 361		return;
 362
 363	mb();
 364	for (i = 0; i < cpa->numpages; i++) {
 365		unsigned long addr = __cpa_addr(cpa, i);
 366		unsigned int level;
 367
 
 
 368		pte_t *pte = lookup_address(addr, &level);
 369
 370		/*
 371		 * Only flush present addresses:
 372		 */
 373		if (pte && (pte_val(*pte) & _PAGE_PRESENT))
 374			clflush_cache_range_opt((void *)fix_addr(addr), PAGE_SIZE);
 375	}
 376	mb();
 377}
 378
 379static bool overlaps(unsigned long r1_start, unsigned long r1_end,
 380		     unsigned long r2_start, unsigned long r2_end)
 381{
 382	return (r1_start <= r2_end && r1_end >= r2_start) ||
 383		(r2_start <= r1_end && r2_end >= r1_start);
 384}
 385
 386#ifdef CONFIG_PCI_BIOS
 387/*
 388 * The BIOS area between 640k and 1Mb needs to be executable for PCI BIOS
 389 * based config access (CONFIG_PCI_GOBIOS) support.
 390 */
 391#define BIOS_PFN	PFN_DOWN(BIOS_BEGIN)
 392#define BIOS_PFN_END	PFN_DOWN(BIOS_END - 1)
 393
 394static pgprotval_t protect_pci_bios(unsigned long spfn, unsigned long epfn)
 395{
 396	if (pcibios_enabled && overlaps(spfn, epfn, BIOS_PFN, BIOS_PFN_END))
 397		return _PAGE_NX;
 398	return 0;
 399}
 400#else
 401static pgprotval_t protect_pci_bios(unsigned long spfn, unsigned long epfn)
 402{
 403	return 0;
 404}
 405#endif
 406
 407/*
 408 * The .rodata section needs to be read-only. Using the pfn catches all
 409 * aliases.  This also includes __ro_after_init, so do not enforce until
 410 * kernel_set_to_readonly is true.
 411 */
 412static pgprotval_t protect_rodata(unsigned long spfn, unsigned long epfn)
 413{
 414	unsigned long epfn_ro, spfn_ro = PFN_DOWN(__pa_symbol(__start_rodata));
 415
 416	/*
 417	 * Note: __end_rodata is at page aligned and not inclusive, so
 418	 * subtract 1 to get the last enforced PFN in the rodata area.
 
 
 
 
 
 419	 */
 420	epfn_ro = PFN_DOWN(__pa_symbol(__end_rodata)) - 1;
 
 
 
 421
 422	if (kernel_set_to_readonly && overlaps(spfn, epfn, spfn_ro, epfn_ro))
 423		return _PAGE_RW;
 424	return 0;
 425}
 426
 427/*
 428 * Protect kernel text against becoming non executable by forbidding
 429 * _PAGE_NX.  This protects only the high kernel mapping (_text -> _etext)
 430 * out of which the kernel actually executes.  Do not protect the low
 431 * mapping.
 432 *
 433 * This does not cover __inittext since that is gone after boot.
 434 */
 435static pgprotval_t protect_kernel_text(unsigned long start, unsigned long end)
 436{
 437	unsigned long t_end = (unsigned long)_etext - 1;
 438	unsigned long t_start = (unsigned long)_text;
 439
 440	if (overlaps(start, end, t_start, t_end))
 441		return _PAGE_NX;
 442	return 0;
 443}
 444
 445#if defined(CONFIG_X86_64)
 446/*
 447 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
 448 * kernel text mappings for the large page aligned text, rodata sections
 449 * will be always read-only. For the kernel identity mappings covering the
 450 * holes caused by this alignment can be anything that user asks.
 451 *
 452 * This will preserve the large page mappings for kernel text/data at no
 453 * extra cost.
 454 */
 455static pgprotval_t protect_kernel_text_ro(unsigned long start,
 456					  unsigned long end)
 457{
 458	unsigned long t_end = (unsigned long)__end_rodata_hpage_align - 1;
 459	unsigned long t_start = (unsigned long)_text;
 460	unsigned int level;
 461
 462	if (!kernel_set_to_readonly || !overlaps(start, end, t_start, t_end))
 463		return 0;
 464	/*
 465	 * Don't enforce the !RW mapping for the kernel text mapping, if
 466	 * the current mapping is already using small page mapping.  No
 467	 * need to work hard to preserve large page mappings in this case.
 468	 *
 469	 * This also fixes the Linux Xen paravirt guest boot failure caused
 470	 * by unexpected read-only mappings for kernel identity
 471	 * mappings. In this paravirt guest case, the kernel text mapping
 472	 * and the kernel identity mapping share the same page-table pages,
 473	 * so the protections for kernel text and identity mappings have to
 474	 * be the same.
 475	 */
 476	if (lookup_address(start, &level) && (level != PG_LEVEL_4K))
 477		return _PAGE_RW;
 478	return 0;
 479}
 480#else
 481static pgprotval_t protect_kernel_text_ro(unsigned long start,
 482					  unsigned long end)
 483{
 484	return 0;
 485}
 486#endif
 487
 488static inline bool conflicts(pgprot_t prot, pgprotval_t val)
 489{
 490	return (pgprot_val(prot) & ~val) != pgprot_val(prot);
 491}
 492
 493static inline void check_conflict(int warnlvl, pgprot_t prot, pgprotval_t val,
 494				  unsigned long start, unsigned long end,
 495				  unsigned long pfn, const char *txt)
 496{
 497	static const char *lvltxt[] = {
 498		[CPA_CONFLICT]	= "conflict",
 499		[CPA_PROTECT]	= "protect",
 500		[CPA_DETECT]	= "detect",
 501	};
 502
 503	if (warnlvl > cpa_warn_level || !conflicts(prot, val))
 504		return;
 505
 506	pr_warn("CPA %8s %10s: 0x%016lx - 0x%016lx PFN %lx req %016llx prevent %016llx\n",
 507		lvltxt[warnlvl], txt, start, end, pfn, (unsigned long long)pgprot_val(prot),
 508		(unsigned long long)val);
 
 
 
 509}
 510
 511/*
 512 * Certain areas of memory on x86 require very specific protection flags,
 513 * for example the BIOS area or kernel text. Callers don't always get this
 514 * right (again, ioremap() on BIOS memory is not uncommon) so this function
 515 * checks and fixes these known static required protection bits.
 516 */
 517static inline pgprot_t static_protections(pgprot_t prot, unsigned long start,
 518					  unsigned long pfn, unsigned long npg,
 519					  unsigned long lpsize, int warnlvl)
 520{
 521	pgprotval_t forbidden, res;
 522	unsigned long end;
 523
 524	/*
 525	 * There is no point in checking RW/NX conflicts when the requested
 526	 * mapping is setting the page !PRESENT.
 527	 */
 528	if (!(pgprot_val(prot) & _PAGE_PRESENT))
 529		return prot;
 530
 531	/* Operate on the virtual address */
 532	end = start + npg * PAGE_SIZE - 1;
 533
 534	res = protect_kernel_text(start, end);
 535	check_conflict(warnlvl, prot, res, start, end, pfn, "Text NX");
 536	forbidden = res;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 537
 
 538	/*
 539	 * Special case to preserve a large page. If the change spawns the
 540	 * full large page mapping then there is no point to split it
 541	 * up. Happens with ftrace and is going to be removed once ftrace
 542	 * switched to text_poke().
 
 
 
 543	 */
 544	if (lpsize != (npg * PAGE_SIZE) || (start & (lpsize - 1))) {
 545		res = protect_kernel_text_ro(start, end);
 546		check_conflict(warnlvl, prot, res, start, end, pfn, "Text RO");
 547		forbidden |= res;
 548	}
 549
 550	/* Check the PFN directly */
 551	res = protect_pci_bios(pfn, pfn + npg - 1);
 552	check_conflict(warnlvl, prot, res, start, end, pfn, "PCIBIOS NX");
 553	forbidden |= res;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 554
 555	res = protect_rodata(pfn, pfn + npg - 1);
 556	check_conflict(warnlvl, prot, res, start, end, pfn, "Rodata RO");
 557	forbidden |= res;
 558
 559	return __pgprot(pgprot_val(prot) & ~forbidden);
 560}
 561
 562/*
 563 * Lookup the page table entry for a virtual address in a specific pgd.
 564 * Return a pointer to the entry and the level of the mapping.
 565 */
 566pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
 567			     unsigned int *level)
 568{
 569	p4d_t *p4d;
 570	pud_t *pud;
 571	pmd_t *pmd;
 572
 573	*level = PG_LEVEL_NONE;
 574
 575	if (pgd_none(*pgd))
 576		return NULL;
 577
 578	p4d = p4d_offset(pgd, address);
 579	if (p4d_none(*p4d))
 580		return NULL;
 581
 582	*level = PG_LEVEL_512G;
 583	if (p4d_large(*p4d) || !p4d_present(*p4d))
 584		return (pte_t *)p4d;
 585
 586	pud = pud_offset(p4d, address);
 587	if (pud_none(*pud))
 588		return NULL;
 589
 590	*level = PG_LEVEL_1G;
 591	if (pud_large(*pud) || !pud_present(*pud))
 592		return (pte_t *)pud;
 593
 594	pmd = pmd_offset(pud, address);
 595	if (pmd_none(*pmd))
 596		return NULL;
 597
 598	*level = PG_LEVEL_2M;
 599	if (pmd_large(*pmd) || !pmd_present(*pmd))
 600		return (pte_t *)pmd;
 601
 602	*level = PG_LEVEL_4K;
 603
 604	return pte_offset_kernel(pmd, address);
 605}
 606
 607/*
 608 * Lookup the page table entry for a virtual address. Return a pointer
 609 * to the entry and the level of the mapping.
 610 *
 611 * Note: We return pud and pmd either when the entry is marked large
 612 * or when the present bit is not set. Otherwise we would return a
 613 * pointer to a nonexisting mapping.
 614 */
 615pte_t *lookup_address(unsigned long address, unsigned int *level)
 616{
 617	return lookup_address_in_pgd(pgd_offset_k(address), address, level);
 618}
 619EXPORT_SYMBOL_GPL(lookup_address);
 620
 621static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
 622				  unsigned int *level)
 623{
 624	if (cpa->pgd)
 625		return lookup_address_in_pgd(cpa->pgd + pgd_index(address),
 626					       address, level);
 627
 628	return lookup_address(address, level);
 629}
 630
 631/*
 632 * Lookup the PMD entry for a virtual address. Return a pointer to the entry
 633 * or NULL if not present.
 634 */
 635pmd_t *lookup_pmd_address(unsigned long address)
 636{
 637	pgd_t *pgd;
 638	p4d_t *p4d;
 639	pud_t *pud;
 640
 641	pgd = pgd_offset_k(address);
 642	if (pgd_none(*pgd))
 643		return NULL;
 644
 645	p4d = p4d_offset(pgd, address);
 646	if (p4d_none(*p4d) || p4d_large(*p4d) || !p4d_present(*p4d))
 647		return NULL;
 648
 649	pud = pud_offset(p4d, address);
 650	if (pud_none(*pud) || pud_large(*pud) || !pud_present(*pud))
 651		return NULL;
 652
 653	return pmd_offset(pud, address);
 654}
 655
 656/*
 657 * This is necessary because __pa() does not work on some
 658 * kinds of memory, like vmalloc() or the alloc_remap()
 659 * areas on 32-bit NUMA systems.  The percpu areas can
 660 * end up in this kind of memory, for instance.
 661 *
 662 * This could be optimized, but it is only intended to be
 663 * used at inititalization time, and keeping it
 664 * unoptimized should increase the testing coverage for
 665 * the more obscure platforms.
 666 */
 667phys_addr_t slow_virt_to_phys(void *__virt_addr)
 668{
 669	unsigned long virt_addr = (unsigned long)__virt_addr;
 670	phys_addr_t phys_addr;
 671	unsigned long offset;
 672	enum pg_level level;
 673	pte_t *pte;
 674
 675	pte = lookup_address(virt_addr, &level);
 676	BUG_ON(!pte);
 677
 678	/*
 679	 * pXX_pfn() returns unsigned long, which must be cast to phys_addr_t
 680	 * before being left-shifted PAGE_SHIFT bits -- this trick is to
 681	 * make 32-PAE kernel work correctly.
 682	 */
 683	switch (level) {
 684	case PG_LEVEL_1G:
 685		phys_addr = (phys_addr_t)pud_pfn(*(pud_t *)pte) << PAGE_SHIFT;
 686		offset = virt_addr & ~PUD_PAGE_MASK;
 687		break;
 688	case PG_LEVEL_2M:
 689		phys_addr = (phys_addr_t)pmd_pfn(*(pmd_t *)pte) << PAGE_SHIFT;
 690		offset = virt_addr & ~PMD_PAGE_MASK;
 691		break;
 692	default:
 693		phys_addr = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT;
 694		offset = virt_addr & ~PAGE_MASK;
 695	}
 696
 697	return (phys_addr_t)(phys_addr | offset);
 698}
 699EXPORT_SYMBOL_GPL(slow_virt_to_phys);
 700
 701/*
 702 * Set the new pmd in all the pgds we know about:
 703 */
 704static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
 705{
 706	/* change init_mm */
 707	set_pte_atomic(kpte, pte);
 708#ifdef CONFIG_X86_32
 709	if (!SHARED_KERNEL_PMD) {
 710		struct page *page;
 711
 712		list_for_each_entry(page, &pgd_list, lru) {
 713			pgd_t *pgd;
 714			p4d_t *p4d;
 715			pud_t *pud;
 716			pmd_t *pmd;
 717
 718			pgd = (pgd_t *)page_address(page) + pgd_index(address);
 719			p4d = p4d_offset(pgd, address);
 720			pud = pud_offset(p4d, address);
 721			pmd = pmd_offset(pud, address);
 722			set_pte_atomic((pte_t *)pmd, pte);
 723		}
 724	}
 725#endif
 726}
 727
 728static pgprot_t pgprot_clear_protnone_bits(pgprot_t prot)
 729{
 730	/*
 731	 * _PAGE_GLOBAL means "global page" for present PTEs.
 732	 * But, it is also used to indicate _PAGE_PROTNONE
 733	 * for non-present PTEs.
 734	 *
 735	 * This ensures that a _PAGE_GLOBAL PTE going from
 736	 * present to non-present is not confused as
 737	 * _PAGE_PROTNONE.
 738	 */
 739	if (!(pgprot_val(prot) & _PAGE_PRESENT))
 740		pgprot_val(prot) &= ~_PAGE_GLOBAL;
 741
 742	return prot;
 743}
 744
 745static int __should_split_large_page(pte_t *kpte, unsigned long address,
 746				     struct cpa_data *cpa)
 
 747{
 748	unsigned long numpages, pmask, psize, lpaddr, pfn, old_pfn;
 749	pgprot_t old_prot, new_prot, req_prot, chk_prot;
 750	pte_t new_pte, *tmp;
 
 751	enum pg_level level;
 752
 
 
 
 
 753	/*
 754	 * Check for races, another CPU might have split this page
 755	 * up already:
 756	 */
 757	tmp = _lookup_address_cpa(cpa, address, &level);
 758	if (tmp != kpte)
 759		return 1;
 760
 761	switch (level) {
 762	case PG_LEVEL_2M:
 763		old_prot = pmd_pgprot(*(pmd_t *)kpte);
 764		old_pfn = pmd_pfn(*(pmd_t *)kpte);
 765		cpa_inc_2m_checked();
 766		break;
 767	case PG_LEVEL_1G:
 768		old_prot = pud_pgprot(*(pud_t *)kpte);
 769		old_pfn = pud_pfn(*(pud_t *)kpte);
 770		cpa_inc_1g_checked();
 771		break;
 772	default:
 773		return -EINVAL;
 
 774	}
 775
 776	psize = page_level_size(level);
 777	pmask = page_level_mask(level);
 778
 779	/*
 780	 * Calculate the number of pages, which fit into this large
 781	 * page starting at address:
 782	 */
 783	lpaddr = (address + psize) & pmask;
 784	numpages = (lpaddr - address) >> PAGE_SHIFT;
 785	if (numpages < cpa->numpages)
 786		cpa->numpages = numpages;
 787
 788	/*
 789	 * We are safe now. Check whether the new pgprot is the same:
 790	 * Convert protection attributes to 4k-format, as cpa->mask* are set
 791	 * up accordingly.
 792	 */
 793
 794	/* Clear PSE (aka _PAGE_PAT) and move PAT bit to correct position */
 795	req_prot = pgprot_large_2_4k(old_prot);
 796
 797	pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
 798	pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
 799
 800	/*
 801	 * req_prot is in format of 4k pages. It must be converted to large
 802	 * page format: the caching mode includes the PAT bit located at
 803	 * different bit positions in the two formats.
 804	 */
 805	req_prot = pgprot_4k_2_large(req_prot);
 806	req_prot = pgprot_clear_protnone_bits(req_prot);
 807	if (pgprot_val(req_prot) & _PAGE_PRESENT)
 808		pgprot_val(req_prot) |= _PAGE_PSE;
 809
 810	/*
 811	 * old_pfn points to the large page base pfn. So we need to add the
 812	 * offset of the virtual address:
 813	 */
 814	pfn = old_pfn + ((address & (psize - 1)) >> PAGE_SHIFT);
 815	cpa->pfn = pfn;
 816
 817	/*
 818	 * Calculate the large page base address and the number of 4K pages
 819	 * in the large page
 820	 */
 821	lpaddr = address & pmask;
 822	numpages = psize >> PAGE_SHIFT;
 823
 824	/*
 825	 * Sanity check that the existing mapping is correct versus the static
 826	 * protections. static_protections() guards against !PRESENT, so no
 827	 * extra conditional required here.
 828	 */
 829	chk_prot = static_protections(old_prot, lpaddr, old_pfn, numpages,
 830				      psize, CPA_CONFLICT);
 
 
 831
 832	if (WARN_ON_ONCE(pgprot_val(chk_prot) != pgprot_val(old_prot))) {
 833		/*
 834		 * Split the large page and tell the split code to
 835		 * enforce static protections.
 836		 */
 837		cpa->force_static_prot = 1;
 838		return 1;
 839	}
 840
 841	/*
 842	 * Optimization: If the requested pgprot is the same as the current
 843	 * pgprot, then the large page can be preserved and no updates are
 844	 * required independent of alignment and length of the requested
 845	 * range. The above already established that the current pgprot is
 846	 * correct, which in consequence makes the requested pgprot correct
 847	 * as well if it is the same. The static protection scan below will
 848	 * not come to a different conclusion.
 849	 */
 850	if (pgprot_val(req_prot) == pgprot_val(old_prot)) {
 851		cpa_inc_lp_sameprot(level);
 852		return 0;
 853	}
 854
 855	/*
 856	 * If the requested range does not cover the full page, split it up
 857	 */
 858	if (address != lpaddr || cpa->numpages != numpages)
 859		return 1;
 860
 861	/*
 862	 * Check whether the requested pgprot is conflicting with a static
 863	 * protection requirement in the large page.
 864	 */
 865	new_prot = static_protections(req_prot, lpaddr, old_pfn, numpages,
 866				      psize, CPA_DETECT);
 867
 868	/*
 869	 * If there is a conflict, split the large page.
 870	 *
 871	 * There used to be a 4k wise evaluation trying really hard to
 872	 * preserve the large pages, but experimentation has shown, that this
 873	 * does not help at all. There might be corner cases which would
 874	 * preserve one large page occasionally, but it's really not worth the
 875	 * extra code and cycles for the common case.
 876	 */
 877	if (pgprot_val(req_prot) != pgprot_val(new_prot))
 878		return 1;
 879
 880	/* All checks passed. Update the large page mapping. */
 881	new_pte = pfn_pte(old_pfn, new_prot);
 882	__set_pmd_pte(kpte, address, new_pte);
 883	cpa->flags |= CPA_FLUSHTLB;
 884	cpa_inc_lp_preserved(level);
 885	return 0;
 886}
 887
 888static int should_split_large_page(pte_t *kpte, unsigned long address,
 889				   struct cpa_data *cpa)
 890{
 891	int do_split;
 892
 893	if (cpa->force_split)
 894		return 1;
 895
 896	spin_lock(&pgd_lock);
 897	do_split = __should_split_large_page(kpte, address, cpa);
 898	spin_unlock(&pgd_lock);
 899
 900	return do_split;
 901}
 902
 903static void split_set_pte(struct cpa_data *cpa, pte_t *pte, unsigned long pfn,
 904			  pgprot_t ref_prot, unsigned long address,
 905			  unsigned long size)
 906{
 907	unsigned int npg = PFN_DOWN(size);
 908	pgprot_t prot;
 909
 910	/*
 911	 * If should_split_large_page() discovered an inconsistent mapping,
 912	 * remove the invalid protection in the split mapping.
 913	 */
 914	if (!cpa->force_static_prot)
 915		goto set;
 916
 917	/* Hand in lpsize = 0 to enforce the protection mechanism */
 918	prot = static_protections(ref_prot, address, pfn, npg, 0, CPA_PROTECT);
 919
 920	if (pgprot_val(prot) == pgprot_val(ref_prot))
 921		goto set;
 922
 923	/*
 924	 * If this is splitting a PMD, fix it up. PUD splits cannot be
 925	 * fixed trivially as that would require to rescan the newly
 926	 * installed PMD mappings after returning from split_large_page()
 927	 * so an eventual further split can allocate the necessary PTE
 928	 * pages. Warn for now and revisit it in case this actually
 929	 * happens.
 930	 */
 931	if (size == PAGE_SIZE)
 932		ref_prot = prot;
 933	else
 934		pr_warn_once("CPA: Cannot fixup static protections for PUD split\n");
 935set:
 936	set_pte(pte, pfn_pte(pfn, ref_prot));
 937}
 938
 939static int
 940__split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,
 941		   struct page *base)
 942{
 943	unsigned long lpaddr, lpinc, ref_pfn, pfn, pfninc = 1;
 944	pte_t *pbase = (pte_t *)page_address(base);
 
 945	unsigned int i, level;
 946	pgprot_t ref_prot;
 947	pte_t *tmp;
 
 948
 949	spin_lock(&pgd_lock);
 950	/*
 951	 * Check for races, another CPU might have split this page
 952	 * up for us already:
 953	 */
 954	tmp = _lookup_address_cpa(cpa, address, &level);
 955	if (tmp != kpte) {
 956		spin_unlock(&pgd_lock);
 957		return 1;
 958	}
 959
 960	paravirt_alloc_pte(&init_mm, page_to_pfn(base));
 961
 962	switch (level) {
 963	case PG_LEVEL_2M:
 964		ref_prot = pmd_pgprot(*(pmd_t *)kpte);
 965		/*
 966		 * Clear PSE (aka _PAGE_PAT) and move
 967		 * PAT bit to correct position.
 968		 */
 969		ref_prot = pgprot_large_2_4k(ref_prot);
 
 970		ref_pfn = pmd_pfn(*(pmd_t *)kpte);
 971		lpaddr = address & PMD_MASK;
 972		lpinc = PAGE_SIZE;
 973		break;
 974
 975	case PG_LEVEL_1G:
 976		ref_prot = pud_pgprot(*(pud_t *)kpte);
 977		ref_pfn = pud_pfn(*(pud_t *)kpte);
 978		pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
 979		lpaddr = address & PUD_MASK;
 980		lpinc = PMD_SIZE;
 981		/*
 982		 * Clear the PSE flags if the PRESENT flag is not set
 983		 * otherwise pmd_present/pmd_huge will return true
 984		 * even on a non present pmd.
 985		 */
 986		if (!(pgprot_val(ref_prot) & _PAGE_PRESENT))
 987			pgprot_val(ref_prot) &= ~_PAGE_PSE;
 988		break;
 989
 990	default:
 991		spin_unlock(&pgd_lock);
 992		return 1;
 993	}
 994
 995	ref_prot = pgprot_clear_protnone_bits(ref_prot);
 996
 997	/*
 998	 * Get the target pfn from the original entry:
 999	 */
1000	pfn = ref_pfn;
1001	for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc, lpaddr += lpinc)
1002		split_set_pte(cpa, pbase + i, pfn, ref_prot, lpaddr, lpinc);
1003
1004	if (virt_addr_valid(address)) {
1005		unsigned long pfn = PFN_DOWN(__pa(address));
1006
1007		if (pfn_range_is_mapped(pfn, pfn + 1))
1008			split_page_count(level);
1009	}
1010
1011	/*
1012	 * Install the new, split up pagetable.
1013	 *
1014	 * We use the standard kernel pagetable protections for the new
1015	 * pagetable protections, the actual ptes set above control the
1016	 * primary protection behavior:
1017	 */
1018	__set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
1019
1020	/*
1021	 * Do a global flush tlb after splitting the large page
1022	 * and before we do the actual change page attribute in the PTE.
1023	 *
1024	 * Without this, we violate the TLB application note, that says:
1025	 * "The TLBs may contain both ordinary and large-page
1026	 *  translations for a 4-KByte range of linear addresses. This
1027	 *  may occur if software modifies the paging structures so that
1028	 *  the page size used for the address range changes. If the two
1029	 *  translations differ with respect to page frame or attributes
1030	 *  (e.g., permissions), processor behavior is undefined and may
1031	 *  be implementation-specific."
1032	 *
1033	 * We do this global tlb flush inside the cpa_lock, so that we
1034	 * don't allow any other cpu, with stale tlb entries change the
1035	 * page attribute in parallel, that also falls into the
1036	 * just split large page entry.
1037	 */
1038	flush_tlb_all();
1039	spin_unlock(&pgd_lock);
1040
1041	return 0;
1042}
1043
1044static int split_large_page(struct cpa_data *cpa, pte_t *kpte,
1045			    unsigned long address)
1046{
1047	struct page *base;
1048
1049	if (!debug_pagealloc_enabled())
1050		spin_unlock(&cpa_lock);
1051	base = alloc_pages(GFP_KERNEL, 0);
1052	if (!debug_pagealloc_enabled())
1053		spin_lock(&cpa_lock);
1054	if (!base)
1055		return -ENOMEM;
1056
1057	if (__split_large_page(cpa, kpte, address, base))
1058		__free_page(base);
1059
1060	return 0;
1061}
1062
1063static bool try_to_free_pte_page(pte_t *pte)
1064{
1065	int i;
1066
1067	for (i = 0; i < PTRS_PER_PTE; i++)
1068		if (!pte_none(pte[i]))
1069			return false;
1070
1071	free_page((unsigned long)pte);
1072	return true;
1073}
1074
1075static bool try_to_free_pmd_page(pmd_t *pmd)
1076{
1077	int i;
1078
1079	for (i = 0; i < PTRS_PER_PMD; i++)
1080		if (!pmd_none(pmd[i]))
1081			return false;
1082
1083	free_page((unsigned long)pmd);
1084	return true;
1085}
1086
1087static bool unmap_pte_range(pmd_t *pmd, unsigned long start, unsigned long end)
1088{
1089	pte_t *pte = pte_offset_kernel(pmd, start);
1090
1091	while (start < end) {
1092		set_pte(pte, __pte(0));
1093
1094		start += PAGE_SIZE;
1095		pte++;
1096	}
1097
1098	if (try_to_free_pte_page((pte_t *)pmd_page_vaddr(*pmd))) {
1099		pmd_clear(pmd);
1100		return true;
1101	}
1102	return false;
1103}
1104
1105static void __unmap_pmd_range(pud_t *pud, pmd_t *pmd,
1106			      unsigned long start, unsigned long end)
1107{
1108	if (unmap_pte_range(pmd, start, end))
1109		if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
1110			pud_clear(pud);
1111}
1112
1113static void unmap_pmd_range(pud_t *pud, unsigned long start, unsigned long end)
1114{
1115	pmd_t *pmd = pmd_offset(pud, start);
1116
1117	/*
1118	 * Not on a 2MB page boundary?
1119	 */
1120	if (start & (PMD_SIZE - 1)) {
1121		unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
1122		unsigned long pre_end = min_t(unsigned long, end, next_page);
1123
1124		__unmap_pmd_range(pud, pmd, start, pre_end);
1125
1126		start = pre_end;
1127		pmd++;
1128	}
1129
1130	/*
1131	 * Try to unmap in 2M chunks.
1132	 */
1133	while (end - start >= PMD_SIZE) {
1134		if (pmd_large(*pmd))
1135			pmd_clear(pmd);
1136		else
1137			__unmap_pmd_range(pud, pmd, start, start + PMD_SIZE);
1138
1139		start += PMD_SIZE;
1140		pmd++;
1141	}
1142
1143	/*
1144	 * 4K leftovers?
1145	 */
1146	if (start < end)
1147		return __unmap_pmd_range(pud, pmd, start, end);
1148
1149	/*
1150	 * Try again to free the PMD page if haven't succeeded above.
1151	 */
1152	if (!pud_none(*pud))
1153		if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
1154			pud_clear(pud);
1155}
1156
1157static void unmap_pud_range(p4d_t *p4d, unsigned long start, unsigned long end)
1158{
1159	pud_t *pud = pud_offset(p4d, start);
1160
1161	/*
1162	 * Not on a GB page boundary?
1163	 */
1164	if (start & (PUD_SIZE - 1)) {
1165		unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
1166		unsigned long pre_end	= min_t(unsigned long, end, next_page);
1167
1168		unmap_pmd_range(pud, start, pre_end);
1169
1170		start = pre_end;
1171		pud++;
1172	}
1173
1174	/*
1175	 * Try to unmap in 1G chunks?
1176	 */
1177	while (end - start >= PUD_SIZE) {
1178
1179		if (pud_large(*pud))
1180			pud_clear(pud);
1181		else
1182			unmap_pmd_range(pud, start, start + PUD_SIZE);
1183
1184		start += PUD_SIZE;
1185		pud++;
1186	}
1187
1188	/*
1189	 * 2M leftovers?
1190	 */
1191	if (start < end)
1192		unmap_pmd_range(pud, start, end);
1193
1194	/*
1195	 * No need to try to free the PUD page because we'll free it in
1196	 * populate_pgd's error path
1197	 */
1198}
1199
1200static int alloc_pte_page(pmd_t *pmd)
1201{
1202	pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL);
1203	if (!pte)
1204		return -1;
1205
1206	set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
1207	return 0;
1208}
1209
1210static int alloc_pmd_page(pud_t *pud)
1211{
1212	pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL);
1213	if (!pmd)
1214		return -1;
1215
1216	set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
1217	return 0;
1218}
1219
1220static void populate_pte(struct cpa_data *cpa,
1221			 unsigned long start, unsigned long end,
1222			 unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
1223{
1224	pte_t *pte;
1225
1226	pte = pte_offset_kernel(pmd, start);
1227
1228	pgprot = pgprot_clear_protnone_bits(pgprot);
1229
1230	while (num_pages-- && start < end) {
1231		set_pte(pte, pfn_pte(cpa->pfn, pgprot));
1232
1233		start	 += PAGE_SIZE;
1234		cpa->pfn++;
1235		pte++;
1236	}
1237}
1238
1239static long populate_pmd(struct cpa_data *cpa,
1240			 unsigned long start, unsigned long end,
1241			 unsigned num_pages, pud_t *pud, pgprot_t pgprot)
1242{
1243	long cur_pages = 0;
1244	pmd_t *pmd;
1245	pgprot_t pmd_pgprot;
1246
1247	/*
1248	 * Not on a 2M boundary?
1249	 */
1250	if (start & (PMD_SIZE - 1)) {
1251		unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
1252		unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
1253
1254		pre_end   = min_t(unsigned long, pre_end, next_page);
1255		cur_pages = (pre_end - start) >> PAGE_SHIFT;
1256		cur_pages = min_t(unsigned int, num_pages, cur_pages);
1257
1258		/*
1259		 * Need a PTE page?
1260		 */
1261		pmd = pmd_offset(pud, start);
1262		if (pmd_none(*pmd))
1263			if (alloc_pte_page(pmd))
1264				return -1;
1265
1266		populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
1267
1268		start = pre_end;
1269	}
1270
1271	/*
1272	 * We mapped them all?
1273	 */
1274	if (num_pages == cur_pages)
1275		return cur_pages;
1276
1277	pmd_pgprot = pgprot_4k_2_large(pgprot);
1278
1279	while (end - start >= PMD_SIZE) {
1280
1281		/*
1282		 * We cannot use a 1G page so allocate a PMD page if needed.
1283		 */
1284		if (pud_none(*pud))
1285			if (alloc_pmd_page(pud))
1286				return -1;
1287
1288		pmd = pmd_offset(pud, start);
1289
1290		set_pmd(pmd, pmd_mkhuge(pfn_pmd(cpa->pfn,
1291					canon_pgprot(pmd_pgprot))));
1292
1293		start	  += PMD_SIZE;
1294		cpa->pfn  += PMD_SIZE >> PAGE_SHIFT;
1295		cur_pages += PMD_SIZE >> PAGE_SHIFT;
1296	}
1297
1298	/*
1299	 * Map trailing 4K pages.
1300	 */
1301	if (start < end) {
1302		pmd = pmd_offset(pud, start);
1303		if (pmd_none(*pmd))
1304			if (alloc_pte_page(pmd))
1305				return -1;
1306
1307		populate_pte(cpa, start, end, num_pages - cur_pages,
1308			     pmd, pgprot);
1309	}
1310	return num_pages;
1311}
1312
1313static int populate_pud(struct cpa_data *cpa, unsigned long start, p4d_t *p4d,
1314			pgprot_t pgprot)
1315{
1316	pud_t *pud;
1317	unsigned long end;
1318	long cur_pages = 0;
1319	pgprot_t pud_pgprot;
1320
1321	end = start + (cpa->numpages << PAGE_SHIFT);
1322
1323	/*
1324	 * Not on a Gb page boundary? => map everything up to it with
1325	 * smaller pages.
1326	 */
1327	if (start & (PUD_SIZE - 1)) {
1328		unsigned long pre_end;
1329		unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
1330
1331		pre_end   = min_t(unsigned long, end, next_page);
1332		cur_pages = (pre_end - start) >> PAGE_SHIFT;
1333		cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
1334
1335		pud = pud_offset(p4d, start);
1336
1337		/*
1338		 * Need a PMD page?
1339		 */
1340		if (pud_none(*pud))
1341			if (alloc_pmd_page(pud))
1342				return -1;
1343
1344		cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
1345					 pud, pgprot);
1346		if (cur_pages < 0)
1347			return cur_pages;
1348
1349		start = pre_end;
1350	}
1351
1352	/* We mapped them all? */
1353	if (cpa->numpages == cur_pages)
1354		return cur_pages;
1355
1356	pud = pud_offset(p4d, start);
1357	pud_pgprot = pgprot_4k_2_large(pgprot);
1358
1359	/*
1360	 * Map everything starting from the Gb boundary, possibly with 1G pages
1361	 */
1362	while (boot_cpu_has(X86_FEATURE_GBPAGES) && end - start >= PUD_SIZE) {
1363		set_pud(pud, pud_mkhuge(pfn_pud(cpa->pfn,
1364				   canon_pgprot(pud_pgprot))));
1365
1366		start	  += PUD_SIZE;
1367		cpa->pfn  += PUD_SIZE >> PAGE_SHIFT;
1368		cur_pages += PUD_SIZE >> PAGE_SHIFT;
1369		pud++;
1370	}
1371
1372	/* Map trailing leftover */
1373	if (start < end) {
1374		long tmp;
1375
1376		pud = pud_offset(p4d, start);
1377		if (pud_none(*pud))
1378			if (alloc_pmd_page(pud))
1379				return -1;
1380
1381		tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
1382				   pud, pgprot);
1383		if (tmp < 0)
1384			return cur_pages;
1385
1386		cur_pages += tmp;
1387	}
1388	return cur_pages;
1389}
1390
1391/*
1392 * Restrictions for kernel page table do not necessarily apply when mapping in
1393 * an alternate PGD.
1394 */
1395static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
1396{
1397	pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
1398	pud_t *pud = NULL;	/* shut up gcc */
1399	p4d_t *p4d;
1400	pgd_t *pgd_entry;
1401	long ret;
1402
1403	pgd_entry = cpa->pgd + pgd_index(addr);
1404
1405	if (pgd_none(*pgd_entry)) {
1406		p4d = (p4d_t *)get_zeroed_page(GFP_KERNEL);
1407		if (!p4d)
1408			return -1;
1409
1410		set_pgd(pgd_entry, __pgd(__pa(p4d) | _KERNPG_TABLE));
1411	}
1412
1413	/*
1414	 * Allocate a PUD page and hand it down for mapping.
1415	 */
1416	p4d = p4d_offset(pgd_entry, addr);
1417	if (p4d_none(*p4d)) {
1418		pud = (pud_t *)get_zeroed_page(GFP_KERNEL);
1419		if (!pud)
1420			return -1;
1421
1422		set_p4d(p4d, __p4d(__pa(pud) | _KERNPG_TABLE));
1423	}
1424
1425	pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
1426	pgprot_val(pgprot) |=  pgprot_val(cpa->mask_set);
1427
1428	ret = populate_pud(cpa, addr, p4d, pgprot);
1429	if (ret < 0) {
1430		/*
1431		 * Leave the PUD page in place in case some other CPU or thread
1432		 * already found it, but remove any useless entries we just
1433		 * added to it.
1434		 */
1435		unmap_pud_range(p4d, addr,
1436				addr + (cpa->numpages << PAGE_SHIFT));
1437		return ret;
1438	}
1439
1440	cpa->numpages = ret;
1441	return 0;
1442}
1443
1444static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
1445			       int primary)
1446{
1447	if (cpa->pgd) {
1448		/*
1449		 * Right now, we only execute this code path when mapping
1450		 * the EFI virtual memory map regions, no other users
1451		 * provide a ->pgd value. This may change in the future.
1452		 */
1453		return populate_pgd(cpa, vaddr);
1454	}
1455
1456	/*
1457	 * Ignore all non primary paths.
1458	 */
1459	if (!primary) {
1460		cpa->numpages = 1;
1461		return 0;
1462	}
1463
1464	/*
1465	 * Ignore the NULL PTE for kernel identity mapping, as it is expected
1466	 * to have holes.
1467	 * Also set numpages to '1' indicating that we processed cpa req for
1468	 * one virtual address page and its pfn. TBD: numpages can be set based
1469	 * on the initial value and the level returned by lookup_address().
1470	 */
1471	if (within(vaddr, PAGE_OFFSET,
1472		   PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
1473		cpa->numpages = 1;
1474		cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
1475		return 0;
1476
1477	} else if (__cpa_pfn_in_highmap(cpa->pfn)) {
1478		/* Faults in the highmap are OK, so do not warn: */
1479		return -EFAULT;
1480	} else {
1481		WARN(1, KERN_WARNING "CPA: called for zero pte. "
1482			"vaddr = %lx cpa->vaddr = %lx\n", vaddr,
1483			*cpa->vaddr);
1484
1485		return -EFAULT;
1486	}
1487}
1488
1489static int __change_page_attr(struct cpa_data *cpa, int primary)
1490{
1491	unsigned long address;
1492	int do_split, err;
1493	unsigned int level;
1494	pte_t *kpte, old_pte;
1495
1496	address = __cpa_addr(cpa, cpa->curpage);
 
 
 
 
 
 
 
 
1497repeat:
1498	kpte = _lookup_address_cpa(cpa, address, &level);
1499	if (!kpte)
1500		return __cpa_process_fault(cpa, address, primary);
1501
1502	old_pte = *kpte;
1503	if (pte_none(old_pte))
1504		return __cpa_process_fault(cpa, address, primary);
1505
1506	if (level == PG_LEVEL_4K) {
1507		pte_t new_pte;
1508		pgprot_t new_prot = pte_pgprot(old_pte);
1509		unsigned long pfn = pte_pfn(old_pte);
1510
1511		pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
1512		pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
1513
1514		cpa_inc_4k_install();
1515		/* Hand in lpsize = 0 to enforce the protection mechanism */
1516		new_prot = static_protections(new_prot, address, pfn, 1, 0,
1517					      CPA_PROTECT);
1518
1519		new_prot = pgprot_clear_protnone_bits(new_prot);
1520
1521		/*
1522		 * We need to keep the pfn from the existing PTE,
1523		 * after all we're only going to change it's attributes
1524		 * not the memory it points to
1525		 */
1526		new_pte = pfn_pte(pfn, new_prot);
1527		cpa->pfn = pfn;
1528		/*
1529		 * Do we really change anything ?
1530		 */
1531		if (pte_val(old_pte) != pte_val(new_pte)) {
1532			set_pte_atomic(kpte, new_pte);
1533			cpa->flags |= CPA_FLUSHTLB;
1534		}
1535		cpa->numpages = 1;
1536		return 0;
1537	}
1538
1539	/*
1540	 * Check, whether we can keep the large page intact
1541	 * and just change the pte:
1542	 */
1543	do_split = should_split_large_page(kpte, address, cpa);
1544	/*
1545	 * When the range fits into the existing large page,
1546	 * return. cp->numpages and cpa->tlbflush have been updated in
1547	 * try_large_page:
1548	 */
1549	if (do_split <= 0)
1550		return do_split;
1551
1552	/*
1553	 * We have to split the large page:
1554	 */
1555	err = split_large_page(cpa, kpte, address);
1556	if (!err)
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1557		goto repeat;
 
1558
1559	return err;
1560}
1561
1562static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
1563
1564static int cpa_process_alias(struct cpa_data *cpa)
1565{
1566	struct cpa_data alias_cpa;
1567	unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
1568	unsigned long vaddr;
1569	int ret;
1570
1571	if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
1572		return 0;
1573
1574	/*
1575	 * No need to redo, when the primary call touched the direct
1576	 * mapping already:
1577	 */
1578	vaddr = __cpa_addr(cpa, cpa->curpage);
 
 
 
 
 
 
 
 
 
1579	if (!(within(vaddr, PAGE_OFFSET,
1580		    PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
1581
1582		alias_cpa = *cpa;
1583		alias_cpa.vaddr = &laddr;
1584		alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1585		alias_cpa.curpage = 0;
1586
1587		ret = __change_page_attr_set_clr(&alias_cpa, 0);
1588		if (ret)
1589			return ret;
1590	}
1591
1592#ifdef CONFIG_X86_64
1593	/*
1594	 * If the primary call didn't touch the high mapping already
1595	 * and the physical address is inside the kernel map, we need
1596	 * to touch the high mapped kernel as well:
1597	 */
1598	if (!within(vaddr, (unsigned long)_text, _brk_end) &&
1599	    __cpa_pfn_in_highmap(cpa->pfn)) {
1600		unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
1601					       __START_KERNEL_map - phys_base;
1602		alias_cpa = *cpa;
1603		alias_cpa.vaddr = &temp_cpa_vaddr;
1604		alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1605		alias_cpa.curpage = 0;
1606
1607		/*
1608		 * The high mapping range is imprecise, so ignore the
1609		 * return value.
1610		 */
1611		__change_page_attr_set_clr(&alias_cpa, 0);
1612	}
1613#endif
1614
1615	return 0;
1616}
1617
1618static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
1619{
1620	unsigned long numpages = cpa->numpages;
1621	unsigned long rempages = numpages;
1622	int ret = 0;
1623
1624	while (rempages) {
1625		/*
1626		 * Store the remaining nr of pages for the large page
1627		 * preservation check.
1628		 */
1629		cpa->numpages = rempages;
1630		/* for array changes, we can't use large page */
1631		if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
1632			cpa->numpages = 1;
1633
1634		if (!debug_pagealloc_enabled())
1635			spin_lock(&cpa_lock);
1636		ret = __change_page_attr(cpa, checkalias);
1637		if (!debug_pagealloc_enabled())
1638			spin_unlock(&cpa_lock);
1639		if (ret)
1640			goto out;
1641
1642		if (checkalias) {
1643			ret = cpa_process_alias(cpa);
1644			if (ret)
1645				goto out;
1646		}
1647
1648		/*
1649		 * Adjust the number of pages with the result of the
1650		 * CPA operation. Either a large page has been
1651		 * preserved or a single page update happened.
1652		 */
1653		BUG_ON(cpa->numpages > rempages || !cpa->numpages);
1654		rempages -= cpa->numpages;
1655		cpa->curpage += cpa->numpages;
1656	}
 
 
1657
1658out:
1659	/* Restore the original numpages */
1660	cpa->numpages = numpages;
1661	return ret;
1662}
1663
1664static int change_page_attr_set_clr(unsigned long *addr, int numpages,
1665				    pgprot_t mask_set, pgprot_t mask_clr,
1666				    int force_split, int in_flag,
1667				    struct page **pages)
1668{
1669	struct cpa_data cpa;
1670	int ret, cache, checkalias;
 
1671
1672	memset(&cpa, 0, sizeof(cpa));
1673
1674	/*
1675	 * Check, if we are requested to set a not supported
1676	 * feature.  Clearing non-supported features is OK.
1677	 */
1678	mask_set = canon_pgprot(mask_set);
1679
1680	if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
1681		return 0;
1682
1683	/* Ensure we are PAGE_SIZE aligned */
1684	if (in_flag & CPA_ARRAY) {
1685		int i;
1686		for (i = 0; i < numpages; i++) {
1687			if (addr[i] & ~PAGE_MASK) {
1688				addr[i] &= PAGE_MASK;
1689				WARN_ON_ONCE(1);
1690			}
1691		}
1692	} else if (!(in_flag & CPA_PAGES_ARRAY)) {
1693		/*
1694		 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1695		 * No need to check in that case
1696		 */
1697		if (*addr & ~PAGE_MASK) {
1698			*addr &= PAGE_MASK;
1699			/*
1700			 * People should not be passing in unaligned addresses:
1701			 */
1702			WARN_ON_ONCE(1);
1703		}
 
 
 
 
 
1704	}
1705
1706	/* Must avoid aliasing mappings in the highmem code */
1707	kmap_flush_unused();
1708
1709	vm_unmap_aliases();
1710
1711	cpa.vaddr = addr;
1712	cpa.pages = pages;
1713	cpa.numpages = numpages;
1714	cpa.mask_set = mask_set;
1715	cpa.mask_clr = mask_clr;
1716	cpa.flags = 0;
1717	cpa.curpage = 0;
1718	cpa.force_split = force_split;
1719
1720	if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
1721		cpa.flags |= in_flag;
1722
1723	/* No alias checking for _NX bit modifications */
1724	checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
1725	/* Has caller explicitly disabled alias checking? */
1726	if (in_flag & CPA_NO_CHECK_ALIAS)
1727		checkalias = 0;
1728
1729	ret = __change_page_attr_set_clr(&cpa, checkalias);
1730
1731	/*
1732	 * Check whether we really changed something:
1733	 */
1734	if (!(cpa.flags & CPA_FLUSHTLB))
1735		goto out;
1736
1737	/*
1738	 * No need to flush, when we did not set any of the caching
1739	 * attributes:
1740	 */
1741	cache = !!pgprot2cachemode(mask_set);
1742
1743	/*
1744	 * On error; flush everything to be sure.
1745	 */
1746	if (ret) {
 
 
 
 
 
 
 
 
 
1747		cpa_flush_all(cache);
1748		goto out;
1749	}
1750
1751	cpa_flush(&cpa, cache);
1752out:
1753	return ret;
1754}
1755
1756static inline int change_page_attr_set(unsigned long *addr, int numpages,
1757				       pgprot_t mask, int array)
1758{
1759	return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
1760		(array ? CPA_ARRAY : 0), NULL);
1761}
1762
1763static inline int change_page_attr_clear(unsigned long *addr, int numpages,
1764					 pgprot_t mask, int array)
1765{
1766	return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
1767		(array ? CPA_ARRAY : 0), NULL);
1768}
1769
1770static inline int cpa_set_pages_array(struct page **pages, int numpages,
1771				       pgprot_t mask)
1772{
1773	return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
1774		CPA_PAGES_ARRAY, pages);
1775}
1776
1777static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1778					 pgprot_t mask)
1779{
1780	return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1781		CPA_PAGES_ARRAY, pages);
1782}
1783
1784int _set_memory_uc(unsigned long addr, int numpages)
1785{
1786	/*
1787	 * for now UC MINUS. see comments in ioremap_nocache()
1788	 * If you really need strong UC use ioremap_uc(), but note
1789	 * that you cannot override IO areas with set_memory_*() as
1790	 * these helpers cannot work with IO memory.
1791	 */
1792	return change_page_attr_set(&addr, numpages,
1793				    cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1794				    0);
1795}
1796
1797int set_memory_uc(unsigned long addr, int numpages)
1798{
1799	int ret;
1800
1801	/*
1802	 * for now UC MINUS. see comments in ioremap_nocache()
1803	 */
1804	ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1805			      _PAGE_CACHE_MODE_UC_MINUS, NULL);
1806	if (ret)
1807		goto out_err;
1808
1809	ret = _set_memory_uc(addr, numpages);
1810	if (ret)
1811		goto out_free;
1812
1813	return 0;
1814
1815out_free:
1816	free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1817out_err:
1818	return ret;
1819}
1820EXPORT_SYMBOL(set_memory_uc);
1821
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1822int _set_memory_wc(unsigned long addr, int numpages)
1823{
1824	int ret;
 
1825
1826	ret = change_page_attr_set(&addr, numpages,
1827				   cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1828				   0);
1829	if (!ret) {
1830		ret = change_page_attr_set_clr(&addr, numpages,
1831					       cachemode2pgprot(_PAGE_CACHE_MODE_WC),
 
1832					       __pgprot(_PAGE_CACHE_MASK),
1833					       0, 0, NULL);
1834	}
1835	return ret;
1836}
1837
1838int set_memory_wc(unsigned long addr, int numpages)
1839{
1840	int ret;
1841
1842	ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1843		_PAGE_CACHE_MODE_WC, NULL);
1844	if (ret)
1845		return ret;
1846
1847	ret = _set_memory_wc(addr, numpages);
1848	if (ret)
1849		free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1850
1851	return ret;
1852}
1853EXPORT_SYMBOL(set_memory_wc);
1854
1855int _set_memory_wt(unsigned long addr, int numpages)
1856{
1857	return change_page_attr_set(&addr, numpages,
1858				    cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);
1859}
1860
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1861int _set_memory_wb(unsigned long addr, int numpages)
1862{
1863	/* WB cache mode is hard wired to all cache attribute bits being 0 */
1864	return change_page_attr_clear(&addr, numpages,
1865				      __pgprot(_PAGE_CACHE_MASK), 0);
1866}
1867
1868int set_memory_wb(unsigned long addr, int numpages)
1869{
1870	int ret;
1871
1872	ret = _set_memory_wb(addr, numpages);
1873	if (ret)
1874		return ret;
1875
1876	free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1877	return 0;
1878}
1879EXPORT_SYMBOL(set_memory_wb);
1880
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1881int set_memory_x(unsigned long addr, int numpages)
1882{
1883	if (!(__supported_pte_mask & _PAGE_NX))
1884		return 0;
1885
1886	return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1887}
 
1888
1889int set_memory_nx(unsigned long addr, int numpages)
1890{
1891	if (!(__supported_pte_mask & _PAGE_NX))
1892		return 0;
1893
1894	return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1895}
 
1896
1897int set_memory_ro(unsigned long addr, int numpages)
1898{
1899	return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1900}
1901
1902int set_memory_rw(unsigned long addr, int numpages)
1903{
1904	return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1905}
1906
1907int set_memory_np(unsigned long addr, int numpages)
1908{
1909	return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
1910}
1911
1912int set_memory_np_noalias(unsigned long addr, int numpages)
1913{
1914	int cpa_flags = CPA_NO_CHECK_ALIAS;
1915
1916	return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1917					__pgprot(_PAGE_PRESENT), 0,
1918					cpa_flags, NULL);
1919}
1920
1921int set_memory_4k(unsigned long addr, int numpages)
1922{
1923	return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1924					__pgprot(0), 1, 0, NULL);
1925}
1926
1927int set_memory_nonglobal(unsigned long addr, int numpages)
1928{
1929	return change_page_attr_clear(&addr, numpages,
1930				      __pgprot(_PAGE_GLOBAL), 0);
1931}
1932
1933int set_memory_global(unsigned long addr, int numpages)
1934{
1935	return change_page_attr_set(&addr, numpages,
1936				    __pgprot(_PAGE_GLOBAL), 0);
1937}
1938
1939static int __set_memory_enc_dec(unsigned long addr, int numpages, bool enc)
1940{
1941	struct cpa_data cpa;
 
1942	int ret;
1943
1944	/* Nothing to do if memory encryption is not active */
1945	if (!mem_encrypt_active())
1946		return 0;
1947
1948	/* Should not be working on unaligned addresses */
1949	if (WARN_ONCE(addr & ~PAGE_MASK, "misaligned address: %#lx\n", addr))
1950		addr &= PAGE_MASK;
1951
 
 
1952	memset(&cpa, 0, sizeof(cpa));
1953	cpa.vaddr = &addr;
1954	cpa.numpages = numpages;
1955	cpa.mask_set = enc ? __pgprot(_PAGE_ENC) : __pgprot(0);
1956	cpa.mask_clr = enc ? __pgprot(0) : __pgprot(_PAGE_ENC);
1957	cpa.pgd = init_mm.pgd;
1958
1959	/* Must avoid aliasing mappings in the highmem code */
1960	kmap_flush_unused();
1961	vm_unmap_aliases();
1962
1963	/*
1964	 * Before changing the encryption attribute, we need to flush caches.
1965	 */
1966	cpa_flush(&cpa, 1);
 
 
 
1967
1968	ret = __change_page_attr_set_clr(&cpa, 1);
1969
1970	/*
1971	 * After changing the encryption attribute, we need to flush TLBs again
1972	 * in case any speculative TLB caching occurred (but no need to flush
1973	 * caches again).  We could just use cpa_flush_all(), but in case TLB
1974	 * flushing gets optimized in the cpa_flush() path use the same logic
1975	 * as above.
1976	 */
1977	cpa_flush(&cpa, 0);
 
 
 
1978
1979	return ret;
1980}
1981
1982int set_memory_encrypted(unsigned long addr, int numpages)
1983{
1984	return __set_memory_enc_dec(addr, numpages, true);
1985}
1986EXPORT_SYMBOL_GPL(set_memory_encrypted);
1987
1988int set_memory_decrypted(unsigned long addr, int numpages)
1989{
1990	return __set_memory_enc_dec(addr, numpages, false);
1991}
1992EXPORT_SYMBOL_GPL(set_memory_decrypted);
1993
1994int set_pages_uc(struct page *page, int numpages)
1995{
1996	unsigned long addr = (unsigned long)page_address(page);
1997
1998	return set_memory_uc(addr, numpages);
1999}
2000EXPORT_SYMBOL(set_pages_uc);
2001
2002static int _set_pages_array(struct page **pages, int numpages,
2003		enum page_cache_mode new_type)
2004{
2005	unsigned long start;
2006	unsigned long end;
2007	enum page_cache_mode set_type;
2008	int i;
2009	int free_idx;
2010	int ret;
2011
2012	for (i = 0; i < numpages; i++) {
2013		if (PageHighMem(pages[i]))
2014			continue;
2015		start = page_to_pfn(pages[i]) << PAGE_SHIFT;
2016		end = start + PAGE_SIZE;
2017		if (reserve_memtype(start, end, new_type, NULL))
2018			goto err_out;
2019	}
2020
2021	/* If WC, set to UC- first and then WC */
2022	set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
2023				_PAGE_CACHE_MODE_UC_MINUS : new_type;
2024
2025	ret = cpa_set_pages_array(pages, numpages,
2026				  cachemode2pgprot(set_type));
2027	if (!ret && new_type == _PAGE_CACHE_MODE_WC)
2028		ret = change_page_attr_set_clr(NULL, numpages,
2029					       cachemode2pgprot(
2030						_PAGE_CACHE_MODE_WC),
2031					       __pgprot(_PAGE_CACHE_MASK),
2032					       0, CPA_PAGES_ARRAY, pages);
2033	if (ret)
2034		goto err_out;
2035	return 0; /* Success */
2036err_out:
2037	free_idx = i;
2038	for (i = 0; i < free_idx; i++) {
2039		if (PageHighMem(pages[i]))
2040			continue;
2041		start = page_to_pfn(pages[i]) << PAGE_SHIFT;
2042		end = start + PAGE_SIZE;
2043		free_memtype(start, end);
2044	}
2045	return -EINVAL;
2046}
2047
2048int set_pages_array_uc(struct page **pages, int numpages)
2049{
2050	return _set_pages_array(pages, numpages, _PAGE_CACHE_MODE_UC_MINUS);
2051}
2052EXPORT_SYMBOL(set_pages_array_uc);
2053
2054int set_pages_array_wc(struct page **pages, int numpages)
2055{
2056	return _set_pages_array(pages, numpages, _PAGE_CACHE_MODE_WC);
2057}
2058EXPORT_SYMBOL(set_pages_array_wc);
2059
2060int set_pages_array_wt(struct page **pages, int numpages)
2061{
2062	return _set_pages_array(pages, numpages, _PAGE_CACHE_MODE_WT);
2063}
2064EXPORT_SYMBOL_GPL(set_pages_array_wt);
2065
2066int set_pages_wb(struct page *page, int numpages)
2067{
2068	unsigned long addr = (unsigned long)page_address(page);
2069
2070	return set_memory_wb(addr, numpages);
2071}
2072EXPORT_SYMBOL(set_pages_wb);
2073
2074int set_pages_array_wb(struct page **pages, int numpages)
2075{
2076	int retval;
2077	unsigned long start;
2078	unsigned long end;
2079	int i;
2080
2081	/* WB cache mode is hard wired to all cache attribute bits being 0 */
2082	retval = cpa_clear_pages_array(pages, numpages,
2083			__pgprot(_PAGE_CACHE_MASK));
2084	if (retval)
2085		return retval;
2086
2087	for (i = 0; i < numpages; i++) {
2088		if (PageHighMem(pages[i]))
2089			continue;
2090		start = page_to_pfn(pages[i]) << PAGE_SHIFT;
2091		end = start + PAGE_SIZE;
2092		free_memtype(start, end);
2093	}
2094
2095	return 0;
2096}
2097EXPORT_SYMBOL(set_pages_array_wb);
2098
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2099int set_pages_ro(struct page *page, int numpages)
2100{
2101	unsigned long addr = (unsigned long)page_address(page);
2102
2103	return set_memory_ro(addr, numpages);
2104}
2105
2106int set_pages_rw(struct page *page, int numpages)
2107{
2108	unsigned long addr = (unsigned long)page_address(page);
2109
2110	return set_memory_rw(addr, numpages);
2111}
2112
 
 
2113static int __set_pages_p(struct page *page, int numpages)
2114{
2115	unsigned long tempaddr = (unsigned long) page_address(page);
2116	struct cpa_data cpa = { .vaddr = &tempaddr,
2117				.pgd = NULL,
2118				.numpages = numpages,
2119				.mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
2120				.mask_clr = __pgprot(0),
2121				.flags = 0};
2122
2123	/*
2124	 * No alias checking needed for setting present flag. otherwise,
2125	 * we may need to break large pages for 64-bit kernel text
2126	 * mappings (this adds to complexity if we want to do this from
2127	 * atomic context especially). Let's keep it simple!
2128	 */
2129	return __change_page_attr_set_clr(&cpa, 0);
2130}
2131
2132static int __set_pages_np(struct page *page, int numpages)
2133{
2134	unsigned long tempaddr = (unsigned long) page_address(page);
2135	struct cpa_data cpa = { .vaddr = &tempaddr,
2136				.pgd = NULL,
2137				.numpages = numpages,
2138				.mask_set = __pgprot(0),
2139				.mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
2140				.flags = 0};
2141
2142	/*
2143	 * No alias checking needed for setting not present flag. otherwise,
2144	 * we may need to break large pages for 64-bit kernel text
2145	 * mappings (this adds to complexity if we want to do this from
2146	 * atomic context especially). Let's keep it simple!
2147	 */
2148	return __change_page_attr_set_clr(&cpa, 0);
2149}
2150
2151int set_direct_map_invalid_noflush(struct page *page)
2152{
2153	return __set_pages_np(page, 1);
2154}
2155
2156int set_direct_map_default_noflush(struct page *page)
2157{
2158	return __set_pages_p(page, 1);
2159}
2160
2161void __kernel_map_pages(struct page *page, int numpages, int enable)
2162{
2163	if (PageHighMem(page))
2164		return;
2165	if (!enable) {
2166		debug_check_no_locks_freed(page_address(page),
2167					   numpages * PAGE_SIZE);
2168	}
2169
2170	/*
2171	 * The return value is ignored as the calls cannot fail.
2172	 * Large pages for identity mappings are not used at boot time
2173	 * and hence no memory allocations during large page split.
2174	 */
2175	if (enable)
2176		__set_pages_p(page, numpages);
2177	else
2178		__set_pages_np(page, numpages);
2179
2180	/*
2181	 * We should perform an IPI and flush all tlbs,
2182	 * but that can deadlock->flush only current cpu.
2183	 * Preemption needs to be disabled around __flush_tlb_all() due to
2184	 * CR3 reload in __native_flush_tlb().
2185	 */
2186	preempt_disable();
2187	__flush_tlb_all();
2188	preempt_enable();
2189
2190	arch_flush_lazy_mmu_mode();
2191}
2192
2193#ifdef CONFIG_HIBERNATION
 
2194bool kernel_page_present(struct page *page)
2195{
2196	unsigned int level;
2197	pte_t *pte;
2198
2199	if (PageHighMem(page))
2200		return false;
2201
2202	pte = lookup_address((unsigned long)page_address(page), &level);
2203	return (pte_val(*pte) & _PAGE_PRESENT);
2204}
 
2205#endif /* CONFIG_HIBERNATION */
2206
2207int __init kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
2208				   unsigned numpages, unsigned long page_flags)
 
 
2209{
2210	int retval = -EINVAL;
2211
2212	struct cpa_data cpa = {
2213		.vaddr = &address,
2214		.pfn = pfn,
2215		.pgd = pgd,
2216		.numpages = numpages,
2217		.mask_set = __pgprot(0),
2218		.mask_clr = __pgprot(0),
2219		.flags = 0,
2220	};
2221
2222	WARN_ONCE(num_online_cpus() > 1, "Don't call after initializing SMP");
2223
2224	if (!(__supported_pte_mask & _PAGE_NX))
2225		goto out;
2226
2227	if (!(page_flags & _PAGE_NX))
2228		cpa.mask_clr = __pgprot(_PAGE_NX);
2229
2230	if (!(page_flags & _PAGE_RW))
2231		cpa.mask_clr = __pgprot(_PAGE_RW);
2232
2233	if (!(page_flags & _PAGE_ENC))
2234		cpa.mask_clr = pgprot_encrypted(cpa.mask_clr);
2235
2236	cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags);
2237
2238	retval = __change_page_attr_set_clr(&cpa, 0);
2239	__flush_tlb_all();
2240
2241out:
2242	return retval;
2243}
2244
2245/*
2246 * __flush_tlb_all() flushes mappings only on current CPU and hence this
2247 * function shouldn't be used in an SMP environment. Presently, it's used only
2248 * during boot (way before smp_init()) by EFI subsystem and hence is ok.
2249 */
2250int __init kernel_unmap_pages_in_pgd(pgd_t *pgd, unsigned long address,
2251				     unsigned long numpages)
2252{
2253	int retval;
2254
2255	/*
2256	 * The typical sequence for unmapping is to find a pte through
2257	 * lookup_address_in_pgd() (ideally, it should never return NULL because
2258	 * the address is already mapped) and change it's protections. As pfn is
2259	 * the *target* of a mapping, it's not useful while unmapping.
2260	 */
2261	struct cpa_data cpa = {
2262		.vaddr		= &address,
2263		.pfn		= 0,
2264		.pgd		= pgd,
2265		.numpages	= numpages,
2266		.mask_set	= __pgprot(0),
2267		.mask_clr	= __pgprot(_PAGE_PRESENT | _PAGE_RW),
2268		.flags		= 0,
2269	};
2270
2271	WARN_ONCE(num_online_cpus() > 1, "Don't call after initializing SMP");
2272
2273	retval = __change_page_attr_set_clr(&cpa, 0);
2274	__flush_tlb_all();
2275
2276	return retval;
2277}
2278
2279/*
2280 * The testcases use internal knowledge of the implementation that shouldn't
2281 * be exposed to the rest of the kernel. Include these directly here.
2282 */
2283#ifdef CONFIG_CPA_DEBUG
2284#include "pageattr-test.c"
2285#endif
v4.17
 
   1/*
   2 * Copyright 2002 Andi Kleen, SuSE Labs.
   3 * Thanks to Ben LaHaise for precious feedback.
   4 */
   5#include <linux/highmem.h>
   6#include <linux/bootmem.h>
   7#include <linux/sched.h>
   8#include <linux/mm.h>
   9#include <linux/interrupt.h>
  10#include <linux/seq_file.h>
  11#include <linux/debugfs.h>
  12#include <linux/pfn.h>
  13#include <linux/percpu.h>
  14#include <linux/gfp.h>
  15#include <linux/pci.h>
  16#include <linux/vmalloc.h>
  17
  18#include <asm/e820/api.h>
  19#include <asm/processor.h>
  20#include <asm/tlbflush.h>
  21#include <asm/sections.h>
  22#include <asm/setup.h>
  23#include <linux/uaccess.h>
  24#include <asm/pgalloc.h>
  25#include <asm/proto.h>
  26#include <asm/pat.h>
  27#include <asm/set_memory.h>
  28
 
 
  29/*
  30 * The current flushing context - we pass it instead of 5 arguments:
  31 */
  32struct cpa_data {
  33	unsigned long	*vaddr;
  34	pgd_t		*pgd;
  35	pgprot_t	mask_set;
  36	pgprot_t	mask_clr;
  37	unsigned long	numpages;
  38	int		flags;
  39	unsigned long	pfn;
  40	unsigned	force_split : 1;
  41	int		curpage;
 
  42	struct page	**pages;
  43};
  44
 
 
 
 
 
 
 
 
  45/*
  46 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
  47 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
  48 * entries change the page attribute in parallel to some other cpu
  49 * splitting a large page entry along with changing the attribute.
  50 */
  51static DEFINE_SPINLOCK(cpa_lock);
  52
  53#define CPA_FLUSHTLB 1
  54#define CPA_ARRAY 2
  55#define CPA_PAGES_ARRAY 4
 
  56
  57#ifdef CONFIG_PROC_FS
  58static unsigned long direct_pages_count[PG_LEVEL_NUM];
  59
  60void update_page_count(int level, unsigned long pages)
  61{
  62	/* Protect against CPA */
  63	spin_lock(&pgd_lock);
  64	direct_pages_count[level] += pages;
  65	spin_unlock(&pgd_lock);
  66}
  67
  68static void split_page_count(int level)
  69{
  70	if (direct_pages_count[level] == 0)
  71		return;
  72
  73	direct_pages_count[level]--;
  74	direct_pages_count[level - 1] += PTRS_PER_PTE;
  75}
  76
  77void arch_report_meminfo(struct seq_file *m)
  78{
  79	seq_printf(m, "DirectMap4k:    %8lu kB\n",
  80			direct_pages_count[PG_LEVEL_4K] << 2);
  81#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
  82	seq_printf(m, "DirectMap2M:    %8lu kB\n",
  83			direct_pages_count[PG_LEVEL_2M] << 11);
  84#else
  85	seq_printf(m, "DirectMap4M:    %8lu kB\n",
  86			direct_pages_count[PG_LEVEL_2M] << 12);
  87#endif
  88	if (direct_gbpages)
  89		seq_printf(m, "DirectMap1G:    %8lu kB\n",
  90			direct_pages_count[PG_LEVEL_1G] << 20);
  91}
  92#else
  93static inline void split_page_count(int level) { }
  94#endif
  95
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
  96static inline int
  97within(unsigned long addr, unsigned long start, unsigned long end)
  98{
  99	return addr >= start && addr < end;
 100}
 101
 102static inline int
 103within_inclusive(unsigned long addr, unsigned long start, unsigned long end)
 104{
 105	return addr >= start && addr <= end;
 106}
 107
 108#ifdef CONFIG_X86_64
 109
 110static inline unsigned long highmap_start_pfn(void)
 111{
 112	return __pa_symbol(_text) >> PAGE_SHIFT;
 113}
 114
 115static inline unsigned long highmap_end_pfn(void)
 116{
 117	/* Do not reference physical address outside the kernel. */
 118	return __pa_symbol(roundup(_brk_end, PMD_SIZE) - 1) >> PAGE_SHIFT;
 119}
 120
 121static bool __cpa_pfn_in_highmap(unsigned long pfn)
 122{
 123	/*
 124	 * Kernel text has an alias mapping at a high address, known
 125	 * here as "highmap".
 126	 */
 127	return within_inclusive(pfn, highmap_start_pfn(), highmap_end_pfn());
 128}
 129
 130#else
 131
 132static bool __cpa_pfn_in_highmap(unsigned long pfn)
 133{
 134	/* There is no highmap on 32-bit */
 135	return false;
 136}
 137
 138#endif
 139
 140/*
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 141 * Flushing functions
 142 */
 143
 144/**
 145 * clflush_cache_range - flush a cache range with clflush
 146 * @vaddr:	virtual start address
 147 * @size:	number of bytes to flush
 148 *
 149 * clflushopt is an unordered instruction which needs fencing with mfence or
 150 * sfence to avoid ordering issues.
 151 */
 152void clflush_cache_range(void *vaddr, unsigned int size)
 153{
 154	const unsigned long clflush_size = boot_cpu_data.x86_clflush_size;
 155	void *p = (void *)((unsigned long)vaddr & ~(clflush_size - 1));
 156	void *vend = vaddr + size;
 157
 158	if (p >= vend)
 159		return;
 160
 161	mb();
 162
 163	for (; p < vend; p += clflush_size)
 164		clflushopt(p);
 
 165
 
 
 
 
 
 
 
 
 
 
 
 
 166	mb();
 167}
 168EXPORT_SYMBOL_GPL(clflush_cache_range);
 169
 170void arch_invalidate_pmem(void *addr, size_t size)
 171{
 172	clflush_cache_range(addr, size);
 173}
 174EXPORT_SYMBOL_GPL(arch_invalidate_pmem);
 175
 176static void __cpa_flush_all(void *arg)
 177{
 178	unsigned long cache = (unsigned long)arg;
 179
 180	/*
 181	 * Flush all to work around Errata in early athlons regarding
 182	 * large page flushing.
 183	 */
 184	__flush_tlb_all();
 185
 186	if (cache && boot_cpu_data.x86 >= 4)
 187		wbinvd();
 188}
 189
 190static void cpa_flush_all(unsigned long cache)
 191{
 192	BUG_ON(irqs_disabled() && !early_boot_irqs_disabled);
 193
 194	on_each_cpu(__cpa_flush_all, (void *) cache, 1);
 195}
 196
 197static void __cpa_flush_range(void *arg)
 198{
 199	/*
 200	 * We could optimize that further and do individual per page
 201	 * tlb invalidates for a low number of pages. Caveat: we must
 202	 * flush the high aliases on 64bit as well.
 203	 */
 204	__flush_tlb_all();
 205}
 206
 207static void cpa_flush_range(unsigned long start, int numpages, int cache)
 208{
 209	unsigned int i, level;
 210	unsigned long addr;
 211
 212	BUG_ON(irqs_disabled() && !early_boot_irqs_disabled);
 213	WARN_ON(PAGE_ALIGN(start) != start);
 214
 215	on_each_cpu(__cpa_flush_range, NULL, 1);
 
 
 
 
 
 
 
 
 216
 217	if (!cache)
 218		return;
 219
 220	/*
 221	 * We only need to flush on one CPU,
 222	 * clflush is a MESI-coherent instruction that
 223	 * will cause all other CPUs to flush the same
 224	 * cachelines:
 225	 */
 226	for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
 227		pte_t *pte = lookup_address(addr, &level);
 228
 229		/*
 230		 * Only flush present addresses:
 231		 */
 232		if (pte && (pte_val(*pte) & _PAGE_PRESENT))
 233			clflush_cache_range((void *) addr, PAGE_SIZE);
 234	}
 
 
 
 
 
 
 
 
 235}
 236
 237static void cpa_flush_array(unsigned long *start, int numpages, int cache,
 238			    int in_flags, struct page **pages)
 
 
 
 
 
 
 
 239{
 240	unsigned int i, level;
 241#ifdef CONFIG_PREEMPT
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 242	/*
 243	 * Avoid wbinvd() because it causes latencies on all CPUs,
 244	 * regardless of any CPU isolation that may be in effect.
 245	 *
 246	 * This should be extended for CAT enabled systems independent of
 247	 * PREEMPT because wbinvd() does not respect the CAT partitions and
 248	 * this is exposed to unpriviledged users through the graphics
 249	 * subsystem.
 250	 */
 251	unsigned long do_wbinvd = 0;
 252#else
 253	unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
 254#endif
 255
 256	BUG_ON(irqs_disabled() && !early_boot_irqs_disabled);
 
 
 
 257
 258	on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
 
 
 
 
 
 
 
 
 
 
 
 259
 260	if (!cache || do_wbinvd)
 261		return;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 262
 
 
 263	/*
 264	 * We only need to flush on one CPU,
 265	 * clflush is a MESI-coherent instruction that
 266	 * will cause all other CPUs to flush the same
 267	 * cachelines:
 
 
 
 
 
 
 268	 */
 269	for (i = 0; i < numpages; i++) {
 270		unsigned long addr;
 271		pte_t *pte;
 
 
 
 
 
 
 
 
 
 
 
 
 
 272
 273		if (in_flags & CPA_PAGES_ARRAY)
 274			addr = (unsigned long)page_address(pages[i]);
 275		else
 276			addr = start[i];
 
 
 
 
 
 277
 278		pte = lookup_address(addr, &level);
 
 279
 280		/*
 281		 * Only flush present addresses:
 282		 */
 283		if (pte && (pte_val(*pte) & _PAGE_PRESENT))
 284			clflush_cache_range((void *)addr, PAGE_SIZE);
 285	}
 286}
 287
 288/*
 289 * Certain areas of memory on x86 require very specific protection flags,
 290 * for example the BIOS area or kernel text. Callers don't always get this
 291 * right (again, ioremap() on BIOS memory is not uncommon) so this function
 292 * checks and fixes these known static required protection bits.
 293 */
 294static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
 295				   unsigned long pfn)
 
 296{
 297	pgprot_t forbidden = __pgprot(0);
 
 298
 299	/*
 300	 * The BIOS area between 640k and 1Mb needs to be executable for
 301	 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
 302	 */
 303#ifdef CONFIG_PCI_BIOS
 304	if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
 305		pgprot_val(forbidden) |= _PAGE_NX;
 306#endif
 
 307
 308	/*
 309	 * The kernel text needs to be executable for obvious reasons
 310	 * Does not cover __inittext since that is gone later on. On
 311	 * 64bit we do not enforce !NX on the low mapping
 312	 */
 313	if (within(address, (unsigned long)_text, (unsigned long)_etext))
 314		pgprot_val(forbidden) |= _PAGE_NX;
 315
 316	/*
 317	 * The .rodata section needs to be read-only. Using the pfn
 318	 * catches all aliases.  This also includes __ro_after_init,
 319	 * so do not enforce until kernel_set_to_readonly is true.
 320	 */
 321	if (kernel_set_to_readonly &&
 322	    within(pfn, __pa_symbol(__start_rodata) >> PAGE_SHIFT,
 323		   __pa_symbol(__end_rodata) >> PAGE_SHIFT))
 324		pgprot_val(forbidden) |= _PAGE_RW;
 325
 326#if defined(CONFIG_X86_64)
 327	/*
 328	 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
 329	 * kernel text mappings for the large page aligned text, rodata sections
 330	 * will be always read-only. For the kernel identity mappings covering
 331	 * the holes caused by this alignment can be anything that user asks.
 332	 *
 333	 * This will preserve the large page mappings for kernel text/data
 334	 * at no extra cost.
 335	 */
 336	if (kernel_set_to_readonly &&
 337	    within(address, (unsigned long)_text,
 338		   (unsigned long)__end_rodata_hpage_align)) {
 339		unsigned int level;
 
 340
 341		/*
 342		 * Don't enforce the !RW mapping for the kernel text mapping,
 343		 * if the current mapping is already using small page mapping.
 344		 * No need to work hard to preserve large page mappings in this
 345		 * case.
 346		 *
 347		 * This also fixes the Linux Xen paravirt guest boot failure
 348		 * (because of unexpected read-only mappings for kernel identity
 349		 * mappings). In this paravirt guest case, the kernel text
 350		 * mapping and the kernel identity mapping share the same
 351		 * page-table pages. Thus we can't really use different
 352		 * protections for the kernel text and identity mappings. Also,
 353		 * these shared mappings are made of small page mappings.
 354		 * Thus this don't enforce !RW mapping for small page kernel
 355		 * text mapping logic will help Linux Xen parvirt guest boot
 356		 * as well.
 357		 */
 358		if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
 359			pgprot_val(forbidden) |= _PAGE_RW;
 360	}
 361#endif
 362
 363	prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
 
 
 364
 365	return prot;
 366}
 367
 368/*
 369 * Lookup the page table entry for a virtual address in a specific pgd.
 370 * Return a pointer to the entry and the level of the mapping.
 371 */
 372pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
 373			     unsigned int *level)
 374{
 375	p4d_t *p4d;
 376	pud_t *pud;
 377	pmd_t *pmd;
 378
 379	*level = PG_LEVEL_NONE;
 380
 381	if (pgd_none(*pgd))
 382		return NULL;
 383
 384	p4d = p4d_offset(pgd, address);
 385	if (p4d_none(*p4d))
 386		return NULL;
 387
 388	*level = PG_LEVEL_512G;
 389	if (p4d_large(*p4d) || !p4d_present(*p4d))
 390		return (pte_t *)p4d;
 391
 392	pud = pud_offset(p4d, address);
 393	if (pud_none(*pud))
 394		return NULL;
 395
 396	*level = PG_LEVEL_1G;
 397	if (pud_large(*pud) || !pud_present(*pud))
 398		return (pte_t *)pud;
 399
 400	pmd = pmd_offset(pud, address);
 401	if (pmd_none(*pmd))
 402		return NULL;
 403
 404	*level = PG_LEVEL_2M;
 405	if (pmd_large(*pmd) || !pmd_present(*pmd))
 406		return (pte_t *)pmd;
 407
 408	*level = PG_LEVEL_4K;
 409
 410	return pte_offset_kernel(pmd, address);
 411}
 412
 413/*
 414 * Lookup the page table entry for a virtual address. Return a pointer
 415 * to the entry and the level of the mapping.
 416 *
 417 * Note: We return pud and pmd either when the entry is marked large
 418 * or when the present bit is not set. Otherwise we would return a
 419 * pointer to a nonexisting mapping.
 420 */
 421pte_t *lookup_address(unsigned long address, unsigned int *level)
 422{
 423        return lookup_address_in_pgd(pgd_offset_k(address), address, level);
 424}
 425EXPORT_SYMBOL_GPL(lookup_address);
 426
 427static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
 428				  unsigned int *level)
 429{
 430        if (cpa->pgd)
 431		return lookup_address_in_pgd(cpa->pgd + pgd_index(address),
 432					       address, level);
 433
 434        return lookup_address(address, level);
 435}
 436
 437/*
 438 * Lookup the PMD entry for a virtual address. Return a pointer to the entry
 439 * or NULL if not present.
 440 */
 441pmd_t *lookup_pmd_address(unsigned long address)
 442{
 443	pgd_t *pgd;
 444	p4d_t *p4d;
 445	pud_t *pud;
 446
 447	pgd = pgd_offset_k(address);
 448	if (pgd_none(*pgd))
 449		return NULL;
 450
 451	p4d = p4d_offset(pgd, address);
 452	if (p4d_none(*p4d) || p4d_large(*p4d) || !p4d_present(*p4d))
 453		return NULL;
 454
 455	pud = pud_offset(p4d, address);
 456	if (pud_none(*pud) || pud_large(*pud) || !pud_present(*pud))
 457		return NULL;
 458
 459	return pmd_offset(pud, address);
 460}
 461
 462/*
 463 * This is necessary because __pa() does not work on some
 464 * kinds of memory, like vmalloc() or the alloc_remap()
 465 * areas on 32-bit NUMA systems.  The percpu areas can
 466 * end up in this kind of memory, for instance.
 467 *
 468 * This could be optimized, but it is only intended to be
 469 * used at inititalization time, and keeping it
 470 * unoptimized should increase the testing coverage for
 471 * the more obscure platforms.
 472 */
 473phys_addr_t slow_virt_to_phys(void *__virt_addr)
 474{
 475	unsigned long virt_addr = (unsigned long)__virt_addr;
 476	phys_addr_t phys_addr;
 477	unsigned long offset;
 478	enum pg_level level;
 479	pte_t *pte;
 480
 481	pte = lookup_address(virt_addr, &level);
 482	BUG_ON(!pte);
 483
 484	/*
 485	 * pXX_pfn() returns unsigned long, which must be cast to phys_addr_t
 486	 * before being left-shifted PAGE_SHIFT bits -- this trick is to
 487	 * make 32-PAE kernel work correctly.
 488	 */
 489	switch (level) {
 490	case PG_LEVEL_1G:
 491		phys_addr = (phys_addr_t)pud_pfn(*(pud_t *)pte) << PAGE_SHIFT;
 492		offset = virt_addr & ~PUD_PAGE_MASK;
 493		break;
 494	case PG_LEVEL_2M:
 495		phys_addr = (phys_addr_t)pmd_pfn(*(pmd_t *)pte) << PAGE_SHIFT;
 496		offset = virt_addr & ~PMD_PAGE_MASK;
 497		break;
 498	default:
 499		phys_addr = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT;
 500		offset = virt_addr & ~PAGE_MASK;
 501	}
 502
 503	return (phys_addr_t)(phys_addr | offset);
 504}
 505EXPORT_SYMBOL_GPL(slow_virt_to_phys);
 506
 507/*
 508 * Set the new pmd in all the pgds we know about:
 509 */
 510static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
 511{
 512	/* change init_mm */
 513	set_pte_atomic(kpte, pte);
 514#ifdef CONFIG_X86_32
 515	if (!SHARED_KERNEL_PMD) {
 516		struct page *page;
 517
 518		list_for_each_entry(page, &pgd_list, lru) {
 519			pgd_t *pgd;
 520			p4d_t *p4d;
 521			pud_t *pud;
 522			pmd_t *pmd;
 523
 524			pgd = (pgd_t *)page_address(page) + pgd_index(address);
 525			p4d = p4d_offset(pgd, address);
 526			pud = pud_offset(p4d, address);
 527			pmd = pmd_offset(pud, address);
 528			set_pte_atomic((pte_t *)pmd, pte);
 529		}
 530	}
 531#endif
 532}
 533
 534static pgprot_t pgprot_clear_protnone_bits(pgprot_t prot)
 535{
 536	/*
 537	 * _PAGE_GLOBAL means "global page" for present PTEs.
 538	 * But, it is also used to indicate _PAGE_PROTNONE
 539	 * for non-present PTEs.
 540	 *
 541	 * This ensures that a _PAGE_GLOBAL PTE going from
 542	 * present to non-present is not confused as
 543	 * _PAGE_PROTNONE.
 544	 */
 545	if (!(pgprot_val(prot) & _PAGE_PRESENT))
 546		pgprot_val(prot) &= ~_PAGE_GLOBAL;
 547
 548	return prot;
 549}
 550
 551static int
 552try_preserve_large_page(pte_t *kpte, unsigned long address,
 553			struct cpa_data *cpa)
 554{
 555	unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn, old_pfn;
 556	pte_t new_pte, old_pte, *tmp;
 557	pgprot_t old_prot, new_prot, req_prot;
 558	int i, do_split = 1;
 559	enum pg_level level;
 560
 561	if (cpa->force_split)
 562		return 1;
 563
 564	spin_lock(&pgd_lock);
 565	/*
 566	 * Check for races, another CPU might have split this page
 567	 * up already:
 568	 */
 569	tmp = _lookup_address_cpa(cpa, address, &level);
 570	if (tmp != kpte)
 571		goto out_unlock;
 572
 573	switch (level) {
 574	case PG_LEVEL_2M:
 575		old_prot = pmd_pgprot(*(pmd_t *)kpte);
 576		old_pfn = pmd_pfn(*(pmd_t *)kpte);
 
 577		break;
 578	case PG_LEVEL_1G:
 579		old_prot = pud_pgprot(*(pud_t *)kpte);
 580		old_pfn = pud_pfn(*(pud_t *)kpte);
 
 581		break;
 582	default:
 583		do_split = -EINVAL;
 584		goto out_unlock;
 585	}
 586
 587	psize = page_level_size(level);
 588	pmask = page_level_mask(level);
 589
 590	/*
 591	 * Calculate the number of pages, which fit into this large
 592	 * page starting at address:
 593	 */
 594	nextpage_addr = (address + psize) & pmask;
 595	numpages = (nextpage_addr - address) >> PAGE_SHIFT;
 596	if (numpages < cpa->numpages)
 597		cpa->numpages = numpages;
 598
 599	/*
 600	 * We are safe now. Check whether the new pgprot is the same:
 601	 * Convert protection attributes to 4k-format, as cpa->mask* are set
 602	 * up accordingly.
 603	 */
 604	old_pte = *kpte;
 605	/* Clear PSE (aka _PAGE_PAT) and move PAT bit to correct position */
 606	req_prot = pgprot_large_2_4k(old_prot);
 607
 608	pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
 609	pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
 610
 611	/*
 612	 * req_prot is in format of 4k pages. It must be converted to large
 613	 * page format: the caching mode includes the PAT bit located at
 614	 * different bit positions in the two formats.
 615	 */
 616	req_prot = pgprot_4k_2_large(req_prot);
 617	req_prot = pgprot_clear_protnone_bits(req_prot);
 618	if (pgprot_val(req_prot) & _PAGE_PRESENT)
 619		pgprot_val(req_prot) |= _PAGE_PSE;
 620
 621	/*
 622	 * old_pfn points to the large page base pfn. So we need
 623	 * to add the offset of the virtual address:
 624	 */
 625	pfn = old_pfn + ((address & (psize - 1)) >> PAGE_SHIFT);
 626	cpa->pfn = pfn;
 627
 628	new_prot = static_protections(req_prot, address, pfn);
 
 
 
 
 
 629
 630	/*
 631	 * We need to check the full range, whether
 632	 * static_protection() requires a different pgprot for one of
 633	 * the pages in the range we try to preserve:
 634	 */
 635	addr = address & pmask;
 636	pfn = old_pfn;
 637	for (i = 0; i < (psize >> PAGE_SHIFT); i++, addr += PAGE_SIZE, pfn++) {
 638		pgprot_t chk_prot = static_protections(req_prot, addr, pfn);
 639
 640		if (pgprot_val(chk_prot) != pgprot_val(new_prot))
 641			goto out_unlock;
 
 
 
 
 
 642	}
 643
 644	/*
 645	 * If there are no changes, return. maxpages has been updated
 646	 * above:
 
 
 
 
 
 647	 */
 648	if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
 649		do_split = 0;
 650		goto out_unlock;
 651	}
 652
 653	/*
 654	 * We need to change the attributes. Check, whether we can
 655	 * change the large page in one go. We request a split, when
 656	 * the address is not aligned and the number of pages is
 657	 * smaller than the number of pages in the large page. Note
 658	 * that we limited the number of possible pages already to
 659	 * the number of pages in the large page.
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 660	 */
 661	if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) {
 662		/*
 663		 * The address is aligned and the number of pages
 664		 * covers the full page.
 665		 */
 666		new_pte = pfn_pte(old_pfn, new_prot);
 667		__set_pmd_pte(kpte, address, new_pte);
 668		cpa->flags |= CPA_FLUSHTLB;
 669		do_split = 0;
 670	}
 
 
 
 
 
 
 
 
 671
 672out_unlock:
 
 673	spin_unlock(&pgd_lock);
 674
 675	return do_split;
 676}
 677
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 678static int
 679__split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,
 680		   struct page *base)
 681{
 
 682	pte_t *pbase = (pte_t *)page_address(base);
 683	unsigned long ref_pfn, pfn, pfninc = 1;
 684	unsigned int i, level;
 
 685	pte_t *tmp;
 686	pgprot_t ref_prot;
 687
 688	spin_lock(&pgd_lock);
 689	/*
 690	 * Check for races, another CPU might have split this page
 691	 * up for us already:
 692	 */
 693	tmp = _lookup_address_cpa(cpa, address, &level);
 694	if (tmp != kpte) {
 695		spin_unlock(&pgd_lock);
 696		return 1;
 697	}
 698
 699	paravirt_alloc_pte(&init_mm, page_to_pfn(base));
 700
 701	switch (level) {
 702	case PG_LEVEL_2M:
 703		ref_prot = pmd_pgprot(*(pmd_t *)kpte);
 704		/*
 705		 * Clear PSE (aka _PAGE_PAT) and move
 706		 * PAT bit to correct position.
 707		 */
 708		ref_prot = pgprot_large_2_4k(ref_prot);
 709
 710		ref_pfn = pmd_pfn(*(pmd_t *)kpte);
 
 
 711		break;
 712
 713	case PG_LEVEL_1G:
 714		ref_prot = pud_pgprot(*(pud_t *)kpte);
 715		ref_pfn = pud_pfn(*(pud_t *)kpte);
 716		pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
 717
 
 718		/*
 719		 * Clear the PSE flags if the PRESENT flag is not set
 720		 * otherwise pmd_present/pmd_huge will return true
 721		 * even on a non present pmd.
 722		 */
 723		if (!(pgprot_val(ref_prot) & _PAGE_PRESENT))
 724			pgprot_val(ref_prot) &= ~_PAGE_PSE;
 725		break;
 726
 727	default:
 728		spin_unlock(&pgd_lock);
 729		return 1;
 730	}
 731
 732	ref_prot = pgprot_clear_protnone_bits(ref_prot);
 733
 734	/*
 735	 * Get the target pfn from the original entry:
 736	 */
 737	pfn = ref_pfn;
 738	for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
 739		set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
 740
 741	if (virt_addr_valid(address)) {
 742		unsigned long pfn = PFN_DOWN(__pa(address));
 743
 744		if (pfn_range_is_mapped(pfn, pfn + 1))
 745			split_page_count(level);
 746	}
 747
 748	/*
 749	 * Install the new, split up pagetable.
 750	 *
 751	 * We use the standard kernel pagetable protections for the new
 752	 * pagetable protections, the actual ptes set above control the
 753	 * primary protection behavior:
 754	 */
 755	__set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
 756
 757	/*
 758	 * Intel Atom errata AAH41 workaround.
 
 
 
 
 
 
 
 
 
 
 759	 *
 760	 * The real fix should be in hw or in a microcode update, but
 761	 * we also probabilistically try to reduce the window of having
 762	 * a large TLB mixed with 4K TLBs while instruction fetches are
 763	 * going on.
 764	 */
 765	__flush_tlb_all();
 766	spin_unlock(&pgd_lock);
 767
 768	return 0;
 769}
 770
 771static int split_large_page(struct cpa_data *cpa, pte_t *kpte,
 772			    unsigned long address)
 773{
 774	struct page *base;
 775
 776	if (!debug_pagealloc_enabled())
 777		spin_unlock(&cpa_lock);
 778	base = alloc_pages(GFP_KERNEL, 0);
 779	if (!debug_pagealloc_enabled())
 780		spin_lock(&cpa_lock);
 781	if (!base)
 782		return -ENOMEM;
 783
 784	if (__split_large_page(cpa, kpte, address, base))
 785		__free_page(base);
 786
 787	return 0;
 788}
 789
 790static bool try_to_free_pte_page(pte_t *pte)
 791{
 792	int i;
 793
 794	for (i = 0; i < PTRS_PER_PTE; i++)
 795		if (!pte_none(pte[i]))
 796			return false;
 797
 798	free_page((unsigned long)pte);
 799	return true;
 800}
 801
 802static bool try_to_free_pmd_page(pmd_t *pmd)
 803{
 804	int i;
 805
 806	for (i = 0; i < PTRS_PER_PMD; i++)
 807		if (!pmd_none(pmd[i]))
 808			return false;
 809
 810	free_page((unsigned long)pmd);
 811	return true;
 812}
 813
 814static bool unmap_pte_range(pmd_t *pmd, unsigned long start, unsigned long end)
 815{
 816	pte_t *pte = pte_offset_kernel(pmd, start);
 817
 818	while (start < end) {
 819		set_pte(pte, __pte(0));
 820
 821		start += PAGE_SIZE;
 822		pte++;
 823	}
 824
 825	if (try_to_free_pte_page((pte_t *)pmd_page_vaddr(*pmd))) {
 826		pmd_clear(pmd);
 827		return true;
 828	}
 829	return false;
 830}
 831
 832static void __unmap_pmd_range(pud_t *pud, pmd_t *pmd,
 833			      unsigned long start, unsigned long end)
 834{
 835	if (unmap_pte_range(pmd, start, end))
 836		if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
 837			pud_clear(pud);
 838}
 839
 840static void unmap_pmd_range(pud_t *pud, unsigned long start, unsigned long end)
 841{
 842	pmd_t *pmd = pmd_offset(pud, start);
 843
 844	/*
 845	 * Not on a 2MB page boundary?
 846	 */
 847	if (start & (PMD_SIZE - 1)) {
 848		unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
 849		unsigned long pre_end = min_t(unsigned long, end, next_page);
 850
 851		__unmap_pmd_range(pud, pmd, start, pre_end);
 852
 853		start = pre_end;
 854		pmd++;
 855	}
 856
 857	/*
 858	 * Try to unmap in 2M chunks.
 859	 */
 860	while (end - start >= PMD_SIZE) {
 861		if (pmd_large(*pmd))
 862			pmd_clear(pmd);
 863		else
 864			__unmap_pmd_range(pud, pmd, start, start + PMD_SIZE);
 865
 866		start += PMD_SIZE;
 867		pmd++;
 868	}
 869
 870	/*
 871	 * 4K leftovers?
 872	 */
 873	if (start < end)
 874		return __unmap_pmd_range(pud, pmd, start, end);
 875
 876	/*
 877	 * Try again to free the PMD page if haven't succeeded above.
 878	 */
 879	if (!pud_none(*pud))
 880		if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
 881			pud_clear(pud);
 882}
 883
 884static void unmap_pud_range(p4d_t *p4d, unsigned long start, unsigned long end)
 885{
 886	pud_t *pud = pud_offset(p4d, start);
 887
 888	/*
 889	 * Not on a GB page boundary?
 890	 */
 891	if (start & (PUD_SIZE - 1)) {
 892		unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
 893		unsigned long pre_end	= min_t(unsigned long, end, next_page);
 894
 895		unmap_pmd_range(pud, start, pre_end);
 896
 897		start = pre_end;
 898		pud++;
 899	}
 900
 901	/*
 902	 * Try to unmap in 1G chunks?
 903	 */
 904	while (end - start >= PUD_SIZE) {
 905
 906		if (pud_large(*pud))
 907			pud_clear(pud);
 908		else
 909			unmap_pmd_range(pud, start, start + PUD_SIZE);
 910
 911		start += PUD_SIZE;
 912		pud++;
 913	}
 914
 915	/*
 916	 * 2M leftovers?
 917	 */
 918	if (start < end)
 919		unmap_pmd_range(pud, start, end);
 920
 921	/*
 922	 * No need to try to free the PUD page because we'll free it in
 923	 * populate_pgd's error path
 924	 */
 925}
 926
 927static int alloc_pte_page(pmd_t *pmd)
 928{
 929	pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL);
 930	if (!pte)
 931		return -1;
 932
 933	set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
 934	return 0;
 935}
 936
 937static int alloc_pmd_page(pud_t *pud)
 938{
 939	pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL);
 940	if (!pmd)
 941		return -1;
 942
 943	set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
 944	return 0;
 945}
 946
 947static void populate_pte(struct cpa_data *cpa,
 948			 unsigned long start, unsigned long end,
 949			 unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
 950{
 951	pte_t *pte;
 952
 953	pte = pte_offset_kernel(pmd, start);
 954
 955	pgprot = pgprot_clear_protnone_bits(pgprot);
 956
 957	while (num_pages-- && start < end) {
 958		set_pte(pte, pfn_pte(cpa->pfn, pgprot));
 959
 960		start	 += PAGE_SIZE;
 961		cpa->pfn++;
 962		pte++;
 963	}
 964}
 965
 966static long populate_pmd(struct cpa_data *cpa,
 967			 unsigned long start, unsigned long end,
 968			 unsigned num_pages, pud_t *pud, pgprot_t pgprot)
 969{
 970	long cur_pages = 0;
 971	pmd_t *pmd;
 972	pgprot_t pmd_pgprot;
 973
 974	/*
 975	 * Not on a 2M boundary?
 976	 */
 977	if (start & (PMD_SIZE - 1)) {
 978		unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
 979		unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
 980
 981		pre_end   = min_t(unsigned long, pre_end, next_page);
 982		cur_pages = (pre_end - start) >> PAGE_SHIFT;
 983		cur_pages = min_t(unsigned int, num_pages, cur_pages);
 984
 985		/*
 986		 * Need a PTE page?
 987		 */
 988		pmd = pmd_offset(pud, start);
 989		if (pmd_none(*pmd))
 990			if (alloc_pte_page(pmd))
 991				return -1;
 992
 993		populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
 994
 995		start = pre_end;
 996	}
 997
 998	/*
 999	 * We mapped them all?
1000	 */
1001	if (num_pages == cur_pages)
1002		return cur_pages;
1003
1004	pmd_pgprot = pgprot_4k_2_large(pgprot);
1005
1006	while (end - start >= PMD_SIZE) {
1007
1008		/*
1009		 * We cannot use a 1G page so allocate a PMD page if needed.
1010		 */
1011		if (pud_none(*pud))
1012			if (alloc_pmd_page(pud))
1013				return -1;
1014
1015		pmd = pmd_offset(pud, start);
1016
1017		set_pmd(pmd, __pmd(cpa->pfn << PAGE_SHIFT | _PAGE_PSE |
1018				   massage_pgprot(pmd_pgprot)));
1019
1020		start	  += PMD_SIZE;
1021		cpa->pfn  += PMD_SIZE >> PAGE_SHIFT;
1022		cur_pages += PMD_SIZE >> PAGE_SHIFT;
1023	}
1024
1025	/*
1026	 * Map trailing 4K pages.
1027	 */
1028	if (start < end) {
1029		pmd = pmd_offset(pud, start);
1030		if (pmd_none(*pmd))
1031			if (alloc_pte_page(pmd))
1032				return -1;
1033
1034		populate_pte(cpa, start, end, num_pages - cur_pages,
1035			     pmd, pgprot);
1036	}
1037	return num_pages;
1038}
1039
1040static int populate_pud(struct cpa_data *cpa, unsigned long start, p4d_t *p4d,
1041			pgprot_t pgprot)
1042{
1043	pud_t *pud;
1044	unsigned long end;
1045	long cur_pages = 0;
1046	pgprot_t pud_pgprot;
1047
1048	end = start + (cpa->numpages << PAGE_SHIFT);
1049
1050	/*
1051	 * Not on a Gb page boundary? => map everything up to it with
1052	 * smaller pages.
1053	 */
1054	if (start & (PUD_SIZE - 1)) {
1055		unsigned long pre_end;
1056		unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
1057
1058		pre_end   = min_t(unsigned long, end, next_page);
1059		cur_pages = (pre_end - start) >> PAGE_SHIFT;
1060		cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
1061
1062		pud = pud_offset(p4d, start);
1063
1064		/*
1065		 * Need a PMD page?
1066		 */
1067		if (pud_none(*pud))
1068			if (alloc_pmd_page(pud))
1069				return -1;
1070
1071		cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
1072					 pud, pgprot);
1073		if (cur_pages < 0)
1074			return cur_pages;
1075
1076		start = pre_end;
1077	}
1078
1079	/* We mapped them all? */
1080	if (cpa->numpages == cur_pages)
1081		return cur_pages;
1082
1083	pud = pud_offset(p4d, start);
1084	pud_pgprot = pgprot_4k_2_large(pgprot);
1085
1086	/*
1087	 * Map everything starting from the Gb boundary, possibly with 1G pages
1088	 */
1089	while (boot_cpu_has(X86_FEATURE_GBPAGES) && end - start >= PUD_SIZE) {
1090		set_pud(pud, __pud(cpa->pfn << PAGE_SHIFT | _PAGE_PSE |
1091				   massage_pgprot(pud_pgprot)));
1092
1093		start	  += PUD_SIZE;
1094		cpa->pfn  += PUD_SIZE >> PAGE_SHIFT;
1095		cur_pages += PUD_SIZE >> PAGE_SHIFT;
1096		pud++;
1097	}
1098
1099	/* Map trailing leftover */
1100	if (start < end) {
1101		long tmp;
1102
1103		pud = pud_offset(p4d, start);
1104		if (pud_none(*pud))
1105			if (alloc_pmd_page(pud))
1106				return -1;
1107
1108		tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
1109				   pud, pgprot);
1110		if (tmp < 0)
1111			return cur_pages;
1112
1113		cur_pages += tmp;
1114	}
1115	return cur_pages;
1116}
1117
1118/*
1119 * Restrictions for kernel page table do not necessarily apply when mapping in
1120 * an alternate PGD.
1121 */
1122static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
1123{
1124	pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
1125	pud_t *pud = NULL;	/* shut up gcc */
1126	p4d_t *p4d;
1127	pgd_t *pgd_entry;
1128	long ret;
1129
1130	pgd_entry = cpa->pgd + pgd_index(addr);
1131
1132	if (pgd_none(*pgd_entry)) {
1133		p4d = (p4d_t *)get_zeroed_page(GFP_KERNEL);
1134		if (!p4d)
1135			return -1;
1136
1137		set_pgd(pgd_entry, __pgd(__pa(p4d) | _KERNPG_TABLE));
1138	}
1139
1140	/*
1141	 * Allocate a PUD page and hand it down for mapping.
1142	 */
1143	p4d = p4d_offset(pgd_entry, addr);
1144	if (p4d_none(*p4d)) {
1145		pud = (pud_t *)get_zeroed_page(GFP_KERNEL);
1146		if (!pud)
1147			return -1;
1148
1149		set_p4d(p4d, __p4d(__pa(pud) | _KERNPG_TABLE));
1150	}
1151
1152	pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
1153	pgprot_val(pgprot) |=  pgprot_val(cpa->mask_set);
1154
1155	ret = populate_pud(cpa, addr, p4d, pgprot);
1156	if (ret < 0) {
1157		/*
1158		 * Leave the PUD page in place in case some other CPU or thread
1159		 * already found it, but remove any useless entries we just
1160		 * added to it.
1161		 */
1162		unmap_pud_range(p4d, addr,
1163				addr + (cpa->numpages << PAGE_SHIFT));
1164		return ret;
1165	}
1166
1167	cpa->numpages = ret;
1168	return 0;
1169}
1170
1171static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
1172			       int primary)
1173{
1174	if (cpa->pgd) {
1175		/*
1176		 * Right now, we only execute this code path when mapping
1177		 * the EFI virtual memory map regions, no other users
1178		 * provide a ->pgd value. This may change in the future.
1179		 */
1180		return populate_pgd(cpa, vaddr);
1181	}
1182
1183	/*
1184	 * Ignore all non primary paths.
1185	 */
1186	if (!primary) {
1187		cpa->numpages = 1;
1188		return 0;
1189	}
1190
1191	/*
1192	 * Ignore the NULL PTE for kernel identity mapping, as it is expected
1193	 * to have holes.
1194	 * Also set numpages to '1' indicating that we processed cpa req for
1195	 * one virtual address page and its pfn. TBD: numpages can be set based
1196	 * on the initial value and the level returned by lookup_address().
1197	 */
1198	if (within(vaddr, PAGE_OFFSET,
1199		   PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
1200		cpa->numpages = 1;
1201		cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
1202		return 0;
1203
1204	} else if (__cpa_pfn_in_highmap(cpa->pfn)) {
1205		/* Faults in the highmap are OK, so do not warn: */
1206		return -EFAULT;
1207	} else {
1208		WARN(1, KERN_WARNING "CPA: called for zero pte. "
1209			"vaddr = %lx cpa->vaddr = %lx\n", vaddr,
1210			*cpa->vaddr);
1211
1212		return -EFAULT;
1213	}
1214}
1215
1216static int __change_page_attr(struct cpa_data *cpa, int primary)
1217{
1218	unsigned long address;
1219	int do_split, err;
1220	unsigned int level;
1221	pte_t *kpte, old_pte;
1222
1223	if (cpa->flags & CPA_PAGES_ARRAY) {
1224		struct page *page = cpa->pages[cpa->curpage];
1225		if (unlikely(PageHighMem(page)))
1226			return 0;
1227		address = (unsigned long)page_address(page);
1228	} else if (cpa->flags & CPA_ARRAY)
1229		address = cpa->vaddr[cpa->curpage];
1230	else
1231		address = *cpa->vaddr;
1232repeat:
1233	kpte = _lookup_address_cpa(cpa, address, &level);
1234	if (!kpte)
1235		return __cpa_process_fault(cpa, address, primary);
1236
1237	old_pte = *kpte;
1238	if (pte_none(old_pte))
1239		return __cpa_process_fault(cpa, address, primary);
1240
1241	if (level == PG_LEVEL_4K) {
1242		pte_t new_pte;
1243		pgprot_t new_prot = pte_pgprot(old_pte);
1244		unsigned long pfn = pte_pfn(old_pte);
1245
1246		pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
1247		pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
1248
1249		new_prot = static_protections(new_prot, address, pfn);
 
 
 
1250
1251		new_prot = pgprot_clear_protnone_bits(new_prot);
1252
1253		/*
1254		 * We need to keep the pfn from the existing PTE,
1255		 * after all we're only going to change it's attributes
1256		 * not the memory it points to
1257		 */
1258		new_pte = pfn_pte(pfn, new_prot);
1259		cpa->pfn = pfn;
1260		/*
1261		 * Do we really change anything ?
1262		 */
1263		if (pte_val(old_pte) != pte_val(new_pte)) {
1264			set_pte_atomic(kpte, new_pte);
1265			cpa->flags |= CPA_FLUSHTLB;
1266		}
1267		cpa->numpages = 1;
1268		return 0;
1269	}
1270
1271	/*
1272	 * Check, whether we can keep the large page intact
1273	 * and just change the pte:
1274	 */
1275	do_split = try_preserve_large_page(kpte, address, cpa);
1276	/*
1277	 * When the range fits into the existing large page,
1278	 * return. cp->numpages and cpa->tlbflush have been updated in
1279	 * try_large_page:
1280	 */
1281	if (do_split <= 0)
1282		return do_split;
1283
1284	/*
1285	 * We have to split the large page:
1286	 */
1287	err = split_large_page(cpa, kpte, address);
1288	if (!err) {
1289		/*
1290	 	 * Do a global flush tlb after splitting the large page
1291	 	 * and before we do the actual change page attribute in the PTE.
1292	 	 *
1293	 	 * With out this, we violate the TLB application note, that says
1294	 	 * "The TLBs may contain both ordinary and large-page
1295		 *  translations for a 4-KByte range of linear addresses. This
1296		 *  may occur if software modifies the paging structures so that
1297		 *  the page size used for the address range changes. If the two
1298		 *  translations differ with respect to page frame or attributes
1299		 *  (e.g., permissions), processor behavior is undefined and may
1300		 *  be implementation-specific."
1301	 	 *
1302	 	 * We do this global tlb flush inside the cpa_lock, so that we
1303		 * don't allow any other cpu, with stale tlb entries change the
1304		 * page attribute in parallel, that also falls into the
1305		 * just split large page entry.
1306	 	 */
1307		flush_tlb_all();
1308		goto repeat;
1309	}
1310
1311	return err;
1312}
1313
1314static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
1315
1316static int cpa_process_alias(struct cpa_data *cpa)
1317{
1318	struct cpa_data alias_cpa;
1319	unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
1320	unsigned long vaddr;
1321	int ret;
1322
1323	if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
1324		return 0;
1325
1326	/*
1327	 * No need to redo, when the primary call touched the direct
1328	 * mapping already:
1329	 */
1330	if (cpa->flags & CPA_PAGES_ARRAY) {
1331		struct page *page = cpa->pages[cpa->curpage];
1332		if (unlikely(PageHighMem(page)))
1333			return 0;
1334		vaddr = (unsigned long)page_address(page);
1335	} else if (cpa->flags & CPA_ARRAY)
1336		vaddr = cpa->vaddr[cpa->curpage];
1337	else
1338		vaddr = *cpa->vaddr;
1339
1340	if (!(within(vaddr, PAGE_OFFSET,
1341		    PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
1342
1343		alias_cpa = *cpa;
1344		alias_cpa.vaddr = &laddr;
1345		alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
 
1346
1347		ret = __change_page_attr_set_clr(&alias_cpa, 0);
1348		if (ret)
1349			return ret;
1350	}
1351
1352#ifdef CONFIG_X86_64
1353	/*
1354	 * If the primary call didn't touch the high mapping already
1355	 * and the physical address is inside the kernel map, we need
1356	 * to touch the high mapped kernel as well:
1357	 */
1358	if (!within(vaddr, (unsigned long)_text, _brk_end) &&
1359	    __cpa_pfn_in_highmap(cpa->pfn)) {
1360		unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
1361					       __START_KERNEL_map - phys_base;
1362		alias_cpa = *cpa;
1363		alias_cpa.vaddr = &temp_cpa_vaddr;
1364		alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
 
1365
1366		/*
1367		 * The high mapping range is imprecise, so ignore the
1368		 * return value.
1369		 */
1370		__change_page_attr_set_clr(&alias_cpa, 0);
1371	}
1372#endif
1373
1374	return 0;
1375}
1376
1377static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
1378{
1379	unsigned long numpages = cpa->numpages;
1380	int ret;
 
1381
1382	while (numpages) {
1383		/*
1384		 * Store the remaining nr of pages for the large page
1385		 * preservation check.
1386		 */
1387		cpa->numpages = numpages;
1388		/* for array changes, we can't use large page */
1389		if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
1390			cpa->numpages = 1;
1391
1392		if (!debug_pagealloc_enabled())
1393			spin_lock(&cpa_lock);
1394		ret = __change_page_attr(cpa, checkalias);
1395		if (!debug_pagealloc_enabled())
1396			spin_unlock(&cpa_lock);
1397		if (ret)
1398			return ret;
1399
1400		if (checkalias) {
1401			ret = cpa_process_alias(cpa);
1402			if (ret)
1403				return ret;
1404		}
1405
1406		/*
1407		 * Adjust the number of pages with the result of the
1408		 * CPA operation. Either a large page has been
1409		 * preserved or a single page update happened.
1410		 */
1411		BUG_ON(cpa->numpages > numpages || !cpa->numpages);
1412		numpages -= cpa->numpages;
1413		if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
1414			cpa->curpage++;
1415		else
1416			*cpa->vaddr += cpa->numpages * PAGE_SIZE;
1417
1418	}
1419	return 0;
 
 
1420}
1421
1422static int change_page_attr_set_clr(unsigned long *addr, int numpages,
1423				    pgprot_t mask_set, pgprot_t mask_clr,
1424				    int force_split, int in_flag,
1425				    struct page **pages)
1426{
1427	struct cpa_data cpa;
1428	int ret, cache, checkalias;
1429	unsigned long baddr = 0;
1430
1431	memset(&cpa, 0, sizeof(cpa));
1432
1433	/*
1434	 * Check, if we are requested to set a not supported
1435	 * feature.  Clearing non-supported features is OK.
1436	 */
1437	mask_set = canon_pgprot(mask_set);
1438
1439	if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
1440		return 0;
1441
1442	/* Ensure we are PAGE_SIZE aligned */
1443	if (in_flag & CPA_ARRAY) {
1444		int i;
1445		for (i = 0; i < numpages; i++) {
1446			if (addr[i] & ~PAGE_MASK) {
1447				addr[i] &= PAGE_MASK;
1448				WARN_ON_ONCE(1);
1449			}
1450		}
1451	} else if (!(in_flag & CPA_PAGES_ARRAY)) {
1452		/*
1453		 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1454		 * No need to cehck in that case
1455		 */
1456		if (*addr & ~PAGE_MASK) {
1457			*addr &= PAGE_MASK;
1458			/*
1459			 * People should not be passing in unaligned addresses:
1460			 */
1461			WARN_ON_ONCE(1);
1462		}
1463		/*
1464		 * Save address for cache flush. *addr is modified in the call
1465		 * to __change_page_attr_set_clr() below.
1466		 */
1467		baddr = *addr;
1468	}
1469
1470	/* Must avoid aliasing mappings in the highmem code */
1471	kmap_flush_unused();
1472
1473	vm_unmap_aliases();
1474
1475	cpa.vaddr = addr;
1476	cpa.pages = pages;
1477	cpa.numpages = numpages;
1478	cpa.mask_set = mask_set;
1479	cpa.mask_clr = mask_clr;
1480	cpa.flags = 0;
1481	cpa.curpage = 0;
1482	cpa.force_split = force_split;
1483
1484	if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
1485		cpa.flags |= in_flag;
1486
1487	/* No alias checking for _NX bit modifications */
1488	checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
 
 
 
1489
1490	ret = __change_page_attr_set_clr(&cpa, checkalias);
1491
1492	/*
1493	 * Check whether we really changed something:
1494	 */
1495	if (!(cpa.flags & CPA_FLUSHTLB))
1496		goto out;
1497
1498	/*
1499	 * No need to flush, when we did not set any of the caching
1500	 * attributes:
1501	 */
1502	cache = !!pgprot2cachemode(mask_set);
1503
1504	/*
1505	 * On success we use CLFLUSH, when the CPU supports it to
1506	 * avoid the WBINVD. If the CPU does not support it and in the
1507	 * error case we fall back to cpa_flush_all (which uses
1508	 * WBINVD):
1509	 */
1510	if (!ret && boot_cpu_has(X86_FEATURE_CLFLUSH)) {
1511		if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
1512			cpa_flush_array(addr, numpages, cache,
1513					cpa.flags, pages);
1514		} else
1515			cpa_flush_range(baddr, numpages, cache);
1516	} else
1517		cpa_flush_all(cache);
 
 
1518
 
1519out:
1520	return ret;
1521}
1522
1523static inline int change_page_attr_set(unsigned long *addr, int numpages,
1524				       pgprot_t mask, int array)
1525{
1526	return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
1527		(array ? CPA_ARRAY : 0), NULL);
1528}
1529
1530static inline int change_page_attr_clear(unsigned long *addr, int numpages,
1531					 pgprot_t mask, int array)
1532{
1533	return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
1534		(array ? CPA_ARRAY : 0), NULL);
1535}
1536
1537static inline int cpa_set_pages_array(struct page **pages, int numpages,
1538				       pgprot_t mask)
1539{
1540	return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
1541		CPA_PAGES_ARRAY, pages);
1542}
1543
1544static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1545					 pgprot_t mask)
1546{
1547	return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1548		CPA_PAGES_ARRAY, pages);
1549}
1550
1551int _set_memory_uc(unsigned long addr, int numpages)
1552{
1553	/*
1554	 * for now UC MINUS. see comments in ioremap_nocache()
1555	 * If you really need strong UC use ioremap_uc(), but note
1556	 * that you cannot override IO areas with set_memory_*() as
1557	 * these helpers cannot work with IO memory.
1558	 */
1559	return change_page_attr_set(&addr, numpages,
1560				    cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1561				    0);
1562}
1563
1564int set_memory_uc(unsigned long addr, int numpages)
1565{
1566	int ret;
1567
1568	/*
1569	 * for now UC MINUS. see comments in ioremap_nocache()
1570	 */
1571	ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1572			      _PAGE_CACHE_MODE_UC_MINUS, NULL);
1573	if (ret)
1574		goto out_err;
1575
1576	ret = _set_memory_uc(addr, numpages);
1577	if (ret)
1578		goto out_free;
1579
1580	return 0;
1581
1582out_free:
1583	free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1584out_err:
1585	return ret;
1586}
1587EXPORT_SYMBOL(set_memory_uc);
1588
1589static int _set_memory_array(unsigned long *addr, int addrinarray,
1590		enum page_cache_mode new_type)
1591{
1592	enum page_cache_mode set_type;
1593	int i, j;
1594	int ret;
1595
1596	for (i = 0; i < addrinarray; i++) {
1597		ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
1598					new_type, NULL);
1599		if (ret)
1600			goto out_free;
1601	}
1602
1603	/* If WC, set to UC- first and then WC */
1604	set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1605				_PAGE_CACHE_MODE_UC_MINUS : new_type;
1606
1607	ret = change_page_attr_set(addr, addrinarray,
1608				   cachemode2pgprot(set_type), 1);
1609
1610	if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1611		ret = change_page_attr_set_clr(addr, addrinarray,
1612					       cachemode2pgprot(
1613						_PAGE_CACHE_MODE_WC),
1614					       __pgprot(_PAGE_CACHE_MASK),
1615					       0, CPA_ARRAY, NULL);
1616	if (ret)
1617		goto out_free;
1618
1619	return 0;
1620
1621out_free:
1622	for (j = 0; j < i; j++)
1623		free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
1624
1625	return ret;
1626}
1627
1628int set_memory_array_uc(unsigned long *addr, int addrinarray)
1629{
1630	return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1631}
1632EXPORT_SYMBOL(set_memory_array_uc);
1633
1634int set_memory_array_wc(unsigned long *addr, int addrinarray)
1635{
1636	return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WC);
1637}
1638EXPORT_SYMBOL(set_memory_array_wc);
1639
1640int set_memory_array_wt(unsigned long *addr, int addrinarray)
1641{
1642	return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WT);
1643}
1644EXPORT_SYMBOL_GPL(set_memory_array_wt);
1645
1646int _set_memory_wc(unsigned long addr, int numpages)
1647{
1648	int ret;
1649	unsigned long addr_copy = addr;
1650
1651	ret = change_page_attr_set(&addr, numpages,
1652				   cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1653				   0);
1654	if (!ret) {
1655		ret = change_page_attr_set_clr(&addr_copy, numpages,
1656					       cachemode2pgprot(
1657						_PAGE_CACHE_MODE_WC),
1658					       __pgprot(_PAGE_CACHE_MASK),
1659					       0, 0, NULL);
1660	}
1661	return ret;
1662}
1663
1664int set_memory_wc(unsigned long addr, int numpages)
1665{
1666	int ret;
1667
1668	ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1669		_PAGE_CACHE_MODE_WC, NULL);
1670	if (ret)
1671		return ret;
1672
1673	ret = _set_memory_wc(addr, numpages);
1674	if (ret)
1675		free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1676
1677	return ret;
1678}
1679EXPORT_SYMBOL(set_memory_wc);
1680
1681int _set_memory_wt(unsigned long addr, int numpages)
1682{
1683	return change_page_attr_set(&addr, numpages,
1684				    cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);
1685}
1686
1687int set_memory_wt(unsigned long addr, int numpages)
1688{
1689	int ret;
1690
1691	ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1692			      _PAGE_CACHE_MODE_WT, NULL);
1693	if (ret)
1694		return ret;
1695
1696	ret = _set_memory_wt(addr, numpages);
1697	if (ret)
1698		free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1699
1700	return ret;
1701}
1702EXPORT_SYMBOL_GPL(set_memory_wt);
1703
1704int _set_memory_wb(unsigned long addr, int numpages)
1705{
1706	/* WB cache mode is hard wired to all cache attribute bits being 0 */
1707	return change_page_attr_clear(&addr, numpages,
1708				      __pgprot(_PAGE_CACHE_MASK), 0);
1709}
1710
1711int set_memory_wb(unsigned long addr, int numpages)
1712{
1713	int ret;
1714
1715	ret = _set_memory_wb(addr, numpages);
1716	if (ret)
1717		return ret;
1718
1719	free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1720	return 0;
1721}
1722EXPORT_SYMBOL(set_memory_wb);
1723
1724int set_memory_array_wb(unsigned long *addr, int addrinarray)
1725{
1726	int i;
1727	int ret;
1728
1729	/* WB cache mode is hard wired to all cache attribute bits being 0 */
1730	ret = change_page_attr_clear(addr, addrinarray,
1731				      __pgprot(_PAGE_CACHE_MASK), 1);
1732	if (ret)
1733		return ret;
1734
1735	for (i = 0; i < addrinarray; i++)
1736		free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
1737
1738	return 0;
1739}
1740EXPORT_SYMBOL(set_memory_array_wb);
1741
1742int set_memory_x(unsigned long addr, int numpages)
1743{
1744	if (!(__supported_pte_mask & _PAGE_NX))
1745		return 0;
1746
1747	return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1748}
1749EXPORT_SYMBOL(set_memory_x);
1750
1751int set_memory_nx(unsigned long addr, int numpages)
1752{
1753	if (!(__supported_pte_mask & _PAGE_NX))
1754		return 0;
1755
1756	return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1757}
1758EXPORT_SYMBOL(set_memory_nx);
1759
1760int set_memory_ro(unsigned long addr, int numpages)
1761{
1762	return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1763}
1764
1765int set_memory_rw(unsigned long addr, int numpages)
1766{
1767	return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1768}
1769
1770int set_memory_np(unsigned long addr, int numpages)
1771{
1772	return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
1773}
1774
 
 
 
 
 
 
 
 
 
1775int set_memory_4k(unsigned long addr, int numpages)
1776{
1777	return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1778					__pgprot(0), 1, 0, NULL);
1779}
1780
1781int set_memory_nonglobal(unsigned long addr, int numpages)
1782{
1783	return change_page_attr_clear(&addr, numpages,
1784				      __pgprot(_PAGE_GLOBAL), 0);
1785}
1786
 
 
 
 
 
 
1787static int __set_memory_enc_dec(unsigned long addr, int numpages, bool enc)
1788{
1789	struct cpa_data cpa;
1790	unsigned long start;
1791	int ret;
1792
1793	/* Nothing to do if memory encryption is not active */
1794	if (!mem_encrypt_active())
1795		return 0;
1796
1797	/* Should not be working on unaligned addresses */
1798	if (WARN_ONCE(addr & ~PAGE_MASK, "misaligned address: %#lx\n", addr))
1799		addr &= PAGE_MASK;
1800
1801	start = addr;
1802
1803	memset(&cpa, 0, sizeof(cpa));
1804	cpa.vaddr = &addr;
1805	cpa.numpages = numpages;
1806	cpa.mask_set = enc ? __pgprot(_PAGE_ENC) : __pgprot(0);
1807	cpa.mask_clr = enc ? __pgprot(0) : __pgprot(_PAGE_ENC);
1808	cpa.pgd = init_mm.pgd;
1809
1810	/* Must avoid aliasing mappings in the highmem code */
1811	kmap_flush_unused();
1812	vm_unmap_aliases();
1813
1814	/*
1815	 * Before changing the encryption attribute, we need to flush caches.
1816	 */
1817	if (static_cpu_has(X86_FEATURE_CLFLUSH))
1818		cpa_flush_range(start, numpages, 1);
1819	else
1820		cpa_flush_all(1);
1821
1822	ret = __change_page_attr_set_clr(&cpa, 1);
1823
1824	/*
1825	 * After changing the encryption attribute, we need to flush TLBs
1826	 * again in case any speculative TLB caching occurred (but no need
1827	 * to flush caches again).  We could just use cpa_flush_all(), but
1828	 * in case TLB flushing gets optimized in the cpa_flush_range()
1829	 * path use the same logic as above.
1830	 */
1831	if (static_cpu_has(X86_FEATURE_CLFLUSH))
1832		cpa_flush_range(start, numpages, 0);
1833	else
1834		cpa_flush_all(0);
1835
1836	return ret;
1837}
1838
1839int set_memory_encrypted(unsigned long addr, int numpages)
1840{
1841	return __set_memory_enc_dec(addr, numpages, true);
1842}
1843EXPORT_SYMBOL_GPL(set_memory_encrypted);
1844
1845int set_memory_decrypted(unsigned long addr, int numpages)
1846{
1847	return __set_memory_enc_dec(addr, numpages, false);
1848}
1849EXPORT_SYMBOL_GPL(set_memory_decrypted);
1850
1851int set_pages_uc(struct page *page, int numpages)
1852{
1853	unsigned long addr = (unsigned long)page_address(page);
1854
1855	return set_memory_uc(addr, numpages);
1856}
1857EXPORT_SYMBOL(set_pages_uc);
1858
1859static int _set_pages_array(struct page **pages, int addrinarray,
1860		enum page_cache_mode new_type)
1861{
1862	unsigned long start;
1863	unsigned long end;
1864	enum page_cache_mode set_type;
1865	int i;
1866	int free_idx;
1867	int ret;
1868
1869	for (i = 0; i < addrinarray; i++) {
1870		if (PageHighMem(pages[i]))
1871			continue;
1872		start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1873		end = start + PAGE_SIZE;
1874		if (reserve_memtype(start, end, new_type, NULL))
1875			goto err_out;
1876	}
1877
1878	/* If WC, set to UC- first and then WC */
1879	set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1880				_PAGE_CACHE_MODE_UC_MINUS : new_type;
1881
1882	ret = cpa_set_pages_array(pages, addrinarray,
1883				  cachemode2pgprot(set_type));
1884	if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1885		ret = change_page_attr_set_clr(NULL, addrinarray,
1886					       cachemode2pgprot(
1887						_PAGE_CACHE_MODE_WC),
1888					       __pgprot(_PAGE_CACHE_MASK),
1889					       0, CPA_PAGES_ARRAY, pages);
1890	if (ret)
1891		goto err_out;
1892	return 0; /* Success */
1893err_out:
1894	free_idx = i;
1895	for (i = 0; i < free_idx; i++) {
1896		if (PageHighMem(pages[i]))
1897			continue;
1898		start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1899		end = start + PAGE_SIZE;
1900		free_memtype(start, end);
1901	}
1902	return -EINVAL;
1903}
1904
1905int set_pages_array_uc(struct page **pages, int addrinarray)
1906{
1907	return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1908}
1909EXPORT_SYMBOL(set_pages_array_uc);
1910
1911int set_pages_array_wc(struct page **pages, int addrinarray)
1912{
1913	return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WC);
1914}
1915EXPORT_SYMBOL(set_pages_array_wc);
1916
1917int set_pages_array_wt(struct page **pages, int addrinarray)
1918{
1919	return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WT);
1920}
1921EXPORT_SYMBOL_GPL(set_pages_array_wt);
1922
1923int set_pages_wb(struct page *page, int numpages)
1924{
1925	unsigned long addr = (unsigned long)page_address(page);
1926
1927	return set_memory_wb(addr, numpages);
1928}
1929EXPORT_SYMBOL(set_pages_wb);
1930
1931int set_pages_array_wb(struct page **pages, int addrinarray)
1932{
1933	int retval;
1934	unsigned long start;
1935	unsigned long end;
1936	int i;
1937
1938	/* WB cache mode is hard wired to all cache attribute bits being 0 */
1939	retval = cpa_clear_pages_array(pages, addrinarray,
1940			__pgprot(_PAGE_CACHE_MASK));
1941	if (retval)
1942		return retval;
1943
1944	for (i = 0; i < addrinarray; i++) {
1945		if (PageHighMem(pages[i]))
1946			continue;
1947		start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1948		end = start + PAGE_SIZE;
1949		free_memtype(start, end);
1950	}
1951
1952	return 0;
1953}
1954EXPORT_SYMBOL(set_pages_array_wb);
1955
1956int set_pages_x(struct page *page, int numpages)
1957{
1958	unsigned long addr = (unsigned long)page_address(page);
1959
1960	return set_memory_x(addr, numpages);
1961}
1962EXPORT_SYMBOL(set_pages_x);
1963
1964int set_pages_nx(struct page *page, int numpages)
1965{
1966	unsigned long addr = (unsigned long)page_address(page);
1967
1968	return set_memory_nx(addr, numpages);
1969}
1970EXPORT_SYMBOL(set_pages_nx);
1971
1972int set_pages_ro(struct page *page, int numpages)
1973{
1974	unsigned long addr = (unsigned long)page_address(page);
1975
1976	return set_memory_ro(addr, numpages);
1977}
1978
1979int set_pages_rw(struct page *page, int numpages)
1980{
1981	unsigned long addr = (unsigned long)page_address(page);
1982
1983	return set_memory_rw(addr, numpages);
1984}
1985
1986#ifdef CONFIG_DEBUG_PAGEALLOC
1987
1988static int __set_pages_p(struct page *page, int numpages)
1989{
1990	unsigned long tempaddr = (unsigned long) page_address(page);
1991	struct cpa_data cpa = { .vaddr = &tempaddr,
1992				.pgd = NULL,
1993				.numpages = numpages,
1994				.mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1995				.mask_clr = __pgprot(0),
1996				.flags = 0};
1997
1998	/*
1999	 * No alias checking needed for setting present flag. otherwise,
2000	 * we may need to break large pages for 64-bit kernel text
2001	 * mappings (this adds to complexity if we want to do this from
2002	 * atomic context especially). Let's keep it simple!
2003	 */
2004	return __change_page_attr_set_clr(&cpa, 0);
2005}
2006
2007static int __set_pages_np(struct page *page, int numpages)
2008{
2009	unsigned long tempaddr = (unsigned long) page_address(page);
2010	struct cpa_data cpa = { .vaddr = &tempaddr,
2011				.pgd = NULL,
2012				.numpages = numpages,
2013				.mask_set = __pgprot(0),
2014				.mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
2015				.flags = 0};
2016
2017	/*
2018	 * No alias checking needed for setting not present flag. otherwise,
2019	 * we may need to break large pages for 64-bit kernel text
2020	 * mappings (this adds to complexity if we want to do this from
2021	 * atomic context especially). Let's keep it simple!
2022	 */
2023	return __change_page_attr_set_clr(&cpa, 0);
2024}
2025
 
 
 
 
 
 
 
 
 
 
2026void __kernel_map_pages(struct page *page, int numpages, int enable)
2027{
2028	if (PageHighMem(page))
2029		return;
2030	if (!enable) {
2031		debug_check_no_locks_freed(page_address(page),
2032					   numpages * PAGE_SIZE);
2033	}
2034
2035	/*
2036	 * The return value is ignored as the calls cannot fail.
2037	 * Large pages for identity mappings are not used at boot time
2038	 * and hence no memory allocations during large page split.
2039	 */
2040	if (enable)
2041		__set_pages_p(page, numpages);
2042	else
2043		__set_pages_np(page, numpages);
2044
2045	/*
2046	 * We should perform an IPI and flush all tlbs,
2047	 * but that can deadlock->flush only current cpu:
 
 
2048	 */
 
2049	__flush_tlb_all();
 
2050
2051	arch_flush_lazy_mmu_mode();
2052}
2053
2054#ifdef CONFIG_HIBERNATION
2055
2056bool kernel_page_present(struct page *page)
2057{
2058	unsigned int level;
2059	pte_t *pte;
2060
2061	if (PageHighMem(page))
2062		return false;
2063
2064	pte = lookup_address((unsigned long)page_address(page), &level);
2065	return (pte_val(*pte) & _PAGE_PRESENT);
2066}
2067
2068#endif /* CONFIG_HIBERNATION */
2069
2070#endif /* CONFIG_DEBUG_PAGEALLOC */
2071
2072int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
2073			    unsigned numpages, unsigned long page_flags)
2074{
2075	int retval = -EINVAL;
2076
2077	struct cpa_data cpa = {
2078		.vaddr = &address,
2079		.pfn = pfn,
2080		.pgd = pgd,
2081		.numpages = numpages,
2082		.mask_set = __pgprot(0),
2083		.mask_clr = __pgprot(0),
2084		.flags = 0,
2085	};
2086
 
 
2087	if (!(__supported_pte_mask & _PAGE_NX))
2088		goto out;
2089
2090	if (!(page_flags & _PAGE_NX))
2091		cpa.mask_clr = __pgprot(_PAGE_NX);
2092
2093	if (!(page_flags & _PAGE_RW))
2094		cpa.mask_clr = __pgprot(_PAGE_RW);
2095
2096	if (!(page_flags & _PAGE_ENC))
2097		cpa.mask_clr = pgprot_encrypted(cpa.mask_clr);
2098
2099	cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags);
2100
2101	retval = __change_page_attr_set_clr(&cpa, 0);
2102	__flush_tlb_all();
2103
2104out:
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2105	return retval;
2106}
2107
2108/*
2109 * The testcases use internal knowledge of the implementation that shouldn't
2110 * be exposed to the rest of the kernel. Include these directly here.
2111 */
2112#ifdef CONFIG_CPA_DEBUG
2113#include "pageattr-test.c"
2114#endif