1/*
 2 *	Routines to identify additional cpu features that are scattered in
 3 *	cpuid space.
 4 */
 5#include <linux/cpu.h>
 6
 7#include <asm/pat.h>
 8#include <asm/apic.h>
 9#include <asm/processor.h>
10
11#include "cpu.h"
12
13struct cpuid_bit {
14	u16 feature;
15	u8 reg;
16	u8 bit;
17	u32 level;
18	u32 sub_leaf;
19};
20
21/*
22 * Please keep the leaf sorted by cpuid_bit.level for faster search.
23 * X86_FEATURE_MBA is supported by both Intel and AMD. But the CPUID
24 * levels are different and there is a separate entry for each.
25 */
26static const struct cpuid_bit cpuid_bits[] = {
27	{ X86_FEATURE_APERFMPERF,       CPUID_ECX,  0, 0x00000006, 0 },
28	{ X86_FEATURE_EPB,		CPUID_ECX,  3, 0x00000006, 0 },
29	{ X86_FEATURE_CQM_LLC,		CPUID_EDX,  1, 0x0000000f, 0 },
30	{ X86_FEATURE_CQM_OCCUP_LLC,	CPUID_EDX,  0, 0x0000000f, 1 },
31	{ X86_FEATURE_CQM_MBM_TOTAL,	CPUID_EDX,  1, 0x0000000f, 1 },
32	{ X86_FEATURE_CQM_MBM_LOCAL,	CPUID_EDX,  2, 0x0000000f, 1 },
33	{ X86_FEATURE_CAT_L3,		CPUID_EBX,  1, 0x00000010, 0 },
34	{ X86_FEATURE_CAT_L2,		CPUID_EBX,  2, 0x00000010, 0 },
35	{ X86_FEATURE_CDP_L3,		CPUID_ECX,  2, 0x00000010, 1 },
36	{ X86_FEATURE_CDP_L2,		CPUID_ECX,  2, 0x00000010, 2 },
37	{ X86_FEATURE_MBA,		CPUID_EBX,  3, 0x00000010, 0 },
38	{ X86_FEATURE_HW_PSTATE,	CPUID_EDX,  7, 0x80000007, 0 },
39	{ X86_FEATURE_CPB,		CPUID_EDX,  9, 0x80000007, 0 },
40	{ X86_FEATURE_PROC_FEEDBACK,    CPUID_EDX, 11, 0x80000007, 0 },
41	{ X86_FEATURE_MBA,		CPUID_EBX,  6, 0x80000008, 0 },
42	{ X86_FEATURE_SME,		CPUID_EAX,  0, 0x8000001f, 0 },
43	{ X86_FEATURE_SEV,		CPUID_EAX,  1, 0x8000001f, 0 },
44	{ 0, 0, 0, 0, 0 }
45};
46
47void init_scattered_cpuid_features(struct cpuinfo_x86 *c)
48{
49	u32 max_level;
50	u32 regs[4];
51	const struct cpuid_bit *cb;
52
53	for (cb = cpuid_bits; cb->feature; cb++) {
54
55		/* Verify that the level is valid */
56		max_level = cpuid_eax(cb->level & 0xffff0000);
57		if (max_level < cb->level ||
58		    max_level > (cb->level | 0xffff))
59			continue;
60
61		cpuid_count(cb->level, cb->sub_leaf, &regs[CPUID_EAX],
62			    &regs[CPUID_EBX], &regs[CPUID_ECX],
63			    &regs[CPUID_EDX]);
64
65		if (regs[cb->reg] & (1 << cb->bit))
66			set_cpu_cap(c, cb->feature);
67	}
68}

 1/*
 2 *	Routines to identify additional cpu features that are scattered in
 3 *	cpuid space.
 4 */
 5#include <linux/cpu.h>
 6
 7#include <asm/pat.h>
 
 8#include <asm/processor.h>
 9
10#include <asm/apic.h>
11
12struct cpuid_bit {
13	u16 feature;
14	u8 reg;
15	u8 bit;
16	u32 level;
17	u32 sub_leaf;
18};
19
20/* Please keep the leaf sorted by cpuid_bit.level for faster search. */
 
 
 
 
21static const struct cpuid_bit cpuid_bits[] = {
22	{ X86_FEATURE_APERFMPERF,       CPUID_ECX,  0, 0x00000006, 0 },
23	{ X86_FEATURE_EPB,		CPUID_ECX,  3, 0x00000006, 0 },
 
 
 
 
24	{ X86_FEATURE_CAT_L3,		CPUID_EBX,  1, 0x00000010, 0 },
25	{ X86_FEATURE_CAT_L2,		CPUID_EBX,  2, 0x00000010, 0 },
26	{ X86_FEATURE_CDP_L3,		CPUID_ECX,  2, 0x00000010, 1 },
27	{ X86_FEATURE_CDP_L2,		CPUID_ECX,  2, 0x00000010, 2 },
28	{ X86_FEATURE_MBA,		CPUID_EBX,  3, 0x00000010, 0 },
29	{ X86_FEATURE_HW_PSTATE,	CPUID_EDX,  7, 0x80000007, 0 },
30	{ X86_FEATURE_CPB,		CPUID_EDX,  9, 0x80000007, 0 },
31	{ X86_FEATURE_PROC_FEEDBACK,    CPUID_EDX, 11, 0x80000007, 0 },
 
32	{ X86_FEATURE_SME,		CPUID_EAX,  0, 0x8000001f, 0 },
33	{ X86_FEATURE_SEV,		CPUID_EAX,  1, 0x8000001f, 0 },
34	{ 0, 0, 0, 0, 0 }
35};
36
37void init_scattered_cpuid_features(struct cpuinfo_x86 *c)
38{
39	u32 max_level;
40	u32 regs[4];
41	const struct cpuid_bit *cb;
42
43	for (cb = cpuid_bits; cb->feature; cb++) {
44
45		/* Verify that the level is valid */
46		max_level = cpuid_eax(cb->level & 0xffff0000);
47		if (max_level < cb->level ||
48		    max_level > (cb->level | 0xffff))
49			continue;
50
51		cpuid_count(cb->level, cb->sub_leaf, &regs[CPUID_EAX],
52			    &regs[CPUID_EBX], &regs[CPUID_ECX],
53			    &regs[CPUID_EDX]);
54
55		if (regs[cb->reg] & (1 << cb->bit))
56			set_cpu_cap(c, cb->feature);
57	}
58}
59
60u32 get_scattered_cpuid_leaf(unsigned int level, unsigned int sub_leaf,
61			     enum cpuid_regs_idx reg)
62{
63	const struct cpuid_bit *cb;
64	u32 cpuid_val = 0;
65
66	for (cb = cpuid_bits; cb->feature; cb++) {
67
68		if (level > cb->level)
69			continue;
70
71		if (level < cb->level)
72			break;
73
74		if (reg == cb->reg && sub_leaf == cb->sub_leaf) {
75			if (cpu_has(&boot_cpu_data, cb->feature))
76				cpuid_val |= BIT(cb->bit);
77		}
78	}
79
80	return cpuid_val;
81}
82EXPORT_SYMBOL_GPL(get_scattered_cpuid_leaf);