1// SPDX-License-Identifier: GPL-2.0-only
 2/*
 3 * cppc_msr.c:  MSR Interface for CPPC
 4 * Copyright (c) 2016, Intel Corporation.
 
 
 
 
 
 
 
 
 
 
 5 */
 6
 7#include <acpi/cppc_acpi.h>
 8#include <asm/msr.h>
 9
10/* Refer to drivers/acpi/cppc_acpi.c for the description of functions */
11
12bool cpc_ffh_supported(void)
13{
14	return true;
15}
16
17int cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val)
18{
19	int err;
20
21	err = rdmsrl_safe_on_cpu(cpunum, reg->address, val);
22	if (!err) {
23		u64 mask = GENMASK_ULL(reg->bit_offset + reg->bit_width - 1,
24				       reg->bit_offset);
25
26		*val &= mask;
27		*val >>= reg->bit_offset;
28	}
29	return err;
30}
31
32int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val)
33{
34	u64 rd_val;
35	int err;
36
37	err = rdmsrl_safe_on_cpu(cpunum, reg->address, &rd_val);
38	if (!err) {
39		u64 mask = GENMASK_ULL(reg->bit_offset + reg->bit_width - 1,
40				       reg->bit_offset);
41
42		val <<= reg->bit_offset;
43		val &= mask;
44		rd_val &= ~mask;
45		rd_val |= val;
46		err = wrmsrl_safe_on_cpu(cpunum, reg->address, rd_val);
47	}
48	return err;
49}

 
 1/*
 2 * cppc_msr.c:  MSR Interface for CPPC
 3 * Copyright (c) 2016, Intel Corporation.
 4 *
 5 * This program is free software; you can redistribute it and/or modify it
 6 * under the terms and conditions of the GNU General Public License,
 7 * version 2, as published by the Free Software Foundation.
 8 *
 9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12 * more details.
13 *
14 */
15
16#include <acpi/cppc_acpi.h>
17#include <asm/msr.h>
18
19/* Refer to drivers/acpi/cppc_acpi.c for the description of functions */
20
21bool cpc_ffh_supported(void)
22{
23	return true;
24}
25
26int cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val)
27{
28	int err;
29
30	err = rdmsrl_safe_on_cpu(cpunum, reg->address, val);
31	if (!err) {
32		u64 mask = GENMASK_ULL(reg->bit_offset + reg->bit_width - 1,
33				       reg->bit_offset);
34
35		*val &= mask;
36		*val >>= reg->bit_offset;
37	}
38	return err;
39}
40
41int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val)
42{
43	u64 rd_val;
44	int err;
45
46	err = rdmsrl_safe_on_cpu(cpunum, reg->address, &rd_val);
47	if (!err) {
48		u64 mask = GENMASK_ULL(reg->bit_offset + reg->bit_width - 1,
49				       reg->bit_offset);
50
51		val <<= reg->bit_offset;
52		val &= mask;
53		rd_val &= ~mask;
54		rd_val |= val;
55		err = wrmsrl_safe_on_cpu(cpunum, reg->address, rd_val);
56	}
57	return err;
58}