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1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _SPARC64_CACHEFLUSH_H
3#define _SPARC64_CACHEFLUSH_H
4
5#include <asm/page.h>
6
7#ifndef __ASSEMBLY__
8
9#include <linux/mm.h>
10
11/* Cache flush operations. */
12#define flushw_all() __asm__ __volatile__("flushw")
13
14void __flushw_user(void);
15#define flushw_user() __flushw_user()
16
17#define flush_user_windows flushw_user
18#define flush_register_windows flushw_all
19
20/* These are the same regardless of whether this is an SMP kernel or not. */
21#define flush_cache_mm(__mm) \
22 do { if ((__mm) == current->mm) flushw_user(); } while(0)
23#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
24#define flush_cache_range(vma, start, end) \
25 flush_cache_mm((vma)->vm_mm)
26#define flush_cache_page(vma, page, pfn) \
27 flush_cache_mm((vma)->vm_mm)
28
29/*
30 * On spitfire, the icache doesn't snoop local stores and we don't
31 * use block commit stores (which invalidate icache lines) during
32 * module load, so we need this.
33 */
34void flush_icache_range(unsigned long start, unsigned long end);
35void __flush_icache_page(unsigned long);
36
37void __flush_dcache_page(void *addr, int flush_icache);
38void flush_dcache_page_impl(struct page *page);
39#ifdef CONFIG_SMP
40void smp_flush_dcache_page_impl(struct page *page, int cpu);
41void flush_dcache_page_all(struct mm_struct *mm, struct page *page);
42#else
43#define smp_flush_dcache_page_impl(page,cpu) flush_dcache_page_impl(page)
44#define flush_dcache_page_all(mm,page) flush_dcache_page_impl(page)
45#endif
46
47void __flush_dcache_range(unsigned long start, unsigned long end);
48#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
49void flush_dcache_page(struct page *page);
50
51#define flush_icache_page(vma, pg) do { } while(0)
52#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
53
54void flush_ptrace_access(struct vm_area_struct *, struct page *,
55 unsigned long uaddr, void *kaddr,
56 unsigned long len, int write);
57
58#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
59 do { \
60 flush_cache_page(vma, vaddr, page_to_pfn(page)); \
61 memcpy(dst, src, len); \
62 flush_ptrace_access(vma, page, vaddr, src, len, 0); \
63 } while (0)
64
65#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
66 do { \
67 flush_cache_page(vma, vaddr, page_to_pfn(page)); \
68 memcpy(dst, src, len); \
69 flush_ptrace_access(vma, page, vaddr, dst, len, 1); \
70 } while (0)
71
72#define flush_dcache_mmap_lock(mapping) do { } while (0)
73#define flush_dcache_mmap_unlock(mapping) do { } while (0)
74
75#define flush_cache_vmap(start, end) do { } while (0)
76#define flush_cache_vunmap(start, end) do { } while (0)
77
78#endif /* !__ASSEMBLY__ */
79
80#endif /* _SPARC64_CACHEFLUSH_H */
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _SPARC64_CACHEFLUSH_H
3#define _SPARC64_CACHEFLUSH_H
4
5#include <asm/page.h>
6
7#ifndef __ASSEMBLY__
8
9#include <linux/mm.h>
10
11/* Cache flush operations. */
12#define flushw_all() __asm__ __volatile__("flushw")
13
14void __flushw_user(void);
15#define flushw_user() __flushw_user()
16
17#define flush_user_windows flushw_user
18#define flush_register_windows flushw_all
19
20/* These are the same regardless of whether this is an SMP kernel or not. */
21#define flush_cache_mm(__mm) \
22 do { if ((__mm) == current->mm) flushw_user(); } while(0)
23#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
24#define flush_cache_range(vma, start, end) \
25 flush_cache_mm((vma)->vm_mm)
26#define flush_cache_page(vma, page, pfn) \
27 flush_cache_mm((vma)->vm_mm)
28
29/*
30 * On spitfire, the icache doesn't snoop local stores and we don't
31 * use block commit stores (which invalidate icache lines) during
32 * module load, so we need this.
33 */
34void flush_icache_range(unsigned long start, unsigned long end);
35void __flush_icache_page(unsigned long);
36
37void __flush_dcache_page(void *addr, int flush_icache);
38void flush_dcache_page_impl(struct page *page);
39#ifdef CONFIG_SMP
40void smp_flush_dcache_page_impl(struct page *page, int cpu);
41void flush_dcache_page_all(struct mm_struct *mm, struct page *page);
42#else
43#define smp_flush_dcache_page_impl(page,cpu) flush_dcache_page_impl(page)
44#define flush_dcache_page_all(mm,page) flush_dcache_page_impl(page)
45#endif
46
47void __flush_dcache_range(unsigned long start, unsigned long end);
48#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
49void flush_dcache_page(struct page *page);
50
51#define flush_icache_page(vma, pg) do { } while(0)
52#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
53
54void flush_ptrace_access(struct vm_area_struct *, struct page *,
55 unsigned long uaddr, void *kaddr,
56 unsigned long len, int write);
57
58#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
59 do { \
60 flush_cache_page(vma, vaddr, page_to_pfn(page)); \
61 memcpy(dst, src, len); \
62 flush_ptrace_access(vma, page, vaddr, src, len, 0); \
63 } while (0)
64
65#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
66 do { \
67 flush_cache_page(vma, vaddr, page_to_pfn(page)); \
68 memcpy(dst, src, len); \
69 flush_ptrace_access(vma, page, vaddr, dst, len, 1); \
70 } while (0)
71
72#define flush_dcache_mmap_lock(mapping) do { } while (0)
73#define flush_dcache_mmap_unlock(mapping) do { } while (0)
74
75#define flush_cache_vmap(start, end) do { } while (0)
76#define flush_cache_vunmap(start, end) do { } while (0)
77
78#endif /* !__ASSEMBLY__ */
79
80#endif /* _SPARC64_CACHEFLUSH_H */